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@@ -40,8 +40,13 @@ static uec_info_t eth1_uec_info = {
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.tx_clock = CFG_UEC1_TX_CLK,
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.eth_type = CFG_UEC1_ETH_TYPE,
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},
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+#if (CFG_UEC1_ETH_TYPE == FAST_ETH)
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+ .num_threads_tx = UEC_NUM_OF_THREADS_1,
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+ .num_threads_rx = UEC_NUM_OF_THREADS_1,
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+#else
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.num_threads_tx = UEC_NUM_OF_THREADS_4,
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.num_threads_rx = UEC_NUM_OF_THREADS_4,
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+#endif
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.riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.tx_bd_ring_len = 16,
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@@ -58,8 +63,13 @@ static uec_info_t eth2_uec_info = {
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.tx_clock = CFG_UEC2_TX_CLK,
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.eth_type = CFG_UEC2_ETH_TYPE,
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},
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+#if (CFG_UEC2_ETH_TYPE == FAST_ETH)
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+ .num_threads_tx = UEC_NUM_OF_THREADS_1,
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+ .num_threads_rx = UEC_NUM_OF_THREADS_1,
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+#else
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.num_threads_tx = UEC_NUM_OF_THREADS_4,
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.num_threads_rx = UEC_NUM_OF_THREADS_4,
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+#endif
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.riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.tx_bd_ring_len = 16,
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@@ -68,7 +78,6 @@ static uec_info_t eth2_uec_info = {
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.enet_interface = CFG_UEC2_INTERFACE_MODE,
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};
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#endif
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-
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#ifdef CONFIG_UEC_ETH3
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static uec_info_t eth3_uec_info = {
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.uf_info = {
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@@ -77,8 +86,13 @@ static uec_info_t eth3_uec_info = {
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.tx_clock = CFG_UEC3_TX_CLK,
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.eth_type = CFG_UEC3_ETH_TYPE,
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},
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+#if (CFG_UEC3_ETH_TYPE == FAST_ETH)
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+ .num_threads_tx = UEC_NUM_OF_THREADS_1,
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+ .num_threads_rx = UEC_NUM_OF_THREADS_1,
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+#else
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.num_threads_tx = UEC_NUM_OF_THREADS_4,
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.num_threads_rx = UEC_NUM_OF_THREADS_4,
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+#endif
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.riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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.tx_bd_ring_len = 16,
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@@ -87,6 +101,29 @@ static uec_info_t eth3_uec_info = {
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.enet_interface = CFG_UEC3_INTERFACE_MODE,
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};
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#endif
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+#ifdef CONFIG_UEC_ETH4
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+static uec_info_t eth4_uec_info = {
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+ .uf_info = {
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+ .ucc_num = CFG_UEC4_UCC_NUM,
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+ .rx_clock = CFG_UEC4_RX_CLK,
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+ .tx_clock = CFG_UEC4_TX_CLK,
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+ .eth_type = CFG_UEC4_ETH_TYPE,
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+ },
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+#if (CFG_UEC4_ETH_TYPE == FAST_ETH)
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+ .num_threads_tx = UEC_NUM_OF_THREADS_1,
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+ .num_threads_rx = UEC_NUM_OF_THREADS_1,
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+#else
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+ .num_threads_tx = UEC_NUM_OF_THREADS_4,
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+ .num_threads_rx = UEC_NUM_OF_THREADS_4,
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+#endif
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+ .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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+ .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2,
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+ .tx_bd_ring_len = 16,
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+ .rx_bd_ring_len = 16,
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+ .phy_address = CFG_UEC4_PHY_ADDR,
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+ .enet_interface = CFG_UEC4_INTERFACE_MODE,
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+};
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+#endif
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static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)
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{
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@@ -1261,6 +1298,10 @@ int uec_initialize(int index)
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} else if (index == 2) {
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#ifdef CONFIG_UEC_ETH3
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uec_info = ð3_uec_info;
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+#endif
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+ } else if (index == 3) {
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+#ifdef CONFIG_UEC_ETH4
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+ uec_info = ð4_uec_info;
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#endif
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} else {
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printf("%s: index is illegal.\n", __FUNCTION__);
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