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@@ -43,7 +43,7 @@ void pci_init_board(void)
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{
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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struct fsl_pci_info pci_info[2];
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struct fsl_pci_info pci_info[2];
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- u32 devdisr, pordevsr, io_sel, host_agent;
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+ u32 devdisr, pordevsr, io_sel;
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int first_free_busno = 0;
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int first_free_busno = 0;
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int num = 0;
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int num = 0;
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@@ -52,21 +52,19 @@ void pci_init_board(void)
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devdisr = in_be32(&gur->devdisr);
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devdisr = in_be32(&gur->devdisr);
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pordevsr = in_be32(&gur->pordevsr);
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pordevsr = in_be32(&gur->pordevsr);
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io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
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- host_agent = (in_be32(&gur->porbmsr) & MPC85xx_PORBMSR_HA) >> 16;
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- debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
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- devdisr, io_sel, host_agent);
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+ debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
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printf (" eTSEC2 is in sgmii mode.\n");
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printf (" eTSEC2 is in sgmii mode.\n");
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puts("\n");
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puts("\n");
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#ifdef CONFIG_PCIE2
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#ifdef CONFIG_PCIE2
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- pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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SET_STD_PCIE_INFO(pci_info[num], 2);
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SET_STD_PCIE_INFO(pci_info[num], 2);
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+ pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
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printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
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printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
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pcie_ep ? "End Point" : "Root Complex",
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pcie_ep ? "End Point" : "Root Complex",
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pci_info[num].regs);
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pci_info[num].regs);
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@@ -81,11 +79,11 @@ void pci_init_board(void)
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#endif
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#endif
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#ifdef CONFIG_PCIE1
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#ifdef CONFIG_PCIE1
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- pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
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pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
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SET_STD_PCIE_INFO(pci_info[num], 1);
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SET_STD_PCIE_INFO(pci_info[num], 1);
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+ pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
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printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
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printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
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pcie_ep ? "End Point" : "Root Complex",
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pcie_ep ? "End Point" : "Root Complex",
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pci_info[num].regs);
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pci_info[num].regs);
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