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@@ -122,17 +122,17 @@ void setup_5441x_clocks(void)
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vco = ((in_be32(&pll->pcr) & PLL_CR_FBKDIV_BITS) + 1) *
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vco = ((in_be32(&pll->pcr) & PLL_CR_FBKDIV_BITS) + 1) *
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CONFIG_SYS_INPUT_CLKSRC;
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CONFIG_SYS_INPUT_CLKSRC;
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- gd->vco_clk = vco;
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+ gd->arch.vco_clk = vco;
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- gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
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+ gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
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pdr = in_be32(&pll->pdr);
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pdr = in_be32(&pll->pdr);
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temp = (pdr & PLL_DR_OUTDIV1_BITS) + 1;
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temp = (pdr & PLL_DR_OUTDIV1_BITS) + 1;
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gd->cpu_clk = vco / temp; /* cpu clock */
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gd->cpu_clk = vco / temp; /* cpu clock */
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- gd->flb_clk = vco / temp; /* FlexBus clock */
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- gd->flb_clk >>= 1;
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+ gd->arch.flb_clk = vco / temp; /* FlexBus clock */
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+ gd->arch.flb_clk >>= 1;
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if (in_be16(ccm->misccr2) & 2) /* fsys/4 */
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if (in_be16(ccm->misccr2) & 2) /* fsys/4 */
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- gd->flb_clk >>= 1;
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+ gd->arch.flb_clk >>= 1;
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temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
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temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
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gd->bus_clk = vco / temp; /* bus clock */
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gd->bus_clk = vco / temp; /* bus clock */
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