Merge commit 'wd/master'

CHANGELOG

@@ -7221,7 +7221,7 @@ Date:	Mon Mar 3 11:57:23 2008 +0000
     Originally pointed out by Laurent Pinchart <laurent.pinchart@tbox.biz>,
     see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/22846
 
-    Signed-off-by: Bernhard Nemec <bnemec <at> ganssloser.com>
+    Signed-off-by: Bernhard Nemec <bnemec@ganssloser.com>
 
 commit 84d0c2f1e39caff58bf765a7ab7c72da23c25ec8
 Author: Kim B. Heino <Kim.Heino@bluegiga.com>
@@ -8451,7 +8451,7 @@ Date:	Mon Feb 18 14:01:56 2008 -0600
     86xx: Convert sbc8641d to use libfdt.
 
     This is the proper fix for a missing closing brace in the function
-    ft_cpu_setup() noticed by joe.hamman <at> embeddedspecialties.com.
+    ft_cpu_setup() noticed by joe.hamman@embeddedspecialties.com.
     The ft_cpu_setup() function in mpc8641hpcn.c should have been
     removed earlier as it was under the obsolete CONFIG_OF_FLAT_TREE,
     but was missed.  Only, the sbc8641d was nominally still using it.
@@ -8846,7 +8846,7 @@ Date:	Fri Feb 22 11:40:50 2008 +0000
 
     We already have a vendor subdir for Atmel, so we should use it.
 
-    Signed-off-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
+    Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
 
 commit 6d0943a6be99977d6d853d51749e9963d68eb192
 Author: Andreas Engel <andreas.engel@ericsson.com>
@@ -8896,8 +8896,8 @@ Date:	Thu Jan 3 21:15:56 2008 +0000
 
     AT91CAP9 support : MACB changes
 
-    Signed-off-by: Stelian Pop <stelian <at> popies.net>
-    Acked-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
+    Signed-off-by: Stelian Pop <stelian@popies.net>
+    Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
 
 commit 6afcabf11d7321850f4feaadfee841488ace54c5
 Author: Stelian Pop <stelian@popies.net>
@@ -8913,7 +8913,7 @@ Date:	Wed Jan 30 21:15:54 2008 +0000
 
     AT91CAP9 support : cpu/ files
 
-    Signed-off-by: Stelian Pop <stelian <at> popies.net>
+    Signed-off-by: Stelian Pop <stelian@popies.net>
 
 commit fa506a926cec348805143576c941f8e61b333cc0
 Author: Stelian Pop <stelian@popies.net>

MAINTAINERS

@@ -204,6 +204,10 @@ Klaus Heydeck <heydeck@kieback-peter.de>
 	KUP4K			MPC855
 	KUP4X			MPC859
 
+Gary Jennejohn <garyj@denx.de>
+
+	quad100hd		PPC405EP
+
 Murray Jensen <Murray.Jensen@csiro.au>
 
 	cogent_mpc8xx		MPC8xx
@@ -538,6 +542,9 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
 
 	at91cap9adk		ARM926EJS (AT91CAP9 SoC)
 	at91sam9260ek		ARM926EJS (AT91SAM9260 SoC)
+	at91sam9261ek		ARM926EJS (AT91SAM9261 SoC)
+	at91sam9263ek		ARM926EJS (AT91SAM9263 SoC)
+	at91sam9rlek		ARM926EJS (AT91SAM9RL SoC)
 
 Stefan Roese <sr@denx.de>
 
@@ -695,6 +702,7 @@ Haavard Skinnemoen <hskinnemoen@atmel.com>
 	ATSTK1002		AT32AP7000
 	ATSTK1003		AT32AP7001
 	ATSTK1004		AT32AP7002
+	ATSTK1006		AT32AP7000
 	ATNGW100		AT32AP7000
 
 #########################################################################

MAKEALL

@@ -219,6 +219,7 @@ LIST_4xx="		\
 	PMC405		\
 	PMC440		\
 	PPChameleonEVB	\
+	quad100hd	\
 	rainier		\
 	sbc405		\
 	sc3		\
@@ -354,6 +355,7 @@ LIST_85xx="		\
 	sbc8540		\
 	sbc8548		\
 	sbc8560		\
+	socrates	\
 	stxgp3		\
 	stxssa		\
 	TQM8540		\
@@ -460,6 +462,9 @@ LIST_ARM9="			\
 	at91cap9adk		\
 	at91rm9200dk		\
 	at91sam9260ek		\
+	at91sam9261ek		\
+	at91sam9263ek		\
+	at91sam9rlek		\
 	cmc_pu2			\
 	ap920t			\
 	ap922_XA10		\
@@ -519,6 +524,24 @@ LIST_ARM11="		\
 	mx31ads		\
 "
 
+#########################################################################
+## AT91 Systems
+#########################################################################
+
+LIST_at91="		\
+	at91cap9adk	\
+	at91rm9200dk	\
+	at91sam9260ek	\
+	at91sam9261ek	\
+	at91sam9263ek	\
+	at91sam9rlek	\
+	cmc_pu2		\
+	csb637		\
+	kb9202		\
+	mp2usb		\
+	m501sk		\
+"
+
 #########################################################################
 ## Xscale Systems
 #########################################################################
@@ -696,6 +719,7 @@ LIST_avr32="		\
 	atstk1002	\
 	atstk1003	\
 	atstk1004	\
+	atstk1006	\
 	atngw100	\
 "
 
@@ -764,7 +788,7 @@ build_target() {
 for arg in $@
 do
 	case "$arg" in
-	arm|SA|ARM7|ARM9|ARM10|ARM11|ixp|pxa \
+	arm|SA|ARM7|ARM9|ARM10|ARM11|at91|ixp|pxa \
 	|avr32 \
 	|blackfin \
 	|coldfire \

Makefile

@@ -224,6 +224,7 @@ LIBS += drivers/mtd/libmtd.a
 LIBS += drivers/mtd/nand/libnand.a
 LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
 LIBS += drivers/mtd/onenand/libonenand.a
+LIBS += drivers/mtd/spi/libspi_flash.a
 LIBS += drivers/net/libnet.a
 LIBS += drivers/net/sk98lin/libsk98lin.a
 LIBS += drivers/pci/libpci.a
@@ -390,6 +391,7 @@ TAG_SUBDIRS += drivers/mtd
 TAG_SUBDIRS += drivers/mtd/nand
 TAG_SUBDIRS += drivers/mtd/nand_legacy
 TAG_SUBDIRS += drivers/mtd/onenand
+TAG_SUBDIRS += drivers/mtd/spi
 TAG_SUBDIRS += drivers/net
 TAG_SUBDIRS += drivers/net/sk98lin
 TAG_SUBDIRS += drivers/pci
@@ -1391,6 +1393,9 @@ PPChameleonEVB_HI_33_config:	unconfig
 		}
 	@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
 
+quad100hd_config:	unconfig
+	@$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd
+
 sbc405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
 
@@ -2208,6 +2213,9 @@ sbc8560_66_config:	unconfig
 	fi
 	@$(MKCONFIG) -a sbc8560 ppc mpc85xx sbc8560
 
+socrates_config:	unconfig
+	@$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates
+
 stxgp3_config:		unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
 
@@ -2332,6 +2340,15 @@ shannon_config	:	unconfig
 at91rm9200dk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t at91rm9200dk atmel at91rm9200
 
+at91sam9261ek_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91sam9
+
+at91sam9263ek_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91sam9
+
+at91sam9rlek_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91sam9
+
 cmc_pu2_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
 
@@ -2876,6 +2893,9 @@ atstk1003_config	:	unconfig
 atstk1004_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 
+atstk1006_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
+
 atngw100_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
 

README

@@ -961,6 +961,10 @@ The following options need to be configured:
 		display); also select one of the supported displays
 		by defining one of these:
 
+		CONFIG_ATMEL_LCD:
+
+			HITACHI TX09D70VM1CCA, 3.5", 240x320.
+
 		CONFIG_NEC_NL6448AC33:
 
 			NEC NL6448AC33-18. Active, color, single scan.

board/MAI/AmigaOneG3SE/AmigaOneG3SE.c

@@ -14,7 +14,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -30,48 +30,48 @@
 #include "memio.h"
 #include "via686.h"
 
-__asm__(" .globl send_kb                   		    \n "
-	"send_kb:                                           \n "
-	"	lis     r9, 0xfe00                          \n "
-	"						    \n "
-	"	li      r4, 0x10        # retries           \n "
-	"	mtctr   r4                                  \n "
-	"						    \n "
-	"idle:                                              \n "
-	"	lbz     r4, 0x64(r9)                        \n "
-	"	andi.   r4, r4, 0x02                        \n "
-	"	bne     idle                                \n "
-
-	"ready:                                             \n "
-	"	stb     r3, 0x60(r9)                        \n "
-	"						    \n "
-	"check:                                             \n "
-	"	lbz     r4, 0x64(r9)                        \n "
-	"	andi.   r4, r4, 0x01                        \n "
-	"	beq     check                               \n "
-	"						    \n "
-	"	lbz     r4, 0x60(r9)                        \n "
-	"	cmpwi   r4, 0xfa                            \n "
-	"	beq     done                                \n "
-
-	"	bdnz    idle                                \n "
-
-	"	li      r3, 0                               \n "
-	"	blr                                         \n "
-
-	"done:                                              \n "
-	"	li      r3, 1                               \n "
-	"	blr                                         \n "
-
-	".globl test_kb                                     \n "
-	"test_kb:                                           \n "
-	"	mflr    r10                                 \n "
-	"	li      r3, 0xed                            \n "
-	"	bl      send_kb                             \n "
-	"	li      r3, 0x01                            \n "
-	"	bl      send_kb                             \n "
-	"	mtlr    r10                                 \n "
-	"	blr                                         "
+__asm__(" .globl send_kb				\n "
+	"send_kb:					\n "
+	"	lis	r9, 0xfe00			\n "
+	"						\n "
+	"	li	r4, 0x10	# retries	\n "
+	"	mtctr	r4				\n "
+	"						\n "
+	"idle:						\n "
+	"	lbz	r4, 0x64(r9)			\n "
+	"	andi.	r4, r4, 0x02			\n "
+	"	bne	idle				\n "
+
+	"ready:						\n "
+	"	stb	r3, 0x60(r9)			\n "
+	"						\n "
+	"check:						\n "
+	"	lbz	r4, 0x64(r9)			\n "
+	"	andi.	r4, r4, 0x01			\n "
+	"	beq	check				\n "
+	"						\n "
+	"	lbz	r4, 0x60(r9)			\n "
+	"	cmpwi	r4, 0xfa			\n "
+	"	beq	done				\n "
+
+	"	bdnz	idle				\n "
+
+	"	li	r3, 0				\n "
+	"	blr					\n "
+
+	"done:						\n "
+	"	li	r3, 1				\n "
+	"	blr					\n "
+
+	".globl test_kb					\n "
+	"test_kb:					\n "
+	"	mflr	r10				\n "
+	"	li	r3, 0xed			\n "
+	"	bl	send_kb				\n "
+	"	li	r3, 0x01			\n "
+	"	bl	send_kb				\n "
+	"	mtlr	r10				\n "
+	"	blr					\n "
 );
 
 

board/MAI/AmigaOneG3SE/enet.c

@@ -90,8 +90,8 @@
 #define DMADone			(1<<8)
 #define DownComplete		(1<<9)
 #define UpComplete		(1<<10)
-#define DMAInProgress		(1<<11)			/* DMA controller is still busy.*/
-#define CmdInProgress		(1<<12)          	/* EL3_CMD is still busy.*/
+#define DMAInProgress		(1<<11)		/* DMA controller is still busy.*/
+#define CmdInProgress		(1<<12)		/* EL3_CMD is still busy.*/
 
 /* Polling Registers */
 
@@ -100,17 +100,17 @@
 
 /* Register window 0 offets */
 
-#define Wn0EepromCmd		10	         	/* Window 0: EEPROM command register. */
-#define Wn0EepromData		12            		/* Window 0: EEPROM results register. */
-#define IntrStatus		0x0E	                /* Valid in all windows. */
+#define Wn0EepromCmd		10		/* Window 0: EEPROM command register. */
+#define Wn0EepromData		12		/* Window 0: EEPROM results register. */
+#define IntrStatus		0x0E		/* Valid in all windows. */
 
 /* Register window 0 EEPROM bits */
 
 #define EEPROM_Read		0x80
 #define EEPROM_WRITE		0x40
 #define EEPROM_ERASE		0xC0
-#define EEPROM_EWENB		0x30          		/* Enable erasing/writing for 10 msec. */
-#define EEPROM_EWDIS		0x00           		/* Disable EWENB before 10 msec timeout. */
+#define EEPROM_EWENB		0x30		/* Enable erasing/writing for 10 msec. */
+#define EEPROM_EWDIS		0x00		/* Disable EWENB before 10 msec timeout. */
 
 /* EEPROM locations. */
 
@@ -135,7 +135,7 @@
 #define RxStatus		0x18
 #define Timer			0x1A
 #define TxStatus		0x1B
-#define TxFree			0x1C			/* Remaining free bytes in Tx buffer. */
+#define TxFree			0x1C		/* Remaining free bytes in Tx buffer. */
 
 /* Register Window 2 */
 
@@ -143,23 +143,23 @@
 
 /* Register Window 3: MAC/config bits */
 
-#define Wn3_Config		0			/* Internal Configuration */
+#define Wn3_Config		0		/* Internal Configuration */
 #define Wn3_MAC_Ctrl		6
 #define Wn3_Options		8
 
 #define BFEXT(value, offset, bitcount)					\
 	((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
 
-#define BFINS(lhs, rhs, offset, bitcount)                                       \
+#define BFINS(lhs, rhs, offset, bitcount)					\
 	(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) |			\
 	(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
 
-#define RAM_SIZE(v)             BFEXT(v, 0, 3)
+#define RAM_SIZE(v)		BFEXT(v, 0, 3)
 #define RAM_WIDTH(v)		BFEXT(v, 3, 1)
-#define RAM_SPEED(v) 	   	BFEXT(v, 4, 2)
-#define ROM_SIZE(v)             BFEXT(v, 6, 2)
+#define RAM_SPEED(v)		BFEXT(v, 4, 2)
+#define ROM_SIZE(v)		BFEXT(v, 6, 2)
 #define RAM_SPLIT(v)		BFEXT(v, 16, 2)
-#define XCVR(v)                 BFEXT(v, 20, 4)
+#define XCVR(v)			BFEXT(v, 20, 4)
 #define AUTOSELECT(v)		BFEXT(v, 24, 1)
 
 /* Register Window 4: Xcvr/media bits */
@@ -186,20 +186,20 @@
 #define DownListPtr		0x24
 #define FragAddr		0x28
 #define FragLen			0x2c
-#define TxFreeThreshold 	0x2f
+#define TxFreeThreshold	0x2f
 #define UpPktStatus		0x30
-#define UpListPtr 		0x38
+#define UpListPtr		0x38
 
 /* The Rx and Tx descriptor lists. */
 
-#define LAST_FRAG       0x80000000                      /* Last Addr/Len pair in descriptor. */
-#define DN_COMPLETE     0x00010000                      /* This packet has been downloaded */
+#define LAST_FRAG	0x80000000		/* Last Addr/Len pair in descriptor. */
+#define DN_COMPLETE	0x00010000		/* This packet has been downloaded */
 
 struct rx_desc_3com {
-	u32 next;                                       /* Last entry points to 0	   	*/
-	u32 status;					/* FSH -> Frame Start Header 		*/
-	u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
-	u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
+	u32 next;				/* Last entry points to 0		*/
+	u32 status;				/* FSH -> Frame Start Header		*/
+	u32 addr;				/* Up to 63 addr/len pairs possible	*/
+	u32 length;				/* Set LAST_FRAG to indicate last pair	*/
 };
 
 /* Values for the Rx status entry. */
@@ -214,8 +214,8 @@ struct rx_desc_3com {
 #define UDPChksumValid		(1<<31)
 
 struct tx_desc_3com {
-	u32 next;                                       /* Last entry points to 0		*/
-	u32 status;                                     /* bits 0:12 length, others see below	*/
+	u32 next;				/* Last entry points to 0		*/
+	u32 status;				/* bits 0:12 length, others see below	*/
 	u32 addr;
 	u32 length;
 };
@@ -227,7 +227,7 @@ struct tx_desc_3com {
 #define AddIPChksum		0x02000000
 #define AddTCPChksum		0x04000000
 #define AddUDPChksum		0x08000000
-#define TxIntrUploaded		0x80000000              /* IRQ when in FIFO, but maybe not sent. */
+#define TxIntrUploaded		0x80000000	/* IRQ when in FIFO, but maybe not sent. */
 
 /* XCVR Types */
 
@@ -240,19 +240,19 @@ struct tx_desc_3com {
 #define XCVR_MII		6
 #define XCVR_NWAY		8
 #define XCVR_ExtMII		9
-#define XCVR_Default		10			/* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
+#define XCVR_Default		10		/* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
 
-struct descriptor {			    		/* A generic descriptor. */
-	u32 next;                                       /* Last entry points to 0	   	*/
-	u32 status;					/* FSH -> Frame Start Header 		*/
-	u32 addr;                                       /* Up to 63 addr/len pairs possible 	*/
-	u32 length;                                     /* Set LAST_FRAG to indicate last pair	*/
+struct descriptor {				/* A generic descriptor. */
+	u32 next;				/* Last entry points to 0		*/
+	u32 status;				/* FSH -> Frame Start Header		*/
+	u32 addr;				/* Up to 63 addr/len pairs possible	*/
+	u32 length;				/* Set LAST_FRAG to indicate last pair	*/
 };
 
 /* Misc. definitions */
 
-#define NUM_RX_DESC 		PKTBUFSRX * 10
-#define NUM_TX_DESC 		1            /* Number of TX descriptors   */
+#define NUM_RX_DESC		PKTBUFSRX * 10
+#define NUM_TX_DESC		1		/* Number of TX descriptors   */
 
 #define TOUT_LOOP		1000000
 
@@ -266,17 +266,17 @@ struct descriptor {			    		/* A generic descriptor. */
 #undef ETH_DEBUG
 
 #ifdef ETH_DEBUG
-#define PRINTF(fmt,args...)     printf (fmt ,##args)
+#define PRINTF(fmt,args...)	printf (fmt ,##args)
 #else
 #define PRINTF(fmt,args...)
 #endif
 
 
-static struct rx_desc_3com *rx_ring;		 	/* RX descriptor ring         		*/
-static struct tx_desc_3com *tx_ring;		 	/* TX descriptor ring         		*/
-static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN];	/* storage for the incoming messages 	*/
-static int rx_next = 0;                      		/* RX descriptor ring pointer 		*/
-static int tx_next = 0;                      		/* TX descriptor ring pointer 		*/
+static struct rx_desc_3com *rx_ring;		/* RX descriptor ring		*/
+static struct tx_desc_3com *tx_ring;		/* TX descriptor ring		*/
+static u8 rx_buffer[NUM_RX_DESC][PKTSIZE_ALIGN];/* storage for the incoming messages	*/
+static int rx_next = 0;				/* RX descriptor ring pointer		*/
+static int tx_next = 0;				/* TX descriptor ring pointer		*/
 static int tx_threshold;
 
 static void  init_rx_ring(struct eth_device* dev);
@@ -369,171 +369,163 @@ static int issue_and_wait(struct eth_device* dev, int command)
 	return 0;
 }
 
-/* Determine network media type and set up 3com accordingly           */
+/* Determine network media type and set up 3com accordingly	      */
 /* I think I'm going to start with something known first like 10baseT */
 
-static int auto_negotiate(struct eth_device* dev)
+static int auto_negotiate (struct eth_device *dev)
 {
-    int i;
+	int i;
 
-    EL3WINDOW(dev, 1);
+	EL3WINDOW (dev, 1);
 
-    /* Wait for Auto negotiation to complete */
-    for (i = 0; i <= 1000; i++)
-    {
-	if (ETH_INW(dev, 2) & 0x04)
-	    break;
-	udelay(100);
+	/* Wait for Auto negotiation to complete */
+	for (i = 0; i <= 1000; i++) {
+		if (ETH_INW (dev, 2) & 0x04)
+			break;
+		udelay (100);
 
-	if (i == 1000)
-	{
-	    PRINTF("Error: Auto negotiation failed\n");
-	    return 0;
+		if (i == 1000) {
+			PRINTF ("Error: Auto negotiation failed\n");
+			return 0;
+		}
 	}
-    }
 
 
-    return 1;
+	return 1;
 }
 
-void eth_interrupt(struct eth_device *dev)
+void eth_interrupt (struct eth_device *dev)
 {
-    u16 status = ETH_STATUS(dev);
+	u16 status = ETH_STATUS (dev);
 
-    printf("eth0: status = 0x%04x\n", status);
+	printf ("eth0: status = 0x%04x\n", status);
 
-    if (!(status & IntLatch))
-	return;
+	if (!(status & IntLatch))
+		return;
+
+	if (status & (1 << 6)) {
+		ETH_CMD (dev, AckIntr | (1 << 6));
+		printf ("Acknowledged Interrupt command\n");
+	}
+
+	if (status & DownComplete) {
+		ETH_CMD (dev, AckIntr | DownComplete);
+		printf ("Acknowledged DownComplete\n");
+	}
+
+	if (status & UpComplete) {
+		ETH_CMD (dev, AckIntr | UpComplete);
+		printf ("Acknowledged UpComplete\n");
+	}
 
-    if (status & (1<<6))
-    {
-	ETH_CMD(dev, AckIntr | (1<<6));
-	printf("Acknowledged Interrupt command\n");
-    }
-
-    if (status & DownComplete)
-    {
-	ETH_CMD(dev, AckIntr | DownComplete);
-	printf("Acknowledged DownComplete\n");
-    }
-
-    if (status & UpComplete)
-    {
-	ETH_CMD(dev, AckIntr | UpComplete);
-	printf("Acknowledged UpComplete\n");
-    }
-
-    ETH_CMD(dev, AckIntr | IntLatch);
-    printf("Acknowledged IntLatch\n");
+	ETH_CMD (dev, AckIntr | IntLatch);
+	printf ("Acknowledged IntLatch\n");
 }
 
-int eth_3com_initialize(bd_t *bis)
+int eth_3com_initialize (bd_t * bis)
 {
 	u32 eth_iobase = 0, status;
 	int card_number = 0, ret;
-	struct eth_device* dev;
+	struct eth_device *dev;
 	pci_dev_t devno;
 	char *s;
 
-	s = getenv("3com_base");
+	s = getenv ("3com_base");
 
 	/* Find ethernet controller on the PCI bus */
 
-	if ((devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0)) < 0)
-	{
-		PRINTF("Error: Cannot find the ethernet device on the PCI bus\n");
+	if ((devno =
+	     pci_find_device (PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C,
+			      0)) < 0) {
+		PRINTF ("Error: Cannot find the ethernet device on the PCI bus\n");
 		goto Done;
 	}
 
-	if (s)
-	{
-	    unsigned long base = atoi(s);
-	    pci_write_config_dword(devno, PCI_BASE_ADDRESS_0, base | 0x01);
+	if (s) {
+		unsigned long base = atoi (s);
+
+		pci_write_config_dword (devno, PCI_BASE_ADDRESS_0,
+					base | 0x01);
 	}
 
-	ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
+	ret = pci_read_config_dword (devno, PCI_BASE_ADDRESS_0, &eth_iobase);
 	eth_iobase &= ~0xf;
 
-	PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
+	PRINTF ("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
 
-	pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
+	pci_write_config_dword (devno, PCI_COMMAND,
+				PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+				PCI_COMMAND_MASTER);
 
-	 /* Check if I/O accesses and Bus Mastering are enabled */
+	/* Check if I/O accesses and Bus Mastering are enabled */
 
-	ret = pci_read_config_dword(devno, PCI_COMMAND, &status);
+	ret = pci_read_config_dword (devno, PCI_COMMAND, &status);
 
-	if (!(status & PCI_COMMAND_IO))
-	{
-		printf("Error: Cannot enable IO access.\n");
+	if (!(status & PCI_COMMAND_IO)) {
+		printf ("Error: Cannot enable IO access.\n");
 		goto Done;
 	}
 
-	if (!(status & PCI_COMMAND_MEMORY))
-	{
-		printf("Error: Cannot enable MEMORY access.\n");
+	if (!(status & PCI_COMMAND_MEMORY)) {
+		printf ("Error: Cannot enable MEMORY access.\n");
 		goto Done;
 	}
 
-	if (!(status & PCI_COMMAND_MASTER))
-	{
-		printf("Error: Cannot enable Bus Mastering.\n");
+	if (!(status & PCI_COMMAND_MASTER)) {
+		printf ("Error: Cannot enable Bus Mastering.\n");
 		goto Done;
 	}
 
-	dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
+	dev = (struct eth_device *) malloc (sizeof (*dev));	/*struct eth_device)); */
 
-	sprintf(dev->name, "3Com 3c920c#%d", card_number);
+	sprintf (dev->name, "3Com 3c920c#%d", card_number);
 	dev->iobase = eth_iobase;
-	dev->priv   = (void*) devno;
-	dev->init   = eth_3com_init;
-	dev->halt   = eth_3com_halt;
-	dev->send   = eth_3com_send;
-	dev->recv   = eth_3com_recv;
+	dev->priv = (void *) devno;
+	dev->init = eth_3com_init;
+	dev->halt = eth_3com_halt;
+	dev->send = eth_3com_send;
+	dev->recv = eth_3com_recv;
 
-	eth_register(dev);
+	eth_register (dev);
 
-/* 	{ */
-/* 	    char interrupt; */
-/* 	    devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
-/* 	    pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
+/*	{ */
+/*	    char interrupt; */
+/*	    devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */
+/*	    pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */
 
-/* 	    printf("Installing eth0 interrupt handler to %d\n", interrupt); */
-/* 	    irq_install_handler(interrupt, eth_interrupt, dev); */
-/* 	} */
+/*	    printf("Installing eth0 interrupt handler to %d\n", interrupt); */
+/*	    irq_install_handler(interrupt, eth_interrupt, dev); */
+/*	} */
 
 	card_number++;
 
 	/* Set the latency timer for value */
-	s = getenv("3com_latency");
-	if (s)
-	{
-	    ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, (unsigned char)atoi(s));
-	}
-	else ret = pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x0a);
+	s = getenv ("3com_latency");
+	if (s) {
+		ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER,
+					     (unsigned char) atoi (s));
+	} else
+		ret = pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x0a);
 
-	read_hw_addr(dev, bis); 				/* get the MAC address from Window 2*/
+	read_hw_addr (dev, bis);	/* get the MAC address from Window 2 */
 
 	/* Reset the ethernet controller */
 
 	PRINTF ("Issuing reset command....\n");
-	if (!issue_and_wait(dev, TotalReset))
-	{
-		printf("Error: Cannot reset ethernet controller.\n");
+	if (!issue_and_wait (dev, TotalReset)) {
+		printf ("Error: Cannot reset ethernet controller.\n");
 		goto Done;
-	}
-	else
+	} else
 		PRINTF ("Ethernet controller reset.\n");
 
 	/* allocate memory for rx and tx rings */
 
-	if(!(rx_ring = memalign(sizeof(struct rx_desc_3com) * NUM_RX_DESC, 16)))
-	{
+	if (!(rx_ring = memalign (sizeof (struct rx_desc_3com) * NUM_RX_DESC, 16))) {
 		PRINTF ("Cannot allocate memory for RX_RING.....\n");
 		goto Done;
 	}
 
-	if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16)))
-	{
+	if (!(tx_ring = memalign (sizeof (struct tx_desc_3com) * NUM_TX_DESC, 16))) {
 		PRINTF ("Cannot allocate memory for TX_RING.....\n");
 		goto Done;
 	}
@@ -543,219 +535,208 @@ Done:
 }
 
 
-static int eth_3com_init(struct eth_device* dev, bd_t *bis)
+static int eth_3com_init (struct eth_device *dev, bd_t * bis)
 {
 	int i, status = 0;
 	int tx_cur, loop;
 	u16 status_enable, intr_enable;
 	struct descriptor *ias_cmd;
 
-	/* Determine what type of network the machine is connected to	*/
-	/* presently drops the connect to 10Mbps			*/
+	/* Determine what type of network the machine is connected to   */
+	/* presently drops the connect to 10Mbps                        */
 
-	if (!auto_negotiate(dev))
-	{
-		printf("Error: Cannot determine network media.\n");
+	if (!auto_negotiate (dev)) {
+		printf ("Error: Cannot determine network media.\n");
 		goto Done;
 	}
 
-	issue_and_wait(dev, TxReset);
-	issue_and_wait(dev, RxReset|0x04);
+	issue_and_wait (dev, TxReset);
+	issue_and_wait (dev, RxReset | 0x04);
 
 	/* Switch to register set 7 for normal use. */
-	EL3WINDOW(dev, 7);
+	EL3WINDOW (dev, 7);
 
 	/* Initialize Rx and Tx rings */
 
-	init_rx_ring(dev);
-	purge_tx_ring(dev);
+	init_rx_ring (dev);
+	purge_tx_ring (dev);
 
-	ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
+	ETH_CMD (dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
 
-	issue_and_wait(dev,SetTxStart|0x07ff);
+	issue_and_wait (dev, SetTxStart | 0x07ff);
 
 	/* Below sets which indication bits to be seen. */
 
-	status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
-	ETH_CMD(dev, status_enable);
+	status_enable =
+		SetStatusEnb | HostError | DownComplete | UpComplete | (1 <<
+									6);
+	ETH_CMD (dev, status_enable);
 
 	/* Below sets no bits are to cause an interrupt since this is just polling */
 
-	intr_enable   = SetIntrEnb;
+	intr_enable = SetIntrEnb;
 /*	intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
-	ETH_CMD(dev, intr_enable);
-	ETH_OUTB(dev, 127, UpPoll);
+	ETH_CMD (dev, intr_enable);
+	ETH_OUTB (dev, 127, UpPoll);
 
 	/* Ack all pending events, and set active indicator mask */
 
-	ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
-	ETH_CMD(dev, intr_enable);
+	ETH_CMD (dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
+	ETH_CMD (dev, intr_enable);
 
 	/* Tell the adapter where the RX ring is located */
 
-	issue_and_wait(dev,UpStall);				/* Stall and set the UplistPtr 		*/
-	ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
-	ETH_CMD(dev, RxEnable); 				/* Enable the receiver. 		*/
-	issue_and_wait(dev,UpUnstall);
+	issue_and_wait (dev, UpStall);	/* Stall and set the UplistPtr          */
+	ETH_OUTL (dev, (u32) & rx_ring[rx_next], UpListPtr);
+	ETH_CMD (dev, RxEnable);	/* Enable the receiver.         */
+	issue_and_wait (dev, UpUnstall);
 
 	/* Send the Individual Address Setup frame */
 
-	tx_cur       = tx_next;
-	tx_next      = ((tx_next+1) % NUM_TX_DESC);
+	tx_cur = tx_next;
+	tx_next = ((tx_next + 1) % NUM_TX_DESC);
 
-	ias_cmd             = (struct descriptor *)&tx_ring[tx_cur];
-	ias_cmd->status     = cpu_to_le32(1<<31);		/* set DnIndicate bit. 			*/
-	ias_cmd->next       = 0;
-	ias_cmd->addr       = cpu_to_le32((u32)&bis->bi_enetaddr[0]);
-	ias_cmd->length     = cpu_to_le32(6 | LAST_FRAG);
+	ias_cmd = (struct descriptor *) &tx_ring[tx_cur];
+	ias_cmd->status = cpu_to_le32 (1 << 31);	/* set DnIndicate bit.                  */
+	ias_cmd->next = 0;
+	ias_cmd->addr = cpu_to_le32 ((u32) & bis->bi_enetaddr[0]);
+	ias_cmd->length = cpu_to_le32 (6 | LAST_FRAG);
 
 	/* Tell the adapter where the TX ring is located */
 
-	ETH_CMD(dev, TxEnable); 				/* Enable transmitter. 			*/
-	issue_and_wait(dev, DownStall);				/* Stall and set the DownListPtr. 	*/
-	ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
-	issue_and_wait(dev, DownUnstall);
-	for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
-	{
-		if (i >= TOUT_LOOP)
-		{
-			PRINTF("TX Ring status (Init):  0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
-			PRINTF("ETH_STATUS: 0x%x\n", ETH_STATUS(dev));
+	ETH_CMD (dev, TxEnable);	/* Enable transmitter.                  */
+	issue_and_wait (dev, DownStall);	/* Stall and set the DownListPtr.       */
+	ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
+	issue_and_wait (dev, DownUnstall);
+	for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
+		if (i >= TOUT_LOOP) {
+			PRINTF ("TX Ring status (Init):	0x%4x\n",
+				le32_to_cpu (tx_ring[tx_cur].status));
+			PRINTF ("ETH_STATUS: 0x%x\n", ETH_STATUS (dev));
 			goto Done;
 		}
 	}
-	if (ETH_STATUS(dev) & DownComplete)			/* If DownLoad Complete ACK the bit 	*/
-	{
-		ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
-		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
-		ETH_OUTL(dev, 0, DownListPtr);
-		issue_and_wait(dev, DownUnstall);
+	if (ETH_STATUS (dev) & DownComplete) {	/* If DownLoad Complete ACK the bit       */
+		ETH_CMD (dev, AckIntr | DownComplete);	/* acknowledge the indication bit       */
+		issue_and_wait (dev, DownStall);	/* stall and clear DownListPtr          */
+		ETH_OUTL (dev, 0, DownListPtr);
+		issue_and_wait (dev, DownUnstall);
 	}
 	status = 1;
-
 Done:
 	return status;
 }
 
-int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
+int eth_3com_send (struct eth_device *dev, volatile void *packet, int length)
 {
 	int i, status = 0;
 	int tx_cur;
 
-	if (length <= 0)
-	{
-		PRINTF("eth: bad packet size: %d\n", length);
+	if (length <= 0) {
+		PRINTF ("eth: bad packet size: %d\n", length);
 		goto Done;
 	}
 
-	tx_cur  = tx_next;
-	tx_next = (tx_next+1) % NUM_TX_DESC;
+	tx_cur = tx_next;
+	tx_next = (tx_next + 1) % NUM_TX_DESC;
 
-	tx_ring[tx_cur].status  = cpu_to_le32(1<<31);		/* set DnIndicate bit 			*/
-	tx_ring[tx_cur].next    = 0;
-	tx_ring[tx_cur].addr    = cpu_to_le32(((u32) packet));
-	tx_ring[tx_cur].length  = cpu_to_le32(length | LAST_FRAG);
+	tx_ring[tx_cur].status = cpu_to_le32 (1 << 31);	/* set DnIndicate bit                   */
+	tx_ring[tx_cur].next = 0;
+	tx_ring[tx_cur].addr = cpu_to_le32 (((u32) packet));
+	tx_ring[tx_cur].length = cpu_to_le32 (length | LAST_FRAG);
 
 	/* Send the packet */
 
-	issue_and_wait(dev, DownStall);				/* stall and set the DownListPtr 	*/
-	ETH_OUTL(dev, (u32) &tx_ring[tx_cur], DownListPtr);
-	issue_and_wait(dev, DownUnstall);
+	issue_and_wait (dev, DownStall);	/* stall and set the DownListPtr        */
+	ETH_OUTL (dev, (u32) & tx_ring[tx_cur], DownListPtr);
+	issue_and_wait (dev, DownUnstall);
 
-	for (i=0; !(ETH_STATUS(dev) & DownComplete); i++)
-	{
-		if (i >= TOUT_LOOP)
-		{
-			PRINTF("TX Ring status (send): 0x%4x\n", le32_to_cpu(tx_ring[tx_cur].status));
+	for (i = 0; !(ETH_STATUS (dev) & DownComplete); i++) {
+		if (i >= TOUT_LOOP) {
+			PRINTF ("TX Ring status (send): 0x%4x\n",
+				le32_to_cpu (tx_ring[tx_cur].status));
 			goto Done;
 		}
 	}
-	if (ETH_STATUS(dev) & DownComplete)			/* If DownLoad Complete ACK the bit 	*/
-	{
-		ETH_CMD(dev, AckIntr | DownComplete);		/* acknowledge the indication bit	*/
-		issue_and_wait(dev, DownStall);			/* stall and clear DownListPtr 		*/
-		ETH_OUTL(dev, 0, DownListPtr);
-		issue_and_wait(dev, DownUnstall);
+	if (ETH_STATUS (dev) & DownComplete) {	/* If DownLoad Complete ACK the bit       */
+		ETH_CMD (dev, AckIntr | DownComplete);	/* acknowledge the indication bit       */
+		issue_and_wait (dev, DownStall);	/* stall and clear DownListPtr          */
+		ETH_OUTL (dev, 0, DownListPtr);
+		issue_and_wait (dev, DownUnstall);
 	}
-	status=1;
- Done:
+	status = 1;
+Done:
 	return status;
 }
 
-void PrintPacket (uchar *packet, int length)
+void PrintPacket (uchar * packet, int length)
 {
-int loop;
-uchar *ptr;
+	int loop;
+	uchar *ptr;
 
 	printf ("Printing packet of length %x.\n\n", length);
 	ptr = packet;
-	for (loop = 1; loop <= length; loop++)
-	{
+	for (loop = 1; loop <= length; loop++) {
 		printf ("%2x ", *ptr++);
-		if ((loop % 40)== 0)
+		if ((loop % 40) == 0)
 			printf ("\n");
 	}
 }
 
-int eth_3com_recv(struct eth_device* dev)
+int eth_3com_recv (struct eth_device *dev)
 {
 	u16 stat = 0;
 	u32 status;
 	int rx_prev, length = 0;
 
-	while (!(ETH_STATUS(dev) & UpComplete))			/* wait on receipt of packet 	*/
+	while (!(ETH_STATUS (dev) & UpComplete))	/* wait on receipt of packet        */
 		;
 
-	status = le32_to_cpu(rx_ring[rx_next].status);		/* packet status		*/
+	status = le32_to_cpu (rx_ring[rx_next].status);	/* packet status                */
 
-	while (status & (1<<15))
-	{
+	while (status & (1 << 15)) {
 		/* A packet has been received */
 
-		if (status & (1<<15))
-		{
+		if (status & (1 << 15)) {
 			/* A valid frame received  */
 
-			length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff;		/* length is in bits 0 - 12 	*/
+			length = le32_to_cpu (rx_ring[rx_next].status) & 0x1fff;	/* length is in bits 0 - 12     */
 
 			/* Pass the packet up to the protocol layers */
 
-			NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length);
-			rx_ring[rx_next].status = 0;					/* clear the status word 	*/
-			ETH_CMD(dev, AckIntr | UpComplete);
-			issue_and_wait(dev, UpUnstall);
-		}
-		else
-		if (stat & HostError)
-		{
+			NetReceive ((uchar *)
+				    le32_to_cpu (rx_ring[rx_next].addr),
+				    length);
+			rx_ring[rx_next].status = 0;	/* clear the status word        */
+			ETH_CMD (dev, AckIntr | UpComplete);
+			issue_and_wait (dev, UpUnstall);
+		} else if (stat & HostError) {
 			/* There was an error */
 
-			printf("Rx error status:  0x%4x\n", stat);
-			init_rx_ring(dev);
+			printf ("Rx error status:  0x%4x\n", stat);
+			init_rx_ring (dev);
 			goto Done;
 		}
 
 		rx_prev = rx_next;
 		rx_next = (rx_next + 1) % NUM_RX_DESC;
-		stat = ETH_STATUS(dev);					/* register status 	*/
-		status = le32_to_cpu(rx_ring[rx_next].status);		/* packet status 	*/
+		stat = ETH_STATUS (dev);	/* register status      */
+		status = le32_to_cpu (rx_ring[rx_next].status);	/* packet status        */
 	}
-
 Done:
 	return length;
 }
 
-void eth_3com_halt(struct eth_device* dev)
+void eth_3com_halt (struct eth_device *dev)
 {
-	if (!(dev->iobase))
-	{
+	if (!(dev->iobase)) {
 		goto Done;
 	}
 
-	issue_and_wait(dev, DownStall);		/* shut down transmit and receive */
-	issue_and_wait(dev, UpStall);
-	issue_and_wait(dev, RxDisable);
-	issue_and_wait(dev, TxDisable);
+	issue_and_wait (dev, DownStall);	/* shut down transmit and receive */
+	issue_and_wait (dev, UpStall);
+	issue_and_wait (dev, RxDisable);
+	issue_and_wait (dev, TxDisable);
 
 /*	free(tx_ring);				/###* release memory allocated to the DPD and UPD rings */
 /*	free(rx_ring); */
@@ -764,41 +745,41 @@ Done:
 	return;
 }
 
-static void init_rx_ring(struct eth_device* dev)
+static void init_rx_ring (struct eth_device *dev)
 {
 	int i;
 
-	PRINTF("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
-	issue_and_wait(dev, UpStall);
+	PRINTF ("Initializing rx_ring. rx_buffer = %p\n", rx_buffer);
+	issue_and_wait (dev, UpStall);
 
-	for (i = 0; i < NUM_RX_DESC; i++)
-	{
-		rx_ring[i].next    = cpu_to_le32(((u32) &rx_ring[(i+1) % NUM_RX_DESC]));
-		rx_ring[i].status  = 0;
-		rx_ring[i].addr    = cpu_to_le32(((u32) &rx_buffer[i][0]));
-		rx_ring[i].length  = cpu_to_le32(PKTSIZE_ALIGN | LAST_FRAG);
+	for (i = 0; i < NUM_RX_DESC; i++) {
+		rx_ring[i].next =
+			cpu_to_le32 (((u32) &
+				      rx_ring[(i + 1) % NUM_RX_DESC]));
+		rx_ring[i].status = 0;
+		rx_ring[i].addr = cpu_to_le32 (((u32) & rx_buffer[i][0]));
+		rx_ring[i].length = cpu_to_le32 (PKTSIZE_ALIGN | LAST_FRAG);
 	}
 	rx_next = 0;
 }
 
-static void purge_tx_ring(struct eth_device* dev)
+static void purge_tx_ring (struct eth_device *dev)
 {
 	int i;
 
-	PRINTF("Purging tx_ring.\n");
+	PRINTF ("Purging tx_ring.\n");
 
-	tx_next      = 0;
+	tx_next = 0;
 
-	for (i = 0; i < NUM_TX_DESC; i++)
-	{
-		tx_ring[i].next    = 0;
-		tx_ring[i].status  = 0;
-		tx_ring[i].addr    = 0;
-		tx_ring[i].length  = 0;
+	for (i = 0; i < NUM_TX_DESC; i++) {
+		tx_ring[i].next = 0;
+		tx_ring[i].status = 0;
+		tx_ring[i].addr = 0;
+		tx_ring[i].length = 0;
 	}
 }
 
-static void read_hw_addr(struct eth_device* dev, bd_t *bis)
+static void read_hw_addr (struct eth_device *dev, bd_t * bis)
 {
 	u8 hw_addr[ETH_ALEN];
 	unsigned int eeprom[0x40];
@@ -807,77 +788,77 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
 
 	/* Read the station address from the EEPROM. */
 
-	EL3WINDOW(dev, 0);
-	for (i = 0; i < 0x40; i++)
-	{
-		ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
+	EL3WINDOW (dev, 0);
+	for (i = 0; i < 0x40; i++) {
+		ETH_OUTW (dev, EEPROM_Read + i, Wn0EepromCmd);
 		/* Pause for at least 162 us. for the read to take place. */
-		for (timer = 10; timer >= 0; timer--)
-		{
-			udelay(162);
-			if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
+		for (timer = 10; timer >= 0; timer--) {
+			udelay (162);
+			if ((ETH_INW (dev, Wn0EepromCmd) & 0x8000) == 0)
 				break;
 		}
-		eeprom[i] = ETH_INW(dev, Wn0EepromData);
+		eeprom[i] = ETH_INW (dev, Wn0EepromData);
 	}
 
 	/* Checksum calculation.  I'm not sure about this part and there seems to be a bug on the 3com side of things */
 
 	for (i = 0; i < 0x21; i++)
-		checksum  ^= eeprom[i];
+		checksum ^= eeprom[i];
 	checksum = (checksum ^ (checksum >> 8)) & 0xff;
 
 	if (checksum != 0xbb)
-		printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
+		printf (" *** INVALID EEPROM CHECKSUM %4.4x *** \n",
+			checksum);
 
-	for (i = 0, j = 0; i < 3; i++)
-	{
-		hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
-		hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
+	for (i = 0, j = 0; i < 3; i++) {
+		hw_addr[j++] = (u8) ((eeprom[i + 10] >> 8) & 0xff);
+		hw_addr[j++] = (u8) (eeprom[i + 10] & 0xff);
 	}
 
 	/*  MAC Address is in window 2, write value from EEPROM to window 2 */
 
-	EL3WINDOW(dev, 2);
+	EL3WINDOW (dev, 2);
 	for (i = 0; i < 6; i++)
-		ETH_OUTB(dev, hw_addr[i], i);
+		ETH_OUTB (dev, hw_addr[i], i);
 
-	for (j = 0; j < ETH_ALEN; j+=2)
-	{
-		hw_addr[j]   = (u8)(ETH_INW(dev, j) & 0xff);
-		hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff);
+	for (j = 0; j < ETH_ALEN; j += 2) {
+		hw_addr[j] = (u8) (ETH_INW (dev, j) & 0xff);
+		hw_addr[j + 1] = (u8) ((ETH_INW (dev, j) >> 8) & 0xff);
 	}
 
-	for (i=0;i<ETH_ALEN;i++)
-	{
-		if (hw_addr[i] != bis->bi_enetaddr[i])
-		{
-/* 			printf("Warning: HW address don't match:\n"); */
-/* 			printf("Address in 3Com Window 2 is         " */
-/* 			       "%02X:%02X:%02X:%02X:%02X:%02X\n", */
-/* 			       hw_addr[0], hw_addr[1], hw_addr[2], */
-/* 			       hw_addr[3], hw_addr[4], hw_addr[5]); */
-/* 			printf("Address used by U-Boot is " */
-/* 			       "%02X:%02X:%02X:%02X:%02X:%02X\n", */
-/* 			       bis->bi_enetaddr[0], bis->bi_enetaddr[1],  */
-/* 			       bis->bi_enetaddr[2], bis->bi_enetaddr[3],  */
-/* 			       bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
-/* 			goto Done; */
-		    char buffer[256];
-		    if (bis->bi_enetaddr[0] == 0 && bis->bi_enetaddr[1] == 0 &&
-			bis->bi_enetaddr[2] == 0 && bis->bi_enetaddr[3] == 0 &&
-			bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0)
-		    {
-
-			sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X",
-				hw_addr[0], hw_addr[1], hw_addr[2],
-				hw_addr[3], hw_addr[4], hw_addr[5]);
-			setenv("ethaddr", buffer);
-		    }
+	for (i = 0; i < ETH_ALEN; i++) {
+		if (hw_addr[i] != bis->bi_enetaddr[i]) {
+/*			printf("Warning: HW address don't match:\n"); */
+/*			printf("Address in 3Com Window 2 is	    " */
+/*			       "%02X:%02X:%02X:%02X:%02X:%02X\n", */
+/*			       hw_addr[0], hw_addr[1], hw_addr[2], */
+/*			       hw_addr[3], hw_addr[4], hw_addr[5]); */
+/*			printf("Address used by U-Boot is " */
+/*			       "%02X:%02X:%02X:%02X:%02X:%02X\n", */
+/*			       bis->bi_enetaddr[0], bis->bi_enetaddr[1],  */
+/*			       bis->bi_enetaddr[2], bis->bi_enetaddr[3],  */
+/*			       bis->bi_enetaddr[4], bis->bi_enetaddr[5]); */
+/*			goto Done; */
+			char buffer[256];
+
+			if (bis->bi_enetaddr[0] == 0
+			    && bis->bi_enetaddr[1] == 0
+			    && bis->bi_enetaddr[2] == 0
+			    && bis->bi_enetaddr[3] == 0
+			    && bis->bi_enetaddr[4] == 0
+			    && bis->bi_enetaddr[5] == 0) {
+
+				sprintf (buffer,
+					 "%02X:%02X:%02X:%02X:%02X:%02X",
+					 hw_addr[0], hw_addr[1], hw_addr[2],
+					 hw_addr[3], hw_addr[4], hw_addr[5]);
+				setenv ("ethaddr", buffer);
+			}
 		}
 	}
 
-	for(i=0; i<ETH_ALEN; i++) dev->enetaddr[i] = hw_addr[i];
+	for (i = 0; i < ETH_ALEN; i++)
+		dev->enetaddr[i] = hw_addr[i];
 
 Done:
 	return;

board/MAI/AmigaOneG3SE/interrupts.c

@@ -176,9 +176,9 @@ external_interrupt(struct pt_regs *regs)
 	else {
 		PRINTF ("\nBogus External Interrupt IRQ %d\n", irq);
 		/*
-	 	* turn off the bogus interrupt, otherwise it
-	 	* might repeat forever
-	 	*/
+		* turn off the bogus interrupt, otherwise it
+		* might repeat forever
+		*/
 		unmask = 0;
 	}
 

board/MAI/AmigaOneG3SE/ps2kbd.c

@@ -58,7 +58,7 @@ void i8259_unmask_irq(unsigned int irq);
 #define KBD_STAT_KOBF		0x01
 #define KBD_STAT_IBF		0x02
 #define KBD_STAT_SYS		0x04
-#define KBD_STAT_CD			0x08
+#define KBD_STAT_CD		0x08
 #define KBD_STAT_LOCK		0x10
 #define KBD_STAT_MOBF		0x20
 #define KBD_STAT_TI_OUT	0x40
@@ -71,50 +71,50 @@ void i8259_unmask_irq(unsigned int irq);
  *	Keyboard Controller Commands
  */
 
-#define KBD_CCMD_READ_MODE			0x20	/* Read mode bits */
-#define KBD_CCMD_WRITE_MODE			0x60	/* Write mode bits */
-#define KBD_CCMD_GET_VERSION		0xA1	/* Get controller version */
+#define KBD_CCMD_READ_MODE	0x20	/* Read mode bits */
+#define KBD_CCMD_WRITE_MODE	0x60	/* Write mode bits */
+#define KBD_CCMD_GET_VERSION	0xA1	/* Get controller version */
 #define KBD_CCMD_MOUSE_DISABLE	0xA7	/* Disable mouse interface */
-#define KBD_CCMD_MOUSE_ENABLE		0xA8	/* Enable mouse interface */
-#define KBD_CCMD_TEST_MOUSE			0xA9	/* Mouse interface test */
-#define KBD_CCMD_SELF_TEST			0xAA	/* Controller self test */
-#define KBD_CCMD_KBD_TEST				0xAB	/* Keyboard interface test */
-#define KBD_CCMD_KBD_DISABLE		0xAD	/* Keyboard interface disable */
-#define KBD_CCMD_KBD_ENABLE			0xAE	/* Keyboard interface enable */
+#define KBD_CCMD_MOUSE_ENABLE	0xA8	/* Enable mouse interface */
+#define KBD_CCMD_TEST_MOUSE	0xA9	/* Mouse interface test */
+#define KBD_CCMD_SELF_TEST	0xAA	/* Controller self test */
+#define KBD_CCMD_KBD_TEST	0xAB	/* Keyboard interface test */
+#define KBD_CCMD_KBD_DISABLE	0xAD	/* Keyboard interface disable */
+#define KBD_CCMD_KBD_ENABLE	0xAE	/* Keyboard interface enable */
 #define KBD_CCMD_WRITE_AUX_OBUF	0xD3    /* Write to output buffer as if
 					   initiated by the auxiliary device */
-#define KBD_CCMD_WRITE_MOUSE		0xD4	/* Write the following byte to the mouse */
+#define KBD_CCMD_WRITE_MOUSE	0xD4	/* Write the following byte to the mouse */
 
 /*
  *	Keyboard Commands
  */
 
-#define KBD_CMD_SET_LEDS				0xED	/* Set keyboard leds */
-#define KBD_CMD_SET_RATE				0xF3	/* Set typematic rate */
-#define KBD_CMD_ENABLE					0xF4	/* Enable scanning */
-#define KBD_CMD_DISABLE					0xF5	/* Disable scanning */
-#define KBD_CMD_RESET						0xFF	/* Reset */
+#define KBD_CMD_SET_LEDS	0xED	/* Set keyboard leds */
+#define KBD_CMD_SET_RATE	0xF3	/* Set typematic rate */
+#define KBD_CMD_ENABLE		0xF4	/* Enable scanning */
+#define KBD_CMD_DISABLE		0xF5	/* Disable scanning */
+#define KBD_CMD_RESET		0xFF	/* Reset */
 
 /*
  *	Keyboard Replies
  */
 
-#define KBD_REPLY_POR						0xAA	/* Power on reset */
-#define KBD_REPLY_ACK						0xFA	/* Command ACK */
-#define KBD_REPLY_RESEND				0xFE	/* Command NACK, send the cmd again */
+#define KBD_REPLY_POR		0xAA	/* Power on reset */
+#define KBD_REPLY_ACK		0xFA	/* Command ACK */
+#define KBD_REPLY_RESEND	0xFE	/* Command NACK, send the cmd again */
 
 /*
  *	Status Register Bits
  */
 
-#define KBD_STAT_OBF 						0x01	/* Keyboard output buffer full */
-#define KBD_STAT_IBF 						0x02	/* Keyboard input buffer full */
-#define KBD_STAT_SELFTEST				0x04	/* Self test successful */
-#define KBD_STAT_CMD						0x08	/* Last write was a command write (0=data) */
-#define KBD_STAT_UNLOCKED				0x10	/* Zero if keyboard locked */
-#define KBD_STAT_MOUSE_OBF			0x20	/* Mouse output buffer full */
-#define KBD_STAT_GTO 						0x40	/* General receive/xmit timeout */
-#define KBD_STAT_PERR 					0x80	/* Parity error */
+#define KBD_STAT_OBF		0x01	/* Keyboard output buffer full */
+#define KBD_STAT_IBF		0x02	/* Keyboard input buffer full */
+#define KBD_STAT_SELFTEST	0x04	/* Self test successful */
+#define KBD_STAT_CMD		0x08	/* Last write was a command write (0=data) */
+#define KBD_STAT_UNLOCKED	0x10	/* Zero if keyboard locked */
+#define KBD_STAT_MOUSE_OBF	0x20	/* Mouse output buffer full */
+#define KBD_STAT_GTO		0x40	/* General receive/xmit timeout */
+#define KBD_STAT_PERR		0x80	/* Parity error */
 
 #define AUX_STAT_OBF (KBD_STAT_OBF | KBD_STAT_MOUSE_OBF)
 
@@ -122,24 +122,24 @@ void i8259_unmask_irq(unsigned int irq);
  *	Controller Mode Register Bits
  */
 
-#define KBD_MODE_KBD_INT				0x01	/* Keyboard data generate IRQ1 */
-#define KBD_MODE_MOUSE_INT			0x02	/* Mouse data generate IRQ12 */
-#define KBD_MODE_SYS 						0x04	/* The system flag (?) */
-#define KBD_MODE_NO_KEYLOCK			0x08	/* The keylock doesn't affect the keyboard if set */
-#define KBD_MODE_DISABLE_KBD		0x10	/* Disable keyboard interface */
+#define KBD_MODE_KBD_INT	0x01	/* Keyboard data generate IRQ1 */
+#define KBD_MODE_MOUSE_INT	0x02	/* Mouse data generate IRQ12 */
+#define KBD_MODE_SYS		0x04	/* The system flag (?) */
+#define KBD_MODE_NO_KEYLOCK	0x08	/* The keylock doesn't affect the keyboard if set */
+#define KBD_MODE_DISABLE_KBD	0x10	/* Disable keyboard interface */
 #define KBD_MODE_DISABLE_MOUSE	0x20	/* Disable mouse interface */
-#define KBD_MODE_KCC 						0x40	/* Scan code conversion to PC format */
-#define KBD_MODE_RFU						0x80
+#define KBD_MODE_KCC		0x40	/* Scan code conversion to PC format */
+#define KBD_MODE_RFU		0x80
 
 
-#define KDB_DATA_PORT			0x60
+#define KDB_DATA_PORT		0x60
 #define KDB_COMMAND_PORT	0x64
 
-#define 	LED_SCR		0x01	/* scroll lock led */
-#define 	LED_CAP		0x04	/* caps lock led */
-#define 	LED_NUM		0x02	/* num lock led */
+#define	LED_SCR			0x01	/* scroll lock led */
+#define	LED_CAP			0x04	/* caps lock led */
+#define	LED_NUM			0x02	/* num lock led */
 
-#define 	KBD_BUFFER_LEN 0x20  /* size of the keyboardbuffer */
+#define	KBD_BUFFER_LEN		0x20	/* size of the keyboardbuffer */
 
 
 static volatile char kbd_buffer[KBD_BUFFER_LEN];
@@ -194,21 +194,22 @@ static unsigned char kbd_ctrl_xlate[] = {
  * Init
  ******************************************************************/
 
-int isa_kbd_init(void)
+int isa_kbd_init (void)
 {
-	char* result;
-	result=kbd_initialize();
-	if (result != NULL)
-	{
-	    result = kbd_initialize();
+	char *result;
+
+	result = kbd_initialize ();
+	if (result != NULL) {
+		result = kbd_initialize ();
 	}
-	if(result==NULL) {
-		printf("AT Keyboard initialized\n");
-		irq_install_handler(KBD_INTERRUPT, (interrupt_handler_t *)kbd_interrupt, NULL);
+	if (result == NULL) {
+		printf ("AT Keyboard initialized\n");
+		irq_install_handler (KBD_INTERRUPT,
+				     (interrupt_handler_t *) kbd_interrupt,
+				     NULL);
 		return (1);
-	}
-	else {
-		printf("%s\n",result);
+	} else {
+		printf ("%s\n", result);
 		return (-1);
 	}
 }
@@ -225,20 +226,20 @@ int overwrite_console (void)
 int drv_isa_kbd_init (void)
 {
 	int error;
-  	device_t kbddev ;
+	device_t kbddev ;
 	char *stdinname  = getenv ("stdin");
 
 	if(isa_kbd_init()==-1)
 		return -1;
-  	memset (&kbddev, 0, sizeof(kbddev));
-  	strcpy(kbddev.name, DEVNAME);
-  	kbddev.flags =  DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
-  	kbddev.putc = NULL ;
+	memset (&kbddev, 0, sizeof(kbddev));
+	strcpy(kbddev.name, DEVNAME);
+	kbddev.flags =  DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
+	kbddev.putc = NULL ;
 	kbddev.puts = NULL ;
 	kbddev.getc = kbd_getc ;
 	kbddev.tstc = kbd_testc ;
 
- 	error = device_register (&kbddev);
+	error = device_register (&kbddev);
 	if(error==0) {
 		/* check if this is the standard input device */
 		if(strcmp(stdinname,DEVNAME)==0) {
@@ -301,7 +302,6 @@ int kbd_getc(void)
 
 }
 
-
 /* set LEDs */
 
 void kbd_set_leds(void)
@@ -322,140 +322,139 @@ void kbd_set_leds(void)
 	kbd_send_data(leds);
 }
 
-
-void handle_keyboard_event(unsigned char scancode)
+void handle_keyboard_event (unsigned char scancode)
 {
 	unsigned char keycode;
 
 	/*  Convert scancode to keycode */
-	PRINTF("scancode %x\n",scancode);
-	if(scancode==0xe0) {
-		e0=1; /* special charakters */
+	PRINTF ("scancode %x\n", scancode);
+	if (scancode == 0xe0) {
+		e0 = 1;		/* special charakters */
 		return;
 	}
-	if(e0==1) {
-		e0=0; /* delete flag */
-		if(!(	((scancode&0x7F)==0x38)|| /* the right ctrl key */
-			((scancode&0x7F)==0x1D)|| /* the right alt key */
-			((scancode&0x7F)==0x35)||	/* the right '/' key */
-			((scancode&0x7F)==0x1C)||  /* the right enter key */
-			((scancode)==0x48)|| /* arrow up */
-			((scancode)==0x50)|| /* arrow down */
-			((scancode)==0x4b)|| /* arrow left */
-			((scancode)==0x4d)))  /* arrow right */
+	if (e0 == 1) {
+		e0 = 0;		/* delete flag */
+		if (!(((scancode & 0x7F) == 0x38) ||	/* the right ctrl key */
+		      ((scancode & 0x7F) == 0x1D) ||	/* the right alt key */
+		      ((scancode & 0x7F) == 0x35) ||	/* the right '/' key */
+		      ((scancode & 0x7F) == 0x1C) ||	/* the right enter key */
+		      ((scancode) == 0x48) ||	/* arrow up */
+		      ((scancode) == 0x50) ||	/* arrow down */
+		      ((scancode) == 0x4b) ||	/* arrow left */
+		      ((scancode) == 0x4d)))
+			/* arrow right */
 			/* we swallow unknown e0 codes */
 			return;
 	}
 	/* special cntrl keys */
-	switch(scancode)
-	{
+	switch (scancode) {
 	case 0x48:
-	    kbd_put_queue(27);
-	    kbd_put_queue(91);
-	    kbd_put_queue('A');
-	    return;
+		kbd_put_queue (27);
+		kbd_put_queue (91);
+		kbd_put_queue ('A');
+		return;
 	case 0x50:
-	    kbd_put_queue(27);
-	    kbd_put_queue(91);
-	    kbd_put_queue('B');
-	    return;
+		kbd_put_queue (27);
+		kbd_put_queue (91);
+		kbd_put_queue ('B');
+		return;
 	case 0x4b:
-	    kbd_put_queue(27);
-	    kbd_put_queue(91);
-	    kbd_put_queue('D');
-	    return;
+		kbd_put_queue (27);
+		kbd_put_queue (91);
+		kbd_put_queue ('D');
+		return;
 	case 0x4D:
-	    kbd_put_queue(27);
-	    kbd_put_queue(91);
-	    kbd_put_queue('C');
-	    return;
-	case 0x58: /* F12 key */
-	    if (ctrl == 1)
-	    {
-		extern int console_changed;
-		setenv("stdin", DEVNAME);
-		setenv("stdout", "vga");
-		console_changed = 1;
-	    }
-	    return;
+		kbd_put_queue (27);
+		kbd_put_queue (91);
+		kbd_put_queue ('C');
+		return;
+	case 0x58:		/* F12 key */
+		if (ctrl == 1) {
+			extern int console_changed;
+
+			setenv ("stdin", DEVNAME);
+			setenv ("stdout", "vga");
+			console_changed = 1;
+		}
+		return;
 	case 0x2A:
-		case 0x36: /* shift pressed */
-			shift=1;
-			return; /* do nothing else */
-		case 0xAA:
-		case 0xB6: /* shift released */
-			shift=0;
-			return; /* do nothing else */
-		case 0x38: /* alt pressed */
-			alt=1;
-			return; /* do nothing else */
-		case 0xB8: /* alt released */
-			alt=0;
-			return; /* do nothing else */
-		case 0x1d: /* ctrl pressed */
-			ctrl=1;
-			return; /* do nothing else */
-		case 0x9d: /* ctrl released */
-			ctrl=0;
-			return; /* do nothing else */
-		case 0x46: /* scrollock pressed */
-			scroll_lock=~scroll_lock;
-			kbd_set_leds();
-			return; /* do nothing else */
-		case 0x3A: /* capslock pressed */
-			caps_lock=~caps_lock;
-			kbd_set_leds();
-			return;
-		case 0x45: /* numlock pressed */
-			num_lock=~num_lock;
-			kbd_set_leds();
-			return;
-		case 0xC6: /* scroll lock released */
-		case 0xC5: /* num lock released */
-		case 0xBA: /* caps lock released */
-			return; /* just swallow */
+	case 0x36:		/* shift pressed */
+		shift = 1;
+		return;		/* do nothing else */
+	case 0xAA:
+	case 0xB6:		/* shift released */
+		shift = 0;
+		return;		/* do nothing else */
+	case 0x38:		/* alt pressed */
+		alt = 1;
+		return;		/* do nothing else */
+	case 0xB8:		/* alt released */
+		alt = 0;
+		return;		/* do nothing else */
+	case 0x1d:		/* ctrl pressed */
+		ctrl = 1;
+		return;		/* do nothing else */
+	case 0x9d:		/* ctrl released */
+		ctrl = 0;
+		return;		/* do nothing else */
+	case 0x46:		/* scrollock pressed */
+		scroll_lock = ~scroll_lock;
+		kbd_set_leds ();
+		return;		/* do nothing else */
+	case 0x3A:		/* capslock pressed */
+		caps_lock = ~caps_lock;
+		kbd_set_leds ();
+		return;
+	case 0x45:		/* numlock pressed */
+		num_lock = ~num_lock;
+		kbd_set_leds ();
+		return;
+	case 0xC6:		/* scroll lock released */
+	case 0xC5:		/* num lock released */
+	case 0xBA:		/* caps lock released */
+		return;		/* just swallow */
 	}
-	if((scancode&0x80)==0x80) /* key released */
+	if ((scancode & 0x80) == 0x80)	/* key released */
 		return;
 	/* now, decide which table we need */
-	if(scancode > (sizeof(kbd_plain_xlate)/sizeof(kbd_plain_xlate[0]))) { /* scancode not in list */
-		PRINTF("unkown scancode %X\n",scancode);
-		return; /* swallow it */
+	if (scancode > (sizeof (kbd_plain_xlate) / sizeof (kbd_plain_xlate[0]))) {	/* scancode not in list */
+		PRINTF ("unkown scancode %X\n", scancode);
+		return;		/* swallow it */
 	}
 	/* setup plain code first */
-	keycode=kbd_plain_xlate[scancode];
-	if(caps_lock==1) { /* caps_lock is pressed, overwrite plain code */
-		if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
-			PRINTF("unkown caps-locked scancode %X\n",scancode);
-			return; /* swallow it */
+	keycode = kbd_plain_xlate[scancode];
+	if (caps_lock == 1) {	/* caps_lock is pressed, overwrite plain code */
+		if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) {	/* scancode not in list */
+			PRINTF ("unkown caps-locked scancode %X\n", scancode);
+			return;	/* swallow it */
 		}
-		keycode=kbd_shift_xlate[scancode];
-		if(keycode<'A') { /* we only want the alphas capital */
-			keycode=kbd_plain_xlate[scancode];
+		keycode = kbd_shift_xlate[scancode];
+		if (keycode < 'A') {	/* we only want the alphas capital */
+			keycode = kbd_plain_xlate[scancode];
 		}
 	}
-	if(shift==1) { /* shift overwrites caps_lock */
-		if(scancode > (sizeof(kbd_shift_xlate)/sizeof(kbd_shift_xlate[0]))) { /* scancode not in list */
-			PRINTF("unkown shifted scancode %X\n",scancode);
-			return; /* swallow it */
+	if (shift == 1) {	/* shift overwrites caps_lock */
+		if (scancode > (sizeof (kbd_shift_xlate) / sizeof (kbd_shift_xlate[0]))) {	/* scancode not in list */
+			PRINTF ("unkown shifted scancode %X\n", scancode);
+			return;	/* swallow it */
 		}
-		keycode=kbd_shift_xlate[scancode];
+		keycode = kbd_shift_xlate[scancode];
 	}
-	if(ctrl==1) { /* ctrl overwrites caps_lock and shift */
-		if(scancode > (sizeof(kbd_ctrl_xlate)/sizeof(kbd_ctrl_xlate[0]))) { /* scancode not in list */
-			PRINTF("unkown ctrl scancode %X\n",scancode);
-			return; /* swallow it */
+	if (ctrl == 1) {	/* ctrl overwrites caps_lock and shift */
+		if (scancode > (sizeof (kbd_ctrl_xlate) / sizeof (kbd_ctrl_xlate[0]))) {	/* scancode not in list */
+			PRINTF ("unkown ctrl scancode %X\n", scancode);
+			return;	/* swallow it */
 		}
-		keycode=kbd_ctrl_xlate[scancode];
+		keycode = kbd_ctrl_xlate[scancode];
 	}
 	/* check if valid keycode */
-	if(keycode==0xff) {
-		PRINTF("unkown scancode %X\n",scancode);
-		return; /* swallow unknown codes */
+	if (keycode == 0xff) {
+		PRINTF ("unkown scancode %X\n", scancode);
+		return;		/* swallow unknown codes */
 	}
 
-	kbd_put_queue(keycode);
-	PRINTF("%x\n",keycode);
+	kbd_put_queue (keycode);
+	PRINTF ("%x\n", keycode);
 }
 
 /*
@@ -463,34 +462,31 @@ void handle_keyboard_event(unsigned char scancode)
  * appropriate action.
  *
  */
-unsigned char handle_kbd_event(void)
+unsigned char handle_kbd_event (void)
 {
-	unsigned char status = kbd_read_status();
+	unsigned char status = kbd_read_status ();
 	unsigned int work = 10000;
 
 	while ((--work > 0) && (status & KBD_STAT_OBF)) {
 		unsigned char scancode;
 
-		scancode = kbd_read_input();
+		scancode = kbd_read_input ();
 
 		/* Error bytes must be ignored to make the
 		   Synaptics touchpads compaq use work */
 		/* Ignore error bytes */
-		if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR)))
-		{
-			if (status & KBD_STAT_MOUSE_OBF)
-				; /* not supported: handle_mouse_event(scancode); */
+		if (!(status & (KBD_STAT_GTO | KBD_STAT_PERR))) {
+			if (status & KBD_STAT_MOUSE_OBF);	/* not supported: handle_mouse_event(scancode); */
 			else
-				handle_keyboard_event(scancode);
+				handle_keyboard_event (scancode);
 		}
-		status = kbd_read_status();
+		status = kbd_read_status ();
 	}
 	if (!work)
-		PRINTF("pc_keyb: controller jammed (0x%02X).\n", status);
+		PRINTF ("pc_keyb: controller jammed (0x%02X).\n", status);
 	return status;
 }
 
-
 /******************************************************************************
  * Lowlevel Part of keyboard section
  */
@@ -529,90 +525,91 @@ int kbd_read_data(void)
 	return val;
 }
 
-int kbd_wait_for_input(void)
+int kbd_wait_for_input (void)
 {
 	unsigned long timeout;
 	int val;
 
 	timeout = KBD_TIMEOUT;
-	val=kbd_read_data();
-	while(val < 0)
-	{
-		if(timeout--==0)
+	val = kbd_read_data ();
+	while (val < 0) {
+		if (timeout-- == 0)
 			return -1;
-		udelay(1000);
-		val=kbd_read_data();
+		udelay (1000);
+		val = kbd_read_data ();
 	}
 	return val;
 }
 
 
-int kb_wait(void)
+int kb_wait (void)
 {
 	unsigned long timeout = KBC_TIMEOUT * 10;
 
 	do {
-		unsigned char status = handle_kbd_event();
+		unsigned char status = handle_kbd_event ();
+
 		if (!(status & KBD_STAT_IBF))
-			return 0; /* ok */
-		udelay(1000);
+			return 0;	/* ok */
+		udelay (1000);
 		timeout--;
 	} while (timeout);
 	return 1;
 }
 
-void kbd_write_command_w(int data)
+void kbd_write_command_w (int data)
 {
-	if(kb_wait())
-		PRINTF("timeout in kbd_write_command_w\n");
-	kbd_write_command(data);
+	if (kb_wait ())
+		PRINTF ("timeout in kbd_write_command_w\n");
+	kbd_write_command (data);
 }
 
-void kbd_write_output_w(int data)
+void kbd_write_output_w (int data)
 {
-	if(kb_wait())
-		PRINTF("timeout in kbd_write_output_w\n");
-	kbd_write_output(data);
+	if (kb_wait ())
+		PRINTF ("timeout in kbd_write_output_w\n");
+	kbd_write_output (data);
 }
 
-void kbd_send_data(unsigned char data)
+void kbd_send_data (unsigned char data)
 {
 	unsigned char status;
-	i8259_mask_irq(KBD_INTERRUPT); /* disable interrupt */
-	kbd_write_output_w(data);
-	status = kbd_wait_for_input();
+
+	i8259_mask_irq (KBD_INTERRUPT);	/* disable interrupt */
+	kbd_write_output_w (data);
+	status = kbd_wait_for_input ();
 	if (status == KBD_REPLY_ACK)
-		i8259_unmask_irq(KBD_INTERRUPT); /* enable interrupt */
+		i8259_unmask_irq (KBD_INTERRUPT);	/* enable interrupt */
 }
 
 
-char * kbd_initialize(void)
+char *kbd_initialize (void)
 {
 	int status;
 
-	in_pointer = 0; /* delete in Buffer */
+	in_pointer = 0;		/* delete in Buffer */
 	out_pointer = 0;
 	/*
 	 * Test the keyboard interface.
 	 * This seems to be the only way to get it going.
 	 * If the test is successful a x55 is placed in the input buffer.
 	 */
-	kbd_write_command_w(KBD_CCMD_SELF_TEST);
-	if (kbd_wait_for_input() != 0x55)
+	kbd_write_command_w (KBD_CCMD_SELF_TEST);
+	if (kbd_wait_for_input () != 0x55)
 		return "Kbd:   failed self test";
 	/*
 	 * Perform a keyboard interface test.  This causes the controller
 	 * to test the keyboard clock and data lines.  The results of the
 	 * test are placed in the input buffer.
 	 */
-	kbd_write_command_w(KBD_CCMD_KBD_TEST);
-	if (kbd_wait_for_input() != 0x00)
+	kbd_write_command_w (KBD_CCMD_KBD_TEST);
+	if (kbd_wait_for_input () != 0x00)
 		return "Kbd:   interface failed self test";
 	/*
 	 * Enable the keyboard by allowing the keyboard clock to run.
 	 */
-	kbd_write_command_w(KBD_CCMD_KBD_ENABLE);
-	status = kbd_wait_for_input();
+	kbd_write_command_w (KBD_CCMD_KBD_ENABLE);
+	status = kbd_wait_for_input ();
 	/*
 	 * Reset keyboard. If the read times out
 	 * then the assumption is that no keyboard is
@@ -622,17 +619,16 @@ char * kbd_initialize(void)
 	 * Set up to try again if the keyboard asks for RESEND.
 	 */
 	do {
-		kbd_write_output_w(KBD_CMD_RESET);
-		status = kbd_wait_for_input();
+		kbd_write_output_w (KBD_CMD_RESET);
+		status = kbd_wait_for_input ();
 		if (status == KBD_REPLY_ACK)
 			break;
-		if (status != KBD_REPLY_RESEND)
-		{
-			PRINTF("status: %X\n",status);
+		if (status != KBD_REPLY_RESEND) {
+			PRINTF ("status: %X\n", status);
 			return "Kbd:   reset failed, no ACK";
 		}
 	} while (1);
-	if (kbd_wait_for_input() != KBD_REPLY_POR)
+	if (kbd_wait_for_input () != KBD_REPLY_POR)
 		return "Kbd:   reset failed, no POR";
 
 	/*
@@ -642,44 +638,43 @@ char * kbd_initialize(void)
 	 * Set up to try again if the keyboard asks for RESEND.
 	 */
 	do {
-		kbd_write_output_w(KBD_CMD_DISABLE);
-		status = kbd_wait_for_input();
+		kbd_write_output_w (KBD_CMD_DISABLE);
+		status = kbd_wait_for_input ();
 		if (status == KBD_REPLY_ACK)
 			break;
 		if (status != KBD_REPLY_RESEND)
 			return "Kbd:   disable keyboard: no ACK";
 	} while (1);
 
-	kbd_write_command_w(KBD_CCMD_WRITE_MODE);
-	kbd_write_output_w(KBD_MODE_KBD_INT
-			      | KBD_MODE_SYS
-			      | KBD_MODE_DISABLE_MOUSE
-			      | KBD_MODE_KCC);
+	kbd_write_command_w (KBD_CCMD_WRITE_MODE);
+	kbd_write_output_w (KBD_MODE_KBD_INT
+			    | KBD_MODE_SYS
+			    | KBD_MODE_DISABLE_MOUSE | KBD_MODE_KCC);
 
 	/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
-	kbd_write_command_w(KBD_CCMD_READ_MODE);
-	if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
+	kbd_write_command_w (KBD_CCMD_READ_MODE);
+	if (!(kbd_wait_for_input () & KBD_MODE_KCC)) {
 		/*
 		 * If the controller does not support conversion,
 		 * Set the keyboard to scan-code set 1.
 		 */
-		kbd_write_output_w(0xF0);
-		kbd_wait_for_input();
-		kbd_write_output_w(0x01);
-		kbd_wait_for_input();
+		kbd_write_output_w (0xF0);
+		kbd_wait_for_input ();
+		kbd_write_output_w (0x01);
+		kbd_wait_for_input ();
 	}
-	kbd_write_output_w(KBD_CMD_ENABLE);
-	if (kbd_wait_for_input() != KBD_REPLY_ACK)
+	kbd_write_output_w (KBD_CMD_ENABLE);
+	if (kbd_wait_for_input () != KBD_REPLY_ACK)
 		return "Kbd:   enable keyboard: no ACK";
 
 	/*
 	 * Finally, set the typematic rate to maximum.
 	 */
-	kbd_write_output_w(KBD_CMD_SET_RATE);
-	if (kbd_wait_for_input() != KBD_REPLY_ACK)
+	kbd_write_output_w (KBD_CMD_SET_RATE);
+	if (kbd_wait_for_input () != KBD_REPLY_ACK)
 		return "Kbd:   Set rate: no ACK";
-	kbd_write_output_w(0x00);
-	if (kbd_wait_for_input() != KBD_REPLY_ACK)
+	kbd_write_output_w (0x00);
+	if (kbd_wait_for_input () != KBD_REPLY_ACK)
 		return "Kbd:   Set rate: no ACK";
 	return NULL;
 }

board/MAI/AmigaOneG3SE/start.txt

@@ -39,11 +39,11 @@
 
 	DIM0_TIM_CTL_0 = 0x737d737d             (0xc9)
 		      /* DRAM timing control for dimm0 & dimm1; set wait one clock	*/
-		      /* cycle for next data access 					*/
+		      /* cycle for next data access					*/
 
 	DIM2_TIM_CTL_0 = 0x737d737d             (0xca)
 		      /* DRAM timing control for dimm2 & dimm3; set wait one clock	*/
-		      /* cycle for next data access 					*/
+		      /* cycle for next data access					*/
 
 	DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB    (0x90)
 		      /* set dimm0 bank0 for 128 MB	*/

board/MAI/AmigaOneG3SE/u-boot.lds

@@ -40,11 +40,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/MAI/AmigaOneG3SE/usb_uhci.c

@@ -522,7 +522,7 @@ void usb_check_int_chain(void)
 		link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
 		td=(uhci_td_t *)link; /* assign it */
 		/* all interrupt TDs are finally linked to the td_int[0].
- 		 * so we process all until we find the td_int[0].
+		 * so we process all until we find the td_int[0].
 		 * if int0 chain points to a QH, we're also done
 	   */
 		while(((i>0) && (link != (unsigned long)&td_int[0])) ||

board/MAI/AmigaOneG3SE/via686.c

@@ -97,7 +97,7 @@ void via_isa_init(pci_dev_t dev, struct pci_config_table *table)
 	pci_write_config_byte(dev, 0x80, 0);
 	pci_write_config_byte(dev, 0x85, 0x01);
 
-/* 	pci_write_config_byte(dev, 0x77, 0x00); */
+/*	pci_write_config_byte(dev, 0x77, 0x00); */
     }
 }
 
@@ -212,7 +212,7 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c
 }
 
 __asm         ("    .globl via_calibrate_time_base \n"
-	       "via_calibrate_time_base: 	   \n"
+	       "via_calibrate_time_base:	   \n"
 	       "   lis     9, 0xfe00		   \n"
 	       "   li      0, 0x00		   \n"
 	       "   mttbu   0			   \n"
@@ -262,9 +262,9 @@ void ide_led(uchar led, uchar status)
 /*     unsigned char c = in_byte(0x92); */
 
 /*     if (!status) */
-/* 	out_byte(0x92, c | 0xC0); */
+/*	out_byte(0x92, c | 0xC0); */
 /*     else */
-/* 	out_byte(0x92, c & ~0xC0); */
+/*	out_byte(0x92, c & ~0xC0); */
 }
 
 

board/MAI/menu/menu.h

@@ -4,15 +4,14 @@
 /* A single menu */
 typedef void (*menu_finish_callback)(struct menu_s *menu);
 
-typedef struct menu_s
-{
-    char *name;                     /* Menu name */
-    int  num_options;               /* Number of options in this menu */
-    int  flags;                     /* Various flags - see below */
-    int  option_align;              /* Aligns options to a field width of this much characters if != 0 */
-
-    struct menu_option_s **options; /* Pointer to this menu's options */
-    menu_finish_callback callback;  /* Called when the menu closes */
+typedef struct menu_s {
+	char *name;		/* Menu name */
+	int num_options;	/* Number of options in this menu */
+	int flags;		/* Various flags - see below */
+	int option_align;	/* Aligns options to a field width of this much characters if != 0 */
+
+	struct menu_option_s **options;	/* Pointer to this menu's options */
+	menu_finish_callback callback;	/* Called when the menu closes */
 } menu_t;
 
 /*
@@ -23,13 +22,12 @@ typedef struct menu_s
  * sys : pointer for system-specific data, init to NULL and don't touch
  */
 
-#define OPTION_PREAMBLE				\
-    int type;                     		\
-    char *name;   				\
-    char *help;   				\
-    int id;                                     \
-    void *sys;                                  \
-
+#define OPTION_PREAMBLE		\
+	int type;		\
+	char *name;		\
+	char *help;		\
+	int id;			\
+	void *sys;
 
 /*
  * Menu option types.
@@ -110,59 +108,49 @@ typedef struct menu_text_s
 
 
 #define MENU_SELECTION_TYPE 3
-typedef struct menu_select_option_s
-{
-    char *map_from;               /* Map this variable contents ... */
-    char *map_to;                 /* ... to this menu text and vice versa */
+typedef struct menu_select_option_s {
+	char *map_from;		/* Map this variable contents ... */
+	char *map_to;		/* ... to this menu text and vice versa */
 } menu_select_option_t;
 
-typedef struct menu_select_s
-{
-    OPTION_PREAMBLE
-
-    int num_options;             /* Number of mappings */
-    menu_select_option_t **options;
-				 /* Option list array */
+typedef struct menu_select_s {
+	OPTION_PREAMBLE int num_options;	/* Number of mappings */
+	menu_select_option_t **options;
+	/* Option list array */
 } menu_select_t;
 
 
 #define MENU_ROUTINE_TYPE 4
-typedef void (*menu_routine_callback)(struct menu_routine_s *);
+typedef void (*menu_routine_callback) (struct menu_routine_s *);
 
-typedef struct menu_routine_s
-{
-    OPTION_PREAMBLE
-    menu_routine_callback callback;
-				 /* routine to be called */
-    void *user_data;             /* User data, don't care for system */
+typedef struct menu_routine_s {
+	OPTION_PREAMBLE menu_routine_callback callback;
+	/* routine to be called */
+	void *user_data;	/* User data, don't care for system */
 } menu_routine_t;
 
 
 #define MENU_CUSTOM_TYPE 5
-typedef void (*menu_custom_draw)(struct menu_custom_s *);
-typedef void (*menu_custom_key)(struct menu_custom_s *, int);
+typedef void (*menu_custom_draw) (struct menu_custom_s *);
+typedef void (*menu_custom_key) (struct menu_custom_s *, int);
 
-typedef struct menu_custom_s
-{
-    OPTION_PREAMBLE
-    menu_custom_draw drawfunc;
-    menu_custom_key  keyfunc;
-    void *user_data;
+typedef struct menu_custom_s {
+	OPTION_PREAMBLE menu_custom_draw drawfunc;
+	menu_custom_key keyfunc;
+	void *user_data;
 } menu_custom_t;
 
 /*
  * The menu option superstructure
  */
-typedef struct menu_option_s
-{
-    union
-    {
-	menu_submenu_t m_sub_menu;
-	menu_boolean_t m_boolean;
-	menu_text_t    m_text;
-	menu_select_t  m_select;
-	menu_routine_t m_routine;
-    };
+typedef struct menu_option_s {
+	union {
+		menu_submenu_t m_sub_menu;
+		menu_boolean_t m_boolean;
+		menu_text_t m_text;
+		menu_select_t m_select;
+		menu_routine_t m_routine;
+	};
 } menu_option_t;
 
 /* Init the menu system. Returns <0 on error */

board/Marvell/common/bootseq.txt

@@ -56,7 +56,7 @@ in_flash:
     setup stack pointer (r1)
     setup GOT
     call cpu_init_f
-    	debug leds
+	debug leds
     board_init_f: (common/board.c)
 	board_early_init_f:
 	    remap gt regs?
@@ -74,7 +74,7 @@ in_flash:
 		dram_size()
 		setup PCI slave memory mappings
 		setup SCS
-   	setup monitor
+	setup monitor
 	alloc board info struct
 	init bd struct
 	relocate_code: (cpu/mpc7xxx/start.S)

board/Marvell/common/flash.c

@@ -23,7 +23,7 @@
 
 /*
  * flash.c - flash support for the 512k, 8bit boot flash
- 	and the 8MB 32bit extra flash on the DB64360
+	and the 8MB 32bit extra flash on the DB64360
  *           most of this file was based on the existing U-Boot
  *           flash drivers.
  *

board/Marvell/db64360/mpsc.c

@@ -425,7 +425,7 @@ void mpsc_sdma_init (void)
 			 (MV64360_SDMA_WIN_ACCESS_FULL <<
 			  (MV64360_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
 
-/* Setup MPSC internal address space base address 	*/
+/* Setup MPSC internal address space base address	*/
 	GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
 
 /* no high address remap*/

board/Marvell/db64360/mpsc.h

@@ -67,9 +67,9 @@ extern int (*mpsc_test_char)(void);
 #define TX_STOP     0x00010000
 #define RX_ENABLE   0x00000080
 
-#define SDMA_RX_ABORT 		  (1 << 15)
-#define SDMA_TX_ABORT 		  (1 << 31)
-#define MPSC_TX_ABORT 		  (1 << 7)
+#define SDMA_RX_ABORT		  (1 << 15)
+#define SDMA_TX_ABORT		  (1 << 31)
+#define MPSC_TX_ABORT		  (1 << 7)
 #define MPSC_RX_ABORT             (1 << 23)
 #define MPSC_ENTER_HUNT           (1 << 31)
 

board/Marvell/db64360/mv_eth.c

@@ -1391,7 +1391,7 @@ u32 mv_get_internal_sram_base (void)
 *       port_phy_addr).
 *
 * INPUT:
-*       ETH_PORT_INFO 	*p_eth_port_ctrl       Ethernet port control struct
+*       ETH_PORT_INFO	*p_eth_port_ctrl       Ethernet port control struct
 *
 * OUTPUT:
 *       See description.
@@ -1551,7 +1551,7 @@ static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
 *       ether_init_rx_desc_ring for Rx queues).
 *
 * INPUT:
-*       ETH_PORT_INFO 	*p_eth_port_ctrl       Ethernet port control struct
+*       ETH_PORT_INFO	*p_eth_port_ctrl       Ethernet port control struct
 *
 * OUTPUT:
 *       Ethernet port is ready to receive and transmit.
@@ -1641,7 +1641,7 @@ static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
 * INPUT:
 *	ETH_PORT eth_port_num     Port number.
 *	char *        p_addr		Address to be set
-*	ETH_QUEUE 	  queue		Rx queue number for this MAC address.
+*	ETH_QUEUE	  queue		Rx queue number for this MAC address.
 *
 * OUTPUT:
 *	Set MAC address low and high registers. also calls eth_port_uc_addr()
@@ -1679,10 +1679,10 @@ static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
 *	parameters.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
+*	ETH_PORT	eth_port_num      Port number.
 *	unsigned char uc_nibble		Unicast MAC Address last nibble.
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	This function add/removes MAC addresses from the port unicast address
@@ -1761,10 +1761,10 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
 *	   In this case, the function calculates the CRC-8bit value and calls
 *	   eth_port_omc_addr() routine to set the Other Multicast Table.
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	*p_addr		Unicast MAC Address.
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	*p_addr		Unicast MAC Address.
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -1895,10 +1895,10 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
 *	according to the argument given.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	mc_byte		Multicast addr last byte (MAC DA[7:0] bits).
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	mc_byte		Multicast addr last byte (MAC DA[7:0] bits).
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -1959,10 +1959,10 @@ static bool eth_port_smc_addr (ETH_PORT eth_port_num,
 *	CRC-8 argument given.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	  crc8		A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	  crc8		A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -2203,7 +2203,7 @@ static bool ethernet_phy_reset (ETH_PORT eth_port_num)
  * eth_port_reset - Reset Ethernet port
  *
  * DESCRIPTION:
- * 	This routine resets the chip by aborting any SDMA engine activity and
+ *	This routine resets the chip by aborting any SDMA engine activity and
  *      clearing the MIB counters. The Receiver and the Transmit unit are in
  *      idle state after this command is performed and the port is disabled.
  *
@@ -2556,9 +2556,9 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
- *      int 			rx_desc_num       Number of Rx descriptors
- *      int 			rx_buff_size      Size of Rx buffer
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
+ *      int			rx_desc_num       Number of Rx descriptors
+ *      int			rx_buff_size      Size of Rx buffer
  *      unsigned int    rx_desc_base_addr  Rx descriptors memory area base addr.
  *      unsigned int    rx_buff_base_addr  Rx buffer memory area base addr.
  *
@@ -2650,9 +2650,9 @@ static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
- *      int 			tx_desc_num       Number of Tx descriptors
- *      int 			tx_buff_size      Size of Tx buffer
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
+ *      int			tx_desc_num       Number of Tx descriptors
+ *      int			tx_buff_size      Size of Tx buffer
  *      unsigned int    tx_desc_base_addr  Tx descriptors memory area base addr.
  *      unsigned int    tx_buff_base_addr  Tx buffer memory area base addr.
  *
@@ -2745,7 +2745,7 @@ static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2861,7 +2861,7 @@ static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2930,7 +2930,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
  * eth_port_receive - Get received information from Rx ring.
  *
  * DESCRIPTION:
- * 	This routine returns the received data to the caller. There is no
+ *	This routine returns the received data to the caller. There is no
  *	data copying during routine operation. All information is returned
  *	using pointer to packet information struct passed from the caller.
  *      If the routine exhausts	Rx ring resources then the resource error flag
@@ -2938,7 +2938,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2980,7 +2980,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
 
 	/* Nothing to receive... */
 	if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
-/* 	DP(printf("Rx: command_status: %08x\n", command_status)); */
+/*	DP(printf("Rx: command_status: %08x\n", command_status)); */
 		D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
 /*	DP(printf("\nETH_END_OF_JOB ...\n"));*/
 		return ETH_END_OF_JOB;
@@ -3019,7 +3019,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
  *      PKT_INFO        *p_pkt_info       Information on the returned buffer.
  *
  * OUTPUT:

board/Marvell/db64360/u-boot.lds

@@ -37,11 +37,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/Marvell/db64460/mpsc.c

@@ -425,7 +425,7 @@ void mpsc_sdma_init (void)
 			 (MV64460_SDMA_WIN_ACCESS_FULL <<
 			  (MV64460_CUNIT_BASE_ADDR_WIN_0_BIT * 2)));
 
-/* Setup MPSC internal address space base address 	*/
+/* Setup MPSC internal address space base address	*/
 	GT_REG_WRITE (CUNIT_INTERNAL_SPACE_BASE_ADDR_REG, CFG_GT_REGS);
 
 /* no high address remap*/

board/Marvell/db64460/mpsc.h

@@ -67,9 +67,9 @@ extern int (*mpsc_test_char)(void);
 #define TX_STOP     0x00010000
 #define RX_ENABLE   0x00000080
 
-#define SDMA_RX_ABORT 		  (1 << 15)
-#define SDMA_TX_ABORT 		  (1 << 31)
-#define MPSC_TX_ABORT 		  (1 << 7)
+#define SDMA_RX_ABORT		  (1 << 15)
+#define SDMA_TX_ABORT		  (1 << 31)
+#define MPSC_TX_ABORT		  (1 << 7)
 #define MPSC_RX_ABORT             (1 << 23)
 #define MPSC_ENTER_HUNT           (1 << 31)
 

board/Marvell/db64460/mv_eth.c

@@ -1390,7 +1390,7 @@ u32 mv_get_internal_sram_base (void)
 *       port_phy_addr).
 *
 * INPUT:
-*       ETH_PORT_INFO 	*p_eth_port_ctrl       Ethernet port control struct
+*       ETH_PORT_INFO	*p_eth_port_ctrl       Ethernet port control struct
 *
 * OUTPUT:
 *       See description.
@@ -1550,7 +1550,7 @@ static void eth_port_init (ETH_PORT_INFO * p_eth_port_ctrl)
 *       ether_init_rx_desc_ring for Rx queues).
 *
 * INPUT:
-*       ETH_PORT_INFO 	*p_eth_port_ctrl       Ethernet port control struct
+*       ETH_PORT_INFO	*p_eth_port_ctrl       Ethernet port control struct
 *
 * OUTPUT:
 *       Ethernet port is ready to receive and transmit.
@@ -1640,7 +1640,7 @@ static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
 * INPUT:
 *	ETH_PORT eth_port_num     Port number.
 *	char *        p_addr		Address to be set
-*	ETH_QUEUE 	  queue		Rx queue number for this MAC address.
+*	ETH_QUEUE	  queue		Rx queue number for this MAC address.
 *
 * OUTPUT:
 *	Set MAC address low and high registers. also calls eth_port_uc_addr()
@@ -1678,10 +1678,10 @@ static void eth_port_uc_addr_set (ETH_PORT eth_port_num,
 *	parameters.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
+*	ETH_PORT	eth_port_num      Port number.
 *	unsigned char uc_nibble		Unicast MAC Address last nibble.
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	This function add/removes MAC addresses from the port unicast address
@@ -1760,10 +1760,10 @@ static bool eth_port_uc_addr (ETH_PORT eth_port_num,
 *	   In this case, the function calculates the CRC-8bit value and calls
 *	   eth_port_omc_addr() routine to set the Other Multicast Table.
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	*p_addr		Unicast MAC Address.
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	*p_addr		Unicast MAC Address.
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -1894,10 +1894,10 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
 *	according to the argument given.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	mc_byte		Multicast addr last byte (MAC DA[7:0] bits).
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	mc_byte		Multicast addr last byte (MAC DA[7:0] bits).
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -1958,10 +1958,10 @@ static bool eth_port_smc_addr (ETH_PORT eth_port_num,
 *	CRC-8 argument given.
 *
 * INPUT:
-*	ETH_PORT 	eth_port_num      Port number.
-*	unsigned char 	  crc8		A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
-*	ETH_QUEUE 		 queue		Rx queue number for this MAC address.
-*	int 			option      0 = Add, 1 = remove address.
+*	ETH_PORT	eth_port_num      Port number.
+*	unsigned char	  crc8		A CRC-8bit (Polynomial: x^8+x^2+x^1+1).
+*	ETH_QUEUE		 queue		Rx queue number for this MAC address.
+*	int			option      0 = Add, 1 = remove address.
 *
 * OUTPUT:
 *	See description.
@@ -2202,7 +2202,7 @@ static bool ethernet_phy_reset (ETH_PORT eth_port_num)
  * eth_port_reset - Reset Ethernet port
  *
  * DESCRIPTION:
- * 	This routine resets the chip by aborting any SDMA engine activity and
+ *	This routine resets the chip by aborting any SDMA engine activity and
  *      clearing the MIB counters. The Receiver and the Transmit unit are in
  *      idle state after this command is performed and the port is disabled.
  *
@@ -2555,9 +2555,9 @@ static void eth_set_access_control (ETH_PORT eth_port_num,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
- *      int 			rx_desc_num       Number of Rx descriptors
- *      int 			rx_buff_size      Size of Rx buffer
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
+ *      int			rx_desc_num       Number of Rx descriptors
+ *      int			rx_buff_size      Size of Rx buffer
  *      unsigned int    rx_desc_base_addr  Rx descriptors memory area base addr.
  *      unsigned int    rx_buff_base_addr  Rx buffer memory area base addr.
  *
@@ -2649,9 +2649,9 @@ static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
- *      int 			tx_desc_num       Number of Tx descriptors
- *      int 			tx_buff_size      Size of Tx buffer
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
+ *      int			tx_desc_num       Number of Tx descriptors
+ *      int			tx_buff_size      Size of Tx buffer
  *      unsigned int    tx_desc_base_addr  Tx descriptors memory area base addr.
  *      unsigned int    tx_buff_base_addr  Tx buffer memory area base addr.
  *
@@ -2744,7 +2744,7 @@ static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2860,7 +2860,7 @@ static ETH_FUNC_RET_STATUS eth_port_send (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	tx_queue         Number of Tx queue.
+ *	ETH_QUEUE	tx_queue         Number of Tx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2929,7 +2929,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
  * eth_port_receive - Get received information from Rx ring.
  *
  * DESCRIPTION:
- * 	This routine returns the received data to the caller. There is no
+ *	This routine returns the received data to the caller. There is no
  *	data copying during routine operation. All information is returned
  *	using pointer to packet information struct passed from the caller.
  *      If the routine exhausts	Rx ring resources then the resource error flag
@@ -2937,7 +2937,7 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
  *	PKT_INFO        *p_pkt_info       User packet buffer.
  *
  * OUTPUT:
@@ -2979,7 +2979,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
 
 	/* Nothing to receive... */
 	if (command_status & (ETH_BUFFER_OWNED_BY_DMA)) {
-/* 	DP(printf("Rx: command_status: %08x\n", command_status)); */
+/*	DP(printf("Rx: command_status: %08x\n", command_status)); */
 		D_CACHE_FLUSH_LINE ((unsigned int) p_rx_curr_desc, 0);
 /*	DP(printf("\nETH_END_OF_JOB ...\n"));*/
 		return ETH_END_OF_JOB;
@@ -3018,7 +3018,7 @@ static ETH_FUNC_RET_STATUS eth_port_receive (ETH_PORT_INFO * p_eth_port_ctrl,
  *
  * INPUT:
  *	ETH_PORT_INFO   *p_eth_port_ctrl   Ethernet Port Control srtuct.
- *	ETH_QUEUE   	rx_queue         Number of Rx queue.
+ *	ETH_QUEUE	rx_queue         Number of Rx queue.
  *      PKT_INFO        *p_pkt_info       Information on the returned buffer.
  *
  * OUTPUT:

board/Marvell/db64460/u-boot.lds

@@ -37,11 +37,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/MigoR/lowlevel_init.S

@@ -87,7 +87,7 @@ lowlevel_init:
 	mov.w	r0, @r1
 
 	mov.l	DLLFRQ_A, r1	! 20080115
-	mov.l	DLLFRQ_D, r0 	! 20080115
+	mov.l	DLLFRQ_D, r0	! 20080115
 	mov.l	r0, @r1
 
 	mov.l	FRQCR_A, r1		! 0xA4150000 Frequency control register
@@ -100,11 +100,11 @@ lowlevel_init:
 
 bsc_init:
 	mov.l	CMNCR_A, r1	! CMNCR address -> R1
-	mov.l 	CMNCR_D, r0	! CMNCR data    -> R0
+	mov.l	CMNCR_D, r0	! CMNCR data    -> R0
 	mov.l	r0, @r1		! CMNCR set
 
 	mov.l	CS0BCR_A, r1	! CS0BCR address -> R1
-	mov.l 	CS0BCR_D, r0	! CS0BCR data    -> R0
+	mov.l	CS0BCR_D, r0	! CS0BCR data    -> R0
 	mov.l	r0, @r1		! CS0BCR set
 
 	mov.l	CS4BCR_A, r1	! CS4BCR address -> R1
@@ -112,35 +112,35 @@ bsc_init:
 	mov.l	r0, @r1		! CS4BCR set
 
 	mov.l	CS5ABCR_A, r1	! CS5ABCR address -> R1
-	mov.l 	CS5ABCR_D, r0	! CS5ABCR data    -> R0
+	mov.l	CS5ABCR_D, r0	! CS5ABCR data    -> R0
 	mov.l	r0, @r1		! CS5ABCR set
 
 	mov.l	CS5BBCR_A, r1	! CS5BBCR address -> R1
-	mov.l 	CS5BBCR_D, r0	! CS5BBCR data    -> R0
+	mov.l	CS5BBCR_D, r0	! CS5BBCR data    -> R0
 	mov.l	r0, @r1		! CS5BBCR set
 
 	mov.l	CS6ABCR_A, r1	! CS6ABCR address -> R1
-	mov.l 	CS6ABCR_D, r0	! CS6ABCR data    -> R0
+	mov.l	CS6ABCR_D, r0	! CS6ABCR data    -> R0
 	mov.l	r0, @r1		! CS6ABCR set
 
 	mov.l	CS0WCR_A, r1	! CS0WCR address -> R1
-	mov.l 	CS0WCR_D, r0	! CS0WCR data    -> R0
+	mov.l	CS0WCR_D, r0	! CS0WCR data    -> R0
 	mov.l	r0, @r1		! CS0WCR set
 
 	mov.l	CS4WCR_A, r1	! CS4WCR address -> R1
-	mov.l 	CS4WCR_D, r0	! CS4WCR data    -> R0
+	mov.l	CS4WCR_D, r0	! CS4WCR data    -> R0
 	mov.l	r0, @r1		! CS4WCR set
 
 	mov.l	CS5AWCR_A, r1	! CS5AWCR address -> R1
-	mov.l 	CS5AWCR_D, r0	! CS5AWCR data    -> R0
+	mov.l	CS5AWCR_D, r0	! CS5AWCR data    -> R0
 	mov.l	r0, @r1		! CS5AWCR set
 
 	mov.l	CS5BWCR_A, r1	! CS5BWCR address -> R1
-	mov.l 	CS5BWCR_D, r0	! CS5BWCR data    -> R0
+	mov.l	CS5BWCR_D, r0	! CS5BWCR data    -> R0
 	mov.l	r0, @r1		! CS5BWCR set
 
 	mov.l	CS6AWCR_A, r1	! CS6AWCR address -> R1
-	mov.l 	CS6AWCR_D, r0	! CS6AWCR data    -> R0
+	mov.l	CS6AWCR_D, r0	! CS6AWCR data    -> R0
 	mov.l	r0, @r1		! CS6AWCR set
 
 	! SDRAM initialization
@@ -173,7 +173,7 @@ bsc_init:
 	mov.l	r0, @r1
 
 	mov.l	SDMR3_A, r1	! SDMR3 address -> R1
-	mov 	#0x00, r0	! SDMR3 data    -> R0
+	mov	#0x00, r0	! SDMR3 data    -> R0
 	mov.b	r0, @r1		! SDMR3 set
 
 	! BL bit off (init = ON)  (?!?)

board/RPXClassic/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RPXClassic/u-boot.lds.debug

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RPXlite/flash.c

@@ -31,7 +31,7 @@
  * are not tested.
  *
  * (?) Does an RPXLite board which
- * 	does not use AM29LV800 flash memory exist ?
+ *	does not use AM29LV800 flash memory exist ?
  *	I don't know...
  */
 

board/RPXlite/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RPXlite/u-boot.lds.debug

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RPXlite_dw/RPXlite_dw.c

@@ -124,7 +124,7 @@ long int initdram (int board_type)
 	memctl->memc_mamr = CFG_MAMR_9COL & (~(MAMR_PTAE)); /* no refresh yet */
 	/*Disable Periodic timer A. */
 
- 	udelay(200);
+	udelay(200);
 
 	/* perform SDRAM initializsation sequence */
 

board/RPXlite_dw/flash.c

@@ -31,7 +31,7 @@
  * are not tested.
  *
  * (?) Does an RPXLite board which
- * 	does not use AM29LV800 flash memory exist ?
+ *	does not use AM29LV800 flash memory exist ?
  *	I don't know...
  */
 
@@ -178,8 +178,8 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 
 	value = addr[0] ;
 	switch (value & 0x00FF00FF) {
-	case AMD_MANUFACT:             		/* AMD_MANUFACT=0x00010001 in flash.h. */
-		info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h.*/
+	case AMD_MANUFACT:			/* AMD_MANUFACT =0x00010001 in flash.h */
+		info->flash_id = FLASH_MAN_AMD; /* FLASH_MAN_AMD=0x00000000 in flash.h */
 		break;
 	case FUJ_MANUFACT:
 		info->flash_id = FLASH_MAN_FUJ;

board/RPXlite_dw/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RPXlite_dw/u-boot.lds.debug

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/RRvision/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)	}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)	}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)	}
   .rela.got      : { *(.rela.got)	}
   .rel.ctors     : { *(.rel.ctors)	}

board/a3000/Makefile

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS 	= $(BOARD).o flash.o
+COBJS	= $(BOARD).o flash.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))

board/a3000/a3000.c

@@ -82,7 +82,7 @@ static struct pci_config_table pci_a3000_config_table[] = {
 				       PCI_COMMAND_MEMORY |
 				       PCI_COMMAND_MASTER }},
 	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-	  PCI_ANY_ID, 0x15, PCI_ANY_ID, 	/* PCI slot2 */
+	  PCI_ANY_ID, 0x15, PCI_ANY_ID,		/* PCI slot2 */
 	  pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
 				       PCI_ENET2_MEMADDR,
 				       PCI_COMMAND_IO |

board/adder/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)	}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)	}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)	}
   .rela.got      : { *(.rela.got)	}
   .rel.ctors     : { *(.rel.ctors)	}

board/ads5121/Makefile

@@ -23,9 +23,14 @@
 
 include $(TOPDIR)/config.mk
 
+$(shell mkdir -p $(OBJTREE)/board/freescale/common)
+
 LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	:= $(BOARD).o
+COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
+COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
+COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o
 COBJS-$(CONFIG_PCI) += pci.o
 
 COBJS	:= $(COBJS-y)

board/ads5121/ads5121.c

@@ -39,17 +39,35 @@
 
 #define SCCR2_CLOCKS_EN	(CLOCK_SCCR2_MEM_EN |		\
 			 CLOCK_SCCR2_SPDIF_EN |		\
+			 CLOCK_SCCR2_DIU_EN |		\
 			 CLOCK_SCCR2_I2C_EN)
 
 #define CSAW_START(start)	((start) & 0xFFFF0000)
 #define CSAW_STOP(start, size)	(((start) + (size) - 1) >> 16)
 
+#define MPC5121_IOCTL_PSC6_0	(0x284/4)
+#define MPC5121_IO_DIU_START	(0x288/4)
+#define MPC5121_IO_DIU_END	(0x2fc/4)
+
+/* Functional pin muxing */
+#define MPC5121_IO_FUNC1	(0 << 7)
+#define MPC5121_IO_FUNC2	(1 << 7)
+#define MPC5121_IO_FUNC3	(2 << 7)
+#define MPC5121_IO_FUNC4	(3 << 7)
+#define MPC5121_IO_ST		(1 << 2)
+#define MPC5121_IO_DS_1		(0)
+#define MPC5121_IO_DS_2		(1)
+#define MPC5121_IO_DS_3		(2)
+#define MPC5121_IO_DS_4		(3)
+
 long int fixed_sdram(void);
 
 int board_early_init_f (void)
 {
 	volatile immap_t *im = (immap_t *) CFG_IMMR;
-	u32 lpcaw;
+	u32 lpcaw, tmp32;
+	volatile ioctrl512x_t *ioctl = &(im->io_ctrl);
+	int i;
 
 	/*
 	 * Initialize Local Window for the CPLD registers access (CS2 selects
@@ -81,6 +99,16 @@ int board_early_init_f (void)
 	im->clk.sccr[0] = SCCR1_CLOCKS_EN;
 	im->clk.sccr[1] = SCCR2_CLOCKS_EN;
 
+	/* Configure DIU clock pin */
+	tmp32 = ioctl->regs[MPC5121_IOCTL_PSC6_0];
+	tmp32 &= ~0x1ff;
+	tmp32 |= MPC5121_IO_FUNC3 | MPC5121_IO_DS_4;
+	ioctl->regs[MPC5121_IOCTL_PSC6_0] = tmp32;
+
+	/* Initialize IO pins (pin mux) for DIU function */
+	for (i = MPC5121_IO_DIU_START; i < MPC5121_IO_DIU_END; i++)
+		ioctl->regs[i] |= (MPC5121_IO_FUNC3 | MPC5121_IO_DS_4);
+
 	return 0;
 }
 
@@ -186,6 +214,38 @@ long int fixed_sdram (void)
 	return msize;
 }
 
+int misc_init_r(void)
+{
+	u8 tmp_val;
+
+	/* Using this for DIU init before the driver in linux takes over
+	 *  Enable the TFP410 Encoder (I2C address 0x38)
+	 */
+
+	i2c_set_bus_num(2);
+	tmp_val = 0xBF;
+	i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
+	/* Verify if enabled */
+	tmp_val = 0;
+	i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
+	debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+
+	tmp_val = 0x10;
+	i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
+	/* Verify if enabled */
+	tmp_val = 0;
+	i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
+	debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
+
+#ifdef CONFIG_FSL_DIU_FB
+#if	!(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
+	ads5121_diu_init();
+#endif
+#endif
+
+	return 0;
+}
+
 int checkboard (void)
 {
 	ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);

board/ads5121/ads5121_diu.c

@@ -0,0 +1,165 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ * York Sun <yorksun@freescale.com>
+ *
+ * FSL DIU Framebuffer driver
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_FSL_DIU_FB
+
+#include "../freescale/common/pixis.h"
+#include "../freescale/common/fsl_diu_fb.h"
+
+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
+#include <devices.h>
+#include <video_fb.h>
+#endif
+
+extern unsigned int FSL_Logo_BMP[];
+
+static int xres, yres;
+
+void diu_set_pixel_clock(unsigned int pixclock)
+{
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile clk512x_t *clk = &immap->clk;
+	volatile unsigned int *clkdvdr = &clk->scfr[0];
+	unsigned long speed_ccb, temp, pixval;
+
+	speed_ccb = get_bus_freq(0) * 4;
+	temp = 1000000000/pixclock;
+	temp *= 1000;
+	pixval = speed_ccb / temp;
+	debug("DIU pixval = %lu\n", pixval);
+
+	/* Modify PXCLK in GUTS CLKDVDR */
+	debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr);
+	temp = *clkdvdr & 0xFFFFFF00;
+	*clkdvdr = temp | (pixval & 0x1F);
+	debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr);
+}
+
+int ads5121_diu_init(void)
+{
+	unsigned int pixel_format;
+
+	xres = 1024;
+	yres = 768;
+	pixel_format = 0x88883316;
+
+	return fsl_diu_init(xres, pixel_format, 0,
+		     (unsigned char *)FSL_Logo_BMP);
+}
+
+int ads5121diu_init_show_bmp(cmd_tbl_t *cmdtp,
+			     int flag, int argc, char *argv[])
+{
+	unsigned int addr;
+
+	if (argc < 2) {
+		printf("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+
+	if (!strncmp(argv[1], "init", 4)) {
+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
+		fsl_diu_clear_screen();
+		drv_video_init();
+#else
+		return ads5121_diu_init();
+#endif
+	} else {
+		addr = simple_strtoul(argv[1], NULL, 16);
+		fsl_diu_clear_screen();
+		fsl_diu_display_bmp((unsigned char *)addr, 0, 0, 0);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	diufb, CFG_MAXARGS, 1, ads5121diu_init_show_bmp,
+	"diufb init | addr - Init or Display BMP file\n",
+	"init\n    - initialize DIU\n"
+	"addr\n    - display bmp at address 'addr'\n"
+	);
+
+
+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
+
+/*
+ * The Graphic Device
+ */
+GraphicDevice ctfb;
+void *video_hw_init(void)
+{
+	GraphicDevice *pGD = (GraphicDevice *) &ctfb;
+	struct fb_info *info;
+
+	if (ads5121_diu_init() < 0)
+		return;
+
+	/* fill in Graphic device struct */
+	sprintf(pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz",
+		xres, yres, 32, 64, 60);
+
+	pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
+	pGD->winSizeX = xres;
+	pGD->winSizeY = yres - info->logo_height;
+	pGD->plnSizeX = pGD->winSizeX;
+	pGD->plnSizeY = pGD->winSizeY;
+
+	pGD->gdfBytesPP = 4;
+	pGD->gdfIndex = GDF_32BIT_X888RGB;
+
+	pGD->isaBase = 0;
+	pGD->pciBase = 0;
+	pGD->memSize = info->screen_size - info->logo_size;
+
+	/* Cursor Start Address */
+	pGD->dprBase = 0;
+	pGD->vprBase = 0;
+	pGD->cprBase = 0;
+
+	return (void *)pGD;
+}
+
+/**
+  * Set the LUT
+  *
+  * @index: color number
+  * @r: red
+  * @b: blue
+  * @g: green
+  */
+void video_set_lut
+	(unsigned int index, unsigned char r, unsigned char g, unsigned char b)
+{
+	return;
+}
+
+#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
+
+#endif /* CONFIG_FSL_DIU_FB */

board/ads5121/u-boot.lds

@@ -30,11 +30,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/acadia/u-boot-nand.lds

@@ -31,11 +31,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/acadia/u-boot.lds

@@ -38,11 +38,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/bamboo/bamboo.c

@@ -280,86 +280,86 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
 #define EBC0_BNAP_SMALL_FLASH				\
 	EBC0_BNAP_BME_DISABLED			|	\
 	EBC0_BNAP_TWT_ENCODE(6)			|	\
-	EBC0_BNAP_CSN_ENCODE(0)	    		|	\
-	EBC0_BNAP_OEN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBF_ENCODE(3)	    		|	\
-	EBC0_BNAP_TH_ENCODE(1)	    		|	\
-	EBC0_BNAP_RE_ENABLED	    		|	\
-	EBC0_BNAP_SOR_DELAYED	    		|	\
-	EBC0_BNAP_BEM_WRITEONLY	    		|	\
+	EBC0_BNAP_CSN_ENCODE(0)			|	\
+	EBC0_BNAP_OEN_ENCODE(1)			|	\
+	EBC0_BNAP_WBN_ENCODE(1)			|	\
+	EBC0_BNAP_WBF_ENCODE(3)			|	\
+	EBC0_BNAP_TH_ENCODE(1)			|	\
+	EBC0_BNAP_RE_ENABLED			|	\
+	EBC0_BNAP_SOR_DELAYED			|	\
+	EBC0_BNAP_BEM_WRITEONLY			|	\
 	EBC0_BNAP_PEN_DISABLED
 
 #define EBC0_BNCR_SMALL_FLASH_CS0			\
-	EBC0_BNCR_BAS_ENCODE(0xFFF00000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0xFFF00000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_8BIT
 
 #define EBC0_BNCR_SMALL_FLASH_CS4			\
-	EBC0_BNCR_BAS_ENCODE(0x87F00000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x87F00000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_8BIT
 
 /* Large Flash or SRAM */
 #define EBC0_BNAP_LARGE_FLASH_OR_SRAM			\
-	EBC0_BNAP_BME_DISABLED	    		|	\
-	EBC0_BNAP_TWT_ENCODE(8)	    		|	\
-	EBC0_BNAP_CSN_ENCODE(0)	    		|	\
-	EBC0_BNAP_OEN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBF_ENCODE(1)	    		|	\
-	EBC0_BNAP_TH_ENCODE(2)	    		|	\
-	EBC0_BNAP_SOR_DELAYED	    		|	\
-	EBC0_BNAP_BEM_RW	    		|	\
+	EBC0_BNAP_BME_DISABLED			|	\
+	EBC0_BNAP_TWT_ENCODE(8)			|	\
+	EBC0_BNAP_CSN_ENCODE(0)			|	\
+	EBC0_BNAP_OEN_ENCODE(1)			|	\
+	EBC0_BNAP_WBN_ENCODE(1)			|	\
+	EBC0_BNAP_WBF_ENCODE(1)			|	\
+	EBC0_BNAP_TH_ENCODE(2)			|	\
+	EBC0_BNAP_SOR_DELAYED			|	\
+	EBC0_BNAP_BEM_RW			|	\
 	EBC0_BNAP_PEN_DISABLED
 
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0   		\
-	EBC0_BNCR_BAS_ENCODE(0xFF800000)	| 	\
-	EBC0_BNCR_BS_8MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS0		\
+	EBC0_BNCR_BAS_ENCODE(0xFF800000)	|	\
+	EBC0_BNCR_BS_8MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_16BIT
 
 
-#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4   		\
-	EBC0_BNCR_BAS_ENCODE(0x87800000)	| 	\
-	EBC0_BNCR_BS_8MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+#define EBC0_BNCR_LARGE_FLASH_OR_SRAM_CS4		\
+	EBC0_BNCR_BAS_ENCODE(0x87800000)	|	\
+	EBC0_BNCR_BS_8MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_16BIT
 
 /* NVRAM - FPGA */
 #define EBC0_BNAP_NVRAM_FPGA				\
-	EBC0_BNAP_BME_DISABLED	    		|	\
-	EBC0_BNAP_TWT_ENCODE(9)	    		|	\
-	EBC0_BNAP_CSN_ENCODE(0)	    		|	\
-	EBC0_BNAP_OEN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBN_ENCODE(1)	    		|	\
-	EBC0_BNAP_WBF_ENCODE(0)	    		|	\
-	EBC0_BNAP_TH_ENCODE(2)	    		|	\
-	EBC0_BNAP_RE_ENABLED	    		|	\
-	EBC0_BNAP_SOR_DELAYED	    		|	\
-	EBC0_BNAP_BEM_WRITEONLY	    		|	\
+	EBC0_BNAP_BME_DISABLED			|	\
+	EBC0_BNAP_TWT_ENCODE(9)			|	\
+	EBC0_BNAP_CSN_ENCODE(0)			|	\
+	EBC0_BNAP_OEN_ENCODE(1)			|	\
+	EBC0_BNAP_WBN_ENCODE(1)			|	\
+	EBC0_BNAP_WBF_ENCODE(0)			|	\
+	EBC0_BNAP_TH_ENCODE(2)			|	\
+	EBC0_BNAP_RE_ENABLED			|	\
+	EBC0_BNAP_SOR_DELAYED			|	\
+	EBC0_BNAP_BEM_WRITEONLY			|	\
 	EBC0_BNAP_PEN_DISABLED
 
 #define EBC0_BNCR_NVRAM_FPGA_CS5			\
-	EBC0_BNCR_BAS_ENCODE(0x80000000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x80000000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_8BIT
 
 /* Nand Flash */
 #define EBC0_BNAP_NAND_FLASH				\
-	EBC0_BNAP_BME_DISABLED	    		|	\
-	EBC0_BNAP_TWT_ENCODE(3)	    		|	\
-	EBC0_BNAP_CSN_ENCODE(0)	    		|	\
-	EBC0_BNAP_OEN_ENCODE(0)	    		|	\
-	EBC0_BNAP_WBN_ENCODE(0)	    		|	\
-	EBC0_BNAP_WBF_ENCODE(0)	    		|	\
-	EBC0_BNAP_TH_ENCODE(1)	    		|	\
-	EBC0_BNAP_RE_ENABLED	    		|	\
-	EBC0_BNAP_SOR_NOT_DELAYED   		|	\
-	EBC0_BNAP_BEM_RW	    		|	\
+	EBC0_BNAP_BME_DISABLED			|	\
+	EBC0_BNAP_TWT_ENCODE(3)			|	\
+	EBC0_BNAP_CSN_ENCODE(0)			|	\
+	EBC0_BNAP_OEN_ENCODE(0)			|	\
+	EBC0_BNAP_WBN_ENCODE(0)			|	\
+	EBC0_BNAP_WBF_ENCODE(0)			|	\
+	EBC0_BNAP_TH_ENCODE(1)			|	\
+	EBC0_BNAP_RE_ENABLED			|	\
+	EBC0_BNAP_SOR_NOT_DELAYED		|	\
+	EBC0_BNAP_BEM_RW			|	\
 	EBC0_BNAP_PEN_DISABLED
 
 
@@ -367,22 +367,22 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
 
 /* NAND0 */
 #define EBC0_BNCR_NAND_FLASH_CS1			\
-	EBC0_BNCR_BAS_ENCODE(0x90000000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x90000000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_32BIT
 /* NAND1 - Bank2 */
 #define EBC0_BNCR_NAND_FLASH_CS2			\
-	EBC0_BNCR_BAS_ENCODE(0x94000000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x94000000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_32BIT
 
 /* NAND1 - Bank3 */
 #define EBC0_BNCR_NAND_FLASH_CS3			\
-	EBC0_BNCR_BAS_ENCODE(0x94000000)    	| 	\
-	EBC0_BNCR_BS_1MB		    	|	\
-	EBC0_BNCR_BU_RW			    	|	\
+	EBC0_BNCR_BAS_ENCODE(0x94000000)	|	\
+	EBC0_BNCR_BS_1MB			|	\
+	EBC0_BNCR_BU_RW				|	\
 	EBC0_BNCR_BW_32BIT
 
 int board_early_init_f(void)

board/amcc/bamboo/u-boot-nand.lds

@@ -31,11 +31,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/bamboo/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/bubinga/u-boot.lds

@@ -38,11 +38,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/canyonlands/u-boot-nand.lds

@@ -31,11 +31,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/canyonlands/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/ebony/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/katmai/katmai.c

@@ -441,27 +441,27 @@ void pcie_setup_hoses(int busno)
 		pci_register_hose(hose);
 
 		if (is_end_point(i)) {
-		    	ppc4xx_setup_pcie_endpoint(hose, i);
+			ppc4xx_setup_pcie_endpoint(hose, i);
 			/*
 			 * Reson for no scanning is endpoint can not generate
 			 * upstream configuration accesses.
-		    	 */
+			 */
 		} else {
-		    	ppc4xx_setup_pcie_rootpoint(hose, i);
+			ppc4xx_setup_pcie_rootpoint(hose, i);
 			env = getenv ("pciscandelay");
-		    	if (env != NULL) {
-			    	delay = simple_strtoul(env, NULL, 10);
+			if (env != NULL) {
+				delay = simple_strtoul(env, NULL, 10);
 				if (delay > 5)
-				    	printf("Warning, expect noticable delay before "
+					printf("Warning, expect noticable delay before "
 					       "PCIe scan due to 'pciscandelay' value!\n");
 				mdelay(delay * 1000);
 			}
 
-		    	/*
-		     	 * Config access can only go down stream
-		     	 */
-		    	hose->last_busno = pci_hose_scan(hose);
-		    	bus = hose->last_busno + 1;
+			/*
+			 * Config access can only go down stream
+			 */
+			hose->last_busno = pci_hose_scan(hose);
+			bus = hose->last_busno + 1;
 		}
 	}
 }

board/amcc/kilauea/Makefile

@@ -28,7 +28,7 @@ LIB	= $(obj)lib$(BOARD).a
 COBJS	= $(BOARD).o cmd_pll.o memory.o
 SOBJS	= init.o
 
-SRCS 	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 
 $(LIB):	$(obj).depend $(OBJS)

board/amcc/kilauea/init.S

@@ -29,10 +29,10 @@
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
 
-#define mtsdram_as(reg, value)	 	\
-	addi    r4,0,reg	;     	\
+#define mtsdram_as(reg, value)		\
+	addi    r4,0,reg	;	\
 	mtdcr   memcfga,r4	;	\
-	addis   r4,0,value@h 	;	\
+	addis   r4,0,value@h	;	\
 	ori     r4,r4,value@l	;	\
 	mtdcr   memcfgd,r4	;
 

board/amcc/kilauea/kilauea.c

@@ -338,27 +338,27 @@ void pcie_setup_hoses(int busno)
 		pci_register_hose(hose);
 
 		if (is_end_point(i)) {
-		    	ppc4xx_setup_pcie_endpoint(hose, i);
+			ppc4xx_setup_pcie_endpoint(hose, i);
 			/*
 			 * Reson for no scanning is endpoint can not generate
 			 * upstream configuration accesses.
-		    	 */
+			 */
 		} else {
-		    	ppc4xx_setup_pcie_rootpoint(hose, i);
+			ppc4xx_setup_pcie_rootpoint(hose, i);
 			env = getenv ("pciscandelay");
-		    	if (env != NULL) {
-			    	delay = simple_strtoul(env, NULL, 10);
+			if (env != NULL) {
+				delay = simple_strtoul(env, NULL, 10);
 				if (delay > 5)
-				    	printf("Warning, expect noticable delay before "
+					printf("Warning, expect noticable delay before "
 					       "PCIe scan due to 'pciscandelay' value!\n");
 				mdelay(delay * 1000);
 			}
 
-		    	/*
-		     	 * Config access can only go down stream
-		     	 */
-		    	hose->last_busno = pci_hose_scan(hose);
-		    	bus = hose->last_busno + 1;
+			/*
+			 * Config access can only go down stream
+			 */
+			hose->last_busno = pci_hose_scan(hose);
+			bus = hose->last_busno + 1;
 		}
 	}
 }

board/amcc/kilauea/u-boot-nand.lds

@@ -31,11 +31,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/kilauea/u-boot.lds

@@ -42,11 +42,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/luan/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/makalu/Makefile

@@ -28,7 +28,7 @@ LIB	= $(obj)lib$(BOARD).a
 COBJS	= $(BOARD).o cmd_pll.o memory.o
 SOBJS	= init.o
 
-SRCS 	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 
 $(LIB):	$(obj).depend $(OBJS)

board/amcc/makalu/init.S

@@ -29,10 +29,10 @@
 #include <ppc_asm.tmpl>
 #include <ppc_defs.h>
 
-#define mtsdram_as(reg, value)	 	\
-	addi    r4,0,reg	;     	\
+#define mtsdram_as(reg, value)		\
+	addi    r4,0,reg	;	\
 	mtdcr   memcfga,r4	;	\
-	addis   r4,0,value@h 	;	\
+	addis   r4,0,value@h	;	\
 	ori     r4,r4,value@l	;	\
 	mtdcr   memcfgd,r4	;
 

board/amcc/makalu/makalu.c

@@ -294,27 +294,27 @@ void pcie_setup_hoses(int busno)
 		pci_register_hose(hose);
 
 		if (is_end_point(i)) {
-		    	ppc4xx_setup_pcie_endpoint(hose, i);
+			ppc4xx_setup_pcie_endpoint(hose, i);
 			/*
 			 * Reson for no scanning is endpoint can not generate
 			 * upstream configuration accesses.
-		    	 */
+			 */
 		} else {
-		    	ppc4xx_setup_pcie_rootpoint(hose, i);
+			ppc4xx_setup_pcie_rootpoint(hose, i);
 			env = getenv ("pciscandelay");
-		    	if (env != NULL) {
-			    	delay = simple_strtoul(env, NULL, 10);
+			if (env != NULL) {
+				delay = simple_strtoul(env, NULL, 10);
 				if (delay > 5)
-				    	printf("Warning, expect noticable delay before "
+					printf("Warning, expect noticable delay before "
 					       "PCIe scan due to 'pciscandelay' value!\n");
 				mdelay(delay * 1000);
 			}
 
-		    	/*
-		     	 * Config access can only go down stream
-		     	 */
-		    	hose->last_busno = pci_hose_scan(hose);
-		    	bus = hose->last_busno + 1;
+			/*
+			 * Config access can only go down stream
+			 */
+			hose->last_busno = pci_hose_scan(hose);
+			bus = hose->last_busno + 1;
 		}
 	}
 }

board/amcc/makalu/u-boot.lds

@@ -42,11 +42,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/ocotea/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/sequoia/u-boot-nand.lds

@@ -31,11 +31,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/sequoia/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/taihu/taihu.c

@@ -165,16 +165,20 @@ unsigned char spi_read(void)
 	return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
 }
 
-void taihu_spi_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	gpio_write_bit(SPI_CS_GPIO0, cs);
+	return bus == 0 && cs == 0;
 }
 
-spi_chipsel_type spi_chipsel[]= {
-	taihu_spi_chipsel
-};
+void spi_cs_activate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 1);
+}
 
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 0);
+}
 
 #ifdef CONFIG_PCI
 static unsigned char int_lines[32] = {

board/amcc/taihu/u-boot.lds

@@ -38,11 +38,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/taishan/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/walnut/u-boot.lds

@@ -38,11 +38,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/yosemite/u-boot.lds

@@ -43,11 +43,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/amcc/yucca/yucca.c

@@ -737,27 +737,27 @@ void yucca_setup_pcie_fpga_rootpoint(int port)
 	case 0:
 		rootpoint   = FPGA_REG1C_PE0_ROOTPOINT;
 		endpoint    = 0;
-		power 	    = FPGA_REG1A_PE0_PWRON;
+		power	    = FPGA_REG1A_PE0_PWRON;
 		green_led   = FPGA_REG1A_PE0_GLED;
-		clock 	    = FPGA_REG1A_PE0_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE0_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE0_YLED;
 		reset_off   = FPGA_REG1C_PE0_PERST;
 		break;
 	case 1:
 		rootpoint   = 0;
 		endpoint    = FPGA_REG1C_PE1_ENDPOINT;
-		power 	    = FPGA_REG1A_PE1_PWRON;
+		power	    = FPGA_REG1A_PE1_PWRON;
 		green_led   = FPGA_REG1A_PE1_GLED;
-		clock 	    = FPGA_REG1A_PE1_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE1_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE1_YLED;
 		reset_off   = FPGA_REG1C_PE1_PERST;
 		break;
 	case 2:
 		rootpoint   = 0;
 		endpoint    = FPGA_REG1C_PE2_ENDPOINT;
-		power 	    = FPGA_REG1A_PE2_PWRON;
+		power	    = FPGA_REG1A_PE2_PWRON;
 		green_led   = FPGA_REG1A_PE2_GLED;
-		clock 	    = FPGA_REG1A_PE2_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE2_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE2_YLED;
 		reset_off   = FPGA_REG1C_PE2_PERST;
 		break;
@@ -794,27 +794,27 @@ void yucca_setup_pcie_fpga_endpoint(int port)
 	case 0:
 		rootpoint   = FPGA_REG1C_PE0_ROOTPOINT;
 		endpoint    = 0;
-		power 	    = FPGA_REG1A_PE0_PWRON;
+		power	    = FPGA_REG1A_PE0_PWRON;
 		green_led   = FPGA_REG1A_PE0_GLED;
-		clock 	    = FPGA_REG1A_PE0_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE0_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE0_YLED;
 		reset_off   = FPGA_REG1C_PE0_PERST;
 		break;
 	case 1:
 		rootpoint   = 0;
 		endpoint    = FPGA_REG1C_PE1_ENDPOINT;
-		power 	    = FPGA_REG1A_PE1_PWRON;
+		power	    = FPGA_REG1A_PE1_PWRON;
 		green_led   = FPGA_REG1A_PE1_GLED;
-		clock 	    = FPGA_REG1A_PE1_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE1_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE1_YLED;
 		reset_off   = FPGA_REG1C_PE1_PERST;
 		break;
 	case 2:
 		rootpoint   = 0;
 		endpoint    = FPGA_REG1C_PE2_ENDPOINT;
-		power 	    = FPGA_REG1A_PE2_PWRON;
+		power	    = FPGA_REG1A_PE2_PWRON;
 		green_led   = FPGA_REG1A_PE2_GLED;
-		clock 	    = FPGA_REG1A_PE2_REFCLK_ENABLE;
+		clock	    = FPGA_REG1A_PE2_REFCLK_ENABLE;
 		yellow_led  = FPGA_REG1A_PE2_YLED;
 		reset_off   = FPGA_REG1C_PE2_PERST;
 		break;
@@ -884,21 +884,21 @@ void pcie_setup_hoses(int busno)
 			/*
 			 * Reson for no scanning is endpoint can not generate
 			 * upstream configuration accesses.
-		 	 */
+			 */
 		} else {
 			ppc4xx_setup_pcie_rootpoint(hose, i);
 			env = getenv("pciscandelay");
 			if (env != NULL) {
 				delay = simple_strtoul(env, NULL, 10);
 				if (delay > 5)
-				    	printf("Warning, expect noticable delay before "
+					printf("Warning, expect noticable delay before "
 					       "PCIe scan due to 'pciscandelay' value!\n");
 				mdelay(delay * 1000);
 			}
 
 			/*
 			 * Config access can only go down stream
-		 	 */
+			 */
 			hose->last_busno = pci_hose_scan(hose);
 			bus = hose->last_busno + 1;
 		}

board/amirix/ap1000/u-boot.lds

@@ -33,11 +33,11 @@ SECTIONS
   .dynsym        : { *(.dynsym)		}
   .dynstr        : { *(.dynstr)		}
   .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
+  .rela.text     : { *(.rela.text)	}
   .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
   .rel.got       : { *(.rel.got)		}
   .rela.got      : { *(.rela.got)		}
   .rel.ctors     : { *(.rel.ctors)	}

board/apollon/apollon.c

@@ -140,7 +140,7 @@ void wait_for_command_complete(unsigned int wd_base)
 /*******************************************************************
  * Routine:ether_init
  * Description: take the Ethernet controller out of reset and wait
- *  		   for the EEPROM load to complete.
+ *		   for the EEPROM load to complete.
  ******************************************************************/
 void ether_init(void)
 {

board/armadillo/lowlevel_init.S

@@ -29,8 +29,8 @@
 
 /* some parameters for the board */
 /* setting up the memory */
-#define 	SRAM_START 	0x60000000
-#define 	SRAM_SIZE	0x0000c000
+#define	SRAM_START	0x60000000
+#define	SRAM_SIZE	0x0000c000
 
 .globl lowlevel_init
 lowlevel_init:

board/assabet/assabet.c

@@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ECSR_PWRDWN		0x04
 #define ECSR_INT		0x02
 #define SMC_IO_SHIFT		2
-#define NCR_0           	(*((volatile u_char *)(0x100000a0)))
+#define NCR_0			(*((volatile u_char *)(0x100000a0)))
 #define NCR_ENET_OSC_EN		(1<<3)
 
 static inline u8

board/atmel/at91cap9adk/Makefile

@@ -2,6 +2,10 @@
 # (C) Copyright 2003-2008
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #

board/atmel/at91cap9adk/at91cap9adk.c

@@ -30,6 +30,8 @@
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
 #include <net.h>
 #endif
@@ -70,6 +72,33 @@ static void at91cap9_serial_hw_init(void)
 #endif
 }
 
+static void at91cap9_slowclock_hw_init(void)
+{
+	/*
+	 * On AT91CAP9 revC CPUs, the slow clock can be based on an
+	 * internal impreciseRC oscillator or an external 32kHz oscillator.
+	 * Switch to the latter.
+	 */
+#define ARCH_ID_AT91CAP9_REVB	0x399
+#define ARCH_ID_AT91CAP9_REVC	0x601
+	if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) {
+		unsigned i, tmp = at91_sys_read(AT91_SCKCR);
+		if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) {
+			extern void timer_init(void);
+			timer_init();
+			tmp |= AT91CAP9_SCKCR_OSC32EN;
+			at91_sys_write(AT91_SCKCR, tmp);
+			for (i = 0; i < 1200; i++)
+				udelay(1000);
+			tmp |= AT91CAP9_SCKCR_OSCSEL_32;
+			at91_sys_write(AT91_SCKCR, tmp);
+			udelay(200);
+			tmp &= ~AT91CAP9_SCKCR_RCEN;
+			at91_sys_write(AT91_SCKCR, tmp);
+		}
+	}
+}
+
 static void at91cap9_nor_hw_init(void)
 {
 	unsigned long csa;
@@ -116,7 +145,12 @@ static void at91cap9_nand_hw_init(void)
 	at91_sys_write(AT91_SMC_MODE(3),
 		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
 		       AT91_SMC_EXNWMODE_DISABLE |
-		       AT91_SMC_DBW_8 | AT91_SMC_TDF_(1));
+#ifdef CFG_NAND_DBW_16
+		       AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+		       AT91_SMC_DBW_8 |
+#endif
+		       AT91_SMC_TDF_(1));
 
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
 
@@ -228,6 +262,65 @@ static void at91cap9_uhp_hw_init(void)
 }
 #endif
 
+#ifdef CONFIG_LCD
+vidinfo_t panel_info = {
+	vl_col:		240,
+	vl_row:		320,
+	vl_clk:		4965000,
+	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
+			ATMEL_LCDC_INVFRAME_INVERTED,
+	vl_bpix:	3,
+	vl_tft:		1,
+	vl_hsync_len:	5,
+	vl_left_margin:	1,
+	vl_right_margin:33,
+	vl_vsync_len:	1,
+	vl_upper_margin:1,
+	vl_lower_margin:0,
+	mmio:		AT91CAP9_LCDC_BASE,
+};
+
+void lcd_enable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PC0, 0);  /* power up */
+}
+
+void lcd_disable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PC0, 1);  /* power down */
+}
+
+static void at91cap9_lcd_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC1, 0);	/* LCDHSYNC */
+	at91_set_A_periph(AT91_PIN_PC2, 0);	/* LCDDOTCK */
+	at91_set_A_periph(AT91_PIN_PC3, 0);	/* LCDDEN */
+	at91_set_B_periph(AT91_PIN_PB9, 0);	/* LCDCC */
+	at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDD2 */
+	at91_set_A_periph(AT91_PIN_PC7, 0);	/* LCDD3 */
+	at91_set_A_periph(AT91_PIN_PC8, 0);	/* LCDD4 */
+	at91_set_A_periph(AT91_PIN_PC9, 0);	/* LCDD5 */
+	at91_set_A_periph(AT91_PIN_PC10, 0);	/* LCDD6 */
+	at91_set_A_periph(AT91_PIN_PC11, 0);	/* LCDD7 */
+	at91_set_A_periph(AT91_PIN_PC14, 0);	/* LCDD10 */
+	at91_set_A_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
+	at91_set_A_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
+	at91_set_A_periph(AT91_PIN_PC17, 0);	/* LCDD13 */
+	at91_set_A_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
+	at91_set_A_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
+	at91_set_A_periph(AT91_PIN_PC22, 0);	/* LCDD18 */
+	at91_set_A_periph(AT91_PIN_PC23, 0);	/* LCDD19 */
+	at91_set_A_periph(AT91_PIN_PC24, 0);	/* LCDD20 */
+	at91_set_A_periph(AT91_PIN_PC25, 0);	/* LCDD21 */
+	at91_set_A_periph(AT91_PIN_PC26, 0);	/* LCDD22 */
+	at91_set_A_periph(AT91_PIN_PC27, 0);	/* LCDD23 */
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_LCDC);
+
+	gd->fb_base = 0;
+}
+#endif
+
 int board_init(void)
 {
 	/* Enable Ctrlc */
@@ -239,6 +332,7 @@ int board_init(void)
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
 	at91cap9_serial_hw_init();
+	at91cap9_slowclock_hw_init();
 	at91cap9_nor_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91cap9_nand_hw_init();
@@ -252,7 +346,9 @@ int board_init(void)
 #ifdef CONFIG_USB_OHCI_NEW
 	at91cap9_uhp_hw_init();
 #endif
-
+#ifdef CONFIG_LCD
+	at91cap9_lcd_hw_init();
+#endif
 	return 0;
 }
 

board/atmel/at91cap9adk/nand.c

@@ -63,6 +63,9 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
 int board_nand_init(struct nand_chip *nand)
 {
 	nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+	nand->options = NAND_BUSWIDTH_16;
+#endif
 	nand->hwcontrol = at91cap9adk_nand_hwcontrol;
 	nand->chip_delay = 20;
 

board/atmel/at91sam9260ek/Makefile

@@ -2,6 +2,10 @@
 # (C) Copyright 2003-2008
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
 # See file CREDITS for list of people who contributed to this
 # project.
 #

board/atmel/at91sam9260ek/at91sam9260ek.c

@@ -90,7 +90,12 @@ static void at91sam9260ek_nand_hw_init(void)
 	at91_sys_write(AT91_SMC_MODE(3),
 		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
 		       AT91_SMC_EXNWMODE_DISABLE |
-		       AT91_SMC_DBW_8 | AT91_SMC_TDF_(2));
+#ifdef CFG_NAND_DBW_16
+		       AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+		       AT91_SMC_DBW_8 |
+#endif
+		       AT91_SMC_TDF_(2));
 
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
 
@@ -126,7 +131,7 @@ static void at91sam9260ek_macb_hw_init(void)
 	/*
 	 * Disable pull-up on:
 	 *	RXDV (PA17) => PHY normal mode (not Test mode)
-	 * 	ERX0 (PA14) => PHY ADDR0
+	 *	ERX0 (PA14) => PHY ADDR0
 	 *	ERX1 (PA15) => PHY ADDR1
 	 *	ERX2 (PA25) => PHY ADDR2
 	 *	ERX3 (PA26) => PHY ADDR3

board/atmel/at91sam9260ek/nand.c

@@ -68,6 +68,9 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
 int board_nand_init(struct nand_chip *nand)
 {
 	nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+	nand->options = NAND_BUSWIDTH_16;
+#endif
 	nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
 	nand->dev_ready = at91sam9260ek_nand_ready;
 	nand->chip_delay = 20;

board/atmel/at91sam9260ek/u-boot.lds

@@ -1,57 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text :
-	{
-	  cpu/arm926ejs/start.o	(.text)
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(.rodata) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.bss : { *(.bss) }
-	_end = .;
-}

board/atmel/at91sam9261ek/Makefile

@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y += at91sam9261ek.o
+COBJS-y += led.o
+COBJS-y	+= partition.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/atmel/at91sam9261ek/at91sam9261ek.c

@@ -0,0 +1,258 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91sam9261_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
+#include <net.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void at91sam9261ek_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_set_A_periph(AT91_PIN_PC8, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PC9, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+#endif
+
+#ifdef CONFIG_USART1
+	at91_set_A_periph(AT91_PIN_PC12, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PC13, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+#endif
+
+#ifdef CONFIG_USART2
+	at91_set_A_periph(AT91_PIN_PC14, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PC15, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_set_A_periph(AT91_PIN_PA9, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PA10, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+#endif
+}
+
+#ifdef CONFIG_CMD_NAND
+static void at91sam9261ek_nand_hw_init(void)
+{
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA,
+		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	at91_sys_write(AT91_SMC_SETUP(3),
+		       AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
+		       AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(3),
+		       AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) |
+		       AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+	at91_sys_write(AT91_SMC_CYCLE(3),
+		       AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+	at91_sys_write(AT91_SMC_MODE(3),
+		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		       AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CFG_NAND_DBW_16
+		       AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+		       AT91_SMC_DBW_8 |
+#endif
+		       AT91_SMC_TDF_(1));
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(AT91_PIN_PC15, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(AT91_PIN_PC14, 1);
+
+	at91_set_A_periph(AT91_PIN_PC0, 0);	/* NANDOE */
+	at91_set_A_periph(AT91_PIN_PC1, 0);	/* NANDWE */
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void at91sam9261ek_spi_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA3, 0);	/* SPI0_NPCS0 */
+
+	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
+}
+#endif
+
+#ifdef CONFIG_DRIVER_DM9000
+static void at91sam9261ek_dm9000_hw_init(void)
+{
+	/* Configure SMC CS2 for DM9000 */
+	at91_sys_write(AT91_SMC_SETUP(2),
+		       AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
+		       AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(2),
+		       AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) |
+		       AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8));
+	at91_sys_write(AT91_SMC_CYCLE(2),
+		       AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
+	at91_sys_write(AT91_SMC_MODE(2),
+		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		       AT91_SMC_EXNWMODE_DISABLE |
+		       AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
+		       AT91_SMC_TDF_(1));
+
+	/* Configure Reset signal as output */
+	at91_set_gpio_output(AT91_PIN_PC10, 0);
+
+	/* Configure Interrupt pin as input, no pull-up */
+	at91_set_gpio_input(AT91_PIN_PC11, 0);
+}
+#endif
+
+#ifdef CONFIG_LCD
+vidinfo_t panel_info = {
+	vl_col:		240,
+	vl_row:		320,
+	vl_clk:		4965000,
+	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
+			ATMEL_LCDC_INVFRAME_INVERTED,
+	vl_bpix:	3,
+	vl_tft:		1,
+	vl_hsync_len:	5,
+	vl_left_margin:	1,
+	vl_right_margin:33,
+	vl_vsync_len:	1,
+	vl_upper_margin:1,
+	vl_lower_margin:0,
+	mmio:		AT91SAM9261_LCDC_BASE,
+};
+
+void lcd_enable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA12, 0);  /* power up */
+}
+
+void lcd_disable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA12, 1);  /* power down */
+}
+
+static void at91sam9261ek_lcd_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB1, 0);	/* LCDHSYNC */
+	at91_set_A_periph(AT91_PIN_PB2, 0);	/* LCDDOTCK */
+	at91_set_A_periph(AT91_PIN_PB3, 0);	/* LCDDEN */
+	at91_set_A_periph(AT91_PIN_PB4, 0);	/* LCDCC */
+	at91_set_A_periph(AT91_PIN_PB7, 0);	/* LCDD2 */
+	at91_set_A_periph(AT91_PIN_PB8, 0);	/* LCDD3 */
+	at91_set_A_periph(AT91_PIN_PB9, 0);	/* LCDD4 */
+	at91_set_A_periph(AT91_PIN_PB10, 0);	/* LCDD5 */
+	at91_set_A_periph(AT91_PIN_PB11, 0);	/* LCDD6 */
+	at91_set_A_periph(AT91_PIN_PB12, 0);	/* LCDD7 */
+	at91_set_A_periph(AT91_PIN_PB15, 0);	/* LCDD10 */
+	at91_set_A_periph(AT91_PIN_PB16, 0);	/* LCDD11 */
+	at91_set_A_periph(AT91_PIN_PB17, 0);	/* LCDD12 */
+	at91_set_A_periph(AT91_PIN_PB18, 0);	/* LCDD13 */
+	at91_set_A_periph(AT91_PIN_PB19, 0);	/* LCDD14 */
+	at91_set_A_periph(AT91_PIN_PB20, 0);	/* LCDD15 */
+	at91_set_B_periph(AT91_PIN_PB23, 0);	/* LCDD18 */
+	at91_set_B_periph(AT91_PIN_PB24, 0);	/* LCDD19 */
+	at91_set_B_periph(AT91_PIN_PB25, 0);	/* LCDD20 */
+	at91_set_B_periph(AT91_PIN_PB26, 0);	/* LCDD21 */
+	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
+	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
+
+	at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
+
+	gd->fb_base = AT91SAM9261_SRAM_BASE;
+}
+#endif
+
+int board_init(void)
+{
+	/* Enable Ctrlc */
+	console_init_f();
+
+	/* arch number of AT91SAM9261EK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	at91sam9261ek_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+	at91sam9261ek_nand_hw_init();
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+	at91sam9261ek_spi_hw_init();
+#endif
+#ifdef CONFIG_DRIVER_DM9000
+	at91sam9261ek_dm9000_hw_init();
+#endif
+#ifdef CONFIG_LCD
+	at91sam9261ek_lcd_hw_init();
+#endif
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	/*
+	 * Initialize ethernet HW addr prior to starting Linux,
+	 * needed for nfsroot
+	 */
+	eth_init(gd->bd);
+#endif
+}
+#endif

board/atmel/at91sam9261ek/config.mk

@@ -0,0 +1 @@
+TEXT_BASE = 0x23f00000

board/atmel/at91sam9261ek/led.c

@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+#define	RED_LED		AT91_PIN_PA23	/* this is the power led */
+#define	GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
+#define	YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
+
+void red_LED_on(void)
+{
+	at91_set_gpio_value(RED_LED, 1);
+}
+
+void red_LED_off(void)
+{
+	at91_set_gpio_value(RED_LED, 0);
+}
+
+void green_LED_on(void)
+{
+	at91_set_gpio_value(GREEN_LED, 0);
+}
+
+void green_LED_off(void)
+{
+	at91_set_gpio_value(GREEN_LED, 1);
+}
+
+void yellow_LED_on(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 0);
+}
+
+void yellow_LED_off(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 1);
+}
+
+
+void coloured_LED_init(void)
+{
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
+
+	at91_set_gpio_output(RED_LED, 1);
+	at91_set_gpio_output(GREEN_LED, 1);
+	at91_set_gpio_output(YELLOW_LED, 1);
+
+	at91_set_gpio_value(RED_LED, 0);
+	at91_set_gpio_value(GREEN_LED, 1);
+	at91_set_gpio_value(YELLOW_LED, 1);
+}

board/atmel/at91sam9261ek/nand.c

@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
+
+#include <nand.h>
+
+/*
+ *	hardware specific access to control-lines
+ */
+#define	MASK_ALE	(1 << 22)	/* our ALE is AD22 */
+#define	MASK_CLE	(1 << 21)	/* our CLE is AD21 */
+
+static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+	ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+	switch (cmd) {
+	case NAND_CTL_SETCLE:
+		IO_ADDR_W |= MASK_CLE;
+		break;
+	case NAND_CTL_SETALE:
+		IO_ADDR_W |= MASK_ALE;
+		break;
+	case NAND_CTL_CLRNCE:
+		at91_set_gpio_value(AT91_PIN_PC14, 1);
+		break;
+	case NAND_CTL_SETNCE:
+		at91_set_gpio_value(AT91_PIN_PC14, 0);
+		break;
+	}
+	this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+static int at91sam9261ek_nand_ready(struct mtd_info *mtd)
+{
+	return at91_get_gpio_value(AT91_PIN_PC15);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+	nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+	nand->options = NAND_BUSWIDTH_16;
+#endif
+	nand->hwcontrol = at91sam9261ek_nand_hwcontrol;
+	nand->dev_ready = at91sam9261ek_nand_ready;
+	nand->chip_delay = 20;
+
+	return 0;
+}

board/atmel/at91sam9261ek/partition.c

@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+	{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
+	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
+	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
+	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
+	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
+};

board/atmel/at91sam9263ek/Makefile

@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y += at91sam9263ek.o
+COBJS-y += led.o
+COBJS-y	+= partition.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/atmel/at91sam9263ek/at91sam9263ek.c

@@ -0,0 +1,305 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/sizes.h>
+#include <asm/arch/at91sam9263.h>
+#include <asm/arch/at91sam9263_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void at91sam9263ek_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_set_A_periph(AT91_PIN_PA26, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA27, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+#endif
+
+#ifdef CONFIG_USART1
+	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+#endif
+
+#ifdef CONFIG_USART2
+	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+#endif
+}
+
+#ifdef CONFIG_CMD_NAND
+static void at91sam9263ek_nand_hw_init(void)
+{
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
+	at91_sys_write(AT91_MATRIX_EBI0CSA,
+		       csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	at91_sys_write(AT91_SMC_SETUP(3),
+		       AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
+		       AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(3),
+		       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+		       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
+	at91_sys_write(AT91_SMC_CYCLE(3),
+		       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
+	at91_sys_write(AT91_SMC_MODE(3),
+		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		       AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CFG_NAND_DBW_16
+		       AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+		       AT91_SMC_DBW_8 |
+#endif
+		       AT91_SMC_TDF_(2));
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
+				      1 << AT91SAM9263_ID_PIOCDE);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(AT91_PIN_PA22, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(AT91_PIN_PD15, 1);
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void at91sam9263ek_spi_hw_init(void)
+{
+	at91_set_B_periph(AT91_PIN_PA5, 0);	/* SPI0_NPCS0 */
+
+	at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void at91sam9263ek_macb_hw_init(void)
+{
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
+
+	/*
+	 * Disable pull-up on:
+	 *	RXDV (PC25) => PHY normal mode (not Test mode)
+	 * 	ERX0 (PE25) => PHY ADDR0
+	 *	ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
+	 *
+	 * PHY has internal pull-down
+	 */
+	writel(pin_to_mask(AT91_PIN_PC25),
+	       pin_to_controller(AT91_PIN_PC0) + PIO_PUDR);
+	writel(pin_to_mask(AT91_PIN_PE25) |
+	       pin_to_mask(AT91_PIN_PE26),
+	       pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
+
+	/* Need to reset PHY -> 500ms reset */
+	at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
+				     AT91_RSTC_ERSTL | (0x0D << 8) |
+				     AT91_RSTC_URSTEN);
+
+	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
+
+	/* Wait for end hardware reset */
+	while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
+
+	/* Re-enable pull-up */
+	writel(pin_to_mask(AT91_PIN_PC25),
+	       pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
+	writel(pin_to_mask(AT91_PIN_PE25) |
+	       pin_to_mask(AT91_PIN_PE26),
+	       pin_to_controller(AT91_PIN_PE0) + PIO_PUER);
+
+	at91_set_A_periph(AT91_PIN_PE21, 0);	/* ETXCK_EREFCK */
+	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ERXDV */
+	at91_set_A_periph(AT91_PIN_PE25, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PE26, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PE27, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PE28, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PE23, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PE24, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PE30, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PE29, 0);	/* EMDC */
+
+#ifndef CONFIG_RMII
+	at91_set_A_periph(AT91_PIN_PE22, 0);	/* ECRS */
+	at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
+	at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
+	at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
+	at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
+	at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
+	at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
+#endif
+
+}
+#endif
+
+#ifdef CONFIG_USB_OHCI_NEW
+static void at91sam9263ek_uhp_hw_init(void)
+{
+	/* Enable VBus on UHP ports */
+	at91_set_gpio_output(AT91_PIN_PA21, 0);
+	at91_set_gpio_output(AT91_PIN_PA24, 0);
+}
+#endif
+
+#ifdef CONFIG_LCD
+vidinfo_t panel_info = {
+	vl_col:		240,
+	vl_row:		320,
+	vl_clk:		4965000,
+	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
+			ATMEL_LCDC_INVFRAME_INVERTED,
+	vl_bpix:	3,
+	vl_tft:		1,
+	vl_hsync_len:	5,
+	vl_left_margin:	1,
+	vl_right_margin:33,
+	vl_vsync_len:	1,
+	vl_upper_margin:1,
+	vl_lower_margin:0,
+	mmio:		AT91SAM9263_LCDC_BASE,
+};
+
+void lcd_enable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA30, 1);  /* power up */
+}
+
+void lcd_disable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA30, 0);  /* power down */
+}
+
+static void at91sam9263ek_lcd_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC1, 0);	/* LCDHSYNC */
+	at91_set_A_periph(AT91_PIN_PC2, 0);	/* LCDDOTCK */
+	at91_set_A_periph(AT91_PIN_PC3, 0);	/* LCDDEN */
+	at91_set_B_periph(AT91_PIN_PB9, 0);	/* LCDCC */
+	at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDD2 */
+	at91_set_A_periph(AT91_PIN_PC7, 0);	/* LCDD3 */
+	at91_set_A_periph(AT91_PIN_PC8, 0);	/* LCDD4 */
+	at91_set_A_periph(AT91_PIN_PC9, 0);	/* LCDD5 */
+	at91_set_A_periph(AT91_PIN_PC10, 0);	/* LCDD6 */
+	at91_set_A_periph(AT91_PIN_PC11, 0);	/* LCDD7 */
+	at91_set_A_periph(AT91_PIN_PC14, 0);	/* LCDD10 */
+	at91_set_A_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
+	at91_set_A_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
+	at91_set_B_periph(AT91_PIN_PC12, 0);	/* LCDD13 */
+	at91_set_A_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
+	at91_set_A_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
+	at91_set_A_periph(AT91_PIN_PC22, 0);	/* LCDD18 */
+	at91_set_A_periph(AT91_PIN_PC23, 0);	/* LCDD19 */
+	at91_set_A_periph(AT91_PIN_PC24, 0);	/* LCDD20 */
+	at91_set_B_periph(AT91_PIN_PC17, 0);	/* LCDD21 */
+	at91_set_A_periph(AT91_PIN_PC26, 0);	/* LCDD22 */
+	at91_set_A_periph(AT91_PIN_PC27, 0);	/* LCDD23 */
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
+
+	gd->fb_base = AT91SAM9263_SRAM0_BASE;
+}
+#endif
+
+int board_init(void)
+{
+	/* Enable Ctrlc */
+	console_init_f();
+
+	/* arch number of AT91SAM9263EK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	at91sam9263ek_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+	at91sam9263ek_nand_hw_init();
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+	at91sam9263ek_spi_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	at91sam9263ek_macb_hw_init();
+#endif
+#ifdef CONFIG_USB_OHCI_NEW
+	at91sam9263ek_uhp_hw_init();
+#endif
+#ifdef CONFIG_LCD
+	at91sam9263ek_lcd_hw_init();
+#endif
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+#ifdef CONFIG_MACB
+	/*
+	 * Initialize ethernet HW addr prior to starting Linux,
+	 * needed for nfsroot
+	 */
+	eth_init(gd->bd);
+#endif
+}
+#endif

board/atmel/at91sam9263ek/config.mk

@@ -0,0 +1 @@
+TEXT_BASE = 0x23f00000

board/atmel/at91sam9263ek/led.c

@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9263.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+#define	RED_LED		AT91_PIN_PB7	/* this is the power led */
+#define	GREEN_LED	AT91_PIN_PB8	/* this is the user1 led */
+#define	YELLOW_LED	AT91_PIN_PC29	/* this is the user2 led */
+
+void red_LED_on(void)
+{
+	at91_set_gpio_value(RED_LED, 1);
+}
+
+void red_LED_off(void)
+{
+	at91_set_gpio_value(RED_LED, 0);
+}
+
+void green_LED_on(void)
+{
+	at91_set_gpio_value(GREEN_LED, 0);
+}
+
+void green_LED_off(void)
+{
+	at91_set_gpio_value(GREEN_LED, 1);
+}
+
+void yellow_LED_on(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 0);
+}
+
+void yellow_LED_off(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 1);
+}
+
+void coloured_LED_init(void)
+{
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB |
+				      1 << AT91SAM9263_ID_PIOCDE);
+
+	at91_set_gpio_output(RED_LED, 1);
+	at91_set_gpio_output(GREEN_LED, 1);
+	at91_set_gpio_output(YELLOW_LED, 1);
+
+	at91_set_gpio_value(RED_LED, 0);
+	at91_set_gpio_value(GREEN_LED, 1);
+	at91_set_gpio_value(YELLOW_LED, 1);
+}

board/atmel/at91sam9263ek/nand.c

@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9263.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
+
+#include <nand.h>
+
+/*
+ *	hardware specific access to control-lines
+ */
+#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
+#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
+
+static void at91sam9263ek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+	ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+	switch (cmd) {
+	case NAND_CTL_SETCLE:
+		IO_ADDR_W |= MASK_CLE;
+		break;
+	case NAND_CTL_SETALE:
+		IO_ADDR_W |= MASK_ALE;
+		break;
+	case NAND_CTL_CLRNCE:
+		at91_set_gpio_value(AT91_PIN_PD15, 1);
+		break;
+	case NAND_CTL_SETNCE:
+		at91_set_gpio_value(AT91_PIN_PD15, 0);
+		break;
+	}
+	this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+static int at91sam9263ek_nand_ready(struct mtd_info *mtd)
+{
+	return at91_get_gpio_value(AT91_PIN_PA22);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+	nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+	nand->options = NAND_BUSWIDTH_16;
+#endif
+	nand->hwcontrol = at91sam9263ek_nand_hwcontrol;
+	nand->dev_ready = at91sam9263ek_nand_ready;
+	nand->chip_delay = 20;
+
+	return 0;
+}

cpu/at32ap/pm.c → board/atmel/at91sam9263ek/partition.c

@@ -1,8 +1,6 @@
 /*
- * Copyright (C) 2006 Atmel Corporation
- *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -18,25 +16,24 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
+ *
  */
 #include <common.h>
-
-#ifdef CFG_POWER_MANAGER
-#include <asm/errno.h>
-#include <asm/io.h>
-
-#include <asm/arch/memory-map.h>
-
-#include "sm.h"
-
-
-#ifdef CONFIG_PLL
-#define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL)
-#else
-#define MAIN_CLK_RATE (CFG_OSC0_HZ)
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-
-#endif /* CFG_POWER_MANAGER */
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
+	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
+	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
+	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
+	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
+};

board/atmel/at91sam9rlek/Makefile

@@ -0,0 +1,57 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2008
+# Stelian Pop <stelian.pop@leadtechdesign.com>
+# Lead Tech Design <www.leadtechdesign.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y += at91sam9rlek.o
+COBJS-y += led.o
+COBJS-y	+= partition.o
+COBJS-$(CONFIG_CMD_NAND) += nand.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

board/atmel/at91sam9rlek/at91sam9rlek.c

@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9rl.h>
+#include <asm/arch/at91sam9rl_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <lcd.h>
+#include <atmel_lcdc.h>
+#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
+#include <net.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+static void at91sam9rlek_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_set_A_periph(AT91_PIN_PA6, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA7, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);
+#endif
+
+#ifdef CONFIG_USART1
+	at91_set_A_periph(AT91_PIN_PA11, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PA12, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);
+#endif
+
+#ifdef CONFIG_USART2
+	at91_set_A_periph(AT91_PIN_PA13, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PA14, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_set_A_periph(AT91_PIN_PA21, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PA22, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+#endif
+}
+
+#ifdef CONFIG_CMD_NAND
+static void at91sam9rlek_nand_hw_init(void)
+{
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA,
+		       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	at91_sys_write(AT91_SMC_SETUP(3),
+		       AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
+		       AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(3),
+		       AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) |
+		       AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
+	at91_sys_write(AT91_SMC_CYCLE(3),
+		       AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
+	at91_sys_write(AT91_SMC_MODE(3),
+		       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		       AT91_SMC_EXNWMODE_DISABLE |
+#ifdef CFG_NAND_DBW_16
+		       AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+		       AT91_SMC_DBW_8 |
+#endif
+		       AT91_SMC_TDF_(1));
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(AT91_PIN_PD17, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(AT91_PIN_PB6, 1);
+
+	at91_set_A_periph(AT91_PIN_PB4, 0);		/* NANDOE */
+	at91_set_A_periph(AT91_PIN_PB5, 0);		/* NANDWE */
+}
+#endif
+
+#ifdef CONFIG_HAS_DATAFLASH
+static void at91sam9rlek_spi_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA28, 0);	/* SPI0_NPCS0 */
+
+	at91_set_A_periph(AT91_PIN_PA25, 0);	/* SPI0_MISO */
+	at91_set_A_periph(AT91_PIN_PA26, 0);	/* SPI0_MOSI */
+	at91_set_A_periph(AT91_PIN_PA27, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
+}
+#endif
+
+#ifdef CONFIG_LCD
+vidinfo_t panel_info = {
+	vl_col:		240,
+	vl_row:		320,
+	vl_clk:		4965000,
+	vl_sync:	ATMEL_LCDC_INVLINE_INVERTED |
+			ATMEL_LCDC_INVFRAME_INVERTED,
+	vl_bpix:	3,
+	vl_tft:		1,
+	vl_hsync_len:	5,
+	vl_left_margin:	1,
+	vl_right_margin:33,
+	vl_vsync_len:	1,
+	vl_upper_margin:1,
+	vl_lower_margin:0,
+	mmio:		AT91SAM9RL_LCDC_BASE,
+};
+
+void lcd_enable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA30, 0);  /* power up */
+}
+
+void lcd_disable(void)
+{
+	at91_set_gpio_value(AT91_PIN_PA30, 1);  /* power down */
+}
+static void at91sam9rlek_lcd_hw_init(void)
+{
+	at91_set_B_periph(AT91_PIN_PC1, 0);	/* LCDPWR */
+	at91_set_A_periph(AT91_PIN_PC5, 0);	/* LCDHSYNC */
+	at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDDOTCK */
+	at91_set_A_periph(AT91_PIN_PC7, 0);	/* LCDDEN */
+	at91_set_A_periph(AT91_PIN_PC3, 0);	/* LCDCC */
+	at91_set_B_periph(AT91_PIN_PC9, 0);	/* LCDD3 */
+	at91_set_B_periph(AT91_PIN_PC10, 0);	/* LCDD4 */
+	at91_set_B_periph(AT91_PIN_PC11, 0);	/* LCDD5 */
+	at91_set_B_periph(AT91_PIN_PC12, 0);	/* LCDD6 */
+	at91_set_B_periph(AT91_PIN_PC13, 0);	/* LCDD7 */
+	at91_set_B_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
+	at91_set_B_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
+	at91_set_B_periph(AT91_PIN_PC17, 0);	/* LCDD13 */
+	at91_set_B_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
+	at91_set_B_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
+	at91_set_B_periph(AT91_PIN_PC20, 0);	/* LCDD18 */
+	at91_set_B_periph(AT91_PIN_PC21, 0);	/* LCDD19 */
+	at91_set_B_periph(AT91_PIN_PC22, 0);	/* LCDD20 */
+	at91_set_B_periph(AT91_PIN_PC23, 0);	/* LCDD21 */
+	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
+	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
+
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_LCDC);
+
+	gd->fb_base = 0;
+}
+#endif
+
+
+int board_init(void)
+{
+	/* Enable Ctrlc */
+	console_init_f();
+
+	/* arch number of AT91SAM9RLEK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+	at91sam9rlek_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+	at91sam9rlek_nand_hw_init();
+#endif
+#ifdef CONFIG_HAS_DATAFLASH
+	at91sam9rlek_spi_hw_init();
+#endif
+#ifdef CONFIG_LCD
+	at91sam9rlek_lcd_hw_init();
+#endif
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
+}

board/atmel/at91sam9rlek/config.mk

@@ -0,0 +1 @@
+TEXT_BASE = 0x23f00000

board/atmel/at91sam9rlek/led.c

@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9rl.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+#define	RED_LED		AT91_PIN_PD14	/* this is the power led */
+#define	GREEN_LED	AT91_PIN_PD15	/* this is the user1 led */
+#define	YELLOW_LED	AT91_PIN_PD16	/* this is the user2 led */
+
+void red_LED_on(void)
+{
+	at91_set_gpio_value(RED_LED, 1);
+}
+
+void red_LED_off(void)
+{
+	at91_set_gpio_value(RED_LED, 0);
+}
+
+void green_LED_on(void)
+{
+	at91_set_gpio_value(GREEN_LED, 0);
+}
+
+void green_LED_off(void)
+{
+	at91_set_gpio_value(GREEN_LED, 1);
+}
+
+void yellow_LED_on(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 0);
+}
+
+void yellow_LED_off(void)
+{
+	at91_set_gpio_value(YELLOW_LED, 1);
+}
+
+void coloured_LED_init(void)
+{
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
+
+	at91_set_gpio_output(RED_LED, 1);
+	at91_set_gpio_output(GREEN_LED, 1);
+	at91_set_gpio_output(YELLOW_LED, 1);
+
+	at91_set_gpio_value(RED_LED, 0);
+	at91_set_gpio_value(GREEN_LED, 1);
+	at91_set_gpio_value(YELLOW_LED, 1);
+}

board/atmel/at91sam9rlek/nand.c

@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91sam9rl.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91_pio.h>
+
+#include <nand.h>
+
+/*
+ *	hardware specific access to control-lines
+ */
+#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
+#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
+
+static void at91sam9rlek_nand_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+	struct nand_chip *this = mtd->priv;
+	ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+	IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+	switch (cmd) {
+	case NAND_CTL_SETCLE:
+		IO_ADDR_W |= MASK_CLE;
+		break;
+	case NAND_CTL_SETALE:
+		IO_ADDR_W |= MASK_ALE;
+		break;
+	case NAND_CTL_CLRNCE:
+		at91_set_gpio_value(AT91_PIN_PB6, 1);
+		break;
+	case NAND_CTL_SETNCE:
+		at91_set_gpio_value(AT91_PIN_PB6, 0);
+		break;
+	}
+	this->IO_ADDR_W = (void *) IO_ADDR_W;
+}
+
+static int at91sam9rlek_nand_ready(struct mtd_info *mtd)
+{
+	return at91_get_gpio_value(AT91_PIN_PD17);
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+	nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+	nand->options = NAND_BUSWIDTH_16;
+#endif
+	nand->hwcontrol = at91sam9rlek_nand_hwcontrol;
+	nand->dev_ready = at91sam9rlek_nand_ready;
+	nand->chip_delay = 20;
+
+	return 0;
+}

board/atmel/at91sam9rlek/partition.c

@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2008
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <common.h>
+#include <config.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
+
+struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = {
+	{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
+};
+
+/*define the area offsets*/
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+	{0x00000000, 0x000041FF, FLAG_PROTECT_SET,   0, "Bootstrap"},
+	{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
+	{0x00008400, 0x00041FFF, FLAG_PROTECT_SET,   0, "U-Boot"},
+	{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0,	"Kernel"},
+	{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0,	"FS"},
+};