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powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define

This erratum doesn't exist on this processor, and the workaround
spins on a non-existent register, causing boot to hang.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce 14 years ago
parent
68d4230c3c
commit
1930b1037f
1 changed files with 0 additions and 1 deletions
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  1. 0 1
      include/configs/MPC8548CDS.h

+ 0 - 1
include/configs/MPC8548CDS.h
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@@ -91,7 +91,6 @@ extern unsigned long get_clock_freq(void);
 
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 
 #define CONFIG_SPD_EEPROM		/* Use SPD EEPROM for DDR setup*/
 
 #define CONFIG_DDR_SPD
 
 #define CONFIG_DDR_SPD
 
-#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN	/* possible DLL fix needed */
 
 
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER	/* DDR controller or DMA? */
 
 #define CONFIG_MEM_INIT_VALUE	0xDeadBeef
 
 #define CONFIG_MEM_INIT_VALUE	0xDeadBeef