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@@ -44,7 +44,7 @@ extern void denali_core_search_data_eye(void);
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* for the 4k NAND boot image so define bus_frequency to 133MHz here
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* which is save for the refresh counter setup.
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*/
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-#define get_bus_freq(val) 133000000
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+#define get_bus_freq(val) 133333333
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#endif
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/*************************************************************************
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@@ -55,11 +55,7 @@ extern void denali_core_search_data_eye(void);
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phys_size_t initdram (int board_type)
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{
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#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
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-#if !defined(CONFIG_NAND_SPL)
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ulong speed = get_bus_freq(0);
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-#else
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- ulong speed = 133333333; /* 133MHz is on the safe side */
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-#endif
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mtsdram(DDR0_02, 0x00000000);
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