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@@ -71,10 +71,12 @@ typedef volatile unsigned int * dv_reg_p;
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#define DAVINCI_SPI_BASE (0x01c66800)
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#define DAVINCI_SPI_BASE (0x01c66800)
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#define DAVINCI_GPIO_BASE (0x01c67000)
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#define DAVINCI_GPIO_BASE (0x01c67000)
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#define DAVINCI_VPSS_REGS_BASE (0x01c70000)
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#define DAVINCI_VPSS_REGS_BASE (0x01c70000)
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+#if !defined(CONFIG_SOC_DM646X)
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#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
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#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
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+#endif
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#define DAVINCI_DDR_BASE (0x80000000)
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#define DAVINCI_DDR_BASE (0x80000000)
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#ifdef CONFIG_SOC_DM644X
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#ifdef CONFIG_SOC_DM644X
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