ppc4xx: Add some NAND-booting bootstrap entries to Kilauea chip_config cmd

This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").

Additionally some incorrectly indented lines are fixed.

Signed-off-by: Stefan Roese <sr@denx.de>

board/amcc/kilauea/chip_config.c

@@ -25,6 +25,8 @@
 #include <common.h>
 #include <asm/ppc4xx_config.h>
 
+/* NAND booting versions differ in bytes: 6, 8, 9, 11, 12 */
+
 struct ppc4xx_config ppc4xx_config_val[] = {
 	{
 		"333-nor","NOR  CPU: 333 PLB: 166 OPB:  83 EBC:  83",
@@ -49,10 +51,17 @@ struct ppc4xx_config ppc4xx_config_val[] = {
 	},
 	{
 		"533-nor", "NOR  CPU: 533 PLB: 177 OPB:  88 EBC:  88",
-	  {
-		  0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00,
-		  0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
-	  }
+		{
+			0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00,
+			0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
+		}
+	},
+	{
+		"533-nand", "NOR  CPU: 533 PLB: 177 OPB:  88 EBC:  88",
+		{
+			0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0f, 0x00,
+			0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+		}
 	},
 	{
 		"600-nor", "NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100",
@@ -61,6 +70,13 @@ struct ppc4xx_config ppc4xx_config_val[] = {
 			0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
 		}
 	},
+	{
+		"600-nand", "NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100",
+		{
+			0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0f, 0x00,
+			0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+		}
+	},
 	{
 		"666-nor", "NOR  CPU: 666 PLB: 222 OPB: 111 EBC: 111",
 		{