Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

* 'master' of git://git.denx.de/u-boot-mpc83xx:
  powerpc/83xx: fix sdram initialization for keymile boards
  powerpc/mpc83xx: cleanup makefile for mpc83xx

Makefile

@@ -798,6 +798,7 @@ clobber:	tidy
 	@rm -f $(obj)u-boot.sb
 	@rm -f $(obj)tools/inca-swap-bytes
 	@rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c
+	@rm -f $(obj)arch/powerpc/cpu/mpc83xx/ddr-gen?.c
 	@rm -fr $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
 	@rm -fr $(obj)include/generated
 	@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f

arch/powerpc/cpu/mpc83xx/Makefile

@@ -42,15 +42,15 @@ COBJS-$(CONFIG_PCIE) += pcie.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
 ifdef CONFIG_FSL_DDR2
-COBJS-$(CONFIG_MPC8349) += ddr-gen2.o
+COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
 else
 COBJS-y += spd_sdram.o
 endif
 COBJS-$(CONFIG_FSL_DDR2) += law.o
 
 COBJS	:= $(COBJS-y)
-SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
 START	:= $(addprefix $(obj),$(START))
 
 all:	$(obj).depend $(START) $(LIB)
@@ -59,15 +59,12 @@ $(LIB):	$(OBJS)
 	$(call cmd_link_o_target, $(OBJS))
 
 $(obj)ddr-gen1.c:
-	@rm -f $(obj)ddr-gen1.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
 
 $(obj)ddr-gen2.c:
-	@rm -f $(obj)ddr-gen2.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen2.c $(obj)ddr-gen2.c
 
 $(obj)ddr-gen3.c:
-	@rm -f $(obj)ddr-gen3.c
 	ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
 
 #########################################################################

board/keymile/km83xx/km83xx.c

@@ -217,7 +217,7 @@ int fixed_sdram(void)
 	out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL);
 	out_be32(&im->ddr.sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CNTL);
 	udelay(200);
-	out_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
+	setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
 
 	msize = CONFIG_SYS_DDR_SIZE << 20;
 	disable_addr_trans();