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@@ -1196,13 +1196,6 @@ secondary_cpu_setup:
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sync
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sync
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#endif
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#endif
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- /* setup the bats */
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- bl setup_bats
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- sync
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- /* enable address translation */
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- bl enable_addr_trans
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- sync
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-
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/* enable and invalidate the data cache */
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/* enable and invalidate the data cache */
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bl dcache_enable
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bl dcache_enable
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sync
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sync
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@@ -1211,14 +1204,6 @@ secondary_cpu_setup:
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bl icache_enable
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bl icache_enable
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sync
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sync
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- /* Set up MSR and HID0, HID1*/
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- /* Enable interrupts */
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-/* mfmsr r28
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- li r4,0
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- ori r4,r4,MSR_EE
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- or r28,r28,r4
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- mtmsr r28
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- */
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/* TBEN in HID0 */
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/* TBEN in HID0 */
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mfspr r4, HID0
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mfspr r4, HID0
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