Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

arch/arm/cpu/armv7/omap3/sys_info.c

@@ -299,9 +299,9 @@ int print_cpuinfo (void)
 		}
 		if ((get_cpu_rev() >= CPU_3XX_ES31) &&
 		    (get_sku_id() == SKUID_CLK_720MHZ))
-			max_clk = "720 mHz";
+			max_clk = "720 MHz";
 		else
-			max_clk = "600 mHz";
+			max_clk = "600 MHz";
 
 		break;
 	case CPU_AM35XX:

arch/arm/include/asm/arch-am33xx/ddr_defs.h

@@ -86,18 +86,18 @@
 /* Micron MT41K256M16HA-125E */
 #define MT41K256M16HA125E_EMIF_READ_LATENCY	0x100007
 #define MT41K256M16HA125E_EMIF_TIM1		0x0AAAD4DB
-#define MT41K256M16HA125E_EMIF_TIM2		0x26437FDA
-#define MT41K256M16HA125E_EMIF_TIM3		0x501F83FF
-#define MT41K256M16HA125E_EMIF_SDCFG		0x61C052B2
+#define MT41K256M16HA125E_EMIF_TIM2		0x266B7FDA
+#define MT41K256M16HA125E_EMIF_TIM3		0x501F867F
+#define MT41K256M16HA125E_EMIF_SDCFG		0x61C05332
 #define MT41K256M16HA125E_EMIF_SDREF		0xC30
 #define MT41K256M16HA125E_ZQ_CFG		0x50074BE4
 #define MT41K256M16HA125E_DLL_LOCK_DIFF		0x1
 #define MT41K256M16HA125E_RATIO			0x80
 #define MT41K256M16HA125E_INVERT_CLKOUT		0x0
-#define MT41K256M16HA125E_RD_DQS		0x3A
-#define MT41K256M16HA125E_WR_DQS		0x42
-#define MT41K256M16HA125E_PHY_WR_DATA		0x7E
-#define MT41K256M16HA125E_PHY_FIFO_WE		0x9B
+#define MT41K256M16HA125E_RD_DQS		0x38
+#define MT41K256M16HA125E_WR_DQS		0x44
+#define MT41K256M16HA125E_PHY_WR_DATA		0x7D
+#define MT41K256M16HA125E_PHY_FIFO_WE		0x94
 #define MT41K256M16HA125E_IOCTRL_VALUE		0x18B
 
 /* Micron MT41J512M8RH-125 on EVM v1.5 */

include/configs/omap5_common.h

@@ -152,7 +152,7 @@
 	"partitions=" PARTS_DEFAULT "\0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 rw\0" \
-	"mmcrootfstype=ext3 rootwait\0" \
+	"mmcrootfstype=ext4 rootwait\0" \
 	"mmcargs=setenv bootargs console=${console} " \
 		"vram=${vram} " \
 		"root=${mmcroot} " \