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@@ -33,6 +33,7 @@
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#include <nand.h>
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#include <netdev.h>
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#include <miiphy.h>
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+#include <spi.h>
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#include <asm/io.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/kirkwood.h>
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@@ -284,48 +285,17 @@ int board_init(void)
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return 0;
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}
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-#if defined(CONFIG_CMD_SF)
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-int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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+int board_spi_claim_bus(struct spi_slave *slave)
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{
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- u32 tmp;
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- if (argc < 2)
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- return cmd_usage(cmdtp);
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-
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- if ((strcmp(argv[1], "off") == 0)) {
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- printf("SPI FLASH disabled, NAND enabled\n");
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- /* Multi-Purpose Pins Functionality configuration */
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- kwmpp_config[0] = MPP0_NF_IO2;
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- kwmpp_config[1] = MPP1_NF_IO3;
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- kwmpp_config[2] = MPP2_NF_IO4;
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- kwmpp_config[3] = MPP3_NF_IO5;
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-
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- kirkwood_mpp_conf(kwmpp_config, NULL);
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- tmp = readl(KW_GPIO0_BASE);
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- writel(tmp | FLASH_GPIO_PIN , KW_GPIO0_BASE);
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- } else if ((strcmp(argv[1], "on") == 0)) {
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- printf("SPI FLASH enabled, NAND disabled\n");
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- /* Multi-Purpose Pins Functionality configuration */
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- kwmpp_config[0] = MPP0_SPI_SCn;
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- kwmpp_config[1] = MPP1_SPI_MOSI;
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- kwmpp_config[2] = MPP2_SPI_SCK;
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- kwmpp_config[3] = MPP3_SPI_MISO;
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-
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- kirkwood_mpp_conf(kwmpp_config, NULL);
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- tmp = readl(KW_GPIO0_BASE);
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- writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
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- } else {
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- return cmd_usage(cmdtp);
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- }
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+ kw_gpio_set_value(KM_FLASH_GPIO_PIN, 0);
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return 0;
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}
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-U_BOOT_CMD(
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- spitoggle, 2, 0, do_spi_toggle,
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- "En-/disable SPI FLASH access",
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- "<on|off> - Enable (on) or disable (off) SPI FLASH access\n"
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- );
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-#endif
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+void board_spi_release_bus(struct spi_slave *slave)
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+{
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+ kw_gpio_set_value(KM_FLASH_GPIO_PIN, 1);
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+}
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int dram_init(void)
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{
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