Merge branch 'master' of git://git.denx.de/u-boot-samsung

Makefile

@@ -253,6 +253,13 @@ ifeq ($(SOC),omap4)
 LIBS += $(CPUDIR)/omap-common/libomap-common.a
 endif
 
+ifeq ($(SOC),s5pc1xx)
+LIBS += $(CPUDIR)/s5p-common/libs5p-common.a
+endif
+ifeq ($(SOC),s5pc2xx)
+LIBS += $(CPUDIR)/s5p-common/libs5p-common.a
+endif
+
 LIBS := $(addprefix $(obj),$(LIBS))
 .PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
 

arch/arm/cpu/armv7/s5p-common/Makefile

@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2009 Samsung Electronics
+# Minkyu Kang <mk7.kang@samsung.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)libs5p-common.a
+
+COBJS-y		+= cpu_info.o
+COBJS-y		+= timer.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS))
+
+all:	 $(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

arch/arm/cpu/armv7/s5pc1xx/cpu_info.c → arch/arm/cpu/armv7/s5p-common/cpu_info.c

@@ -25,15 +25,14 @@
 #include <asm/arch/clk.h>
 
 /* Default is s5pc100 */
-unsigned int s5pc1xx_cpu_id = 0xC100;
+unsigned int s5p_cpu_id = 0xC100;
 
 #ifdef CONFIG_ARCH_CPU_INIT
 int arch_cpu_init(void)
 {
-	s5pc1xx_cpu_id = readl(S5PC1XX_PRO_ID);
-	s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12);
+	s5p_set_cpu_id();
 
-	s5pc1xx_clock_init();
+	s5p_clock_init();
 
 	return 0;
 }
@@ -41,7 +40,7 @@ int arch_cpu_init(void)
 
 u32 get_device_type(void)
 {
-	return s5pc1xx_cpu_id;
+	return s5p_cpu_id;
 }
 
 #ifdef CONFIG_DISPLAY_CPUINFO
@@ -50,7 +49,7 @@ int print_cpuinfo(void)
 	char buf[32];
 
 	printf("CPU:\tS5P%X@%sMHz\n",
-			s5pc1xx_cpu_id, strmhz(buf, get_arm_clk()));
+			s5p_cpu_id, strmhz(buf, get_arm_clk()));
 
 	return 0;
 }

arch/arm/cpu/armv7/s5pc1xx/timer.c → arch/arm/cpu/armv7/s5p-common/timer.c

@@ -44,23 +44,20 @@ static unsigned long long timestamp;	/* Monotonic incrementing timer */
 static unsigned long lastdec;		/* Last decremneter snapshot */
 
 /* macro to read the 16 bit timer */
-static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void)
+static inline struct s5p_timer *s5p_get_base_timer(void)
 {
-	if (cpu_is_s5pc110())
-		return (struct s5pc1xx_timer *)S5PC110_TIMER_BASE;
-	else
-		return (struct s5pc1xx_timer *)S5PC100_TIMER_BASE;
+	return (struct s5p_timer *)samsung_get_base_timer();
 }
 
 int timer_init(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 	u32 val;
 
 	/*
 	 * @ PWM Timer 4
 	 * Timer Freq(HZ) =
-	 *	PCLK / { (prescaler_value + 1) * (divider_value) }
+	 *	PWM_CLK / { (prescaler_value + 1) * (divider_value) }
 	 */
 
 	/* set prescaler : 16 */
@@ -71,7 +68,7 @@ int timer_init(void)
 	if (count_value == 0) {
 		/* reset initial value */
 		/* count_value = 2085937.5(HZ) (per 1 sec)*/
-		count_value = get_pclk() / ((PRESCALER_1 + 1) *
+		count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
 				(MUX_DIV_2 + 1));
 
 		/* count_value / 100 = 20859.375(HZ) (per 10 msec) */
@@ -83,13 +80,13 @@ int timer_init(void)
 	lastdec = count_value;
 
 	val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
-		S5PC1XX_TCON4_AUTO_RELOAD;
+		TCON4_AUTO_RELOAD;
 
 	/* auto reload & manual update */
-	writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon);
+	writel(val | TCON4_UPDATE, &timer->tcon);
 
 	/* start PWM timer 4 */
-	writel(val | S5PC1XX_TCON4_START, &timer->tcon);
+	writel(val | TCON4_START, &timer->tcon);
 
 	timestamp = 0;
 
@@ -154,7 +151,7 @@ void __udelay(unsigned long usec)
 
 void reset_timer_masked(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 
 	/* reset time */
 	lastdec = readl(&timer->tcnto4);
@@ -163,7 +160,7 @@ void reset_timer_masked(void)
 
 unsigned long get_timer_masked(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 	unsigned long now = readl(&timer->tcnto4);
 
 	if (lastdec >= now)

arch/arm/cpu/armv7/s5pc1xx/Makefile

@@ -32,9 +32,7 @@ SOBJS	= cache.o
 SOBJS	+= reset.o
 
 COBJS	+= clock.o
-COBJS	+= cpu_info.o
 COBJS	+= sromc.o
-COBJS	+= timer.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))

arch/arm/cpu/armv7/s5pc1xx/clock.c

@@ -38,14 +38,16 @@
 #define CONFIG_SYS_CLK_FREQ_C110	24000000
 #endif
 
-unsigned long (*get_pclk)(void);
+unsigned long (*get_uart_clk)(int dev_index);
+unsigned long (*get_pwm_clk)(void);
 unsigned long (*get_arm_clk)(void);
 unsigned long (*get_pll_clk)(int);
 
 /* s5pc110: return pll clock frequency */
 static unsigned long s5pc100_get_pll_clk(int pllreg)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long r, m, p, s, mask, fout;
 	unsigned int freq;
 
@@ -95,7 +97,8 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
 /* s5pc100: return pll clock frequency */
 static unsigned long s5pc110_get_pll_clk(int pllreg)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long r, m, p, s, mask, fout;
 	unsigned int freq;
 
@@ -151,7 +154,8 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
 /* s5pc110: return ARM clock frequency */
 static unsigned long s5pc110_get_arm_clk(void)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long div;
 	unsigned long dout_apll, armclk;
 	unsigned int apll_ratio;
@@ -170,7 +174,8 @@ static unsigned long s5pc110_get_arm_clk(void)
 /* s5pc100: return ARM clock frequency */
 static unsigned long s5pc100_get_arm_clk(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long div;
 	unsigned long dout_apll, armclk;
 	unsigned int apll_ratio, arm_ratio;
@@ -191,7 +196,8 @@ static unsigned long s5pc100_get_arm_clk(void)
 /* s5pc100: return HCLKD0 frequency */
 static unsigned long get_hclk(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long hclkd0;
 	uint div, d0_bus_ratio;
 
@@ -207,7 +213,8 @@ static unsigned long get_hclk(void)
 /* s5pc100: return PCLKD1 frequency */
 static unsigned long get_pclkd1(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long d1_bus, pclkd1;
 	uint div, d1_bus_ratio, pclkd1_ratio;
 
@@ -227,7 +234,8 @@ static unsigned long get_pclkd1(void)
 /* s5pc110: return HCLKs frequency */
 static unsigned long get_hclk_sys(int dom)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long hclk;
 	unsigned int div;
 	unsigned int offset;
@@ -255,7 +263,8 @@ static unsigned long get_hclk_sys(int dom)
 /* s5pc110: return PCLKs frequency */
 static unsigned long get_pclk_sys(int dom)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long pclk;
 	unsigned int div;
 	unsigned int offset;
@@ -289,15 +298,33 @@ static unsigned long s5pc100_get_pclk(void)
 	return get_pclkd1();
 }
 
-void s5pc1xx_clock_init(void)
+/* s5pc1xx: return uart clock frequency */
+static unsigned long s5pc1xx_get_uart_clk(int dev_index)
+{
+	if (cpu_is_s5pc110())
+		return s5pc110_get_pclk();
+	else
+		return s5pc100_get_pclk();
+}
+
+/* s5pc1xx: return pwm clock frequency */
+static unsigned long s5pc1xx_get_pwm_clk(void)
+{
+	if (cpu_is_s5pc110())
+		return s5pc110_get_pclk();
+	else
+		return s5pc100_get_pclk();
+}
+
+void s5p_clock_init(void)
 {
 	if (cpu_is_s5pc110()) {
 		get_pll_clk = s5pc110_get_pll_clk;
 		get_arm_clk = s5pc110_get_arm_clk;
-		get_pclk = s5pc110_get_pclk;
 	} else {
 		get_pll_clk = s5pc100_get_pll_clk;
 		get_arm_clk = s5pc100_get_arm_clk;
-		get_pclk = s5pc100_get_pclk;
 	}
+	get_uart_clk = s5pc1xx_get_uart_clk;
+	get_pwm_clk = s5pc1xx_get_pwm_clk;
 }

arch/arm/cpu/armv7/s5pc1xx/reset.S

@@ -28,7 +28,7 @@
 
 .globl reset_cpu
 reset_cpu:
-	ldr	r1, =S5PC1XX_PRO_ID
+	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
 	ldr	r4, =0x00010000
 	and	r4, r2, r4

arch/arm/cpu/armv7/s5pc1xx/sromc.c

@@ -35,12 +35,8 @@
 void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
 {
 	u32 tmp;
-	struct s5pc1xx_smc *srom;
-
-	if (cpu_is_s5pc100())
-		srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
-	else
-		srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
+	struct s5pc1xx_smc *srom =
+		(struct s5pc1xx_smc *)samsung_get_base_sromc();
 
 	/* Configure SMC_BW register to handle proper SROMC bank */
 	tmp = srom->bw;

arch/arm/include/asm/arch-s5pc1xx/clk.h

@@ -29,10 +29,11 @@
 #define HPLL	3
 #define VPLL	4
 
-void s5pc1xx_clock_init(void);
+void s5p_clock_init(void);
 
 extern unsigned long (*get_pll_clk)(int pllreg);
 extern unsigned long (*get_arm_clk)(void);
-extern unsigned long (*get_pclk)(void);
+extern unsigned long (*get_pwm_clk)(void);
+extern unsigned long (*get_uart_clk)(int dev_index);
 
 #endif

arch/arm/include/asm/arch-s5pc1xx/cpu.h

@@ -25,9 +25,9 @@
 
 #define S5PC1XX_ADDR_BASE	0xE0000000
 
-#define S5PC1XX_CLOCK_BASE	0xE0100000
-
 /* S5PC100 */
+#define S5PC100_PRO_ID		0xE0000000
+#define S5PC100_CLOCK_BASE	0xE0100000
 #define S5PC100_GPIO_BASE	0xE0300000
 #define S5PC100_VIC0_BASE	0xE4000000
 #define S5PC100_VIC1_BASE	0xE4100000
@@ -41,6 +41,8 @@
 #define S5PC100_MMC_BASE	0xED800000
 
 /* S5PC110 */
+#define S5PC110_PRO_ID		0xE0000000
+#define S5PC110_CLOCK_BASE	0xE0100000
 #define S5PC110_GPIO_BASE	0xE0200000
 #define S5PC110_PWMTIMER_BASE	0xE2500000
 #define S5PC110_WATCHDOG_BASE	0xE2700000
@@ -54,21 +56,44 @@
 #define S5PC110_VIC2_BASE	0xF2200000
 #define S5PC110_VIC3_BASE	0xF2300000
 
-/* Chip ID */
-#define S5PC1XX_PRO_ID		0xE0000000
-
 #ifndef __ASSEMBLY__
+#include <asm/io.h>
 /* CPU detection macros */
-extern unsigned int s5pc1xx_cpu_id;
+extern unsigned int s5p_cpu_id;
+
+static inline void s5p_set_cpu_id(void)
+{
+	s5p_cpu_id = readl(S5PC100_PRO_ID);
+	s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12);
+}
 
 #define IS_SAMSUNG_TYPE(type, id)			\
 static inline int cpu_is_##type(void)			\
 {							\
-	return s5pc1xx_cpu_id == id ? 1 : 0;		\
+	return s5p_cpu_id == id ? 1 : 0;		\
 }
 
 IS_SAMSUNG_TYPE(s5pc100, 0xc100)
 IS_SAMSUNG_TYPE(s5pc110, 0xc110)
+
+#define SAMSUNG_BASE(device, base)				\
+static inline unsigned int samsung_get_base_##device(void)	\
+{								\
+	if (cpu_is_s5pc100())					\
+		return S5PC100_##base;				\
+	else if (cpu_is_s5pc110())				\
+		return S5PC110_##base;				\
+	else							\
+		return 0;					\
+}
+
+SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(gpio, GPIO_BASE)
+SAMSUNG_BASE(pro_id, PRO_ID)
+SAMSUNG_BASE(mmc, MMC_BASE)
+SAMSUNG_BASE(sromc, SROMC_BASE)
+SAMSUNG_BASE(timer, PWMTIMER_BASE)
+SAMSUNG_BASE(uart, UART_BASE)
 #endif
 
 #endif	/* _S5PC1XX_CPU_H */

arch/arm/include/asm/arch-s5pc1xx/gpio.h

@@ -33,96 +33,96 @@ struct s5p_gpio_bank {
 };
 
 struct s5pc100_gpio {
-	struct s5p_gpio_bank gpio_a0;
-	struct s5p_gpio_bank gpio_a1;
-	struct s5p_gpio_bank gpio_b;
-	struct s5p_gpio_bank gpio_c;
-	struct s5p_gpio_bank gpio_d;
-	struct s5p_gpio_bank gpio_e0;
-	struct s5p_gpio_bank gpio_e1;
-	struct s5p_gpio_bank gpio_f0;
-	struct s5p_gpio_bank gpio_f1;
-	struct s5p_gpio_bank gpio_f2;
-	struct s5p_gpio_bank gpio_f3;
-	struct s5p_gpio_bank gpio_g0;
-	struct s5p_gpio_bank gpio_g1;
-	struct s5p_gpio_bank gpio_g2;
-	struct s5p_gpio_bank gpio_g3;
-	struct s5p_gpio_bank gpio_i;
-	struct s5p_gpio_bank gpio_j0;
-	struct s5p_gpio_bank gpio_j1;
-	struct s5p_gpio_bank gpio_j2;
-	struct s5p_gpio_bank gpio_j3;
-	struct s5p_gpio_bank gpio_j4;
-	struct s5p_gpio_bank gpio_k0;
-	struct s5p_gpio_bank gpio_k1;
-	struct s5p_gpio_bank gpio_k2;
-	struct s5p_gpio_bank gpio_k3;
-	struct s5p_gpio_bank gpio_l0;
-	struct s5p_gpio_bank gpio_l1;
-	struct s5p_gpio_bank gpio_l2;
-	struct s5p_gpio_bank gpio_l3;
-	struct s5p_gpio_bank gpio_l4;
-	struct s5p_gpio_bank gpio_h0;
-	struct s5p_gpio_bank gpio_h1;
-	struct s5p_gpio_bank gpio_h2;
-	struct s5p_gpio_bank gpio_h3;
+	struct s5p_gpio_bank a0;
+	struct s5p_gpio_bank a1;
+	struct s5p_gpio_bank b;
+	struct s5p_gpio_bank c;
+	struct s5p_gpio_bank d;
+	struct s5p_gpio_bank e0;
+	struct s5p_gpio_bank e1;
+	struct s5p_gpio_bank f0;
+	struct s5p_gpio_bank f1;
+	struct s5p_gpio_bank f2;
+	struct s5p_gpio_bank f3;
+	struct s5p_gpio_bank g0;
+	struct s5p_gpio_bank g1;
+	struct s5p_gpio_bank g2;
+	struct s5p_gpio_bank g3;
+	struct s5p_gpio_bank i;
+	struct s5p_gpio_bank j0;
+	struct s5p_gpio_bank j1;
+	struct s5p_gpio_bank j2;
+	struct s5p_gpio_bank j3;
+	struct s5p_gpio_bank j4;
+	struct s5p_gpio_bank k0;
+	struct s5p_gpio_bank k1;
+	struct s5p_gpio_bank k2;
+	struct s5p_gpio_bank k3;
+	struct s5p_gpio_bank l0;
+	struct s5p_gpio_bank l1;
+	struct s5p_gpio_bank l2;
+	struct s5p_gpio_bank l3;
+	struct s5p_gpio_bank l4;
+	struct s5p_gpio_bank h0;
+	struct s5p_gpio_bank h1;
+	struct s5p_gpio_bank h2;
+	struct s5p_gpio_bank h3;
 };
 
 struct s5pc110_gpio {
-	struct s5p_gpio_bank gpio_a0;
-	struct s5p_gpio_bank gpio_a1;
-	struct s5p_gpio_bank gpio_b;
-	struct s5p_gpio_bank gpio_c0;
-	struct s5p_gpio_bank gpio_c1;
-	struct s5p_gpio_bank gpio_d0;
-	struct s5p_gpio_bank gpio_d1;
-	struct s5p_gpio_bank gpio_e0;
-	struct s5p_gpio_bank gpio_e1;
-	struct s5p_gpio_bank gpio_f0;
-	struct s5p_gpio_bank gpio_f1;
-	struct s5p_gpio_bank gpio_f2;
-	struct s5p_gpio_bank gpio_f3;
-	struct s5p_gpio_bank gpio_g0;
-	struct s5p_gpio_bank gpio_g1;
-	struct s5p_gpio_bank gpio_g2;
-	struct s5p_gpio_bank gpio_g3;
-	struct s5p_gpio_bank gpio_i;
-	struct s5p_gpio_bank gpio_j0;
-	struct s5p_gpio_bank gpio_j1;
-	struct s5p_gpio_bank gpio_j2;
-	struct s5p_gpio_bank gpio_j3;
-	struct s5p_gpio_bank gpio_j4;
-	struct s5p_gpio_bank gpio_mp0_1;
-	struct s5p_gpio_bank gpio_mp0_2;
-	struct s5p_gpio_bank gpio_mp0_3;
-	struct s5p_gpio_bank gpio_mp0_4;
-	struct s5p_gpio_bank gpio_mp0_5;
-	struct s5p_gpio_bank gpio_mp0_6;
-	struct s5p_gpio_bank gpio_mp0_7;
-	struct s5p_gpio_bank gpio_mp1_0;
-	struct s5p_gpio_bank gpio_mp1_1;
-	struct s5p_gpio_bank gpio_mp1_2;
-	struct s5p_gpio_bank gpio_mp1_3;
-	struct s5p_gpio_bank gpio_mp1_4;
-	struct s5p_gpio_bank gpio_mp1_5;
-	struct s5p_gpio_bank gpio_mp1_6;
-	struct s5p_gpio_bank gpio_mp1_7;
-	struct s5p_gpio_bank gpio_mp1_8;
-	struct s5p_gpio_bank gpio_mp2_0;
-	struct s5p_gpio_bank gpio_mp2_1;
-	struct s5p_gpio_bank gpio_mp2_2;
-	struct s5p_gpio_bank gpio_mp2_3;
-	struct s5p_gpio_bank gpio_mp2_4;
-	struct s5p_gpio_bank gpio_mp2_5;
-	struct s5p_gpio_bank gpio_mp2_6;
-	struct s5p_gpio_bank gpio_mp2_7;
-	struct s5p_gpio_bank gpio_mp2_8;
+	struct s5p_gpio_bank a0;
+	struct s5p_gpio_bank a1;
+	struct s5p_gpio_bank b;
+	struct s5p_gpio_bank c0;
+	struct s5p_gpio_bank c1;
+	struct s5p_gpio_bank d0;
+	struct s5p_gpio_bank d1;
+	struct s5p_gpio_bank e0;
+	struct s5p_gpio_bank e1;
+	struct s5p_gpio_bank f0;
+	struct s5p_gpio_bank f1;
+	struct s5p_gpio_bank f2;
+	struct s5p_gpio_bank f3;
+	struct s5p_gpio_bank g0;
+	struct s5p_gpio_bank g1;
+	struct s5p_gpio_bank g2;
+	struct s5p_gpio_bank g3;
+	struct s5p_gpio_bank i;
+	struct s5p_gpio_bank j0;
+	struct s5p_gpio_bank j1;
+	struct s5p_gpio_bank j2;
+	struct s5p_gpio_bank j3;
+	struct s5p_gpio_bank j4;
+	struct s5p_gpio_bank mp0_1;
+	struct s5p_gpio_bank mp0_2;
+	struct s5p_gpio_bank mp0_3;
+	struct s5p_gpio_bank mp0_4;
+	struct s5p_gpio_bank mp0_5;
+	struct s5p_gpio_bank mp0_6;
+	struct s5p_gpio_bank mp0_7;
+	struct s5p_gpio_bank mp1_0;
+	struct s5p_gpio_bank mp1_1;
+	struct s5p_gpio_bank mp1_2;
+	struct s5p_gpio_bank mp1_3;
+	struct s5p_gpio_bank mp1_4;
+	struct s5p_gpio_bank mp1_5;
+	struct s5p_gpio_bank mp1_6;
+	struct s5p_gpio_bank mp1_7;
+	struct s5p_gpio_bank mp1_8;
+	struct s5p_gpio_bank mp2_0;
+	struct s5p_gpio_bank mp2_1;
+	struct s5p_gpio_bank mp2_2;
+	struct s5p_gpio_bank mp2_3;
+	struct s5p_gpio_bank mp2_4;
+	struct s5p_gpio_bank mp2_5;
+	struct s5p_gpio_bank mp2_6;
+	struct s5p_gpio_bank mp2_7;
+	struct s5p_gpio_bank mp2_8;
 	struct s5p_gpio_bank res1[48];
-	struct s5p_gpio_bank gpio_h0;
-	struct s5p_gpio_bank gpio_h1;
-	struct s5p_gpio_bank gpio_h2;
-	struct s5p_gpio_bank gpio_h3;
+	struct s5p_gpio_bank h0;
+	struct s5p_gpio_bank h1;
+	struct s5p_gpio_bank h2;
+	struct s5p_gpio_bank h3;
 };
 
 /* functions */

arch/arm/include/asm/arch-s5pc1xx/mmc.h

@@ -56,7 +56,7 @@ struct s5p_mmc {
 	unsigned int	control4;
 	unsigned char	res4[0x6e];
 	unsigned short	hcver;
-	unsigned char	res5[0xFFF00];
+	unsigned char	res5[0xFFF02];
 };
 
 struct mmc_host {

arch/arm/include/asm/arch-s5pc1xx/pwm.h

@@ -22,19 +22,15 @@
 #ifndef __ASM_ARM_ARCH_PWM_H_
 #define __ASM_ARM_ARCH_PWM_H_
 
-/* PWM timer addressing */
-#define S5PC100_TIMER_BASE	S5PC100_PWMTIMER_BASE
-#define S5PC110_TIMER_BASE	S5PC110_PWMTIMER_BASE
-
 /* Interval mode(Auto Reload) of PWM Timer 4 */
-#define S5PC1XX_TCON4_AUTO_RELOAD	(1 << 22)
+#define TCON4_AUTO_RELOAD	(1 << 22)
 /* Update TCNTB4 */
-#define S5PC1XX_TCON4_UPDATE		(1 << 21)
+#define TCON4_UPDATE		(1 << 21)
 /* start bit of PWM Timer 4 */
-#define S5PC1XX_TCON4_START		(1 << 20)
+#define TCON4_START		(1 << 20)
 
 #ifndef __ASSEMBLY__
-struct s5pc1xx_timer {
+struct s5p_timer {
 	unsigned int	tcfg0;
 	unsigned int	tcfg1;
 	unsigned int	tcon;

board/samsung/goni/goni.c

@@ -67,7 +67,7 @@ int board_mmc_init(bd_t *bis)
 	int i;
 
 	/* MASSMEMORY_EN: XMSMDATA7: GPJ2[7] output high */
-	gpio_direction_output(&s5pc110_gpio->gpio_j2, 7, 1);
+	gpio_direction_output(&s5pc110_gpio->j2, 7, 1);
 
 	/*
 	 * MMC0 GPIO
@@ -80,11 +80,11 @@ int board_mmc_init(bd_t *bis)
 		if (i == 2)
 			continue;
 		/* GPG0[0:6] special function 2 */
-		gpio_cfg_pin(&s5pc110_gpio->gpio_g0, i, 0x2);
+		gpio_cfg_pin(&s5pc110_gpio->g0, i, 0x2);
 		/* GPG0[0:6] pull disable */
-		gpio_set_pull(&s5pc110_gpio->gpio_g0, i, GPIO_PULL_NONE);
+		gpio_set_pull(&s5pc110_gpio->g0, i, GPIO_PULL_NONE);
 		/* GPG0[0:6] drv 4x */
-		gpio_set_drv(&s5pc110_gpio->gpio_g0, i, GPIO_DRV_4X);
+		gpio_set_drv(&s5pc110_gpio->g0, i, GPIO_DRV_4X);
 	}
 
 	return s5p_mmc_init(0);

board/samsung/goni/lowlevel_init.S

@@ -51,7 +51,7 @@ lowlevel_init:
 	ldr	r7, =S5PC100_GPIO_BASE
 	ldr	r8, =S5PC100_GPIO_BASE
 	/* Read CPU ID */
-	ldr	r2, =S5PC1XX_PRO_ID
+	ldr	r2, =S5PC110_PRO_ID
 	ldr	r0, [r2]
 	mov	r1, #0x00010000
 	and	r0, r0, r1
@@ -377,7 +377,7 @@ lockloop:
  * void system_clock_init(void)
  */
 system_clock_init:
-	ldr	r0, =S5PC1XX_CLOCK_BASE		@ 0xE0100000
+	ldr	r0, =S5PC110_CLOCK_BASE		@ 0xE0100000
 
 	/* Check S5PC100 */
 	cmp	r7, r8
@@ -437,7 +437,7 @@ system_clock_init:
 	ldr	r1, =0x3ff03ff
 	str	r1, [r0, #0x114]		@ S5PC110_CLAMP_STABLE
 
-	ldr	r0, =S5PC1XX_CLOCK_BASE		@ 0xE0100000
+	ldr	r0, =S5PC110_CLOCK_BASE		@ 0xE0100000
 
 	/* Set Clock divider */
 	ldr	r1, =0x14131330			@ 1:1:4:4, 1:4:5

board/samsung/smdkc100/lowlevel_init.S

@@ -131,7 +131,7 @@ wakeup_reset:
  * void system_clock_init(void)
  */
 system_clock_init:
-	ldr	r8, =S5PC1XX_CLOCK_BASE		@ 0xE0100000
+	ldr	r8, =S5PC100_CLOCK_BASE		@ 0xE0100000
 
 	/* Set Clock divider */
 	ldr	r1, =0x00011110

board/samsung/smdkc100/onenand.c

@@ -35,7 +35,8 @@
 void onenand_board_init(struct mtd_info *mtd)
 {
 	struct onenand_chip *this = mtd->priv;
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+			(struct s5pc100_clock *)samsung_get_base_clock();
 	struct samsung_onenand *onenand;
 	int value;
 

board/samsung/smdkc100/smdkc100.c

@@ -38,10 +38,10 @@ static void smc9115_pre_init(void)
 	u32 smc_bw_conf, smc_bc_conf;
 
 	struct s5pc100_gpio *const gpio =
-		(struct s5pc100_gpio *)S5PC100_GPIO_BASE;
+		(struct s5pc100_gpio *)samsung_get_base_gpio();
 
 	/* gpio configuration GPK0CON */
-	gpio_cfg_pin(&gpio->gpio_k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
+	gpio_cfg_pin(&gpio->k0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
 
 	/* Ethernet needs bus width of 16 bits */
 	smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);

common/serial.c

@@ -78,7 +78,7 @@ struct serial_device *__default_serial_console (void)
 #else
 #error "CONFIG_SERIAL? missing."
 #endif
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5P)
 #if defined(CONFIG_SERIAL0)
 	return &s5p_serial0_device;
 #elif defined(CONFIG_SERIAL1)
@@ -162,7 +162,7 @@ void serial_initialize (void)
 	serial_register(&s3c24xx_serial1_device);
 	serial_register(&s3c24xx_serial2_device);
 #endif
-#if defined(CONFIG_S5PC1XX)
+#if defined(CONFIG_S5P)
 	serial_register(&s5p_serial0_device);
 	serial_register(&s5p_serial1_device);
 	serial_register(&s5p_serial2_device);

drivers/gpio/Makefile

@@ -29,7 +29,7 @@ COBJS-$(CONFIG_AT91_GPIO)	+= at91_gpio.o
 COBJS-$(CONFIG_KIRKWOOD_GPIO)	+= kw_gpio.o
 COBJS-$(CONFIG_MX31_GPIO)	+= mx31_gpio.o
 COBJS-$(CONFIG_PCA953X)		+= pca953x.o
-COBJS-$(CONFIG_S5PC1XX)		+= s5p_gpio.o
+COBJS-$(CONFIG_S5P)		+= s5p_gpio.o
 
 COBJS	:= $(COBJS-y)
 SRCS 	:= $(COBJS:.o=.c)

drivers/mmc/s5p_mmc.c

@@ -23,12 +23,6 @@
 #include <asm/io.h>
 #include <asm/arch/mmc.h>
 
-#ifdef DEBUG_S5P_HSMMC
-#define dbg(x...)       printf(x)
-#else
-#define dbg(x...)       do { } while (0)
-#endif
-
 /* support 4 mmc hosts */
 struct mmc mmc_dev[4];
 struct mmc_host mmc_host[4];
@@ -36,18 +30,14 @@ struct mmc_host mmc_host[4];
 static inline struct s5p_mmc *s5p_get_base_mmc(int dev_index)
 {
 	unsigned long offset = dev_index * sizeof(struct s5p_mmc);
-
-	if (cpu_is_s5pc100())
-		return (struct s5p_mmc *)(S5PC100_MMC_BASE + offset);
-	else
-		return (struct s5p_mmc *)(S5PC110_MMC_BASE + offset);
+	return (struct s5p_mmc *)(samsung_get_base_mmc() + offset);
 }
 
 static void mmc_prepare_data(struct mmc_host *host, struct mmc_data *data)
 {
 	unsigned char ctrl;
 
-	dbg("data->dest: %08x\n", (u32)data->dest);
+	debug("data->dest: %08x\n", (u32)data->dest);
 	writel((u32)data->dest, &host->reg->sysad);
 	/*
 	 * DMASEL[4:3]
@@ -128,7 +118,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (data)
 		mmc_prepare_data(host, data);
 
-	dbg("cmd->arg: %08x\n", cmd->cmdarg);
+	debug("cmd->arg: %08x\n", cmd->cmdarg);
 	writel(cmd->cmdarg, &host->reg->argument);
 
 	if (data)
@@ -165,7 +155,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 	if (data)
 		flags |= (1 << 5);
 
-	dbg("cmd: %d\n", cmd->cmdidx);
+	debug("cmd: %d\n", cmd->cmdidx);
 
 	writew((cmd->cmdidx << 8) | flags, &host->reg->cmdreg);
 
@@ -186,11 +176,11 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 
 	if (mask & (1 << 16)) {
 		/* Timeout Error */
-		dbg("timeout: %08x cmd %d\n", mask, cmd->cmdidx);
+		debug("timeout: %08x cmd %d\n", mask, cmd->cmdidx);
 		return TIMEOUT;
 	} else if (mask & (1 << 15)) {
 		/* Error Interrupt */
-		dbg("error: %08x cmd %d\n", mask, cmd->cmdidx);
+		debug("error: %08x cmd %d\n", mask, cmd->cmdidx);
 		return -1;
 	}
 
@@ -206,7 +196,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 					cmd->response[i] |=
 						readb(offset - 1);
 				}
-				dbg("cmd->resp[%d]: %08x\n",
+				debug("cmd->resp[%d]: %08x\n",
 						i, cmd->response[i]);
 			}
 		} else if (cmd->resp_type & MMC_RSP_BUSY) {
@@ -223,10 +213,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 			}
 
 			cmd->response[0] = readl(&host->reg->rspreg0);
-			dbg("cmd->resp[0]: %08x\n", cmd->response[0]);
+			debug("cmd->resp[0]: %08x\n", cmd->response[0]);
 		} else {
 			cmd->response[0] = readl(&host->reg->rspreg0);
-			dbg("cmd->resp[0]: %08x\n", cmd->response[0]);
+			debug("cmd->resp[0]: %08x\n", cmd->response[0]);
 		}
 	}
 
@@ -242,11 +232,11 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 				return -1;
 			} else if (mask & (1 << 3)) {
 				/* DMA Interrupt */
-				dbg("DMA end\n");
+				debug("DMA end\n");
 				break;
 			} else if (mask & (1 << 1)) {
 				/* Transfer Complete */
-				dbg("r/w is done\n");
+				debug("r/w is done\n");
 				break;
 			}
 		}
@@ -288,7 +278,7 @@ static void mmc_change_clock(struct mmc_host *host, uint clock)
 		div = 2;
 	else
 		div = 1;
-	dbg("div: %d\n", div);
+	debug("div: %d\n", div);
 
 	div >>= 1;
 	/*
@@ -325,7 +315,7 @@ static void mmc_set_ios(struct mmc *mmc)
 	unsigned char ctrl;
 	unsigned long val;
 
-	dbg("set_ios: bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock);
+	debug("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock);
 
 	/*
 	 * SELCLKPADDS[17:16]

drivers/mtd/onenand/samsung.c

@@ -67,7 +67,7 @@ do {									\
 #define MAP_01				(0x1 << 24)
 #define MAP_10				(0x2 << 24)
 #define MAP_11				(0x3 << 24)
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5P)
 #define MAP_00				(0x0 << 26)
 #define MAP_01				(0x1 << 26)
 #define MAP_10				(0x2 << 26)
@@ -121,7 +121,7 @@ static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
 {
 	return (fba << 12) | (fpa << 6) | (fsa << 4);
 }
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5P)
 static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
 {
 	return (fba << 13) | (fpa << 7) | (fsa << 5);
@@ -614,7 +614,7 @@ void s3c_onenand_init(struct mtd_info *mtd)
 #if defined(CONFIG_S3C64XX)
 	onenand->base = (void *)0x70100000;
 	onenand->ahb_addr = (void *)0x20000000;
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5P)
 	onenand->base = (void *)0xE7100000;
 	onenand->ahb_addr = (void *)0xB0000000;
 #endif

drivers/serial/Makefile

@@ -36,7 +36,7 @@ COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
 COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
 COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
 COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
-COBJS-$(CONFIG_S5PC1XX) += serial_s5p.o
+COBJS-$(CONFIG_S5P) += serial_s5p.o
 COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o
 COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o
 COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o

drivers/serial/serial_s5p.c

@@ -30,11 +30,7 @@
 static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
 {
 	u32 offset = dev_index * sizeof(struct s5p_uart);
-
-	if (cpu_is_s5pc100())
-		return (struct s5p_uart *)(S5PC100_UART_BASE + offset);
-	else
-		return (struct s5p_uart *)(S5PC110_UART_BASE + offset);
+	return (struct s5p_uart *)(samsung_get_base_uart() + offset);
 }
 
 /*
@@ -67,11 +63,11 @@ void serial_setbrg_dev(const int dev_index)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 	struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
-	u32 pclk = get_pclk();
+	u32 uclk = get_uart_clk(dev_index);
 	u32 baudrate = gd->baudrate;
 	u32 val;
 
-	val = pclk / baudrate;
+	val = uclk / baudrate;
 
 	writel(val / 16 - 1, &uart->ubrdiv);
 	writew(udivslot[val % 16], &uart->udivslot);

include/configs/s5p_goni.h

@@ -30,7 +30,7 @@
 /* High Level Configuration Options */
 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
-#define CONFIG_S5PC1XX		1	/* which is in a S5PC1XX Family */
+#define CONFIG_S5P		1	/* which is in a S5P Family */
 #define CONFIG_S5PC110		1	/* which is in a S5PC110 */
 #define CONFIG_MACH_GONI	1	/* working with Goni */
 

include/configs/smdkc100.h

@@ -34,7 +34,7 @@
  */
 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
-#define CONFIG_S5PC1XX		1	/* which is in a S5PC1XX Family */
+#define CONFIG_S5P		1	/* which is in a S5P Family */
 #define CONFIG_S5PC100		1	/* which is in a S5PC100 */
 #define CONFIG_SMDKC100		1	/* working with SMDKC100 */
 

include/serial.h

@@ -52,7 +52,7 @@ extern struct serial_device s3c24xx_serial1_device;
 extern struct serial_device s3c24xx_serial2_device;
 #endif
 
-#if defined(CONFIG_S5PC1XX)
+#if defined(CONFIG_S5P)
 extern struct serial_device s5p_serial0_device;
 extern struct serial_device s5p_serial1_device;
 extern struct serial_device s5p_serial2_device;