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@@ -468,27 +468,6 @@ static unsigned long exynos4x12_get_pwm_clk(void)
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return pclk;
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return pclk;
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}
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}
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-/* exynos5: return pwm clock frequency */
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-static unsigned long exynos5_get_pwm_clk(void)
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-{
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- struct exynos5_clock *clk =
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- (struct exynos5_clock *)samsung_get_base_clock();
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- unsigned long pclk, sclk;
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- unsigned int ratio;
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-
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- /*
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- * CLK_DIV_PERIC3
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- * PWM_RATIO [3:0]
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- */
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- ratio = readl(&clk->div_peric3);
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- ratio = ratio & 0xf;
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- sclk = get_pll_clk(MPLL);
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-
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- pclk = sclk / (ratio + 1);
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-
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- return pclk;
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-}
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-
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/* exynos4: return uart clock frequency */
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/* exynos4: return uart clock frequency */
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static unsigned long exynos4_get_uart_clk(int dev_index)
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static unsigned long exynos4_get_uart_clk(int dev_index)
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{
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{
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