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@@ -198,9 +198,9 @@ reset_85xx_watchdog(void)
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* Clear TSR(WIS) bit by writing 1
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*/
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unsigned long val;
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- val = mfspr(tsr);
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- val |= 0x40000000;
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- mtspr(tsr, val);
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+ val = mfspr(SPRN_TSR);
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+ val |= TSR_WIS;
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+ mtspr(SPRN_TSR, val);
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}
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#endif /* CONFIG_WATCHDOG */
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@@ -211,6 +211,7 @@ void dma_init(void) {
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dma->satr0 = 0x02c40000;
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dma->datr0 = 0x02c40000;
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+ dma->sr0 = 0xfffffff; /* clear any errors */
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asm("sync; isync; msync");
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return;
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}
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@@ -225,6 +226,10 @@ uint dma_check(void) {
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status = dma->sr0;
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}
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+ /* clear MR0[CS] channel start bit */
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+ dma->mr0 &= 0x00000001;
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+ asm("sync;isync;msync");
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+
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if (status != 0) {
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printf ("DMA Error: status = %x\n", status);
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}
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