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@@ -574,7 +574,10 @@ long int spd_sdram()
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/* Check DIMM data bus width */
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if (spd.dataw_lsb == 0x20) {
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- burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
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+ if (spd.mem_type == SPD_MEMTYPE_DDR)
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+ burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
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+ if (spd.mem_type == SPD_MEMTYPE_DDR2)
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+ burstlen = 0x02; /* 32 bit data bus, burst len is 4 */
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printf("\n DDR DIMM: data bus width is 32 bit");
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} else {
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burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */
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@@ -730,8 +733,12 @@ long int spd_sdram()
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sdram_cfg |= 0x10000000;
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/* The DIMM is 32bit width */
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- if (spd.dataw_lsb == 0x20)
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- sdram_cfg |= 0x000C0000;
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+ if (spd.dataw_lsb == 0x20) {
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+ if (spd.mem_type == SPD_MEMTYPE_DDR)
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+ sdram_cfg |= 0x000C0000;
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+ if (spd.mem_type == SPD_MEMTYPE_DDR2)
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+ sdram_cfg |= 0x00080000;
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+ }
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ddrc_ecc_enable = 0;
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