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+/*
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+ * Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
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+ * (C) Copyright 2002, 2003 Motorola Inc.
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+ * Xianghua Xiao (X.Xiao@motorola.com)
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+ *
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+ * (C) Copyright 2000
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+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <config.h>
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+#include <common.h>
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+#include <asm/fsl_dma.h>
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+
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+#if defined(CONFIG_MPC85xx)
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+volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR);
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+#elif defined(CONFIG_MPC86xx)
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+volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
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+#else
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+#error "Freescale DMA engine not supported on your processor"
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+#endif
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+
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+static void dma_sync(void)
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+{
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+#if defined(CONFIG_MPC85xx)
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+ asm("sync; isync; msync");
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+#elif defined(CONFIG_MPC86xx)
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+ asm("sync; isync");
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+#endif
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+}
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+
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+static uint dma_check(void) {
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+ volatile fsl_dma_t *dma = &dma_base->dma[0];
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+ volatile uint status = dma->sr;
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+
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+ /* While the channel is busy, spin */
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+ while (status & 4)
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+ status = dma->sr;
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+
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+ /* clear MR[CS] channel start bit */
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+ dma->mr &= 1;
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+ dma_sync();
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+
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+ if (status != 0)
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+ printf ("DMA Error: status = %x\n", status);
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+
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+ return status;
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+}
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+
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+void dma_init(void) {
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+ volatile fsl_dma_t *dma = &dma_base->dma[0];
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+
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+ dma->satr = 0x00040000;
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+ dma->datr = 0x00040000;
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+ dma->sr = 0xffffffff; /* clear any errors */
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+ dma_sync();
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+}
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+
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+int dma_xfer(void *dest, uint count, void *src) {
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+ volatile fsl_dma_t *dma = &dma_base->dma[0];
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+
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+ dma->dar = (uint) dest;
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+ dma->sar = (uint) src;
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+ dma->bcr = count;
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+
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+ /* Disable bandwidth control, use direct transfer mode */
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+ dma->mr = 0xf000004;
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+ dma_sync();
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+
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+ /* Start the transfer */
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+ dma->mr = 0xf000005;
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+ dma_sync();
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+
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+ return dma_check();
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+}
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