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@@ -56,25 +56,6 @@ static inline void sdelay(unsigned long sec)
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mdelay(1000);
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}
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-void dprint_buffer(unsigned char *buf, int len)
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-{
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- int i, j;
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-
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- i = 0;
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- j = 0;
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- printf("\n\r");
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-
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- for (i = 0; i < len; i++) {
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- printf("%02x ", *buf++);
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- j++;
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- if (j == 16) {
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- printf("\n\r");
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- j = 0;
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- }
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- }
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- printf("\n\r");
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-}
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-
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static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)
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{
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printf("Status FIS dump:\n\r");
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@@ -94,7 +75,7 @@ static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)
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printf("sector_count_exp: %02x\n\r", s->sector_count_exp);
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}
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-static int ata_wait_register(volatile unsigned *addr, u32 mask,
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+static int ata_wait_register(unsigned __iomem *addr, u32 mask,
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u32 val, u32 timeout_msec)
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{
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int i;
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@@ -112,7 +93,7 @@ int init_sata(int dev)
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cmd_hdr_tbl_t *cmd_hdr;
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u32 cda;
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u32 val32;
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- fsl_sata_reg_t *reg;
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+ fsl_sata_reg_t __iomem *reg;
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u32 sig;
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int i;
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fsl_sata_t *sata;
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@@ -287,42 +268,7 @@ int init_sata(int dev)
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return 0;
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}
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-/* Hardware reset, like Power-on and COMRESET */
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-void fsl_sata_hardware_reset(u32 reg_base)
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-{
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- fsl_sata_reg_t *reg = (fsl_sata_reg_t *)reg_base;
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- u32 scontrol;
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-
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- /* Disable the SATA interface and put PHY offline */
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- scontrol = in_le32(®->scontrol);
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- scontrol = (scontrol & 0x0f0) | 0x304;
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- out_le32(®->scontrol, scontrol);
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-
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- /* No speed strict */
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- scontrol = in_le32(®->scontrol);
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- scontrol = scontrol & ~0x0f0;
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- out_le32(®->scontrol, scontrol);
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-
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- /* Issue PHY wake/reset, Hardware_reset_asserted */
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- scontrol = in_le32(®->scontrol);
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- scontrol = (scontrol & 0x0f0) | 0x301;
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- out_le32(®->scontrol, scontrol);
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-
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- mdelay(100);
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-
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- /* Resume PHY, COMRESET negated, the device initialize hardware
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- * and execute diagnostics, send good status-signature to host,
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- * which is D2H register FIS, and then the device enter idle state.
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- */
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- scontrol = in_le32(®->scontrol);
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- scontrol = (scontrol & 0x0f0) | 0x300;
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- out_le32(®->scontrol, scontrol);
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-
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- mdelay(100);
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- return;
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-}
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-
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-static void fsl_sata_dump_regs(fsl_sata_reg_t *reg)
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+static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg)
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{
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printf("\n\rSATA: %08x\n\r", (u32)reg);
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printf("CQR: %08x\n\r", in_le32(®->cqr));
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@@ -363,7 +309,7 @@ static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis
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u32 prde_count;
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u32 val32;
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u32 ttl;
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- fsl_sata_reg_t *reg = sata->reg_base;
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+ fsl_sata_reg_t __iomem *reg = sata->reg_base;
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int i;
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/* Check xfer length */
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@@ -620,7 +566,7 @@ static u32 fsl_sata_rw_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_wr
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return blkcnt;
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}
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-void fsl_sata_flush_cache(int dev)
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+static void fsl_sata_flush_cache(int dev)
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{
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fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d, *cfis = &h2d;
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@@ -664,7 +610,8 @@ static u32 fsl_sata_rw_cmd_ext(int dev, u32 start, u32 blkcnt, u8 *buffer, int i
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return blkcnt;
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}
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-u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)
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+static u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer,
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+ int is_write)
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{
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fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d, *cfis = &h2d;
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@@ -707,7 +654,7 @@ u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write
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return blkcnt;
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}
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-void fsl_sata_flush_cache_ext(int dev)
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+static void fsl_sata_flush_cache_ext(int dev)
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{
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fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
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struct sata_fis_h2d h2d, *cfis = &h2d;
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@@ -721,12 +668,6 @@ void fsl_sata_flush_cache_ext(int dev)
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fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
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}
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-/* Software reset, set SRST of the Device Control register */
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-void fsl_sata_software_reset(int dev)
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-{
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- return;
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-}
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-
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static void fsl_sata_init_wcache(int dev, u16 *id)
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{
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fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
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@@ -757,7 +698,7 @@ static int fsl_sata_get_flush_ext(int dev)
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return sata->flush_ext;
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}
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-u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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+static u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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const void *buffer, int is_write)
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{
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u32 start, blks;
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@@ -792,8 +733,8 @@ u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
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return blkcnt;
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}
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-u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt, const void *buffer,
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- int is_write)
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+static u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt,
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+ const void *buffer, int is_write)
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{
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u32 start, blks;
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u8 *addr;
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Kim Phillips