MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family devices

This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

include/asm-ppc/immap_83xx.h

@@ -61,7 +61,9 @@ typedef struct sysconf83xx {
 	u32 spcr;		/* System Priority Configuration Register */
 	u32 sicrl;		/* System I/O Configuration Register Low */
 	u32 sicrh;		/* System I/O Configuration Register High */
-	u8 res6[0x0C];
+	u8 res6[0x04];
+	u32 sidcr0;		/* System I/O Delay Configuration Register 0 */
+	u32 sidcr1;		/* System I/O Delay Configuration Register 1 */
 	u32 ddrcdr;		/* DDR Control Driver Register */
 	u32 ddrdsr;		/* DDR Debug Status Register */
 	u32 obir;		/* Output Buffer Impedance Register */

include/mpc83xx.h

@@ -350,7 +350,9 @@
 /* ATR - Arbiter Timers Register
  */
 #define ATR_DTO				0x00FF0000	/* Data time out */
+#define ATR_DTO_SHIFT			16
 #define ATR_ATO				0x000000FF	/* Address time out */
+#define ATR_ATO_SHIFT			0
 
 /* AER - Arbiter Event Register
  */
@@ -364,10 +366,15 @@
 /* AEATR - Arbiter Event Address Register
  */
 #define AEATR_EVENT			0x07000000	/* Event type */
+#define AEATR_EVENT_SHIFT		24
 #define AEATR_MSTR_ID			0x001F0000	/* Master Id */
+#define AEATR_MSTR_ID_SHIFT		16
 #define AEATR_TBST			0x00000800	/* Transfer burst */
+#define AEATR_TBST_SHIFT		11
 #define AEATR_TSIZE			0x00000700	/* Transfer Size */
+#define AEATR_TSIZE_SHIFT		8
 #define AEATR_TTYPE			0x0000001F	/* Transfer Type */
+#define AEATR_TTYPE_SHIFT		0
 
 /* HRCWL - Hard Reset Configuration Word Low
  */