main.c 37 KB

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  1. /*
  2. * Copyright (c) 2008 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. /* mac80211 and PCI callbacks */
  17. #include <linux/nl80211.h>
  18. #include "core.h"
  19. #define ATH_PCI_VERSION "0.1"
  20. #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
  21. #define IEEE80211_ACTION_CAT_HT 7
  22. #define IEEE80211_ACTION_HT_TXCHWIDTH 0
  23. static char *dev_info = "ath9k";
  24. MODULE_AUTHOR("Atheros Communications");
  25. MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
  26. MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
  27. MODULE_LICENSE("Dual BSD/GPL");
  28. static struct pci_device_id ath_pci_id_table[] __devinitdata = {
  29. { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
  30. { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
  31. { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
  32. { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
  33. { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
  34. { 0 }
  35. };
  36. static int ath_get_channel(struct ath_softc *sc,
  37. struct ieee80211_channel *chan)
  38. {
  39. int i;
  40. for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
  41. if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
  42. return i;
  43. }
  44. return -1;
  45. }
  46. static u32 ath_get_extchanmode(struct ath_softc *sc,
  47. struct ieee80211_channel *chan)
  48. {
  49. u32 chanmode = 0;
  50. u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
  51. enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
  52. switch (chan->band) {
  53. case IEEE80211_BAND_2GHZ:
  54. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
  55. (tx_chan_width == ATH9K_HT_MACMODE_20))
  56. chanmode = CHANNEL_G_HT20;
  57. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
  58. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  59. chanmode = CHANNEL_G_HT40PLUS;
  60. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
  61. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  62. chanmode = CHANNEL_G_HT40MINUS;
  63. break;
  64. case IEEE80211_BAND_5GHZ:
  65. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
  66. (tx_chan_width == ATH9K_HT_MACMODE_20))
  67. chanmode = CHANNEL_A_HT20;
  68. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
  69. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  70. chanmode = CHANNEL_A_HT40PLUS;
  71. if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
  72. (tx_chan_width == ATH9K_HT_MACMODE_2040))
  73. chanmode = CHANNEL_A_HT40MINUS;
  74. break;
  75. default:
  76. break;
  77. }
  78. return chanmode;
  79. }
  80. static int ath_setkey_tkip(struct ath_softc *sc,
  81. struct ieee80211_key_conf *key,
  82. struct ath9k_keyval *hk,
  83. const u8 *addr)
  84. {
  85. u8 *key_rxmic = NULL;
  86. u8 *key_txmic = NULL;
  87. key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
  88. key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
  89. if (addr == NULL) {
  90. /* Group key installation */
  91. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  92. return ath_keyset(sc, key->keyidx, hk, addr);
  93. }
  94. if (!sc->sc_splitmic) {
  95. /*
  96. * data key goes at first index,
  97. * the hal handles the MIC keys at index+64.
  98. */
  99. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  100. memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
  101. return ath_keyset(sc, key->keyidx, hk, addr);
  102. }
  103. /*
  104. * TX key goes at first index, RX key at +32.
  105. * The hal handles the MIC keys at index+64.
  106. */
  107. memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
  108. if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
  109. /* Txmic entry failed. No need to proceed further */
  110. DPRINTF(sc, ATH_DBG_KEYCACHE,
  111. "%s Setting TX MIC Key Failed\n", __func__);
  112. return 0;
  113. }
  114. memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
  115. /* XXX delete tx key on failure? */
  116. return ath_keyset(sc, key->keyidx+32, hk, addr);
  117. }
  118. static int ath_key_config(struct ath_softc *sc,
  119. const u8 *addr,
  120. struct ieee80211_key_conf *key)
  121. {
  122. struct ieee80211_vif *vif;
  123. struct ath9k_keyval hk;
  124. const u8 *mac = NULL;
  125. int ret = 0;
  126. enum ieee80211_if_types opmode;
  127. memset(&hk, 0, sizeof(hk));
  128. switch (key->alg) {
  129. case ALG_WEP:
  130. hk.kv_type = ATH9K_CIPHER_WEP;
  131. break;
  132. case ALG_TKIP:
  133. hk.kv_type = ATH9K_CIPHER_TKIP;
  134. break;
  135. case ALG_CCMP:
  136. hk.kv_type = ATH9K_CIPHER_AES_CCM;
  137. break;
  138. default:
  139. return -EINVAL;
  140. }
  141. hk.kv_len = key->keylen;
  142. memcpy(hk.kv_val, key->key, key->keylen);
  143. if (!sc->sc_vaps[0])
  144. return -EIO;
  145. vif = sc->sc_vaps[0]->av_if_data;
  146. opmode = vif->type;
  147. /*
  148. * Strategy:
  149. * For _M_STA mc tx, we will not setup a key at all since we never
  150. * tx mc.
  151. * _M_STA mc rx, we will use the keyID.
  152. * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
  153. * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
  154. * peer node. BUT we will plumb a cleartext key so that we can do
  155. * perSta default key table lookup in software.
  156. */
  157. if (is_broadcast_ether_addr(addr)) {
  158. switch (opmode) {
  159. case IEEE80211_IF_TYPE_STA:
  160. /* default key: could be group WPA key
  161. * or could be static WEP key */
  162. mac = NULL;
  163. break;
  164. case IEEE80211_IF_TYPE_IBSS:
  165. break;
  166. case IEEE80211_IF_TYPE_AP:
  167. break;
  168. default:
  169. ASSERT(0);
  170. break;
  171. }
  172. } else {
  173. mac = addr;
  174. }
  175. if (key->alg == ALG_TKIP)
  176. ret = ath_setkey_tkip(sc, key, &hk, mac);
  177. else
  178. ret = ath_keyset(sc, key->keyidx, &hk, mac);
  179. if (!ret)
  180. return -EIO;
  181. sc->sc_keytype = hk.kv_type;
  182. return 0;
  183. }
  184. static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
  185. {
  186. int freeslot;
  187. freeslot = (key->keyidx >= 4) ? 1 : 0;
  188. ath_key_reset(sc, key->keyidx, freeslot);
  189. }
  190. static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
  191. {
  192. /* Until mac80211 includes these fields */
  193. #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
  194. #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
  195. #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
  196. ht_info->ht_supported = 1;
  197. ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
  198. |(u16)IEEE80211_HT_CAP_MIMO_PS
  199. |(u16)IEEE80211_HT_CAP_SGI_40
  200. |(u16)IEEE80211_HT_CAP_DSSSCCK40;
  201. ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
  202. ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
  203. /* setup supported mcs set */
  204. memset(ht_info->supp_mcs_set, 0, 16);
  205. ht_info->supp_mcs_set[0] = 0xff;
  206. ht_info->supp_mcs_set[1] = 0xff;
  207. ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
  208. }
  209. static int ath_rate2idx(struct ath_softc *sc, int rate)
  210. {
  211. int i = 0, cur_band, n_rates;
  212. struct ieee80211_hw *hw = sc->hw;
  213. cur_band = hw->conf.channel->band;
  214. n_rates = sc->sbands[cur_band].n_bitrates;
  215. for (i = 0; i < n_rates; i++) {
  216. if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
  217. break;
  218. }
  219. /*
  220. * NB:mac80211 validates rx rate index against the supported legacy rate
  221. * index only (should be done against ht rates also), return the highest
  222. * legacy rate index for rx rate which does not match any one of the
  223. * supported basic and extended rates to make mac80211 happy.
  224. * The following hack will be cleaned up once the issue with
  225. * the rx rate index validation in mac80211 is fixed.
  226. */
  227. if (i == n_rates)
  228. return n_rates - 1;
  229. return i;
  230. }
  231. static void ath9k_rx_prepare(struct ath_softc *sc,
  232. struct sk_buff *skb,
  233. struct ath_recv_status *status,
  234. struct ieee80211_rx_status *rx_status)
  235. {
  236. struct ieee80211_hw *hw = sc->hw;
  237. struct ieee80211_channel *curchan = hw->conf.channel;
  238. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  239. rx_status->mactime = status->tsf;
  240. rx_status->band = curchan->band;
  241. rx_status->freq = curchan->center_freq;
  242. rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
  243. rx_status->signal = rx_status->noise + status->rssi;
  244. rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
  245. rx_status->antenna = status->antenna;
  246. rx_status->qual = status->rssi * 100 / 64;
  247. if (status->flags & ATH_RX_MIC_ERROR)
  248. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  249. if (status->flags & ATH_RX_FCS_ERROR)
  250. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  251. rx_status->flag |= RX_FLAG_TSFT;
  252. }
  253. static u8 parse_mpdudensity(u8 mpdudensity)
  254. {
  255. /*
  256. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  257. * 0 for no restriction
  258. * 1 for 1/4 us
  259. * 2 for 1/2 us
  260. * 3 for 1 us
  261. * 4 for 2 us
  262. * 5 for 4 us
  263. * 6 for 8 us
  264. * 7 for 16 us
  265. */
  266. switch (mpdudensity) {
  267. case 0:
  268. return 0;
  269. case 1:
  270. case 2:
  271. case 3:
  272. /* Our lower layer calculations limit our precision to
  273. 1 microsecond */
  274. return 1;
  275. case 4:
  276. return 2;
  277. case 5:
  278. return 4;
  279. case 6:
  280. return 8;
  281. case 7:
  282. return 16;
  283. default:
  284. return 0;
  285. }
  286. }
  287. static int ath9k_start(struct ieee80211_hw *hw)
  288. {
  289. struct ath_softc *sc = hw->priv;
  290. struct ieee80211_channel *curchan = hw->conf.channel;
  291. int error = 0, pos;
  292. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
  293. "initial channel: %d MHz\n", __func__, curchan->center_freq);
  294. /* setup initial channel */
  295. pos = ath_get_channel(sc, curchan);
  296. if (pos == -1) {
  297. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
  298. return -EINVAL;
  299. }
  300. sc->sc_ah->ah_channels[pos].chanmode =
  301. (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
  302. /* open ath_dev */
  303. error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
  304. if (error) {
  305. DPRINTF(sc, ATH_DBG_FATAL,
  306. "%s: Unable to complete ath_open\n", __func__);
  307. return error;
  308. }
  309. ieee80211_wake_queues(hw);
  310. return 0;
  311. }
  312. static int ath9k_tx(struct ieee80211_hw *hw,
  313. struct sk_buff *skb)
  314. {
  315. struct ath_softc *sc = hw->priv;
  316. int hdrlen, padsize;
  317. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  318. /*
  319. * As a temporary workaround, assign seq# here; this will likely need
  320. * to be cleaned up to work better with Beacon transmission and virtual
  321. * BSSes.
  322. */
  323. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  324. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  325. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  326. sc->seq_no += 0x10;
  327. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  328. hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
  329. }
  330. /* Add the padding after the header if this is not already done */
  331. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  332. if (hdrlen & 3) {
  333. padsize = hdrlen % 4;
  334. if (skb_headroom(skb) < padsize)
  335. return -1;
  336. skb_push(skb, padsize);
  337. memmove(skb->data, skb->data + padsize, hdrlen);
  338. }
  339. DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
  340. __func__,
  341. skb);
  342. if (ath_tx_start(sc, skb) != 0) {
  343. DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
  344. dev_kfree_skb_any(skb);
  345. /* FIXME: Check for proper return value from ATH_DEV */
  346. return 0;
  347. }
  348. return 0;
  349. }
  350. static void ath9k_stop(struct ieee80211_hw *hw)
  351. {
  352. struct ath_softc *sc = hw->priv;
  353. int error;
  354. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
  355. error = ath_suspend(sc);
  356. if (error)
  357. DPRINTF(sc, ATH_DBG_CONFIG,
  358. "%s: Device is no longer present\n", __func__);
  359. ieee80211_stop_queues(hw);
  360. }
  361. static int ath9k_add_interface(struct ieee80211_hw *hw,
  362. struct ieee80211_if_init_conf *conf)
  363. {
  364. struct ath_softc *sc = hw->priv;
  365. int error, ic_opmode = 0;
  366. /* Support only vap for now */
  367. if (sc->sc_nvaps)
  368. return -ENOBUFS;
  369. switch (conf->type) {
  370. case IEEE80211_IF_TYPE_STA:
  371. ic_opmode = ATH9K_M_STA;
  372. break;
  373. case IEEE80211_IF_TYPE_IBSS:
  374. ic_opmode = ATH9K_M_IBSS;
  375. break;
  376. case IEEE80211_IF_TYPE_AP:
  377. ic_opmode = ATH9K_M_HOSTAP;
  378. break;
  379. default:
  380. DPRINTF(sc, ATH_DBG_FATAL,
  381. "%s: Interface type %d not yet supported\n",
  382. __func__, conf->type);
  383. return -EOPNOTSUPP;
  384. }
  385. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
  386. __func__,
  387. ic_opmode);
  388. error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
  389. if (error) {
  390. DPRINTF(sc, ATH_DBG_FATAL,
  391. "%s: Unable to attach vap, error: %d\n",
  392. __func__, error);
  393. return error;
  394. }
  395. return 0;
  396. }
  397. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  398. struct ieee80211_if_init_conf *conf)
  399. {
  400. struct ath_softc *sc = hw->priv;
  401. struct ath_vap *avp;
  402. int error;
  403. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
  404. avp = sc->sc_vaps[0];
  405. if (avp == NULL) {
  406. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  407. __func__);
  408. return;
  409. }
  410. #ifdef CONFIG_SLOW_ANT_DIV
  411. ath_slow_ant_div_stop(&sc->sc_antdiv);
  412. #endif
  413. /* Update ratectrl */
  414. ath_rate_newstate(sc, avp);
  415. /* Reclaim beacon resources */
  416. if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
  417. sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
  418. ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
  419. ath_beacon_return(sc, avp);
  420. }
  421. /* Set interrupt mask */
  422. sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  423. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
  424. sc->sc_flags &= ~SC_OP_BEACONS;
  425. error = ath_vap_detach(sc, 0);
  426. if (error)
  427. DPRINTF(sc, ATH_DBG_FATAL,
  428. "%s: Unable to detach vap, error: %d\n",
  429. __func__, error);
  430. }
  431. static int ath9k_config(struct ieee80211_hw *hw,
  432. struct ieee80211_conf *conf)
  433. {
  434. struct ath_softc *sc = hw->priv;
  435. struct ieee80211_channel *curchan = hw->conf.channel;
  436. int pos;
  437. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
  438. __func__,
  439. curchan->center_freq);
  440. pos = ath_get_channel(sc, curchan);
  441. if (pos == -1) {
  442. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
  443. return -EINVAL;
  444. }
  445. sc->sc_ah->ah_channels[pos].chanmode =
  446. (curchan->band == IEEE80211_BAND_2GHZ) ?
  447. CHANNEL_G : CHANNEL_A;
  448. if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
  449. sc->sc_ah->ah_channels[pos].chanmode =
  450. ath_get_extchanmode(sc, curchan);
  451. sc->sc_config.txpowlimit = 2 * conf->power_level;
  452. /* set h/w channel */
  453. if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
  454. DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
  455. __func__);
  456. return 0;
  457. }
  458. static int ath9k_config_interface(struct ieee80211_hw *hw,
  459. struct ieee80211_vif *vif,
  460. struct ieee80211_if_conf *conf)
  461. {
  462. struct ath_softc *sc = hw->priv;
  463. struct ath_hal *ah = sc->sc_ah;
  464. struct ath_vap *avp;
  465. u32 rfilt = 0;
  466. int error, i;
  467. DECLARE_MAC_BUF(mac);
  468. avp = sc->sc_vaps[0];
  469. if (avp == NULL) {
  470. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  471. __func__);
  472. return -EINVAL;
  473. }
  474. /* TODO: Need to decide which hw opmode to use for multi-interface
  475. * cases */
  476. if (vif->type == IEEE80211_IF_TYPE_AP &&
  477. ah->ah_opmode != ATH9K_M_HOSTAP) {
  478. ah->ah_opmode = ATH9K_M_HOSTAP;
  479. ath9k_hw_setopmode(ah);
  480. ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
  481. /* Request full reset to get hw opmode changed properly */
  482. sc->sc_flags |= SC_OP_FULL_RESET;
  483. }
  484. if ((conf->changed & IEEE80211_IFCC_BSSID) &&
  485. !is_zero_ether_addr(conf->bssid)) {
  486. switch (vif->type) {
  487. case IEEE80211_IF_TYPE_STA:
  488. case IEEE80211_IF_TYPE_IBSS:
  489. /* Update ratectrl about the new state */
  490. ath_rate_newstate(sc, avp);
  491. /* Set BSSID */
  492. memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
  493. sc->sc_curaid = 0;
  494. ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
  495. sc->sc_curaid);
  496. /* Set aggregation protection mode parameters */
  497. sc->sc_config.ath_aggr_prot = 0;
  498. /*
  499. * Reset our TSF so that its value is lower than the
  500. * beacon that we are trying to catch.
  501. * Only then hw will update its TSF register with the
  502. * new beacon. Reset the TSF before setting the BSSID
  503. * to avoid allowing in any frames that would update
  504. * our TSF only to have us clear it
  505. * immediately thereafter.
  506. */
  507. ath9k_hw_reset_tsf(sc->sc_ah);
  508. /* Disable BMISS interrupt when we're not associated */
  509. ath9k_hw_set_interrupts(sc->sc_ah,
  510. sc->sc_imask &
  511. ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
  512. sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  513. DPRINTF(sc, ATH_DBG_CONFIG,
  514. "%s: RX filter 0x%x bssid %s aid 0x%x\n",
  515. __func__, rfilt,
  516. print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
  517. /* need to reconfigure the beacon */
  518. sc->sc_flags &= ~SC_OP_BEACONS ;
  519. break;
  520. default:
  521. break;
  522. }
  523. }
  524. if ((conf->changed & IEEE80211_IFCC_BEACON) &&
  525. ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
  526. (vif->type == IEEE80211_IF_TYPE_AP))) {
  527. /*
  528. * Allocate and setup the beacon frame.
  529. *
  530. * Stop any previous beacon DMA. This may be
  531. * necessary, for example, when an ibss merge
  532. * causes reconfiguration; we may be called
  533. * with beacon transmission active.
  534. */
  535. ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
  536. error = ath_beacon_alloc(sc, 0);
  537. if (error != 0)
  538. return error;
  539. ath_beacon_sync(sc, 0);
  540. }
  541. /* Check for WLAN_CAPABILITY_PRIVACY ? */
  542. if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
  543. for (i = 0; i < IEEE80211_WEP_NKID; i++)
  544. if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
  545. ath9k_hw_keysetmac(sc->sc_ah,
  546. (u16)i,
  547. sc->sc_curbssid);
  548. }
  549. /* Only legacy IBSS for now */
  550. if (vif->type == IEEE80211_IF_TYPE_IBSS)
  551. ath_update_chainmask(sc, 0);
  552. return 0;
  553. }
  554. #define SUPPORTED_FILTERS \
  555. (FIF_PROMISC_IN_BSS | \
  556. FIF_ALLMULTI | \
  557. FIF_CONTROL | \
  558. FIF_OTHER_BSS | \
  559. FIF_BCN_PRBRESP_PROMISC | \
  560. FIF_FCSFAIL)
  561. /* FIXME: sc->sc_full_reset ? */
  562. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  563. unsigned int changed_flags,
  564. unsigned int *total_flags,
  565. int mc_count,
  566. struct dev_mc_list *mclist)
  567. {
  568. struct ath_softc *sc = hw->priv;
  569. u32 rfilt;
  570. changed_flags &= SUPPORTED_FILTERS;
  571. *total_flags &= SUPPORTED_FILTERS;
  572. sc->rx_filter = *total_flags;
  573. rfilt = ath_calcrxfilter(sc);
  574. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  575. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  576. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  577. ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
  578. }
  579. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
  580. __func__, sc->rx_filter);
  581. }
  582. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  583. struct ieee80211_vif *vif,
  584. enum sta_notify_cmd cmd,
  585. const u8 *addr)
  586. {
  587. struct ath_softc *sc = hw->priv;
  588. struct ath_node *an;
  589. unsigned long flags;
  590. DECLARE_MAC_BUF(mac);
  591. spin_lock_irqsave(&sc->node_lock, flags);
  592. an = ath_node_find(sc, (u8 *) addr);
  593. spin_unlock_irqrestore(&sc->node_lock, flags);
  594. switch (cmd) {
  595. case STA_NOTIFY_ADD:
  596. spin_lock_irqsave(&sc->node_lock, flags);
  597. if (!an) {
  598. ath_node_attach(sc, (u8 *)addr, 0);
  599. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
  600. __func__,
  601. print_mac(mac, addr));
  602. } else {
  603. ath_node_get(sc, (u8 *)addr);
  604. }
  605. spin_unlock_irqrestore(&sc->node_lock, flags);
  606. break;
  607. case STA_NOTIFY_REMOVE:
  608. if (!an)
  609. DPRINTF(sc, ATH_DBG_FATAL,
  610. "%s: Removal of a non-existent node\n",
  611. __func__);
  612. else {
  613. ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
  614. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
  615. __func__,
  616. print_mac(mac, addr));
  617. }
  618. break;
  619. default:
  620. break;
  621. }
  622. }
  623. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  624. u16 queue,
  625. const struct ieee80211_tx_queue_params *params)
  626. {
  627. struct ath_softc *sc = hw->priv;
  628. struct ath9k_tx_queue_info qi;
  629. int ret = 0, qnum;
  630. if (queue >= WME_NUM_AC)
  631. return 0;
  632. qi.tqi_aifs = params->aifs;
  633. qi.tqi_cwmin = params->cw_min;
  634. qi.tqi_cwmax = params->cw_max;
  635. qi.tqi_burstTime = params->txop;
  636. qnum = ath_get_hal_qnum(queue, sc);
  637. DPRINTF(sc, ATH_DBG_CONFIG,
  638. "%s: Configure tx [queue/halq] [%d/%d], "
  639. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  640. __func__,
  641. queue,
  642. qnum,
  643. params->aifs,
  644. params->cw_min,
  645. params->cw_max,
  646. params->txop);
  647. ret = ath_txq_update(sc, qnum, &qi);
  648. if (ret)
  649. DPRINTF(sc, ATH_DBG_FATAL,
  650. "%s: TXQ Update failed\n", __func__);
  651. return ret;
  652. }
  653. static int ath9k_set_key(struct ieee80211_hw *hw,
  654. enum set_key_cmd cmd,
  655. const u8 *local_addr,
  656. const u8 *addr,
  657. struct ieee80211_key_conf *key)
  658. {
  659. struct ath_softc *sc = hw->priv;
  660. int ret = 0;
  661. DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
  662. switch (cmd) {
  663. case SET_KEY:
  664. ret = ath_key_config(sc, addr, key);
  665. if (!ret) {
  666. set_bit(key->keyidx, sc->sc_keymap);
  667. key->hw_key_idx = key->keyidx;
  668. /* push IV and Michael MIC generation to stack */
  669. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  670. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  671. }
  672. break;
  673. case DISABLE_KEY:
  674. ath_key_delete(sc, key);
  675. clear_bit(key->keyidx, sc->sc_keymap);
  676. sc->sc_keytype = ATH9K_CIPHER_CLR;
  677. break;
  678. default:
  679. ret = -EINVAL;
  680. }
  681. return ret;
  682. }
  683. static void ath9k_ht_conf(struct ath_softc *sc,
  684. struct ieee80211_bss_conf *bss_conf)
  685. {
  686. #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
  687. struct ath_ht_info *ht_info = &sc->sc_ht_info;
  688. if (bss_conf->assoc_ht) {
  689. ht_info->ext_chan_offset =
  690. bss_conf->ht_bss_conf->bss_cap &
  691. IEEE80211_HT_IE_CHA_SEC_OFFSET;
  692. if (!(bss_conf->ht_conf->cap &
  693. IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
  694. (bss_conf->ht_bss_conf->bss_cap &
  695. IEEE80211_HT_IE_CHA_WIDTH))
  696. ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
  697. else
  698. ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
  699. ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
  700. ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
  701. bss_conf->ht_conf->ampdu_factor);
  702. ht_info->mpdudensity =
  703. parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
  704. }
  705. #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
  706. }
  707. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  708. struct ieee80211_bss_conf *bss_conf)
  709. {
  710. struct ieee80211_hw *hw = sc->hw;
  711. struct ieee80211_channel *curchan = hw->conf.channel;
  712. struct ath_vap *avp;
  713. int pos;
  714. DECLARE_MAC_BUF(mac);
  715. if (bss_conf->assoc) {
  716. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
  717. __func__,
  718. bss_conf->aid);
  719. avp = sc->sc_vaps[0];
  720. if (avp == NULL) {
  721. DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
  722. __func__);
  723. return;
  724. }
  725. /* New association, store aid */
  726. if (avp->av_opmode == ATH9K_M_STA) {
  727. sc->sc_curaid = bss_conf->aid;
  728. ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
  729. sc->sc_curaid);
  730. }
  731. /* Configure the beacon */
  732. ath_beacon_config(sc, 0);
  733. sc->sc_flags |= SC_OP_BEACONS;
  734. /* Reset rssi stats */
  735. sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
  736. sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
  737. sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
  738. sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
  739. /* Update chainmask */
  740. ath_update_chainmask(sc, bss_conf->assoc_ht);
  741. DPRINTF(sc, ATH_DBG_CONFIG,
  742. "%s: bssid %s aid 0x%x\n",
  743. __func__,
  744. print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
  745. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
  746. __func__,
  747. curchan->center_freq);
  748. pos = ath_get_channel(sc, curchan);
  749. if (pos == -1) {
  750. DPRINTF(sc, ATH_DBG_FATAL,
  751. "%s: Invalid channel\n", __func__);
  752. return;
  753. }
  754. if (hw->conf.ht_conf.ht_supported)
  755. sc->sc_ah->ah_channels[pos].chanmode =
  756. ath_get_extchanmode(sc, curchan);
  757. else
  758. sc->sc_ah->ah_channels[pos].chanmode =
  759. (curchan->band == IEEE80211_BAND_2GHZ) ?
  760. CHANNEL_G : CHANNEL_A;
  761. /* set h/w channel */
  762. if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
  763. DPRINTF(sc, ATH_DBG_FATAL,
  764. "%s: Unable to set channel\n",
  765. __func__);
  766. ath_rate_newstate(sc, avp);
  767. /* Update ratectrl about the new state */
  768. ath_rc_node_update(hw, avp->rc_node);
  769. } else {
  770. DPRINTF(sc, ATH_DBG_CONFIG,
  771. "%s: Bss Info DISSOC\n", __func__);
  772. sc->sc_curaid = 0;
  773. }
  774. }
  775. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  776. struct ieee80211_vif *vif,
  777. struct ieee80211_bss_conf *bss_conf,
  778. u32 changed)
  779. {
  780. struct ath_softc *sc = hw->priv;
  781. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  782. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
  783. __func__,
  784. bss_conf->use_short_preamble);
  785. if (bss_conf->use_short_preamble)
  786. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  787. else
  788. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  789. }
  790. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  791. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
  792. __func__,
  793. bss_conf->use_cts_prot);
  794. if (bss_conf->use_cts_prot &&
  795. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  796. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  797. else
  798. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  799. }
  800. if (changed & BSS_CHANGED_HT) {
  801. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
  802. __func__,
  803. bss_conf->assoc_ht);
  804. ath9k_ht_conf(sc, bss_conf);
  805. }
  806. if (changed & BSS_CHANGED_ASSOC) {
  807. DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
  808. __func__,
  809. bss_conf->assoc);
  810. ath9k_bss_assoc_info(sc, bss_conf);
  811. }
  812. }
  813. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  814. {
  815. u64 tsf;
  816. struct ath_softc *sc = hw->priv;
  817. struct ath_hal *ah = sc->sc_ah;
  818. tsf = ath9k_hw_gettsf64(ah);
  819. return tsf;
  820. }
  821. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  822. {
  823. struct ath_softc *sc = hw->priv;
  824. struct ath_hal *ah = sc->sc_ah;
  825. ath9k_hw_reset_tsf(ah);
  826. }
  827. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  828. enum ieee80211_ampdu_mlme_action action,
  829. const u8 *addr,
  830. u16 tid,
  831. u16 *ssn)
  832. {
  833. struct ath_softc *sc = hw->priv;
  834. int ret = 0;
  835. switch (action) {
  836. case IEEE80211_AMPDU_RX_START:
  837. ret = ath_rx_aggr_start(sc, addr, tid, ssn);
  838. if (ret < 0)
  839. DPRINTF(sc, ATH_DBG_FATAL,
  840. "%s: Unable to start RX aggregation\n",
  841. __func__);
  842. break;
  843. case IEEE80211_AMPDU_RX_STOP:
  844. ret = ath_rx_aggr_stop(sc, addr, tid);
  845. if (ret < 0)
  846. DPRINTF(sc, ATH_DBG_FATAL,
  847. "%s: Unable to stop RX aggregation\n",
  848. __func__);
  849. break;
  850. case IEEE80211_AMPDU_TX_START:
  851. ret = ath_tx_aggr_start(sc, addr, tid, ssn);
  852. if (ret < 0)
  853. DPRINTF(sc, ATH_DBG_FATAL,
  854. "%s: Unable to start TX aggregation\n",
  855. __func__);
  856. else
  857. ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
  858. break;
  859. case IEEE80211_AMPDU_TX_STOP:
  860. ret = ath_tx_aggr_stop(sc, addr, tid);
  861. if (ret < 0)
  862. DPRINTF(sc, ATH_DBG_FATAL,
  863. "%s: Unable to stop TX aggregation\n",
  864. __func__);
  865. ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
  866. break;
  867. default:
  868. DPRINTF(sc, ATH_DBG_FATAL,
  869. "%s: Unknown AMPDU action\n", __func__);
  870. }
  871. return ret;
  872. }
  873. static struct ieee80211_ops ath9k_ops = {
  874. .tx = ath9k_tx,
  875. .start = ath9k_start,
  876. .stop = ath9k_stop,
  877. .add_interface = ath9k_add_interface,
  878. .remove_interface = ath9k_remove_interface,
  879. .config = ath9k_config,
  880. .config_interface = ath9k_config_interface,
  881. .configure_filter = ath9k_configure_filter,
  882. .get_stats = NULL,
  883. .sta_notify = ath9k_sta_notify,
  884. .conf_tx = ath9k_conf_tx,
  885. .get_tx_stats = NULL,
  886. .bss_info_changed = ath9k_bss_info_changed,
  887. .set_tim = NULL,
  888. .set_key = ath9k_set_key,
  889. .hw_scan = NULL,
  890. .get_tkip_seq = NULL,
  891. .set_rts_threshold = NULL,
  892. .set_frag_threshold = NULL,
  893. .set_retry_limit = NULL,
  894. .get_tsf = ath9k_get_tsf,
  895. .reset_tsf = ath9k_reset_tsf,
  896. .tx_last_beacon = NULL,
  897. .ampdu_action = ath9k_ampdu_action
  898. };
  899. void ath_get_beaconconfig(struct ath_softc *sc,
  900. int if_id,
  901. struct ath_beacon_config *conf)
  902. {
  903. struct ieee80211_hw *hw = sc->hw;
  904. /* fill in beacon config data */
  905. conf->beacon_interval = hw->conf.beacon_int;
  906. conf->listen_interval = 100;
  907. conf->dtim_count = 1;
  908. conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
  909. }
  910. void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
  911. struct ath_xmit_status *tx_status, struct ath_node *an)
  912. {
  913. struct ieee80211_hw *hw = sc->hw;
  914. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  915. DPRINTF(sc, ATH_DBG_XMIT,
  916. "%s: TX complete: skb: %p\n", __func__, skb);
  917. if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
  918. tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
  919. /* free driver's private data area of tx_info */
  920. if (tx_info->driver_data[0] != NULL)
  921. kfree(tx_info->driver_data[0]);
  922. tx_info->driver_data[0] = NULL;
  923. }
  924. if (tx_status->flags & ATH_TX_BAR) {
  925. tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
  926. tx_status->flags &= ~ATH_TX_BAR;
  927. }
  928. if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
  929. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  930. /* Frame was not ACKed, but an ACK was expected */
  931. tx_info->status.excessive_retries = 1;
  932. }
  933. } else {
  934. /* Frame was ACKed */
  935. tx_info->flags |= IEEE80211_TX_STAT_ACK;
  936. }
  937. tx_info->status.retry_count = tx_status->retries;
  938. ieee80211_tx_status(hw, skb);
  939. if (an)
  940. ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
  941. }
  942. int ath__rx_indicate(struct ath_softc *sc,
  943. struct sk_buff *skb,
  944. struct ath_recv_status *status,
  945. u16 keyix)
  946. {
  947. struct ieee80211_hw *hw = sc->hw;
  948. struct ath_node *an = NULL;
  949. struct ieee80211_rx_status rx_status;
  950. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  951. int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  952. int padsize;
  953. enum ATH_RX_TYPE st;
  954. /* see if any padding is done by the hw and remove it */
  955. if (hdrlen & 3) {
  956. padsize = hdrlen % 4;
  957. memmove(skb->data + padsize, skb->data, hdrlen);
  958. skb_pull(skb, padsize);
  959. }
  960. /* remove FCS before passing up to protocol stack */
  961. skb_trim(skb, (skb->len - FCS_LEN));
  962. /* Prepare rx status */
  963. ath9k_rx_prepare(sc, skb, status, &rx_status);
  964. if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
  965. !(status->flags & ATH_RX_DECRYPT_ERROR)) {
  966. rx_status.flag |= RX_FLAG_DECRYPTED;
  967. } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
  968. && !(status->flags & ATH_RX_DECRYPT_ERROR)
  969. && skb->len >= hdrlen + 4) {
  970. keyix = skb->data[hdrlen + 3] >> 6;
  971. if (test_bit(keyix, sc->sc_keymap))
  972. rx_status.flag |= RX_FLAG_DECRYPTED;
  973. }
  974. spin_lock_bh(&sc->node_lock);
  975. an = ath_node_find(sc, hdr->addr2);
  976. spin_unlock_bh(&sc->node_lock);
  977. if (an) {
  978. ath_rx_input(sc, an,
  979. hw->conf.ht_conf.ht_supported,
  980. skb, status, &st);
  981. }
  982. if (!an || (st != ATH_RX_CONSUMED))
  983. __ieee80211_rx(hw, skb, &rx_status);
  984. return 0;
  985. }
  986. int ath_rx_subframe(struct ath_node *an,
  987. struct sk_buff *skb,
  988. struct ath_recv_status *status)
  989. {
  990. struct ath_softc *sc = an->an_sc;
  991. struct ieee80211_hw *hw = sc->hw;
  992. struct ieee80211_rx_status rx_status;
  993. /* Prepare rx status */
  994. ath9k_rx_prepare(sc, skb, status, &rx_status);
  995. if (!(status->flags & ATH_RX_DECRYPT_ERROR))
  996. rx_status.flag |= RX_FLAG_DECRYPTED;
  997. __ieee80211_rx(hw, skb, &rx_status);
  998. return 0;
  999. }
  1000. enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
  1001. {
  1002. return sc->sc_ht_info.tx_chan_width;
  1003. }
  1004. static int ath_detach(struct ath_softc *sc)
  1005. {
  1006. struct ieee80211_hw *hw = sc->hw;
  1007. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
  1008. /* Unregister hw */
  1009. ieee80211_unregister_hw(hw);
  1010. /* unregister Rate control */
  1011. ath_rate_control_unregister();
  1012. /* tx/rx cleanup */
  1013. ath_rx_cleanup(sc);
  1014. ath_tx_cleanup(sc);
  1015. /* Deinit */
  1016. ath_deinit(sc);
  1017. return 0;
  1018. }
  1019. static int ath_attach(u16 devid,
  1020. struct ath_softc *sc)
  1021. {
  1022. struct ieee80211_hw *hw = sc->hw;
  1023. int error = 0;
  1024. DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
  1025. error = ath_init(devid, sc);
  1026. if (error != 0)
  1027. return error;
  1028. /* Init nodes */
  1029. INIT_LIST_HEAD(&sc->node_list);
  1030. spin_lock_init(&sc->node_lock);
  1031. /* get mac address from hardware and set in mac80211 */
  1032. SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
  1033. /* setup channels and rates */
  1034. sc->sbands[IEEE80211_BAND_2GHZ].channels =
  1035. sc->channels[IEEE80211_BAND_2GHZ];
  1036. sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
  1037. sc->rates[IEEE80211_BAND_2GHZ];
  1038. sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
  1039. if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
  1040. /* Setup HT capabilities for 2.4Ghz*/
  1041. setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
  1042. hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  1043. &sc->sbands[IEEE80211_BAND_2GHZ];
  1044. if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
  1045. sc->sbands[IEEE80211_BAND_5GHZ].channels =
  1046. sc->channels[IEEE80211_BAND_5GHZ];
  1047. sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
  1048. sc->rates[IEEE80211_BAND_5GHZ];
  1049. sc->sbands[IEEE80211_BAND_5GHZ].band =
  1050. IEEE80211_BAND_5GHZ;
  1051. if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
  1052. /* Setup HT capabilities for 5Ghz*/
  1053. setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
  1054. hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  1055. &sc->sbands[IEEE80211_BAND_5GHZ];
  1056. }
  1057. /* FIXME: Have to figure out proper hw init values later */
  1058. hw->queues = 4;
  1059. hw->ampdu_queues = 1;
  1060. /* Register rate control */
  1061. hw->rate_control_algorithm = "ath9k_rate_control";
  1062. error = ath_rate_control_register();
  1063. if (error != 0) {
  1064. DPRINTF(sc, ATH_DBG_FATAL,
  1065. "%s: Unable to register rate control "
  1066. "algorithm:%d\n", __func__, error);
  1067. ath_rate_control_unregister();
  1068. goto bad;
  1069. }
  1070. error = ieee80211_register_hw(hw);
  1071. if (error != 0) {
  1072. ath_rate_control_unregister();
  1073. goto bad;
  1074. }
  1075. /* initialize tx/rx engine */
  1076. error = ath_tx_init(sc, ATH_TXBUF);
  1077. if (error != 0)
  1078. goto bad1;
  1079. error = ath_rx_init(sc, ATH_RXBUF);
  1080. if (error != 0)
  1081. goto bad1;
  1082. return 0;
  1083. bad1:
  1084. ath_detach(sc);
  1085. bad:
  1086. return error;
  1087. }
  1088. static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  1089. {
  1090. void __iomem *mem;
  1091. struct ath_softc *sc;
  1092. struct ieee80211_hw *hw;
  1093. const char *athname;
  1094. u8 csz;
  1095. u32 val;
  1096. int ret = 0;
  1097. if (pci_enable_device(pdev))
  1098. return -EIO;
  1099. /* XXX 32-bit addressing only */
  1100. if (pci_set_dma_mask(pdev, 0xffffffff)) {
  1101. printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
  1102. ret = -ENODEV;
  1103. goto bad;
  1104. }
  1105. /*
  1106. * Cache line size is used to size and align various
  1107. * structures used to communicate with the hardware.
  1108. */
  1109. pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
  1110. if (csz == 0) {
  1111. /*
  1112. * Linux 2.4.18 (at least) writes the cache line size
  1113. * register as a 16-bit wide register which is wrong.
  1114. * We must have this setup properly for rx buffer
  1115. * DMA to work so force a reasonable value here if it
  1116. * comes up zero.
  1117. */
  1118. csz = L1_CACHE_BYTES / sizeof(u32);
  1119. pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
  1120. }
  1121. /*
  1122. * The default setting of latency timer yields poor results,
  1123. * set it to the value used by other systems. It may be worth
  1124. * tweaking this setting more.
  1125. */
  1126. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
  1127. pci_set_master(pdev);
  1128. /*
  1129. * Disable the RETRY_TIMEOUT register (0x41) to keep
  1130. * PCI Tx retries from interfering with C3 CPU state.
  1131. */
  1132. pci_read_config_dword(pdev, 0x40, &val);
  1133. if ((val & 0x0000ff00) != 0)
  1134. pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
  1135. ret = pci_request_region(pdev, 0, "ath9k");
  1136. if (ret) {
  1137. dev_err(&pdev->dev, "PCI memory region reserve error\n");
  1138. ret = -ENODEV;
  1139. goto bad;
  1140. }
  1141. mem = pci_iomap(pdev, 0, 0);
  1142. if (!mem) {
  1143. printk(KERN_ERR "PCI memory map error\n") ;
  1144. ret = -EIO;
  1145. goto bad1;
  1146. }
  1147. hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
  1148. if (hw == NULL) {
  1149. printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
  1150. goto bad2;
  1151. }
  1152. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  1153. IEEE80211_HW_NOISE_DBM;
  1154. SET_IEEE80211_DEV(hw, &pdev->dev);
  1155. pci_set_drvdata(pdev, hw);
  1156. sc = hw->priv;
  1157. sc->hw = hw;
  1158. sc->pdev = pdev;
  1159. sc->mem = mem;
  1160. if (ath_attach(id->device, sc) != 0) {
  1161. ret = -ENODEV;
  1162. goto bad3;
  1163. }
  1164. /* setup interrupt service routine */
  1165. if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
  1166. printk(KERN_ERR "%s: request_irq failed\n",
  1167. wiphy_name(hw->wiphy));
  1168. ret = -EIO;
  1169. goto bad4;
  1170. }
  1171. athname = ath9k_hw_probe(id->vendor, id->device);
  1172. printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
  1173. wiphy_name(hw->wiphy),
  1174. athname ? athname : "Atheros ???",
  1175. (unsigned long)mem, pdev->irq);
  1176. return 0;
  1177. bad4:
  1178. ath_detach(sc);
  1179. bad3:
  1180. ieee80211_free_hw(hw);
  1181. bad2:
  1182. pci_iounmap(pdev, mem);
  1183. bad1:
  1184. pci_release_region(pdev, 0);
  1185. bad:
  1186. pci_disable_device(pdev);
  1187. return ret;
  1188. }
  1189. static void ath_pci_remove(struct pci_dev *pdev)
  1190. {
  1191. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  1192. struct ath_softc *sc = hw->priv;
  1193. if (pdev->irq)
  1194. free_irq(pdev->irq, sc);
  1195. ath_detach(sc);
  1196. pci_iounmap(pdev, sc->mem);
  1197. pci_release_region(pdev, 0);
  1198. pci_disable_device(pdev);
  1199. ieee80211_free_hw(hw);
  1200. }
  1201. #ifdef CONFIG_PM
  1202. static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  1203. {
  1204. pci_save_state(pdev);
  1205. pci_disable_device(pdev);
  1206. pci_set_power_state(pdev, 3);
  1207. return 0;
  1208. }
  1209. static int ath_pci_resume(struct pci_dev *pdev)
  1210. {
  1211. u32 val;
  1212. int err;
  1213. err = pci_enable_device(pdev);
  1214. if (err)
  1215. return err;
  1216. pci_restore_state(pdev);
  1217. /*
  1218. * Suspend/Resume resets the PCI configuration space, so we have to
  1219. * re-disable the RETRY_TIMEOUT register (0x41) to keep
  1220. * PCI Tx retries from interfering with C3 CPU state
  1221. */
  1222. pci_read_config_dword(pdev, 0x40, &val);
  1223. if ((val & 0x0000ff00) != 0)
  1224. pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
  1225. return 0;
  1226. }
  1227. #endif /* CONFIG_PM */
  1228. MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
  1229. static struct pci_driver ath_pci_driver = {
  1230. .name = "ath9k",
  1231. .id_table = ath_pci_id_table,
  1232. .probe = ath_pci_probe,
  1233. .remove = ath_pci_remove,
  1234. #ifdef CONFIG_PM
  1235. .suspend = ath_pci_suspend,
  1236. .resume = ath_pci_resume,
  1237. #endif /* CONFIG_PM */
  1238. };
  1239. static int __init init_ath_pci(void)
  1240. {
  1241. printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
  1242. if (pci_register_driver(&ath_pci_driver) < 0) {
  1243. printk(KERN_ERR
  1244. "ath_pci: No devices found, driver not installed.\n");
  1245. pci_unregister_driver(&ath_pci_driver);
  1246. return -ENODEV;
  1247. }
  1248. return 0;
  1249. }
  1250. module_init(init_ath_pci);
  1251. static void __exit exit_ath_pci(void)
  1252. {
  1253. pci_unregister_driver(&ath_pci_driver);
  1254. printk(KERN_INFO "%s: driver unloaded\n", dev_info);
  1255. }
  1256. module_exit(exit_ath_pci);