core.c 4.9 KB

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  1. /*
  2. * arch/arm/mach-pnx4008/core.c
  3. *
  4. * PNX4008 core startup code
  5. *
  6. * Authors: Vitaly Wool, Dmitry Chigirev,
  7. * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
  8. *
  9. * Based on reference code received from Philips:
  10. * Copyright (C) 2003 Philips Semiconductors
  11. *
  12. * 2005 (c) MontaVista Software, Inc. This file is licensed under
  13. * the terms of the GNU General Public License version 2. This program
  14. * is licensed "as is" without any warranty of any kind, whether express
  15. * or implied.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/mm.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/list.h>
  22. #include <linux/init.h>
  23. #include <linux/ioport.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/device.h>
  26. #include <linux/spi/spi.h>
  27. #include <asm/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/io.h>
  30. #include <asm/setup.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/page.h>
  34. #include <asm/system.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/irq.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/time.h>
  39. #include <asm/arch/irq.h>
  40. #include <asm/arch/clock.h>
  41. #include <asm/arch/dma.h>
  42. struct resource spipnx_0_resources[] = {
  43. {
  44. .start = PNX4008_SPI1_BASE,
  45. .end = PNX4008_SPI1_BASE + SZ_4K,
  46. .flags = IORESOURCE_MEM,
  47. }, {
  48. .start = PER_SPI1_REC_XMIT,
  49. .flags = IORESOURCE_DMA,
  50. }, {
  51. .start = SPI1_INT,
  52. .flags = IORESOURCE_IRQ,
  53. }, {
  54. .flags = 0,
  55. },
  56. };
  57. struct resource spipnx_1_resources[] = {
  58. {
  59. .start = PNX4008_SPI2_BASE,
  60. .end = PNX4008_SPI2_BASE + SZ_4K,
  61. .flags = IORESOURCE_MEM,
  62. }, {
  63. .start = PER_SPI2_REC_XMIT,
  64. .flags = IORESOURCE_DMA,
  65. }, {
  66. .start = SPI2_INT,
  67. .flags = IORESOURCE_IRQ,
  68. }, {
  69. .flags = 0,
  70. }
  71. };
  72. static struct spi_board_info spi_board_info[] __initdata = {
  73. {
  74. .modalias = "m25p80",
  75. .max_speed_hz = 1000000,
  76. .bus_num = 1,
  77. .chip_select = 0,
  78. },
  79. };
  80. static struct platform_device spipnx_1 = {
  81. .name = "spipnx",
  82. .id = 1,
  83. .num_resources = ARRAY_SIZE(spipnx_0_resources),
  84. .resource = spipnx_0_resources,
  85. .dev = {
  86. .coherent_dma_mask = 0xFFFFFFFF,
  87. },
  88. };
  89. static struct platform_device spipnx_2 = {
  90. .name = "spipnx",
  91. .id = 2,
  92. .num_resources = ARRAY_SIZE(spipnx_1_resources),
  93. .resource = spipnx_1_resources,
  94. .dev = {
  95. .coherent_dma_mask = 0xFFFFFFFF,
  96. },
  97. };
  98. static struct plat_serial8250_port platform_serial_ports[] = {
  99. {
  100. .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE)),
  101. .mapbase = (unsigned long)PNX4008_UART5_BASE,
  102. .irq = IIR5_INT,
  103. .uartclk = PNX4008_UART_CLK,
  104. .regshift = 2,
  105. .iotype = UPIO_MEM,
  106. .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
  107. },
  108. {
  109. .membase = (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE)),
  110. .mapbase = (unsigned long)PNX4008_UART3_BASE,
  111. .irq = IIR3_INT,
  112. .uartclk = PNX4008_UART_CLK,
  113. .regshift = 2,
  114. .iotype = UPIO_MEM,
  115. .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | UPF_SKIP_TEST,
  116. },
  117. {}
  118. };
  119. static struct platform_device serial_device = {
  120. .name = "serial8250",
  121. .id = PLAT8250_DEV_PLATFORM,
  122. .dev = {
  123. .platform_data = &platform_serial_ports,
  124. },
  125. };
  126. static struct platform_device *devices[] __initdata = {
  127. &spipnx_1,
  128. &spipnx_2,
  129. &serial_device,
  130. };
  131. extern void pnx4008_uart_init(void);
  132. static void __init pnx4008_init(void)
  133. {
  134. /*disable all START interrupt sources,
  135. and clear all START interrupt flags */
  136. __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT));
  137. __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT));
  138. __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT));
  139. __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT));
  140. platform_add_devices(devices, ARRAY_SIZE(devices));
  141. spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
  142. /* Switch on the UART clocks */
  143. pnx4008_uart_init();
  144. }
  145. static struct map_desc pnx4008_io_desc[] __initdata = {
  146. {
  147. .virtual = IO_ADDRESS(PNX4008_IRAM_BASE),
  148. .pfn = __phys_to_pfn(PNX4008_IRAM_BASE),
  149. .length = SZ_64K,
  150. .type = MT_DEVICE,
  151. }, {
  152. .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE),
  153. .pfn = __phys_to_pfn(PNX4008_NDF_FLASH_BASE),
  154. .length = SZ_1M - SZ_128K,
  155. .type = MT_DEVICE,
  156. }, {
  157. .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE),
  158. .pfn = __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE),
  159. .length = SZ_128K * 3,
  160. .type = MT_DEVICE,
  161. }, {
  162. .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE),
  163. .pfn = __phys_to_pfn(PNX4008_DMA_CONFIG_BASE),
  164. .length = SZ_1M,
  165. .type = MT_DEVICE,
  166. }, {
  167. .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE),
  168. .pfn = __phys_to_pfn(PNX4008_AHB2FAB_BASE),
  169. .length = SZ_1M,
  170. .type = MT_DEVICE,
  171. },
  172. };
  173. void __init pnx4008_map_io(void)
  174. {
  175. iotable_init(pnx4008_io_desc, ARRAY_SIZE(pnx4008_io_desc));
  176. }
  177. extern struct sys_timer pnx4008_timer;
  178. MACHINE_START(PNX4008, "Philips PNX4008")
  179. /* Maintainer: MontaVista Software Inc. */
  180. .phys_io = 0x40090000,
  181. .io_pg_offst = (0xf4090000 >> 18) & 0xfffc,
  182. .boot_params = 0x80000100,
  183. .map_io = pnx4008_map_io,
  184. .init_irq = pnx4008_init_irq,
  185. .init_machine = pnx4008_init,
  186. .timer = &pnx4008_timer,
  187. MACHINE_END