ohci-pci.c 6.8 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. * PCI Bus Glue
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #ifdef CONFIG_PMAC_PBOOK
  17. #include <asm/machdep.h>
  18. #include <asm/pmac_feature.h>
  19. #include <asm/pci-bridge.h>
  20. #include <asm/prom.h>
  21. #ifndef CONFIG_PM
  22. # define CONFIG_PM
  23. #endif
  24. #endif
  25. #ifndef CONFIG_PCI
  26. #error "This file is PCI bus glue. CONFIG_PCI must be defined."
  27. #endif
  28. /*-------------------------------------------------------------------------*/
  29. static int
  30. ohci_pci_reset (struct usb_hcd *hcd)
  31. {
  32. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  33. ohci_hcd_init (ohci);
  34. return ohci_init (ohci);
  35. }
  36. static int __devinit
  37. ohci_pci_start (struct usb_hcd *hcd)
  38. {
  39. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  40. int ret;
  41. if(hcd->self.controller && hcd->self.controller->bus == &pci_bus_type) {
  42. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  43. /* AMD 756, for most chips (early revs), corrupts register
  44. * values on read ... so enable the vendor workaround.
  45. */
  46. if (pdev->vendor == PCI_VENDOR_ID_AMD
  47. && pdev->device == 0x740c) {
  48. ohci->flags = OHCI_QUIRK_AMD756;
  49. ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  50. // also somewhat erratum 10 (suspend/resume issues)
  51. }
  52. /* FIXME for some of the early AMD 760 southbridges, OHCI
  53. * won't work at all. blacklist them.
  54. */
  55. /* Apple's OHCI driver has a lot of bizarre workarounds
  56. * for this chip. Evidently control and bulk lists
  57. * can get confused. (B&W G3 models, and ...)
  58. */
  59. else if (pdev->vendor == PCI_VENDOR_ID_OPTI
  60. && pdev->device == 0xc861) {
  61. ohci_dbg (ohci,
  62. "WARNING: OPTi workarounds unavailable\n");
  63. }
  64. /* Check for NSC87560. We have to look at the bridge (fn1) to
  65. * identify the USB (fn2). This quirk might apply to more or
  66. * even all NSC stuff.
  67. */
  68. else if (pdev->vendor == PCI_VENDOR_ID_NS) {
  69. struct pci_dev *b;
  70. b = pci_find_slot (pdev->bus->number,
  71. PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  72. if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  73. && b->vendor == PCI_VENDOR_ID_NS) {
  74. ohci->flags |= OHCI_QUIRK_SUPERIO;
  75. ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  76. }
  77. }
  78. /* Check for Compaq's ZFMicro chipset, which needs short
  79. * delays before control or bulk queues get re-activated
  80. * in finish_unlinks()
  81. */
  82. else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
  83. && pdev->device == 0xa0f8) {
  84. ohci->flags |= OHCI_QUIRK_ZFMICRO;
  85. ohci_dbg (ohci,
  86. "enabled Compaq ZFMicro chipset quirk\n");
  87. }
  88. }
  89. /* NOTE: there may have already been a first reset, to
  90. * keep bios/smm irqs from making trouble
  91. */
  92. if ((ret = ohci_run (ohci)) < 0) {
  93. ohci_err (ohci, "can't start\n");
  94. ohci_stop (hcd);
  95. return ret;
  96. }
  97. return 0;
  98. }
  99. #ifdef CONFIG_PM
  100. static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
  101. {
  102. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  103. /* suspend root hub, hoping it keeps power during suspend */
  104. if (time_before (jiffies, ohci->next_statechange))
  105. msleep (100);
  106. #ifdef CONFIG_USB_SUSPEND
  107. (void) usb_suspend_device (hcd->self.root_hub, message);
  108. #else
  109. usb_lock_device (hcd->self.root_hub);
  110. (void) ohci_hub_suspend (hcd);
  111. usb_unlock_device (hcd->self.root_hub);
  112. #endif
  113. /* let things settle down a bit */
  114. msleep (100);
  115. #ifdef CONFIG_PMAC_PBOOK
  116. if (_machine == _MACH_Pmac) {
  117. struct device_node *of_node;
  118. /* Disable USB PAD & cell clock */
  119. of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
  120. if (of_node)
  121. pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
  122. }
  123. #endif /* CONFIG_PMAC_PBOOK */
  124. return 0;
  125. }
  126. static int ohci_pci_resume (struct usb_hcd *hcd)
  127. {
  128. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  129. int retval = 0;
  130. #ifdef CONFIG_PMAC_PBOOK
  131. if (_machine == _MACH_Pmac) {
  132. struct device_node *of_node;
  133. /* Re-enable USB PAD & cell clock */
  134. of_node = pci_device_to_OF_node (to_pci_dev(hcd->self.controller));
  135. if (of_node)
  136. pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1);
  137. }
  138. #endif /* CONFIG_PMAC_PBOOK */
  139. /* resume root hub */
  140. if (time_before (jiffies, ohci->next_statechange))
  141. msleep (100);
  142. #ifdef CONFIG_USB_SUSPEND
  143. /* get extra cleanup even if remote wakeup isn't in use */
  144. retval = usb_resume_device (hcd->self.root_hub);
  145. #else
  146. usb_lock_device (hcd->self.root_hub);
  147. retval = ohci_hub_resume (hcd);
  148. usb_unlock_device (hcd->self.root_hub);
  149. #endif
  150. return retval;
  151. }
  152. #endif /* CONFIG_PM */
  153. /*-------------------------------------------------------------------------*/
  154. static const struct hc_driver ohci_pci_hc_driver = {
  155. .description = hcd_name,
  156. .product_desc = "OHCI Host Controller",
  157. .hcd_priv_size = sizeof(struct ohci_hcd),
  158. /*
  159. * generic hardware linkage
  160. */
  161. .irq = ohci_irq,
  162. .flags = HCD_MEMORY | HCD_USB11,
  163. /*
  164. * basic lifecycle operations
  165. */
  166. .reset = ohci_pci_reset,
  167. .start = ohci_pci_start,
  168. #ifdef CONFIG_PM
  169. .suspend = ohci_pci_suspend,
  170. .resume = ohci_pci_resume,
  171. #endif
  172. .stop = ohci_stop,
  173. /*
  174. * managing i/o requests and associated device resources
  175. */
  176. .urb_enqueue = ohci_urb_enqueue,
  177. .urb_dequeue = ohci_urb_dequeue,
  178. .endpoint_disable = ohci_endpoint_disable,
  179. /*
  180. * scheduling support
  181. */
  182. .get_frame_number = ohci_get_frame,
  183. /*
  184. * root hub support
  185. */
  186. .hub_status_data = ohci_hub_status_data,
  187. .hub_control = ohci_hub_control,
  188. #ifdef CONFIG_USB_SUSPEND
  189. .hub_suspend = ohci_hub_suspend,
  190. .hub_resume = ohci_hub_resume,
  191. #endif
  192. .start_port_reset = ohci_start_port_reset,
  193. };
  194. /*-------------------------------------------------------------------------*/
  195. static const struct pci_device_id pci_ids [] = { {
  196. /* handle any USB OHCI controller */
  197. PCI_DEVICE_CLASS((PCI_CLASS_SERIAL_USB << 8) | 0x10, ~0),
  198. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  199. }, { /* end: all zeroes */ }
  200. };
  201. MODULE_DEVICE_TABLE (pci, pci_ids);
  202. /* pci driver glue; this is a "new style" PCI driver module */
  203. static struct pci_driver ohci_pci_driver = {
  204. .name = (char *) hcd_name,
  205. .id_table = pci_ids,
  206. .probe = usb_hcd_pci_probe,
  207. .remove = usb_hcd_pci_remove,
  208. #ifdef CONFIG_PM
  209. .suspend = usb_hcd_pci_suspend,
  210. .resume = usb_hcd_pci_resume,
  211. #endif
  212. };
  213. static int __init ohci_hcd_pci_init (void)
  214. {
  215. printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
  216. if (usb_disabled())
  217. return -ENODEV;
  218. pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
  219. sizeof (struct ed), sizeof (struct td));
  220. return pci_register_driver (&ohci_pci_driver);
  221. }
  222. module_init (ohci_hcd_pci_init);
  223. /*-------------------------------------------------------------------------*/
  224. static void __exit ohci_hcd_pci_cleanup (void)
  225. {
  226. pci_unregister_driver (&ohci_pci_driver);
  227. }
  228. module_exit (ohci_hcd_pci_cleanup);