fw_common.c 23 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/firmware.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../base.h"
  34. #include "../rtl8192ce/reg.h"
  35. #include "../rtl8192ce/def.h"
  36. #include "fw_common.h"
  37. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  38. {
  39. struct rtl_priv *rtlpriv = rtl_priv(hw);
  40. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  41. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  42. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  43. if (enable)
  44. value32 |= MCUFWDL_EN;
  45. else
  46. value32 &= ~MCUFWDL_EN;
  47. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  48. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  49. u8 tmp;
  50. if (enable) {
  51. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  52. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  53. tmp | 0x04);
  54. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  55. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  56. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  57. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  58. } else {
  59. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  60. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  62. }
  63. }
  64. }
  65. static void rtl_block_fw_writeN(struct ieee80211_hw *hw, const u8 *buffer,
  66. u32 size)
  67. {
  68. struct rtl_priv *rtlpriv = rtl_priv(hw);
  69. u32 blockSize = REALTEK_USB_VENQT_MAX_BUF_SIZE - 20;
  70. u8 *bufferPtr = (u8 *) buffer;
  71. u32 i, offset, blockCount, remainSize;
  72. blockCount = size / blockSize;
  73. remainSize = size % blockSize;
  74. for (i = 0; i < blockCount; i++) {
  75. offset = i * blockSize;
  76. rtlpriv->io.writeN_sync(rtlpriv,
  77. (FW_8192C_START_ADDRESS + offset),
  78. (void *)(bufferPtr + offset),
  79. blockSize);
  80. }
  81. if (remainSize) {
  82. offset = blockCount * blockSize;
  83. rtlpriv->io.writeN_sync(rtlpriv,
  84. (FW_8192C_START_ADDRESS + offset),
  85. (void *)(bufferPtr + offset),
  86. remainSize);
  87. }
  88. }
  89. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  90. const u8 *buffer, u32 size)
  91. {
  92. struct rtl_priv *rtlpriv = rtl_priv(hw);
  93. u32 blockSize = sizeof(u32);
  94. u8 *bufferPtr = (u8 *) buffer;
  95. u32 *pu4BytePtr = (u32 *) buffer;
  96. u32 i, offset, blockCount, remainSize;
  97. if (rtlpriv->io.writeN_sync) {
  98. rtl_block_fw_writeN(hw, buffer, size);
  99. return;
  100. }
  101. blockCount = size / blockSize;
  102. remainSize = size % blockSize;
  103. for (i = 0; i < blockCount; i++) {
  104. offset = i * blockSize;
  105. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  106. *(pu4BytePtr + i));
  107. }
  108. if (remainSize) {
  109. offset = blockCount * blockSize;
  110. bufferPtr += offset;
  111. for (i = 0; i < remainSize; i++) {
  112. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  113. offset + i), *(bufferPtr + i));
  114. }
  115. }
  116. }
  117. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  118. u32 page, const u8 *buffer, u32 size)
  119. {
  120. struct rtl_priv *rtlpriv = rtl_priv(hw);
  121. u8 value8;
  122. u8 u8page = (u8) (page & 0x07);
  123. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  124. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  125. _rtl92c_fw_block_write(hw, buffer, size);
  126. }
  127. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  128. {
  129. u32 fwlen = *pfwlen;
  130. u8 remain = (u8) (fwlen % 4);
  131. remain = (remain == 0) ? 0 : (4 - remain);
  132. while (remain > 0) {
  133. pfwbuf[fwlen] = 0;
  134. fwlen++;
  135. remain--;
  136. }
  137. *pfwlen = fwlen;
  138. }
  139. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  140. enum version_8192c version, u8 *buffer, u32 size)
  141. {
  142. struct rtl_priv *rtlpriv = rtl_priv(hw);
  143. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  144. u8 *bufferPtr = (u8 *) buffer;
  145. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  146. if (IS_CHIP_VER_B(version)) {
  147. u32 pageNums, remainSize;
  148. u32 page, offset;
  149. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  150. _rtl92c_fill_dummy(bufferPtr, &size);
  151. pageNums = size / FW_8192C_PAGE_SIZE;
  152. remainSize = size % FW_8192C_PAGE_SIZE;
  153. if (pageNums > 4) {
  154. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  155. ("Page numbers should not greater then 4\n"));
  156. }
  157. for (page = 0; page < pageNums; page++) {
  158. offset = page * FW_8192C_PAGE_SIZE;
  159. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  160. FW_8192C_PAGE_SIZE);
  161. }
  162. if (remainSize) {
  163. offset = pageNums * FW_8192C_PAGE_SIZE;
  164. page = pageNums;
  165. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  166. remainSize);
  167. }
  168. } else {
  169. _rtl92c_fw_block_write(hw, buffer, size);
  170. }
  171. }
  172. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  173. {
  174. struct rtl_priv *rtlpriv = rtl_priv(hw);
  175. u32 counter = 0;
  176. u32 value32;
  177. do {
  178. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  179. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  180. (!(value32 & FWDL_ChkSum_rpt)));
  181. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  182. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  183. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  184. value32));
  185. return -EIO;
  186. }
  187. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  188. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  189. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  190. value32 |= MCUFWDL_RDY;
  191. value32 &= ~WINTINI_RDY;
  192. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  193. counter = 0;
  194. do {
  195. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  196. if (value32 & WINTINI_RDY) {
  197. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  198. ("Polling FW ready success!!"
  199. " REG_MCUFWDL:0x%08x .\n",
  200. value32));
  201. return 0;
  202. }
  203. mdelay(FW_8192C_POLLING_DELAY);
  204. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  205. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  206. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  207. return -EIO;
  208. }
  209. int rtl92c_download_fw(struct ieee80211_hw *hw)
  210. {
  211. struct rtl_priv *rtlpriv = rtl_priv(hw);
  212. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  213. struct rtl92c_firmware_header *pfwheader;
  214. u8 *pfwdata;
  215. u32 fwsize;
  216. enum version_8192c version = rtlhal->version;
  217. pr_info("Loading firmware file %s\n", rtlpriv->cfg->fw_name);
  218. if (!rtlhal->pfirmware)
  219. return 1;
  220. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  221. pfwdata = (u8 *) rtlhal->pfirmware;
  222. fwsize = rtlhal->fwsize;
  223. if (IS_FW_HEADER_EXIST(pfwheader)) {
  224. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  225. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  226. pfwheader->version, pfwheader->signature,
  227. (uint)sizeof(struct rtl92c_firmware_header)));
  228. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  229. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  230. }
  231. _rtl92c_enable_fw_download(hw, true);
  232. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  233. _rtl92c_enable_fw_download(hw, false);
  234. if (_rtl92c_fw_free_to_go(hw)) {
  235. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  236. ("Firmware is not ready to run!\n"));
  237. } else {
  238. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  239. ("Firmware is ready to run!\n"));
  240. }
  241. return 0;
  242. }
  243. EXPORT_SYMBOL(rtl92c_download_fw);
  244. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  245. {
  246. struct rtl_priv *rtlpriv = rtl_priv(hw);
  247. u8 val_hmetfr, val_mcutst_1;
  248. bool result = false;
  249. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  250. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  251. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  252. result = true;
  253. return result;
  254. }
  255. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  256. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  257. {
  258. struct rtl_priv *rtlpriv = rtl_priv(hw);
  259. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  260. u8 boxnum;
  261. u16 box_reg = 0, box_extreg = 0;
  262. u8 u1b_tmp;
  263. bool isfw_read = false;
  264. bool bwrite_sucess = false;
  265. u8 wait_h2c_limmit = 100;
  266. u8 wait_writeh2c_limmit = 100;
  267. u8 boxcontent[4], boxextcontent[2];
  268. u32 h2c_waitcounter = 0;
  269. unsigned long flag;
  270. u8 idx;
  271. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  272. while (true) {
  273. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  274. if (rtlhal->h2c_setinprogress) {
  275. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  276. ("H2C set in progress! Wait to set.."
  277. "element_id(%d).\n", element_id));
  278. while (rtlhal->h2c_setinprogress) {
  279. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  280. flag);
  281. h2c_waitcounter++;
  282. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  283. ("Wait 100 us (%d times)...\n",
  284. h2c_waitcounter));
  285. udelay(100);
  286. if (h2c_waitcounter > 1000)
  287. return;
  288. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  289. flag);
  290. }
  291. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  292. } else {
  293. rtlhal->h2c_setinprogress = true;
  294. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  295. break;
  296. }
  297. }
  298. while (!bwrite_sucess) {
  299. wait_writeh2c_limmit--;
  300. if (wait_writeh2c_limmit == 0) {
  301. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  302. ("Write H2C fail because no trigger "
  303. "for FW INT!\n"));
  304. break;
  305. }
  306. boxnum = rtlhal->last_hmeboxnum;
  307. switch (boxnum) {
  308. case 0:
  309. box_reg = REG_HMEBOX_0;
  310. box_extreg = REG_HMEBOX_EXT_0;
  311. break;
  312. case 1:
  313. box_reg = REG_HMEBOX_1;
  314. box_extreg = REG_HMEBOX_EXT_1;
  315. break;
  316. case 2:
  317. box_reg = REG_HMEBOX_2;
  318. box_extreg = REG_HMEBOX_EXT_2;
  319. break;
  320. case 3:
  321. box_reg = REG_HMEBOX_3;
  322. box_extreg = REG_HMEBOX_EXT_3;
  323. break;
  324. default:
  325. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  326. ("switch case not process\n"));
  327. break;
  328. }
  329. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  330. while (!isfw_read) {
  331. wait_h2c_limmit--;
  332. if (wait_h2c_limmit == 0) {
  333. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  334. ("Wating too long for FW read "
  335. "clear HMEBox(%d)!\n", boxnum));
  336. break;
  337. }
  338. udelay(10);
  339. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  340. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  341. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  342. ("Wating for FW read clear HMEBox(%d)!!! "
  343. "0x1BF = %2x\n", boxnum, u1b_tmp));
  344. }
  345. if (!isfw_read) {
  346. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  347. ("Write H2C register BOX[%d] fail!!!!! "
  348. "Fw do not read.\n", boxnum));
  349. break;
  350. }
  351. memset(boxcontent, 0, sizeof(boxcontent));
  352. memset(boxextcontent, 0, sizeof(boxextcontent));
  353. boxcontent[0] = element_id;
  354. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  355. ("Write element_id box_reg(%4x) = %2x\n",
  356. box_reg, element_id));
  357. switch (cmd_len) {
  358. case 1:
  359. boxcontent[0] &= ~(BIT(7));
  360. memcpy((u8 *) (boxcontent) + 1,
  361. p_cmdbuffer, 1);
  362. for (idx = 0; idx < 4; idx++) {
  363. rtl_write_byte(rtlpriv, box_reg + idx,
  364. boxcontent[idx]);
  365. }
  366. break;
  367. case 2:
  368. boxcontent[0] &= ~(BIT(7));
  369. memcpy((u8 *) (boxcontent) + 1,
  370. p_cmdbuffer, 2);
  371. for (idx = 0; idx < 4; idx++) {
  372. rtl_write_byte(rtlpriv, box_reg + idx,
  373. boxcontent[idx]);
  374. }
  375. break;
  376. case 3:
  377. boxcontent[0] &= ~(BIT(7));
  378. memcpy((u8 *) (boxcontent) + 1,
  379. p_cmdbuffer, 3);
  380. for (idx = 0; idx < 4; idx++) {
  381. rtl_write_byte(rtlpriv, box_reg + idx,
  382. boxcontent[idx]);
  383. }
  384. break;
  385. case 4:
  386. boxcontent[0] |= (BIT(7));
  387. memcpy((u8 *) (boxextcontent),
  388. p_cmdbuffer, 2);
  389. memcpy((u8 *) (boxcontent) + 1,
  390. p_cmdbuffer + 2, 2);
  391. for (idx = 0; idx < 2; idx++) {
  392. rtl_write_byte(rtlpriv, box_extreg + idx,
  393. boxextcontent[idx]);
  394. }
  395. for (idx = 0; idx < 4; idx++) {
  396. rtl_write_byte(rtlpriv, box_reg + idx,
  397. boxcontent[idx]);
  398. }
  399. break;
  400. case 5:
  401. boxcontent[0] |= (BIT(7));
  402. memcpy((u8 *) (boxextcontent),
  403. p_cmdbuffer, 2);
  404. memcpy((u8 *) (boxcontent) + 1,
  405. p_cmdbuffer + 2, 3);
  406. for (idx = 0; idx < 2; idx++) {
  407. rtl_write_byte(rtlpriv, box_extreg + idx,
  408. boxextcontent[idx]);
  409. }
  410. for (idx = 0; idx < 4; idx++) {
  411. rtl_write_byte(rtlpriv, box_reg + idx,
  412. boxcontent[idx]);
  413. }
  414. break;
  415. default:
  416. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  417. ("switch case not process\n"));
  418. break;
  419. }
  420. bwrite_sucess = true;
  421. rtlhal->last_hmeboxnum = boxnum + 1;
  422. if (rtlhal->last_hmeboxnum == 4)
  423. rtlhal->last_hmeboxnum = 0;
  424. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  425. ("pHalData->last_hmeboxnum = %d\n",
  426. rtlhal->last_hmeboxnum));
  427. }
  428. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  429. rtlhal->h2c_setinprogress = false;
  430. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  431. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  432. }
  433. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  434. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  435. {
  436. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  437. u32 tmp_cmdbuf[2];
  438. if (rtlhal->fw_ready == false) {
  439. RT_ASSERT(false, ("return H2C cmd because of Fw "
  440. "download fail!!!\n"));
  441. return;
  442. }
  443. memset(tmp_cmdbuf, 0, 8);
  444. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  445. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  446. return;
  447. }
  448. EXPORT_SYMBOL(rtl92c_fill_h2c_cmd);
  449. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  450. {
  451. u8 u1b_tmp;
  452. u8 delay = 100;
  453. struct rtl_priv *rtlpriv = rtl_priv(hw);
  454. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  455. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  456. while (u1b_tmp & BIT(2)) {
  457. delay--;
  458. if (delay == 0) {
  459. RT_ASSERT(false, ("8051 reset fail.\n"));
  460. break;
  461. }
  462. udelay(50);
  463. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  464. }
  465. }
  466. EXPORT_SYMBOL(rtl92c_firmware_selfreset);
  467. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  468. {
  469. struct rtl_priv *rtlpriv = rtl_priv(hw);
  470. u8 u1_h2c_set_pwrmode[3] = {0};
  471. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  472. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  473. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  474. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  475. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  476. ppsc->reg_max_lps_awakeintvl);
  477. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  478. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  479. u1_h2c_set_pwrmode, 3);
  480. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  481. }
  482. EXPORT_SYMBOL(rtl92c_set_fw_pwrmode_cmd);
  483. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  484. struct sk_buff *skb)
  485. {
  486. struct rtl_priv *rtlpriv = rtl_priv(hw);
  487. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  488. struct rtl8192_tx_ring *ring;
  489. struct rtl_tx_desc *pdesc;
  490. unsigned long flags;
  491. struct sk_buff *pskb = NULL;
  492. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  493. pskb = __skb_dequeue(&ring->queue);
  494. if (pskb)
  495. kfree_skb(pskb);
  496. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  497. pdesc = &ring->desc[0];
  498. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  499. __skb_queue_tail(&ring->queue, skb);
  500. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  501. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  502. return true;
  503. }
  504. #define BEACON_PG 0 /*->1*/
  505. #define PSPOLL_PG 2
  506. #define NULL_PG 3
  507. #define PROBERSP_PG 4 /*->5*/
  508. #define TOTAL_RESERVED_PKT_LEN 768
  509. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  510. /* page 0 beacon */
  511. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  512. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  513. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  514. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  515. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  516. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  517. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  518. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  519. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  520. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  521. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  524. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  525. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  526. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. /* page 1 beacon */
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  530. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  531. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  536. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. /* page 2 ps-poll */
  545. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  546. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  547. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  548. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  549. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  550. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  551. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  552. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  553. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  554. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  555. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  556. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  557. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  558. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  559. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  560. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. /* page 3 null */
  562. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  563. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  564. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  565. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  566. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  567. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  568. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  569. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  570. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  576. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. /* page 4 probe_resp */
  579. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  580. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  581. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  582. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  583. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  584. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  585. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  586. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  587. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  588. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  589. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  590. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  591. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  592. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  593. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  594. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  595. /* page 5 probe_resp */
  596. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  597. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  598. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  599. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  600. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  601. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  602. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  603. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  604. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  605. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  606. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  607. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  608. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  609. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  610. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  611. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  612. };
  613. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished)
  614. {
  615. struct rtl_priv *rtlpriv = rtl_priv(hw);
  616. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  617. struct sk_buff *skb = NULL;
  618. u32 totalpacketlen;
  619. bool rtstatus;
  620. u8 u1RsvdPageLoc[3] = {0};
  621. bool dlok = false;
  622. u8 *beacon;
  623. u8 *pspoll;
  624. u8 *nullfunc;
  625. u8 *probersp;
  626. /*---------------------------------------------------------
  627. (1) beacon
  628. ---------------------------------------------------------*/
  629. beacon = &reserved_page_packet[BEACON_PG * 128];
  630. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  631. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  632. /*-------------------------------------------------------
  633. (2) ps-poll
  634. --------------------------------------------------------*/
  635. pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  636. SET_80211_PS_POLL_AID(pspoll, (mac->assoc_id | 0xc000));
  637. SET_80211_PS_POLL_BSSID(pspoll, mac->bssid);
  638. SET_80211_PS_POLL_TA(pspoll, mac->mac_addr);
  639. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  640. /*--------------------------------------------------------
  641. (3) null data
  642. ---------------------------------------------------------*/
  643. nullfunc = &reserved_page_packet[NULL_PG * 128];
  644. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  645. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  646. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  647. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  648. /*---------------------------------------------------------
  649. (4) probe response
  650. ----------------------------------------------------------*/
  651. probersp = &reserved_page_packet[PROBERSP_PG * 128];
  652. SET_80211_HDR_ADDRESS1(probersp, mac->bssid);
  653. SET_80211_HDR_ADDRESS2(probersp, mac->mac_addr);
  654. SET_80211_HDR_ADDRESS3(probersp, mac->bssid);
  655. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  656. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  657. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  658. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  659. &reserved_page_packet[0], totalpacketlen);
  660. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  661. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  662. u1RsvdPageLoc, 3);
  663. skb = dev_alloc_skb(totalpacketlen);
  664. memcpy((u8 *) skb_put(skb, totalpacketlen),
  665. &reserved_page_packet, totalpacketlen);
  666. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  667. if (rtstatus)
  668. dlok = true;
  669. if (dlok) {
  670. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  671. ("Set RSVD page location to Fw.\n"));
  672. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  673. "H2C_RSVDPAGE:\n",
  674. u1RsvdPageLoc, 3);
  675. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  676. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  677. } else
  678. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  679. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  680. }
  681. EXPORT_SYMBOL(rtl92c_set_fw_rsvdpagepkt);
  682. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  683. {
  684. u8 u1_joinbssrpt_parm[1] = {0};
  685. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  686. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  687. }
  688. EXPORT_SYMBOL(rtl92c_set_fw_joinbss_report_cmd);