chrp_time.c 6.9 KB

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  1. /*
  2. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  3. *
  4. * Adapted for PowerPC (PReP) by Gary Thomas
  5. * Modified by Cort Dougan (cort@cs.nmt.edu).
  6. * Copied and modified from arch/i386/kernel/time.c
  7. *
  8. */
  9. #include <linux/errno.h>
  10. #include <linux/sched.h>
  11. #include <linux/kernel.h>
  12. #include <linux/param.h>
  13. #include <linux/string.h>
  14. #include <linux/mm.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/time.h>
  17. #include <linux/timex.h>
  18. #include <linux/kernel_stat.h>
  19. #include <linux/mc146818rtc.h>
  20. #include <linux/init.h>
  21. #include <linux/bcd.h>
  22. #include <asm/io.h>
  23. #include <asm/nvram.h>
  24. #include <asm/prom.h>
  25. #include <asm/sections.h>
  26. #include <asm/time.h>
  27. extern spinlock_t rtc_lock;
  28. static int nvram_as1 = NVRAM_AS1;
  29. static int nvram_as0 = NVRAM_AS0;
  30. static int nvram_data = NVRAM_DATA;
  31. long __init chrp_time_init(void)
  32. {
  33. struct device_node *rtcs;
  34. int base;
  35. rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
  36. if (rtcs == NULL)
  37. rtcs = find_compatible_devices("rtc", "ds1385-rtc");
  38. if (rtcs == NULL || rtcs->addrs == NULL)
  39. return 0;
  40. base = rtcs->addrs[0].address;
  41. nvram_as1 = 0;
  42. nvram_as0 = base;
  43. nvram_data = base + 1;
  44. return 0;
  45. }
  46. int chrp_cmos_clock_read(int addr)
  47. {
  48. if (nvram_as1 != 0)
  49. outb(addr>>8, nvram_as1);
  50. outb(addr, nvram_as0);
  51. return (inb(nvram_data));
  52. }
  53. void chrp_cmos_clock_write(unsigned long val, int addr)
  54. {
  55. if (nvram_as1 != 0)
  56. outb(addr>>8, nvram_as1);
  57. outb(addr, nvram_as0);
  58. outb(val, nvram_data);
  59. return;
  60. }
  61. /*
  62. * Set the hardware clock. -- Cort
  63. */
  64. int chrp_set_rtc_time(unsigned long nowtime)
  65. {
  66. unsigned char save_control, save_freq_select;
  67. struct rtc_time tm;
  68. spin_lock(&rtc_lock);
  69. to_tm(nowtime, &tm);
  70. save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */
  71. chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL);
  72. save_freq_select = chrp_cmos_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */
  73. chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
  74. tm.tm_year -= 1900;
  75. if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  76. BIN_TO_BCD(tm.tm_sec);
  77. BIN_TO_BCD(tm.tm_min);
  78. BIN_TO_BCD(tm.tm_hour);
  79. BIN_TO_BCD(tm.tm_mon);
  80. BIN_TO_BCD(tm.tm_mday);
  81. BIN_TO_BCD(tm.tm_year);
  82. }
  83. chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS);
  84. chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES);
  85. chrp_cmos_clock_write(tm.tm_hour,RTC_HOURS);
  86. chrp_cmos_clock_write(tm.tm_mon,RTC_MONTH);
  87. chrp_cmos_clock_write(tm.tm_mday,RTC_DAY_OF_MONTH);
  88. chrp_cmos_clock_write(tm.tm_year,RTC_YEAR);
  89. /* The following flags have to be released exactly in this order,
  90. * otherwise the DS12887 (popular MC146818A clone with integrated
  91. * battery and quartz) will not reset the oscillator and will not
  92. * update precisely 500 ms later. You won't find this mentioned in
  93. * the Dallas Semiconductor data sheets, but who believes data
  94. * sheets anyway ... -- Markus Kuhn
  95. */
  96. chrp_cmos_clock_write(save_control, RTC_CONTROL);
  97. chrp_cmos_clock_write(save_freq_select, RTC_FREQ_SELECT);
  98. spin_unlock(&rtc_lock);
  99. return 0;
  100. }
  101. unsigned long chrp_get_rtc_time(void)
  102. {
  103. unsigned int year, mon, day, hour, min, sec;
  104. int uip, i;
  105. /* The Linux interpretation of the CMOS clock register contents:
  106. * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
  107. * RTC registers show the second which has precisely just started.
  108. * Let's hope other operating systems interpret the RTC the same way.
  109. */
  110. /* Since the UIP flag is set for about 2.2 ms and the clock
  111. * is typically written with a precision of 1 jiffy, trying
  112. * to obtain a precision better than a few milliseconds is
  113. * an illusion. Only consistency is interesting, this also
  114. * allows to use the routine for /dev/rtc without a potential
  115. * 1 second kernel busy loop triggered by any reader of /dev/rtc.
  116. */
  117. for ( i = 0; i<1000000; i++) {
  118. uip = chrp_cmos_clock_read(RTC_FREQ_SELECT);
  119. sec = chrp_cmos_clock_read(RTC_SECONDS);
  120. min = chrp_cmos_clock_read(RTC_MINUTES);
  121. hour = chrp_cmos_clock_read(RTC_HOURS);
  122. day = chrp_cmos_clock_read(RTC_DAY_OF_MONTH);
  123. mon = chrp_cmos_clock_read(RTC_MONTH);
  124. year = chrp_cmos_clock_read(RTC_YEAR);
  125. uip |= chrp_cmos_clock_read(RTC_FREQ_SELECT);
  126. if ((uip & RTC_UIP)==0) break;
  127. }
  128. if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
  129. {
  130. BCD_TO_BIN(sec);
  131. BCD_TO_BIN(min);
  132. BCD_TO_BIN(hour);
  133. BCD_TO_BIN(day);
  134. BCD_TO_BIN(mon);
  135. BCD_TO_BIN(year);
  136. }
  137. if ((year += 1900) < 1970)
  138. year += 100;
  139. return mktime(year, mon, day, hour, min, sec);
  140. }
  141. /*
  142. * Calibrate the decrementer frequency with the VIA timer 1.
  143. */
  144. #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
  145. /* VIA registers */
  146. #define RS 0x200 /* skip between registers */
  147. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  148. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  149. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  150. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  151. #define ACR (11*RS) /* Auxiliary control register */
  152. #define IFR (13*RS) /* Interrupt flag register */
  153. /* Bits in ACR */
  154. #define T1MODE 0xc0 /* Timer 1 mode */
  155. #define T1MODE_CONT 0x40 /* continuous interrupts */
  156. /* Bits in IFR and IER */
  157. #define T1_INT 0x40 /* Timer 1 interrupt */
  158. static int __init chrp_via_calibrate_decr(void)
  159. {
  160. struct device_node *vias;
  161. volatile unsigned char __iomem *via;
  162. int count = VIA_TIMER_FREQ_6 / 100;
  163. unsigned int dstart, dend;
  164. vias = find_devices("via-cuda");
  165. if (vias == 0)
  166. vias = find_devices("via");
  167. if (vias == 0 || vias->n_addrs == 0)
  168. return 0;
  169. via = ioremap(vias->addrs[0].address, vias->addrs[0].size);
  170. /* set timer 1 for continuous interrupts */
  171. out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
  172. /* set the counter to a small value */
  173. out_8(&via[T1CH], 2);
  174. /* set the latch to `count' */
  175. out_8(&via[T1LL], count);
  176. out_8(&via[T1LH], count >> 8);
  177. /* wait until it hits 0 */
  178. while ((in_8(&via[IFR]) & T1_INT) == 0)
  179. ;
  180. dstart = get_dec();
  181. /* clear the interrupt & wait until it hits 0 again */
  182. in_8(&via[T1CL]);
  183. while ((in_8(&via[IFR]) & T1_INT) == 0)
  184. ;
  185. dend = get_dec();
  186. tb_ticks_per_jiffy = (dstart - dend) / ((6 * HZ)/100);
  187. tb_to_us = mulhwu_scale_factor(dstart - dend, 60000);
  188. printk(KERN_INFO "via_calibrate_decr: ticks per jiffy = %u (%u ticks)\n",
  189. tb_ticks_per_jiffy, dstart - dend);
  190. iounmap(via);
  191. return 1;
  192. }
  193. void __init chrp_calibrate_decr(void)
  194. {
  195. struct device_node *cpu;
  196. unsigned int freq, *fp;
  197. if (chrp_via_calibrate_decr())
  198. return;
  199. /*
  200. * The cpu node should have a timebase-frequency property
  201. * to tell us the rate at which the decrementer counts.
  202. */
  203. freq = 16666000; /* hardcoded default */
  204. cpu = find_type_devices("cpu");
  205. if (cpu != 0) {
  206. fp = (unsigned int *)
  207. get_property(cpu, "timebase-frequency", NULL);
  208. if (fp != 0)
  209. freq = *fp;
  210. }
  211. printk("time_init: decrementer frequency = %u.%.6u MHz\n",
  212. freq/1000000, freq%1000000);
  213. tb_ticks_per_jiffy = freq / HZ;
  214. tb_to_us = mulhwu_scale_factor(freq, 1000000);
  215. }