rtl8187_dev.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853
  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187 USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Realtek */
  31. {USB_DEVICE(0x0bda, 0x8187)},
  32. /* Netgear */
  33. {USB_DEVICE(0x0846, 0x6100)},
  34. {USB_DEVICE(0x0846, 0x6a00)},
  35. /* HP */
  36. {USB_DEVICE(0x03f0, 0xca02)},
  37. /* Sitecom */
  38. {USB_DEVICE(0x0df6, 0x000d)},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  42. static const struct ieee80211_rate rtl818x_rates[] = {
  43. { .bitrate = 10, .hw_value = 0, },
  44. { .bitrate = 20, .hw_value = 1, },
  45. { .bitrate = 55, .hw_value = 2, },
  46. { .bitrate = 110, .hw_value = 3, },
  47. { .bitrate = 60, .hw_value = 4, },
  48. { .bitrate = 90, .hw_value = 5, },
  49. { .bitrate = 120, .hw_value = 6, },
  50. { .bitrate = 180, .hw_value = 7, },
  51. { .bitrate = 240, .hw_value = 8, },
  52. { .bitrate = 360, .hw_value = 9, },
  53. { .bitrate = 480, .hw_value = 10, },
  54. { .bitrate = 540, .hw_value = 11, },
  55. };
  56. static const struct ieee80211_channel rtl818x_channels[] = {
  57. { .center_freq = 2412 },
  58. { .center_freq = 2417 },
  59. { .center_freq = 2422 },
  60. { .center_freq = 2427 },
  61. { .center_freq = 2432 },
  62. { .center_freq = 2437 },
  63. { .center_freq = 2442 },
  64. { .center_freq = 2447 },
  65. { .center_freq = 2452 },
  66. { .center_freq = 2457 },
  67. { .center_freq = 2462 },
  68. { .center_freq = 2467 },
  69. { .center_freq = 2472 },
  70. { .center_freq = 2484 },
  71. };
  72. static void rtl8187_iowrite_async_cb(struct urb *urb)
  73. {
  74. kfree(urb->context);
  75. usb_free_urb(urb);
  76. }
  77. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  78. void *data, u16 len)
  79. {
  80. struct usb_ctrlrequest *dr;
  81. struct urb *urb;
  82. struct rtl8187_async_write_data {
  83. u8 data[4];
  84. struct usb_ctrlrequest dr;
  85. } *buf;
  86. int rc;
  87. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  88. if (!buf)
  89. return;
  90. urb = usb_alloc_urb(0, GFP_ATOMIC);
  91. if (!urb) {
  92. kfree(buf);
  93. return;
  94. }
  95. dr = &buf->dr;
  96. dr->bRequestType = RTL8187_REQT_WRITE;
  97. dr->bRequest = RTL8187_REQ_SET_REG;
  98. dr->wValue = addr;
  99. dr->wIndex = 0;
  100. dr->wLength = cpu_to_le16(len);
  101. memcpy(buf, data, len);
  102. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  103. (unsigned char *)dr, buf, len,
  104. rtl8187_iowrite_async_cb, buf);
  105. rc = usb_submit_urb(urb, GFP_ATOMIC);
  106. if (rc < 0) {
  107. kfree(buf);
  108. usb_free_urb(urb);
  109. }
  110. }
  111. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  112. __le32 *addr, u32 val)
  113. {
  114. __le32 buf = cpu_to_le32(val);
  115. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  116. &buf, sizeof(buf));
  117. }
  118. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  119. {
  120. struct rtl8187_priv *priv = dev->priv;
  121. data <<= 8;
  122. data |= addr | 0x80;
  123. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  124. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  125. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  126. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  127. msleep(1);
  128. }
  129. static void rtl8187_tx_cb(struct urb *urb)
  130. {
  131. struct sk_buff *skb = (struct sk_buff *)urb->context;
  132. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  133. struct ieee80211_hw *hw = info->driver_data[0];
  134. usb_free_urb(info->driver_data[1]);
  135. skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
  136. memset(&info->status, 0, sizeof(info->status));
  137. info->flags |= IEEE80211_TX_STAT_ACK;
  138. ieee80211_tx_status_irqsafe(hw, skb);
  139. }
  140. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  141. {
  142. struct rtl8187_priv *priv = dev->priv;
  143. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  144. struct rtl8187_tx_hdr *hdr;
  145. struct urb *urb;
  146. __le16 rts_dur = 0;
  147. u32 flags;
  148. int rc;
  149. urb = usb_alloc_urb(0, GFP_ATOMIC);
  150. if (!urb) {
  151. kfree_skb(skb);
  152. return 0;
  153. }
  154. flags = skb->len;
  155. flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
  156. flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
  157. if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
  158. flags |= RTL8187_TX_FLAG_MORE_FRAG;
  159. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  160. flags |= RTL8187_TX_FLAG_RTS;
  161. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  162. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  163. skb->len, info);
  164. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  165. flags |= RTL8187_TX_FLAG_CTS;
  166. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  167. }
  168. hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  169. hdr->flags = cpu_to_le32(flags);
  170. hdr->len = 0;
  171. hdr->rts_duration = rts_dur;
  172. hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
  173. info->driver_data[0] = dev;
  174. info->driver_data[1] = urb;
  175. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
  176. hdr, skb->len, rtl8187_tx_cb, skb);
  177. rc = usb_submit_urb(urb, GFP_ATOMIC);
  178. if (rc < 0) {
  179. usb_free_urb(urb);
  180. kfree_skb(skb);
  181. }
  182. return 0;
  183. }
  184. static void rtl8187_rx_cb(struct urb *urb)
  185. {
  186. struct sk_buff *skb = (struct sk_buff *)urb->context;
  187. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  188. struct ieee80211_hw *dev = info->dev;
  189. struct rtl8187_priv *priv = dev->priv;
  190. struct rtl8187_rx_hdr *hdr;
  191. struct ieee80211_rx_status rx_status = { 0 };
  192. int rate, signal;
  193. u32 flags;
  194. spin_lock(&priv->rx_queue.lock);
  195. if (skb->next)
  196. __skb_unlink(skb, &priv->rx_queue);
  197. else {
  198. spin_unlock(&priv->rx_queue.lock);
  199. return;
  200. }
  201. spin_unlock(&priv->rx_queue.lock);
  202. if (unlikely(urb->status)) {
  203. usb_free_urb(urb);
  204. dev_kfree_skb_irq(skb);
  205. return;
  206. }
  207. skb_put(skb, urb->actual_length);
  208. hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
  209. flags = le32_to_cpu(hdr->flags);
  210. skb_trim(skb, flags & 0x0FFF);
  211. signal = hdr->agc >> 1;
  212. rate = (flags >> 20) & 0xF;
  213. if (rate > 3) { /* OFDM rate */
  214. if (signal > 90)
  215. signal = 90;
  216. else if (signal < 25)
  217. signal = 25;
  218. signal = 90 - signal;
  219. } else { /* CCK rate */
  220. if (signal > 95)
  221. signal = 95;
  222. else if (signal < 30)
  223. signal = 30;
  224. signal = 95 - signal;
  225. }
  226. rx_status.antenna = (hdr->signal >> 7) & 1;
  227. rx_status.qual = 64 - min(hdr->noise, (u8)64);
  228. rx_status.signal = signal;
  229. rx_status.rate_idx = rate;
  230. rx_status.freq = dev->conf.channel->center_freq;
  231. rx_status.band = dev->conf.channel->band;
  232. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  233. rx_status.flag |= RX_FLAG_TSFT;
  234. if (flags & (1 << 13))
  235. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  236. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  237. skb = dev_alloc_skb(RTL8187_MAX_RX);
  238. if (unlikely(!skb)) {
  239. usb_free_urb(urb);
  240. /* TODO check rx queue length and refill *somewhere* */
  241. return;
  242. }
  243. info = (struct rtl8187_rx_info *)skb->cb;
  244. info->urb = urb;
  245. info->dev = dev;
  246. urb->transfer_buffer = skb_tail_pointer(skb);
  247. urb->context = skb;
  248. skb_queue_tail(&priv->rx_queue, skb);
  249. usb_submit_urb(urb, GFP_ATOMIC);
  250. }
  251. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  252. {
  253. struct rtl8187_priv *priv = dev->priv;
  254. struct urb *entry;
  255. struct sk_buff *skb;
  256. struct rtl8187_rx_info *info;
  257. while (skb_queue_len(&priv->rx_queue) < 8) {
  258. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  259. if (!skb)
  260. break;
  261. entry = usb_alloc_urb(0, GFP_KERNEL);
  262. if (!entry) {
  263. kfree_skb(skb);
  264. break;
  265. }
  266. usb_fill_bulk_urb(entry, priv->udev,
  267. usb_rcvbulkpipe(priv->udev, 1),
  268. skb_tail_pointer(skb),
  269. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  270. info = (struct rtl8187_rx_info *)skb->cb;
  271. info->urb = entry;
  272. info->dev = dev;
  273. skb_queue_tail(&priv->rx_queue, skb);
  274. usb_submit_urb(entry, GFP_KERNEL);
  275. }
  276. return 0;
  277. }
  278. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  279. {
  280. struct rtl8187_priv *priv = dev->priv;
  281. u8 reg;
  282. int i;
  283. /* reset */
  284. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  285. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  286. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  287. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  288. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  289. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  290. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  291. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  292. msleep(200);
  293. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  294. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  295. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  296. msleep(200);
  297. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  298. reg &= (1 << 1);
  299. reg |= RTL818X_CMD_RESET;
  300. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  301. i = 10;
  302. do {
  303. msleep(2);
  304. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  305. RTL818X_CMD_RESET))
  306. break;
  307. } while (--i);
  308. if (!i) {
  309. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  310. return -ETIMEDOUT;
  311. }
  312. /* reload registers from eeprom */
  313. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  314. i = 10;
  315. do {
  316. msleep(4);
  317. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  318. RTL818X_EEPROM_CMD_CONFIG))
  319. break;
  320. } while (--i);
  321. if (!i) {
  322. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  323. wiphy_name(dev->wiphy));
  324. return -ETIMEDOUT;
  325. }
  326. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  327. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  328. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  329. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  330. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  331. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  332. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  333. /* setup card */
  334. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  335. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  336. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  337. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  338. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  339. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  340. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  341. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  342. reg &= 0x3F;
  343. reg |= 0x80;
  344. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  345. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  346. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  347. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  348. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  349. // TODO: set RESP_RATE and BRSR properly
  350. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  351. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  352. /* host_usb_init */
  353. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  354. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  355. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  356. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  357. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  358. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  359. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  360. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  361. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  362. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  363. msleep(100);
  364. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  365. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  366. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  367. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  368. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  369. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  370. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  371. msleep(100);
  372. priv->rf->init(dev);
  373. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  374. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  375. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  376. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  377. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  378. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  379. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  380. return 0;
  381. }
  382. static int rtl8187_start(struct ieee80211_hw *dev)
  383. {
  384. struct rtl8187_priv *priv = dev->priv;
  385. u32 reg;
  386. int ret;
  387. ret = rtl8187_init_hw(dev);
  388. if (ret)
  389. return ret;
  390. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  391. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  392. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  393. rtl8187_init_urbs(dev);
  394. reg = RTL818X_RX_CONF_ONLYERLPKT |
  395. RTL818X_RX_CONF_RX_AUTORESETPHY |
  396. RTL818X_RX_CONF_BSSID |
  397. RTL818X_RX_CONF_MGMT |
  398. RTL818X_RX_CONF_DATA |
  399. (7 << 13 /* RX FIFO threshold NONE */) |
  400. (7 << 10 /* MAX RX DMA */) |
  401. RTL818X_RX_CONF_BROADCAST |
  402. RTL818X_RX_CONF_NICMAC;
  403. priv->rx_conf = reg;
  404. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  405. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  406. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  407. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  408. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  409. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  410. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  411. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  412. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  413. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  414. reg = RTL818X_TX_CONF_CW_MIN |
  415. (7 << 21 /* MAX TX DMA */) |
  416. RTL818X_TX_CONF_NO_ICV;
  417. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  418. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  419. reg |= RTL818X_CMD_TX_ENABLE;
  420. reg |= RTL818X_CMD_RX_ENABLE;
  421. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  422. return 0;
  423. }
  424. static void rtl8187_stop(struct ieee80211_hw *dev)
  425. {
  426. struct rtl8187_priv *priv = dev->priv;
  427. struct rtl8187_rx_info *info;
  428. struct sk_buff *skb;
  429. u32 reg;
  430. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  431. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  432. reg &= ~RTL818X_CMD_TX_ENABLE;
  433. reg &= ~RTL818X_CMD_RX_ENABLE;
  434. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  435. priv->rf->stop(dev);
  436. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  437. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  438. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  439. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  440. while ((skb = skb_dequeue(&priv->rx_queue))) {
  441. info = (struct rtl8187_rx_info *)skb->cb;
  442. usb_kill_urb(info->urb);
  443. kfree_skb(skb);
  444. }
  445. return;
  446. }
  447. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  448. struct ieee80211_if_init_conf *conf)
  449. {
  450. struct rtl8187_priv *priv = dev->priv;
  451. int i;
  452. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  453. return -EOPNOTSUPP;
  454. switch (conf->type) {
  455. case IEEE80211_IF_TYPE_STA:
  456. priv->mode = conf->type;
  457. break;
  458. default:
  459. return -EOPNOTSUPP;
  460. }
  461. priv->vif = conf->vif;
  462. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  463. for (i = 0; i < ETH_ALEN; i++)
  464. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  465. ((u8 *)conf->mac_addr)[i]);
  466. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  467. return 0;
  468. }
  469. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  470. struct ieee80211_if_init_conf *conf)
  471. {
  472. struct rtl8187_priv *priv = dev->priv;
  473. priv->mode = IEEE80211_IF_TYPE_MNTR;
  474. priv->vif = NULL;
  475. }
  476. static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  477. {
  478. struct rtl8187_priv *priv = dev->priv;
  479. u32 reg;
  480. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  481. /* Enable TX loopback on MAC level to avoid TX during channel
  482. * changes, as this has be seen to causes problems and the
  483. * card will stop work until next reset
  484. */
  485. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  486. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  487. msleep(10);
  488. priv->rf->set_chan(dev, conf);
  489. msleep(10);
  490. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  491. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  492. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  493. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  494. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  495. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  496. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  497. } else {
  498. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  499. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  500. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  501. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  502. }
  503. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  504. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  505. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  506. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  507. return 0;
  508. }
  509. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  510. struct ieee80211_vif *vif,
  511. struct ieee80211_if_conf *conf)
  512. {
  513. struct rtl8187_priv *priv = dev->priv;
  514. int i;
  515. for (i = 0; i < ETH_ALEN; i++)
  516. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  517. if (is_valid_ether_addr(conf->bssid))
  518. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
  519. else
  520. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
  521. return 0;
  522. }
  523. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  524. unsigned int changed_flags,
  525. unsigned int *total_flags,
  526. int mc_count, struct dev_addr_list *mclist)
  527. {
  528. struct rtl8187_priv *priv = dev->priv;
  529. if (changed_flags & FIF_FCSFAIL)
  530. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  531. if (changed_flags & FIF_CONTROL)
  532. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  533. if (changed_flags & FIF_OTHER_BSS)
  534. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  535. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  536. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  537. else
  538. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  539. *total_flags = 0;
  540. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  541. *total_flags |= FIF_FCSFAIL;
  542. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  543. *total_flags |= FIF_CONTROL;
  544. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  545. *total_flags |= FIF_OTHER_BSS;
  546. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  547. *total_flags |= FIF_ALLMULTI;
  548. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  549. }
  550. static const struct ieee80211_ops rtl8187_ops = {
  551. .tx = rtl8187_tx,
  552. .start = rtl8187_start,
  553. .stop = rtl8187_stop,
  554. .add_interface = rtl8187_add_interface,
  555. .remove_interface = rtl8187_remove_interface,
  556. .config = rtl8187_config,
  557. .config_interface = rtl8187_config_interface,
  558. .configure_filter = rtl8187_configure_filter,
  559. };
  560. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  561. {
  562. struct ieee80211_hw *dev = eeprom->data;
  563. struct rtl8187_priv *priv = dev->priv;
  564. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  565. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  566. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  567. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  568. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  569. }
  570. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  571. {
  572. struct ieee80211_hw *dev = eeprom->data;
  573. struct rtl8187_priv *priv = dev->priv;
  574. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  575. if (eeprom->reg_data_in)
  576. reg |= RTL818X_EEPROM_CMD_WRITE;
  577. if (eeprom->reg_data_out)
  578. reg |= RTL818X_EEPROM_CMD_READ;
  579. if (eeprom->reg_data_clock)
  580. reg |= RTL818X_EEPROM_CMD_CK;
  581. if (eeprom->reg_chip_select)
  582. reg |= RTL818X_EEPROM_CMD_CS;
  583. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  584. udelay(10);
  585. }
  586. static int __devinit rtl8187_probe(struct usb_interface *intf,
  587. const struct usb_device_id *id)
  588. {
  589. struct usb_device *udev = interface_to_usbdev(intf);
  590. struct ieee80211_hw *dev;
  591. struct rtl8187_priv *priv;
  592. struct eeprom_93cx6 eeprom;
  593. struct ieee80211_channel *channel;
  594. u16 txpwr, reg;
  595. int err, i;
  596. DECLARE_MAC_BUF(mac);
  597. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  598. if (!dev) {
  599. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  600. return -ENOMEM;
  601. }
  602. priv = dev->priv;
  603. SET_IEEE80211_DEV(dev, &intf->dev);
  604. usb_set_intfdata(intf, dev);
  605. priv->udev = udev;
  606. usb_get_dev(udev);
  607. skb_queue_head_init(&priv->rx_queue);
  608. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  609. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  610. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  611. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  612. priv->map = (struct rtl818x_csr *)0xFF00;
  613. priv->band.band = IEEE80211_BAND_2GHZ;
  614. priv->band.channels = priv->channels;
  615. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  616. priv->band.bitrates = priv->rates;
  617. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  618. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  619. priv->mode = IEEE80211_IF_TYPE_MNTR;
  620. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  621. IEEE80211_HW_RX_INCLUDES_FCS |
  622. IEEE80211_HW_SIGNAL_UNSPEC;
  623. dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
  624. dev->queues = 1;
  625. dev->max_signal = 65;
  626. eeprom.data = dev;
  627. eeprom.register_read = rtl8187_eeprom_register_read;
  628. eeprom.register_write = rtl8187_eeprom_register_write;
  629. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  630. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  631. else
  632. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  633. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  634. udelay(10);
  635. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  636. (__le16 __force *)dev->wiphy->perm_addr, 3);
  637. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  638. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  639. "generated MAC address\n");
  640. random_ether_addr(dev->wiphy->perm_addr);
  641. }
  642. channel = priv->channels;
  643. for (i = 0; i < 3; i++) {
  644. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  645. &txpwr);
  646. (*channel++).hw_value = txpwr & 0xFF;
  647. (*channel++).hw_value = txpwr >> 8;
  648. }
  649. for (i = 0; i < 2; i++) {
  650. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  651. &txpwr);
  652. (*channel++).hw_value = txpwr & 0xFF;
  653. (*channel++).hw_value = txpwr >> 8;
  654. }
  655. for (i = 0; i < 2; i++) {
  656. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  657. &txpwr);
  658. (*channel++).hw_value = txpwr & 0xFF;
  659. (*channel++).hw_value = txpwr >> 8;
  660. }
  661. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  662. &priv->txpwr_base);
  663. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  664. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  665. /* 0 means asic B-cut, we should use SW 3 wire
  666. * bit-by-bit banging for radio. 1 means we can use
  667. * USB specific request to write radio registers */
  668. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  669. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  670. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  671. priv->rf = rtl8187_detect_rf(dev);
  672. err = ieee80211_register_hw(dev);
  673. if (err) {
  674. printk(KERN_ERR "rtl8187: Cannot register device\n");
  675. goto err_free_dev;
  676. }
  677. printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
  678. wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
  679. priv->asic_rev, priv->rf->name);
  680. return 0;
  681. err_free_dev:
  682. ieee80211_free_hw(dev);
  683. usb_set_intfdata(intf, NULL);
  684. usb_put_dev(udev);
  685. return err;
  686. }
  687. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  688. {
  689. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  690. struct rtl8187_priv *priv;
  691. if (!dev)
  692. return;
  693. ieee80211_unregister_hw(dev);
  694. priv = dev->priv;
  695. usb_put_dev(interface_to_usbdev(intf));
  696. ieee80211_free_hw(dev);
  697. }
  698. static struct usb_driver rtl8187_driver = {
  699. .name = KBUILD_MODNAME,
  700. .id_table = rtl8187_table,
  701. .probe = rtl8187_probe,
  702. .disconnect = rtl8187_disconnect,
  703. };
  704. static int __init rtl8187_init(void)
  705. {
  706. return usb_register(&rtl8187_driver);
  707. }
  708. static void __exit rtl8187_exit(void)
  709. {
  710. usb_deregister(&rtl8187_driver);
  711. }
  712. module_init(rtl8187_init);
  713. module_exit(rtl8187_exit);