smc911x.c 58 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. MODULE_ALIAS("platform:smc911x");
  86. /*
  87. * The internal workings of the driver. If you are changing anything
  88. * here with the SMC stuff, you should have the datasheet and know
  89. * what you are doing.
  90. */
  91. #define CARDNAME "smc911x"
  92. /*
  93. * Use power-down feature of the chip
  94. */
  95. #define POWER_DOWN 1
  96. #if SMC_DEBUG > 0
  97. #define DBG(n, args...) \
  98. do { \
  99. if (SMC_DEBUG & (n)) \
  100. printk(args); \
  101. } while (0)
  102. #define PRINTK(args...) printk(args)
  103. #else
  104. #define DBG(n, args...) do { } while (0)
  105. #define PRINTK(args...) printk(KERN_DEBUG args)
  106. #endif
  107. #if SMC_DEBUG_PKTS > 0
  108. static void PRINT_PKT(u_char *buf, int length)
  109. {
  110. int i;
  111. int remainder;
  112. int lines;
  113. lines = length / 16;
  114. remainder = length % 16;
  115. for (i = 0; i < lines ; i ++) {
  116. int cur;
  117. for (cur = 0; cur < 8; cur++) {
  118. u_char a, b;
  119. a = *buf++;
  120. b = *buf++;
  121. printk("%02x%02x ", a, b);
  122. }
  123. printk("\n");
  124. }
  125. for (i = 0; i < remainder/2 ; i++) {
  126. u_char a, b;
  127. a = *buf++;
  128. b = *buf++;
  129. printk("%02x%02x ", a, b);
  130. }
  131. printk("\n");
  132. }
  133. #else
  134. #define PRINT_PKT(x...) do { } while (0)
  135. #endif
  136. /* this enables an interrupt in the interrupt mask register */
  137. #define SMC_ENABLE_INT(lp, x) do { \
  138. unsigned int __mask; \
  139. unsigned long __flags; \
  140. spin_lock_irqsave(&lp->lock, __flags); \
  141. __mask = SMC_GET_INT_EN((lp)); \
  142. __mask |= (x); \
  143. SMC_SET_INT_EN((lp), __mask); \
  144. spin_unlock_irqrestore(&lp->lock, __flags); \
  145. } while (0)
  146. /* this disables an interrupt from the interrupt mask register */
  147. #define SMC_DISABLE_INT(lp, x) do { \
  148. unsigned int __mask; \
  149. unsigned long __flags; \
  150. spin_lock_irqsave(&lp->lock, __flags); \
  151. __mask = SMC_GET_INT_EN((lp)); \
  152. __mask &= ~(x); \
  153. SMC_SET_INT_EN((lp), __mask); \
  154. spin_unlock_irqrestore(&lp->lock, __flags); \
  155. } while (0)
  156. /*
  157. * this does a soft reset on the device
  158. */
  159. static void smc911x_reset(struct net_device *dev)
  160. {
  161. struct smc911x_local *lp = netdev_priv(dev);
  162. unsigned int reg, timeout=0, resets=1;
  163. unsigned long flags;
  164. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  165. /* Take out of PM setting first */
  166. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  167. /* Write to the bytetest will take out of powerdown */
  168. SMC_SET_BYTE_TEST(lp, 0);
  169. timeout=10;
  170. do {
  171. udelay(10);
  172. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  173. } while (--timeout && !reg);
  174. if (timeout == 0) {
  175. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  176. return;
  177. }
  178. }
  179. /* Disable all interrupts */
  180. spin_lock_irqsave(&lp->lock, flags);
  181. SMC_SET_INT_EN(lp, 0);
  182. spin_unlock_irqrestore(&lp->lock, flags);
  183. while (resets--) {
  184. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  185. timeout=10;
  186. do {
  187. udelay(10);
  188. reg = SMC_GET_HW_CFG(lp);
  189. /* If chip indicates reset timeout then try again */
  190. if (reg & HW_CFG_SRST_TO_) {
  191. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  192. resets++;
  193. break;
  194. }
  195. } while (--timeout && (reg & HW_CFG_SRST_));
  196. }
  197. if (timeout == 0) {
  198. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  199. return;
  200. }
  201. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  202. timeout=1000;
  203. while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
  204. udelay(10);
  205. }
  206. if (timeout == 0){
  207. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  208. return;
  209. }
  210. /* Initialize interrupts */
  211. SMC_SET_INT_EN(lp, 0);
  212. SMC_ACK_INT(lp, -1);
  213. /* Reset the FIFO level and flow control settings */
  214. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  215. //TODO: Figure out what appropriate pause time is
  216. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  217. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  218. /* Set to LED outputs */
  219. SMC_SET_GPIO_CFG(lp, 0x70070000);
  220. /*
  221. * Deassert IRQ for 1*10us for edge type interrupts
  222. * and drive IRQ pin push-pull
  223. */
  224. SMC_SET_IRQ_CFG(lp, (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_);
  225. /* clear anything saved */
  226. if (lp->pending_tx_skb != NULL) {
  227. dev_kfree_skb (lp->pending_tx_skb);
  228. lp->pending_tx_skb = NULL;
  229. dev->stats.tx_errors++;
  230. dev->stats.tx_aborted_errors++;
  231. }
  232. }
  233. /*
  234. * Enable Interrupts, Receive, and Transmit
  235. */
  236. static void smc911x_enable(struct net_device *dev)
  237. {
  238. struct smc911x_local *lp = netdev_priv(dev);
  239. unsigned mask, cfg, cr;
  240. unsigned long flags;
  241. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  242. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  243. /* Enable TX */
  244. cfg = SMC_GET_HW_CFG(lp);
  245. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  246. cfg |= HW_CFG_SF_;
  247. SMC_SET_HW_CFG(lp, cfg);
  248. SMC_SET_FIFO_TDA(lp, 0xFF);
  249. /* Update TX stats on every 64 packets received or every 1 sec */
  250. SMC_SET_FIFO_TSL(lp, 64);
  251. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  252. spin_lock_irqsave(&lp->lock, flags);
  253. SMC_GET_MAC_CR(lp, cr);
  254. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  255. SMC_SET_MAC_CR(lp, cr);
  256. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  257. spin_unlock_irqrestore(&lp->lock, flags);
  258. /* Add 2 byte padding to start of packets */
  259. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  260. /* Turn on receiver and enable RX */
  261. if (cr & MAC_CR_RXEN_)
  262. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  263. spin_lock_irqsave(&lp->lock, flags);
  264. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  265. spin_unlock_irqrestore(&lp->lock, flags);
  266. /* Interrupt on every received packet */
  267. SMC_SET_FIFO_RSA(lp, 0x01);
  268. SMC_SET_FIFO_RSL(lp, 0x00);
  269. /* now, enable interrupts */
  270. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  271. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  272. INT_EN_PHY_INT_EN_;
  273. if (IS_REV_A(lp->revision))
  274. mask|=INT_EN_RDFL_EN_;
  275. else {
  276. mask|=INT_EN_RDFO_EN_;
  277. }
  278. SMC_ENABLE_INT(lp, mask);
  279. }
  280. /*
  281. * this puts the device in an inactive state
  282. */
  283. static void smc911x_shutdown(struct net_device *dev)
  284. {
  285. struct smc911x_local *lp = netdev_priv(dev);
  286. unsigned cr;
  287. unsigned long flags;
  288. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  289. /* Disable IRQ's */
  290. SMC_SET_INT_EN(lp, 0);
  291. /* Turn of Rx and TX */
  292. spin_lock_irqsave(&lp->lock, flags);
  293. SMC_GET_MAC_CR(lp, cr);
  294. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  295. SMC_SET_MAC_CR(lp, cr);
  296. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  297. spin_unlock_irqrestore(&lp->lock, flags);
  298. }
  299. static inline void smc911x_drop_pkt(struct net_device *dev)
  300. {
  301. struct smc911x_local *lp = netdev_priv(dev);
  302. unsigned int fifo_count, timeout, reg;
  303. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__);
  304. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  305. if (fifo_count <= 4) {
  306. /* Manually dump the packet data */
  307. while (fifo_count--)
  308. SMC_GET_RX_FIFO(lp);
  309. } else {
  310. /* Fast forward through the bad packet */
  311. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  312. timeout=50;
  313. do {
  314. udelay(10);
  315. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  316. } while (--timeout && reg);
  317. if (timeout == 0) {
  318. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  319. }
  320. }
  321. }
  322. /*
  323. * This is the procedure to handle the receipt of a packet.
  324. * It should be called after checking for packet presence in
  325. * the RX status FIFO. It must be called with the spin lock
  326. * already held.
  327. */
  328. static inline void smc911x_rcv(struct net_device *dev)
  329. {
  330. struct smc911x_local *lp = netdev_priv(dev);
  331. unsigned int pkt_len, status;
  332. struct sk_buff *skb;
  333. unsigned char *data;
  334. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  335. dev->name, __FUNCTION__);
  336. status = SMC_GET_RX_STS_FIFO(lp);
  337. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  338. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  339. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  340. if (status & RX_STS_ES_) {
  341. /* Deal with a bad packet */
  342. dev->stats.rx_errors++;
  343. if (status & RX_STS_CRC_ERR_)
  344. dev->stats.rx_crc_errors++;
  345. else {
  346. if (status & RX_STS_LEN_ERR_)
  347. dev->stats.rx_length_errors++;
  348. if (status & RX_STS_MCAST_)
  349. dev->stats.multicast++;
  350. }
  351. /* Remove the bad packet data from the RX FIFO */
  352. smc911x_drop_pkt(dev);
  353. } else {
  354. /* Receive a valid packet */
  355. /* Alloc a buffer with extra room for DMA alignment */
  356. skb=dev_alloc_skb(pkt_len+32);
  357. if (unlikely(skb == NULL)) {
  358. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  359. dev->name);
  360. dev->stats.rx_dropped++;
  361. smc911x_drop_pkt(dev);
  362. return;
  363. }
  364. /* Align IP header to 32 bits
  365. * Note that the device is configured to add a 2
  366. * byte padding to the packet start, so we really
  367. * want to write to the orignal data pointer */
  368. data = skb->data;
  369. skb_reserve(skb, 2);
  370. skb_put(skb,pkt_len-4);
  371. #ifdef SMC_USE_DMA
  372. {
  373. unsigned int fifo;
  374. /* Lower the FIFO threshold if possible */
  375. fifo = SMC_GET_FIFO_INT(lp);
  376. if (fifo & 0xFF) fifo--;
  377. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  378. dev->name, fifo & 0xff);
  379. SMC_SET_FIFO_INT(lp, fifo);
  380. /* Setup RX DMA */
  381. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  382. lp->rxdma_active = 1;
  383. lp->current_rx_skb = skb;
  384. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  385. /* Packet processing deferred to DMA RX interrupt */
  386. }
  387. #else
  388. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  389. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  390. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  391. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  392. dev->last_rx = jiffies;
  393. skb->protocol = eth_type_trans(skb, dev);
  394. netif_rx(skb);
  395. dev->stats.rx_packets++;
  396. dev->stats.rx_bytes += pkt_len-4;
  397. #endif
  398. }
  399. }
  400. /*
  401. * This is called to actually send a packet to the chip.
  402. */
  403. static void smc911x_hardware_send_pkt(struct net_device *dev)
  404. {
  405. struct smc911x_local *lp = netdev_priv(dev);
  406. struct sk_buff *skb;
  407. unsigned int cmdA, cmdB, len;
  408. unsigned char *buf;
  409. unsigned long flags;
  410. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__);
  411. BUG_ON(lp->pending_tx_skb == NULL);
  412. skb = lp->pending_tx_skb;
  413. lp->pending_tx_skb = NULL;
  414. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  415. /* cmdB {31:16] pkt tag [10:0] length */
  416. #ifdef SMC_USE_DMA
  417. /* 16 byte buffer alignment mode */
  418. buf = (char*)((u32)(skb->data) & ~0xF);
  419. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  420. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  421. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  422. skb->len;
  423. #else
  424. buf = (char*)((u32)skb->data & ~0x3);
  425. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  426. cmdA = (((u32)skb->data & 0x3) << 16) |
  427. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  428. skb->len;
  429. #endif
  430. /* tag is packet length so we can use this in stats update later */
  431. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  432. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  433. dev->name, len, len, buf, cmdA, cmdB);
  434. SMC_SET_TX_FIFO(lp, cmdA);
  435. SMC_SET_TX_FIFO(lp, cmdB);
  436. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  437. PRINT_PKT(buf, len <= 64 ? len : 64);
  438. /* Send pkt via PIO or DMA */
  439. #ifdef SMC_USE_DMA
  440. lp->current_tx_skb = skb;
  441. SMC_PUSH_DATA(lp, buf, len);
  442. /* DMA complete IRQ will free buffer and set jiffies */
  443. #else
  444. SMC_PUSH_DATA(lp, buf, len);
  445. dev->trans_start = jiffies;
  446. dev_kfree_skb(skb);
  447. #endif
  448. spin_lock_irqsave(&lp->lock, flags);
  449. if (!lp->tx_throttle) {
  450. netif_wake_queue(dev);
  451. }
  452. spin_unlock_irqrestore(&lp->lock, flags);
  453. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  454. }
  455. /*
  456. * Since I am not sure if I will have enough room in the chip's ram
  457. * to store the packet, I call this routine which either sends it
  458. * now, or set the card to generates an interrupt when ready
  459. * for the packet.
  460. */
  461. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  462. {
  463. struct smc911x_local *lp = netdev_priv(dev);
  464. unsigned int free;
  465. unsigned long flags;
  466. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  467. dev->name, __FUNCTION__);
  468. BUG_ON(lp->pending_tx_skb != NULL);
  469. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  470. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  471. /* Turn off the flow when running out of space in FIFO */
  472. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  473. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  474. dev->name, free);
  475. spin_lock_irqsave(&lp->lock, flags);
  476. /* Reenable when at least 1 packet of size MTU present */
  477. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  478. lp->tx_throttle = 1;
  479. netif_stop_queue(dev);
  480. spin_unlock_irqrestore(&lp->lock, flags);
  481. }
  482. /* Drop packets when we run out of space in TX FIFO
  483. * Account for overhead required for:
  484. *
  485. * Tx command words 8 bytes
  486. * Start offset 15 bytes
  487. * End padding 15 bytes
  488. */
  489. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  490. printk("%s: No Tx free space %d < %d\n",
  491. dev->name, free, skb->len);
  492. lp->pending_tx_skb = NULL;
  493. dev->stats.tx_errors++;
  494. dev->stats.tx_dropped++;
  495. dev_kfree_skb(skb);
  496. return 0;
  497. }
  498. #ifdef SMC_USE_DMA
  499. {
  500. /* If the DMA is already running then defer this packet Tx until
  501. * the DMA IRQ starts it
  502. */
  503. spin_lock_irqsave(&lp->lock, flags);
  504. if (lp->txdma_active) {
  505. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  506. lp->pending_tx_skb = skb;
  507. netif_stop_queue(dev);
  508. spin_unlock_irqrestore(&lp->lock, flags);
  509. return 0;
  510. } else {
  511. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  512. lp->txdma_active = 1;
  513. }
  514. spin_unlock_irqrestore(&lp->lock, flags);
  515. }
  516. #endif
  517. lp->pending_tx_skb = skb;
  518. smc911x_hardware_send_pkt(dev);
  519. return 0;
  520. }
  521. /*
  522. * This handles a TX status interrupt, which is only called when:
  523. * - a TX error occurred, or
  524. * - TX of a packet completed.
  525. */
  526. static void smc911x_tx(struct net_device *dev)
  527. {
  528. struct smc911x_local *lp = netdev_priv(dev);
  529. unsigned int tx_status;
  530. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  531. dev->name, __FUNCTION__);
  532. /* Collect the TX status */
  533. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  534. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  535. dev->name,
  536. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  537. tx_status = SMC_GET_TX_STS_FIFO(lp);
  538. dev->stats.tx_packets++;
  539. dev->stats.tx_bytes+=tx_status>>16;
  540. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  541. dev->name, (tx_status & 0xffff0000) >> 16,
  542. tx_status & 0x0000ffff);
  543. /* count Tx errors, but ignore lost carrier errors when in
  544. * full-duplex mode */
  545. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  546. !(tx_status & 0x00000306))) {
  547. dev->stats.tx_errors++;
  548. }
  549. if (tx_status & TX_STS_MANY_COLL_) {
  550. dev->stats.collisions+=16;
  551. dev->stats.tx_aborted_errors++;
  552. } else {
  553. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  554. }
  555. /* carrier error only has meaning for half-duplex communication */
  556. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  557. !lp->ctl_rfduplx) {
  558. dev->stats.tx_carrier_errors++;
  559. }
  560. if (tx_status & TX_STS_LATE_COLL_) {
  561. dev->stats.collisions++;
  562. dev->stats.tx_aborted_errors++;
  563. }
  564. }
  565. }
  566. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  567. /*
  568. * Reads a register from the MII Management serial interface
  569. */
  570. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  571. {
  572. struct smc911x_local *lp = netdev_priv(dev);
  573. unsigned int phydata;
  574. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  575. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  576. __FUNCTION__, phyaddr, phyreg, phydata);
  577. return phydata;
  578. }
  579. /*
  580. * Writes a register to the MII Management serial interface
  581. */
  582. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  583. int phydata)
  584. {
  585. struct smc911x_local *lp = netdev_priv(dev);
  586. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  587. __FUNCTION__, phyaddr, phyreg, phydata);
  588. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  589. }
  590. /*
  591. * Finds and reports the PHY address (115 and 117 have external
  592. * PHY interface 118 has internal only
  593. */
  594. static void smc911x_phy_detect(struct net_device *dev)
  595. {
  596. struct smc911x_local *lp = netdev_priv(dev);
  597. int phyaddr;
  598. unsigned int cfg, id1, id2;
  599. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  600. lp->phy_type = 0;
  601. /*
  602. * Scan all 32 PHY addresses if necessary, starting at
  603. * PHY#1 to PHY#31, and then PHY#0 last.
  604. */
  605. switch(lp->version) {
  606. case 0x115:
  607. case 0x117:
  608. cfg = SMC_GET_HW_CFG(lp);
  609. if (cfg & HW_CFG_EXT_PHY_DET_) {
  610. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  611. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  612. SMC_SET_HW_CFG(lp, cfg);
  613. udelay(10); /* Wait for clocks to stop */
  614. cfg |= HW_CFG_EXT_PHY_EN_;
  615. SMC_SET_HW_CFG(lp, cfg);
  616. udelay(10); /* Wait for clocks to stop */
  617. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  618. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  619. SMC_SET_HW_CFG(lp, cfg);
  620. udelay(10); /* Wait for clocks to stop */
  621. cfg |= HW_CFG_SMI_SEL_;
  622. SMC_SET_HW_CFG(lp, cfg);
  623. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  624. /* Read the PHY identifiers */
  625. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  626. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  627. /* Make sure it is a valid identifier */
  628. if (id1 != 0x0000 && id1 != 0xffff &&
  629. id1 != 0x8000 && id2 != 0x0000 &&
  630. id2 != 0xffff && id2 != 0x8000) {
  631. /* Save the PHY's address */
  632. lp->mii.phy_id = phyaddr & 31;
  633. lp->phy_type = id1 << 16 | id2;
  634. break;
  635. }
  636. }
  637. }
  638. default:
  639. /* Internal media only */
  640. SMC_GET_PHY_ID1(lp, 1, id1);
  641. SMC_GET_PHY_ID2(lp, 1, id2);
  642. /* Save the PHY's address */
  643. lp->mii.phy_id = 1;
  644. lp->phy_type = id1 << 16 | id2;
  645. }
  646. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  647. dev->name, id1, id2, lp->mii.phy_id);
  648. }
  649. /*
  650. * Sets the PHY to a configuration as determined by the user.
  651. * Called with spin_lock held.
  652. */
  653. static int smc911x_phy_fixed(struct net_device *dev)
  654. {
  655. struct smc911x_local *lp = netdev_priv(dev);
  656. int phyaddr = lp->mii.phy_id;
  657. int bmcr;
  658. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  659. /* Enter Link Disable state */
  660. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  661. bmcr |= BMCR_PDOWN;
  662. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  663. /*
  664. * Set our fixed capabilities
  665. * Disable auto-negotiation
  666. */
  667. bmcr &= ~BMCR_ANENABLE;
  668. if (lp->ctl_rfduplx)
  669. bmcr |= BMCR_FULLDPLX;
  670. if (lp->ctl_rspeed == 100)
  671. bmcr |= BMCR_SPEED100;
  672. /* Write our capabilities to the phy control register */
  673. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  674. /* Re-Configure the Receive/Phy Control register */
  675. bmcr &= ~BMCR_PDOWN;
  676. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  677. return 1;
  678. }
  679. /*
  680. * smc911x_phy_reset - reset the phy
  681. * @dev: net device
  682. * @phy: phy address
  683. *
  684. * Issue a software reset for the specified PHY and
  685. * wait up to 100ms for the reset to complete. We should
  686. * not access the PHY for 50ms after issuing the reset.
  687. *
  688. * The time to wait appears to be dependent on the PHY.
  689. *
  690. */
  691. static int smc911x_phy_reset(struct net_device *dev, int phy)
  692. {
  693. struct smc911x_local *lp = netdev_priv(dev);
  694. int timeout;
  695. unsigned long flags;
  696. unsigned int reg;
  697. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  698. spin_lock_irqsave(&lp->lock, flags);
  699. reg = SMC_GET_PMT_CTRL(lp);
  700. reg &= ~0xfffff030;
  701. reg |= PMT_CTRL_PHY_RST_;
  702. SMC_SET_PMT_CTRL(lp, reg);
  703. spin_unlock_irqrestore(&lp->lock, flags);
  704. for (timeout = 2; timeout; timeout--) {
  705. msleep(50);
  706. spin_lock_irqsave(&lp->lock, flags);
  707. reg = SMC_GET_PMT_CTRL(lp);
  708. spin_unlock_irqrestore(&lp->lock, flags);
  709. if (!(reg & PMT_CTRL_PHY_RST_)) {
  710. /* extra delay required because the phy may
  711. * not be completed with its reset
  712. * when PHY_BCR_RESET_ is cleared. 256us
  713. * should suffice, but use 500us to be safe
  714. */
  715. udelay(500);
  716. break;
  717. }
  718. }
  719. return reg & PMT_CTRL_PHY_RST_;
  720. }
  721. /*
  722. * smc911x_phy_powerdown - powerdown phy
  723. * @dev: net device
  724. * @phy: phy address
  725. *
  726. * Power down the specified PHY
  727. */
  728. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  729. {
  730. struct smc911x_local *lp = netdev_priv(dev);
  731. unsigned int bmcr;
  732. /* Enter Link Disable state */
  733. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  734. bmcr |= BMCR_PDOWN;
  735. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  736. }
  737. /*
  738. * smc911x_phy_check_media - check the media status and adjust BMCR
  739. * @dev: net device
  740. * @init: set true for initialisation
  741. *
  742. * Select duplex mode depending on negotiation state. This
  743. * also updates our carrier state.
  744. */
  745. static void smc911x_phy_check_media(struct net_device *dev, int init)
  746. {
  747. struct smc911x_local *lp = netdev_priv(dev);
  748. int phyaddr = lp->mii.phy_id;
  749. unsigned int bmcr, cr;
  750. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  751. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  752. /* duplex state has changed */
  753. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  754. SMC_GET_MAC_CR(lp, cr);
  755. if (lp->mii.full_duplex) {
  756. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  757. bmcr |= BMCR_FULLDPLX;
  758. cr |= MAC_CR_RCVOWN_;
  759. } else {
  760. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  761. bmcr &= ~BMCR_FULLDPLX;
  762. cr &= ~MAC_CR_RCVOWN_;
  763. }
  764. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  765. SMC_SET_MAC_CR(lp, cr);
  766. }
  767. }
  768. /*
  769. * Configures the specified PHY through the MII management interface
  770. * using Autonegotiation.
  771. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  772. * If RPC ANEG bit is set, the media selection is dependent purely on
  773. * the selection by the MII (either in the MII BMCR reg or the result
  774. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  775. * is controlled by the RPC SPEED and RPC DPLX bits.
  776. */
  777. static void smc911x_phy_configure(struct work_struct *work)
  778. {
  779. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  780. phy_configure);
  781. struct net_device *dev = lp->netdev;
  782. int phyaddr = lp->mii.phy_id;
  783. int my_phy_caps; /* My PHY capabilities */
  784. int my_ad_caps; /* My Advertised capabilities */
  785. int status;
  786. unsigned long flags;
  787. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__);
  788. /*
  789. * We should not be called if phy_type is zero.
  790. */
  791. if (lp->phy_type == 0)
  792. return;
  793. if (smc911x_phy_reset(dev, phyaddr)) {
  794. printk("%s: PHY reset timed out\n", dev->name);
  795. return;
  796. }
  797. spin_lock_irqsave(&lp->lock, flags);
  798. /*
  799. * Enable PHY Interrupts (for register 18)
  800. * Interrupts listed here are enabled
  801. */
  802. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  803. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  804. PHY_INT_MASK_LINK_DOWN_);
  805. /* If the user requested no auto neg, then go set his request */
  806. if (lp->mii.force_media) {
  807. smc911x_phy_fixed(dev);
  808. goto smc911x_phy_configure_exit;
  809. }
  810. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  811. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  812. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  813. printk(KERN_INFO "Auto negotiation NOT supported\n");
  814. smc911x_phy_fixed(dev);
  815. goto smc911x_phy_configure_exit;
  816. }
  817. /* CSMA capable w/ both pauses */
  818. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  819. if (my_phy_caps & BMSR_100BASE4)
  820. my_ad_caps |= ADVERTISE_100BASE4;
  821. if (my_phy_caps & BMSR_100FULL)
  822. my_ad_caps |= ADVERTISE_100FULL;
  823. if (my_phy_caps & BMSR_100HALF)
  824. my_ad_caps |= ADVERTISE_100HALF;
  825. if (my_phy_caps & BMSR_10FULL)
  826. my_ad_caps |= ADVERTISE_10FULL;
  827. if (my_phy_caps & BMSR_10HALF)
  828. my_ad_caps |= ADVERTISE_10HALF;
  829. /* Disable capabilities not selected by our user */
  830. if (lp->ctl_rspeed != 100)
  831. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  832. if (!lp->ctl_rfduplx)
  833. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  834. /* Update our Auto-Neg Advertisement Register */
  835. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  836. lp->mii.advertising = my_ad_caps;
  837. /*
  838. * Read the register back. Without this, it appears that when
  839. * auto-negotiation is restarted, sometimes it isn't ready and
  840. * the link does not come up.
  841. */
  842. udelay(10);
  843. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  844. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  845. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  846. /* Restart auto-negotiation process in order to advertise my caps */
  847. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  848. smc911x_phy_check_media(dev, 1);
  849. smc911x_phy_configure_exit:
  850. spin_unlock_irqrestore(&lp->lock, flags);
  851. }
  852. /*
  853. * smc911x_phy_interrupt
  854. *
  855. * Purpose: Handle interrupts relating to PHY register 18. This is
  856. * called from the "hard" interrupt handler under our private spinlock.
  857. */
  858. static void smc911x_phy_interrupt(struct net_device *dev)
  859. {
  860. struct smc911x_local *lp = netdev_priv(dev);
  861. int phyaddr = lp->mii.phy_id;
  862. int status;
  863. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  864. if (lp->phy_type == 0)
  865. return;
  866. smc911x_phy_check_media(dev, 0);
  867. /* read to clear status bits */
  868. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  869. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  870. dev->name, status & 0xffff);
  871. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  872. dev->name, SMC_GET_AFC_CFG(lp));
  873. }
  874. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  875. /*
  876. * This is the main routine of the driver, to handle the device when
  877. * it needs some attention.
  878. */
  879. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  880. {
  881. struct net_device *dev = dev_id;
  882. struct smc911x_local *lp = netdev_priv(dev);
  883. unsigned int status, mask, timeout;
  884. unsigned int rx_overrun=0, cr, pkts;
  885. unsigned long flags;
  886. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  887. spin_lock_irqsave(&lp->lock, flags);
  888. /* Spurious interrupt check */
  889. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  890. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  891. spin_unlock_irqrestore(&lp->lock, flags);
  892. return IRQ_NONE;
  893. }
  894. mask = SMC_GET_INT_EN(lp);
  895. SMC_SET_INT_EN(lp, 0);
  896. /* set a timeout value, so I don't stay here forever */
  897. timeout = 8;
  898. do {
  899. status = SMC_GET_INT(lp);
  900. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  901. dev->name, status, mask, status & ~mask);
  902. status &= mask;
  903. if (!status)
  904. break;
  905. /* Handle SW interrupt condition */
  906. if (status & INT_STS_SW_INT_) {
  907. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  908. mask &= ~INT_EN_SW_INT_EN_;
  909. }
  910. /* Handle various error conditions */
  911. if (status & INT_STS_RXE_) {
  912. SMC_ACK_INT(lp, INT_STS_RXE_);
  913. dev->stats.rx_errors++;
  914. }
  915. if (status & INT_STS_RXDFH_INT_) {
  916. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  917. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  918. }
  919. /* Undocumented interrupt-what is the right thing to do here? */
  920. if (status & INT_STS_RXDF_INT_) {
  921. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  922. }
  923. /* Rx Data FIFO exceeds set level */
  924. if (status & INT_STS_RDFL_) {
  925. if (IS_REV_A(lp->revision)) {
  926. rx_overrun=1;
  927. SMC_GET_MAC_CR(lp, cr);
  928. cr &= ~MAC_CR_RXEN_;
  929. SMC_SET_MAC_CR(lp, cr);
  930. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  931. dev->stats.rx_errors++;
  932. dev->stats.rx_fifo_errors++;
  933. }
  934. SMC_ACK_INT(lp, INT_STS_RDFL_);
  935. }
  936. if (status & INT_STS_RDFO_) {
  937. if (!IS_REV_A(lp->revision)) {
  938. SMC_GET_MAC_CR(lp, cr);
  939. cr &= ~MAC_CR_RXEN_;
  940. SMC_SET_MAC_CR(lp, cr);
  941. rx_overrun=1;
  942. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  943. dev->stats.rx_errors++;
  944. dev->stats.rx_fifo_errors++;
  945. }
  946. SMC_ACK_INT(lp, INT_STS_RDFO_);
  947. }
  948. /* Handle receive condition */
  949. if ((status & INT_STS_RSFL_) || rx_overrun) {
  950. unsigned int fifo;
  951. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  952. fifo = SMC_GET_RX_FIFO_INF(lp);
  953. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  954. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  955. dev->name, pkts, fifo & 0xFFFF );
  956. if (pkts != 0) {
  957. #ifdef SMC_USE_DMA
  958. unsigned int fifo;
  959. if (lp->rxdma_active){
  960. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  961. "%s: RX DMA active\n", dev->name);
  962. /* The DMA is already running so up the IRQ threshold */
  963. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  964. fifo |= pkts & 0xFF;
  965. DBG(SMC_DEBUG_RX,
  966. "%s: Setting RX stat FIFO threshold to %d\n",
  967. dev->name, fifo & 0xff);
  968. SMC_SET_FIFO_INT(lp, fifo);
  969. } else
  970. #endif
  971. smc911x_rcv(dev);
  972. }
  973. SMC_ACK_INT(lp, INT_STS_RSFL_);
  974. }
  975. /* Handle transmit FIFO available */
  976. if (status & INT_STS_TDFA_) {
  977. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  978. SMC_SET_FIFO_TDA(lp, 0xFF);
  979. lp->tx_throttle = 0;
  980. #ifdef SMC_USE_DMA
  981. if (!lp->txdma_active)
  982. #endif
  983. netif_wake_queue(dev);
  984. SMC_ACK_INT(lp, INT_STS_TDFA_);
  985. }
  986. /* Handle transmit done condition */
  987. #if 1
  988. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  989. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  990. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  991. dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  992. smc911x_tx(dev);
  993. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  994. SMC_ACK_INT(lp, INT_STS_TSFL_);
  995. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  996. }
  997. #else
  998. if (status & INT_STS_TSFL_) {
  999. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1000. smc911x_tx(dev);
  1001. SMC_ACK_INT(lp, INT_STS_TSFL_);
  1002. }
  1003. if (status & INT_STS_GPT_INT_) {
  1004. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1005. dev->name,
  1006. SMC_GET_IRQ_CFG(lp),
  1007. SMC_GET_FIFO_INT(lp),
  1008. SMC_GET_RX_CFG(lp));
  1009. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1010. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1011. dev->name,
  1012. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  1013. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  1014. SMC_GET_RX_STS_FIFO_PEEK(lp));
  1015. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  1016. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  1017. }
  1018. #endif
  1019. /* Handle PHY interrupt condition */
  1020. if (status & INT_STS_PHY_INT_) {
  1021. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1022. smc911x_phy_interrupt(dev);
  1023. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1024. }
  1025. } while (--timeout);
  1026. /* restore mask state */
  1027. SMC_SET_INT_EN(lp, mask);
  1028. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1029. dev->name, 8-timeout);
  1030. spin_unlock_irqrestore(&lp->lock, flags);
  1031. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1032. return IRQ_HANDLED;
  1033. }
  1034. #ifdef SMC_USE_DMA
  1035. static void
  1036. smc911x_tx_dma_irq(int dma, void *data)
  1037. {
  1038. struct net_device *dev = (struct net_device *)data;
  1039. struct smc911x_local *lp = netdev_priv(dev);
  1040. struct sk_buff *skb = lp->current_tx_skb;
  1041. unsigned long flags;
  1042. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1043. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1044. /* Clear the DMA interrupt sources */
  1045. SMC_DMA_ACK_IRQ(dev, dma);
  1046. BUG_ON(skb == NULL);
  1047. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1048. dev->trans_start = jiffies;
  1049. dev_kfree_skb_irq(skb);
  1050. lp->current_tx_skb = NULL;
  1051. if (lp->pending_tx_skb != NULL)
  1052. smc911x_hardware_send_pkt(dev);
  1053. else {
  1054. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1055. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1056. spin_lock_irqsave(&lp->lock, flags);
  1057. lp->txdma_active = 0;
  1058. if (!lp->tx_throttle) {
  1059. netif_wake_queue(dev);
  1060. }
  1061. spin_unlock_irqrestore(&lp->lock, flags);
  1062. }
  1063. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1064. "%s: TX DMA irq completed\n", dev->name);
  1065. }
  1066. static void
  1067. smc911x_rx_dma_irq(int dma, void *data)
  1068. {
  1069. struct net_device *dev = (struct net_device *)data;
  1070. unsigned long ioaddr = dev->base_addr;
  1071. struct smc911x_local *lp = netdev_priv(dev);
  1072. struct sk_buff *skb = lp->current_rx_skb;
  1073. unsigned long flags;
  1074. unsigned int pkts;
  1075. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1076. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1077. /* Clear the DMA interrupt sources */
  1078. SMC_DMA_ACK_IRQ(dev, dma);
  1079. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1080. BUG_ON(skb == NULL);
  1081. lp->current_rx_skb = NULL;
  1082. PRINT_PKT(skb->data, skb->len);
  1083. dev->last_rx = jiffies;
  1084. skb->protocol = eth_type_trans(skb, dev);
  1085. dev->stats.rx_packets++;
  1086. dev->stats.rx_bytes += skb->len;
  1087. netif_rx(skb);
  1088. spin_lock_irqsave(&lp->lock, flags);
  1089. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1090. if (pkts != 0) {
  1091. smc911x_rcv(dev);
  1092. }else {
  1093. lp->rxdma_active = 0;
  1094. }
  1095. spin_unlock_irqrestore(&lp->lock, flags);
  1096. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1097. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1098. dev->name, pkts);
  1099. }
  1100. #endif /* SMC_USE_DMA */
  1101. #ifdef CONFIG_NET_POLL_CONTROLLER
  1102. /*
  1103. * Polling receive - used by netconsole and other diagnostic tools
  1104. * to allow network i/o with interrupts disabled.
  1105. */
  1106. static void smc911x_poll_controller(struct net_device *dev)
  1107. {
  1108. disable_irq(dev->irq);
  1109. smc911x_interrupt(dev->irq, dev);
  1110. enable_irq(dev->irq);
  1111. }
  1112. #endif
  1113. /* Our watchdog timed out. Called by the networking layer */
  1114. static void smc911x_timeout(struct net_device *dev)
  1115. {
  1116. struct smc911x_local *lp = netdev_priv(dev);
  1117. int status, mask;
  1118. unsigned long flags;
  1119. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1120. spin_lock_irqsave(&lp->lock, flags);
  1121. status = SMC_GET_INT(lp);
  1122. mask = SMC_GET_INT_EN(lp);
  1123. spin_unlock_irqrestore(&lp->lock, flags);
  1124. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1125. dev->name, status, mask);
  1126. /* Dump the current TX FIFO contents and restart */
  1127. mask = SMC_GET_TX_CFG(lp);
  1128. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1129. /*
  1130. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1131. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1132. * which calls schedule(). Hence we use a work queue.
  1133. */
  1134. if (lp->phy_type != 0)
  1135. schedule_work(&lp->phy_configure);
  1136. /* We can accept TX packets again */
  1137. dev->trans_start = jiffies;
  1138. netif_wake_queue(dev);
  1139. }
  1140. /*
  1141. * This routine will, depending on the values passed to it,
  1142. * either make it accept multicast packets, go into
  1143. * promiscuous mode (for TCPDUMP and cousins) or accept
  1144. * a select set of multicast packets
  1145. */
  1146. static void smc911x_set_multicast_list(struct net_device *dev)
  1147. {
  1148. struct smc911x_local *lp = netdev_priv(dev);
  1149. unsigned int multicast_table[2];
  1150. unsigned int mcr, update_multicast = 0;
  1151. unsigned long flags;
  1152. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1153. spin_lock_irqsave(&lp->lock, flags);
  1154. SMC_GET_MAC_CR(lp, mcr);
  1155. spin_unlock_irqrestore(&lp->lock, flags);
  1156. if (dev->flags & IFF_PROMISC) {
  1157. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1158. mcr |= MAC_CR_PRMS_;
  1159. }
  1160. /*
  1161. * Here, I am setting this to accept all multicast packets.
  1162. * I don't need to zero the multicast table, because the flag is
  1163. * checked before the table is
  1164. */
  1165. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1166. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1167. mcr |= MAC_CR_MCPAS_;
  1168. }
  1169. /*
  1170. * This sets the internal hardware table to filter out unwanted
  1171. * multicast packets before they take up memory.
  1172. *
  1173. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1174. * address are the offset into the table. If that bit is 1, then the
  1175. * multicast packet is accepted. Otherwise, it's dropped silently.
  1176. *
  1177. * To use the 6 bits as an offset into the table, the high 1 bit is
  1178. * the number of the 32 bit register, while the low 5 bits are the bit
  1179. * within that register.
  1180. */
  1181. else if (dev->mc_count) {
  1182. int i;
  1183. struct dev_mc_list *cur_addr;
  1184. /* Set the Hash perfec mode */
  1185. mcr |= MAC_CR_HPFILT_;
  1186. /* start with a table of all zeros: reject all */
  1187. memset(multicast_table, 0, sizeof(multicast_table));
  1188. cur_addr = dev->mc_list;
  1189. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1190. u32 position;
  1191. /* do we have a pointer here? */
  1192. if (!cur_addr)
  1193. break;
  1194. /* make sure this is a multicast address -
  1195. shouldn't this be a given if we have it here ? */
  1196. if (!(*cur_addr->dmi_addr & 1))
  1197. continue;
  1198. /* upper 6 bits are used as hash index */
  1199. position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
  1200. multicast_table[position>>5] |= 1 << (position&0x1f);
  1201. }
  1202. /* be sure I get rid of flags I might have set */
  1203. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1204. /* now, the table can be loaded into the chipset */
  1205. update_multicast = 1;
  1206. } else {
  1207. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1208. dev->name);
  1209. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1210. /*
  1211. * since I'm disabling all multicast entirely, I need to
  1212. * clear the multicast list
  1213. */
  1214. memset(multicast_table, 0, sizeof(multicast_table));
  1215. update_multicast = 1;
  1216. }
  1217. spin_lock_irqsave(&lp->lock, flags);
  1218. SMC_SET_MAC_CR(lp, mcr);
  1219. if (update_multicast) {
  1220. DBG(SMC_DEBUG_MISC,
  1221. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1222. dev->name, multicast_table[0], multicast_table[1]);
  1223. SMC_SET_HASHL(lp, multicast_table[0]);
  1224. SMC_SET_HASHH(lp, multicast_table[1]);
  1225. }
  1226. spin_unlock_irqrestore(&lp->lock, flags);
  1227. }
  1228. /*
  1229. * Open and Initialize the board
  1230. *
  1231. * Set up everything, reset the card, etc..
  1232. */
  1233. static int
  1234. smc911x_open(struct net_device *dev)
  1235. {
  1236. struct smc911x_local *lp = netdev_priv(dev);
  1237. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1238. /*
  1239. * Check that the address is valid. If its not, refuse
  1240. * to bring the device up. The user must specify an
  1241. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1242. */
  1243. if (!is_valid_ether_addr(dev->dev_addr)) {
  1244. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1245. return -EINVAL;
  1246. }
  1247. /* reset the hardware */
  1248. smc911x_reset(dev);
  1249. /* Configure the PHY, initialize the link state */
  1250. smc911x_phy_configure(&lp->phy_configure);
  1251. /* Turn on Tx + Rx */
  1252. smc911x_enable(dev);
  1253. netif_start_queue(dev);
  1254. return 0;
  1255. }
  1256. /*
  1257. * smc911x_close
  1258. *
  1259. * this makes the board clean up everything that it can
  1260. * and not talk to the outside world. Caused by
  1261. * an 'ifconfig ethX down'
  1262. */
  1263. static int smc911x_close(struct net_device *dev)
  1264. {
  1265. struct smc911x_local *lp = netdev_priv(dev);
  1266. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1267. netif_stop_queue(dev);
  1268. netif_carrier_off(dev);
  1269. /* clear everything */
  1270. smc911x_shutdown(dev);
  1271. if (lp->phy_type != 0) {
  1272. /* We need to ensure that no calls to
  1273. * smc911x_phy_configure are pending.
  1274. */
  1275. cancel_work_sync(&lp->phy_configure);
  1276. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1277. }
  1278. if (lp->pending_tx_skb) {
  1279. dev_kfree_skb(lp->pending_tx_skb);
  1280. lp->pending_tx_skb = NULL;
  1281. }
  1282. return 0;
  1283. }
  1284. /*
  1285. * Ethtool support
  1286. */
  1287. static int
  1288. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1289. {
  1290. struct smc911x_local *lp = netdev_priv(dev);
  1291. int ret, status;
  1292. unsigned long flags;
  1293. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1294. cmd->maxtxpkt = 1;
  1295. cmd->maxrxpkt = 1;
  1296. if (lp->phy_type != 0) {
  1297. spin_lock_irqsave(&lp->lock, flags);
  1298. ret = mii_ethtool_gset(&lp->mii, cmd);
  1299. spin_unlock_irqrestore(&lp->lock, flags);
  1300. } else {
  1301. cmd->supported = SUPPORTED_10baseT_Half |
  1302. SUPPORTED_10baseT_Full |
  1303. SUPPORTED_TP | SUPPORTED_AUI;
  1304. if (lp->ctl_rspeed == 10)
  1305. cmd->speed = SPEED_10;
  1306. else if (lp->ctl_rspeed == 100)
  1307. cmd->speed = SPEED_100;
  1308. cmd->autoneg = AUTONEG_DISABLE;
  1309. if (lp->mii.phy_id==1)
  1310. cmd->transceiver = XCVR_INTERNAL;
  1311. else
  1312. cmd->transceiver = XCVR_EXTERNAL;
  1313. cmd->port = 0;
  1314. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1315. cmd->duplex =
  1316. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1317. DUPLEX_FULL : DUPLEX_HALF;
  1318. ret = 0;
  1319. }
  1320. return ret;
  1321. }
  1322. static int
  1323. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1324. {
  1325. struct smc911x_local *lp = netdev_priv(dev);
  1326. int ret;
  1327. unsigned long flags;
  1328. if (lp->phy_type != 0) {
  1329. spin_lock_irqsave(&lp->lock, flags);
  1330. ret = mii_ethtool_sset(&lp->mii, cmd);
  1331. spin_unlock_irqrestore(&lp->lock, flags);
  1332. } else {
  1333. if (cmd->autoneg != AUTONEG_DISABLE ||
  1334. cmd->speed != SPEED_10 ||
  1335. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1336. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1337. return -EINVAL;
  1338. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1339. ret = 0;
  1340. }
  1341. return ret;
  1342. }
  1343. static void
  1344. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1345. {
  1346. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1347. strncpy(info->version, version, sizeof(info->version));
  1348. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1349. }
  1350. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1351. {
  1352. struct smc911x_local *lp = netdev_priv(dev);
  1353. int ret = -EINVAL;
  1354. unsigned long flags;
  1355. if (lp->phy_type != 0) {
  1356. spin_lock_irqsave(&lp->lock, flags);
  1357. ret = mii_nway_restart(&lp->mii);
  1358. spin_unlock_irqrestore(&lp->lock, flags);
  1359. }
  1360. return ret;
  1361. }
  1362. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1363. {
  1364. struct smc911x_local *lp = netdev_priv(dev);
  1365. return lp->msg_enable;
  1366. }
  1367. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1368. {
  1369. struct smc911x_local *lp = netdev_priv(dev);
  1370. lp->msg_enable = level;
  1371. }
  1372. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1373. {
  1374. /* System regs + MAC regs + PHY regs */
  1375. return (((E2P_CMD - ID_REV)/4 + 1) +
  1376. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1377. }
  1378. static void smc911x_ethtool_getregs(struct net_device *dev,
  1379. struct ethtool_regs* regs, void *buf)
  1380. {
  1381. struct smc911x_local *lp = netdev_priv(dev);
  1382. unsigned long flags;
  1383. u32 reg,i,j=0;
  1384. u32 *data = (u32*)buf;
  1385. regs->version = lp->version;
  1386. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1387. data[j++] = SMC_inl(lp, i);
  1388. }
  1389. for(i=MAC_CR;i<=WUCSR;i++) {
  1390. spin_lock_irqsave(&lp->lock, flags);
  1391. SMC_GET_MAC_CSR(lp, i, reg);
  1392. spin_unlock_irqrestore(&lp->lock, flags);
  1393. data[j++] = reg;
  1394. }
  1395. for(i=0;i<=31;i++) {
  1396. spin_lock_irqsave(&lp->lock, flags);
  1397. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1398. spin_unlock_irqrestore(&lp->lock, flags);
  1399. data[j++] = reg & 0xFFFF;
  1400. }
  1401. }
  1402. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1403. {
  1404. struct smc911x_local *lp = netdev_priv(dev);
  1405. unsigned int timeout;
  1406. int e2p_cmd;
  1407. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1408. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1409. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1410. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1411. dev->name, __FUNCTION__);
  1412. return -EFAULT;
  1413. }
  1414. mdelay(1);
  1415. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1416. }
  1417. if (timeout == 0) {
  1418. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1419. dev->name, __FUNCTION__);
  1420. return -ETIMEDOUT;
  1421. }
  1422. return 0;
  1423. }
  1424. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1425. int cmd, int addr)
  1426. {
  1427. struct smc911x_local *lp = netdev_priv(dev);
  1428. int ret;
  1429. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1430. return ret;
  1431. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1432. ((cmd) & (0x7<<28)) |
  1433. ((addr) & 0xFF));
  1434. return 0;
  1435. }
  1436. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1437. u8 *data)
  1438. {
  1439. struct smc911x_local *lp = netdev_priv(dev);
  1440. int ret;
  1441. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1442. return ret;
  1443. *data = SMC_GET_E2P_DATA(lp);
  1444. return 0;
  1445. }
  1446. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1447. u8 data)
  1448. {
  1449. struct smc911x_local *lp = netdev_priv(dev);
  1450. int ret;
  1451. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1452. return ret;
  1453. SMC_SET_E2P_DATA(lp, data);
  1454. return 0;
  1455. }
  1456. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1457. struct ethtool_eeprom *eeprom, u8 *data)
  1458. {
  1459. u8 eebuf[SMC911X_EEPROM_LEN];
  1460. int i, ret;
  1461. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1462. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1463. return ret;
  1464. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1465. return ret;
  1466. }
  1467. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1468. return 0;
  1469. }
  1470. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1471. struct ethtool_eeprom *eeprom, u8 *data)
  1472. {
  1473. int i, ret;
  1474. /* Enable erase */
  1475. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1476. return ret;
  1477. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1478. /* erase byte */
  1479. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1480. return ret;
  1481. /* write byte */
  1482. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1483. return ret;
  1484. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1485. return ret;
  1486. }
  1487. return 0;
  1488. }
  1489. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1490. {
  1491. return SMC911X_EEPROM_LEN;
  1492. }
  1493. static const struct ethtool_ops smc911x_ethtool_ops = {
  1494. .get_settings = smc911x_ethtool_getsettings,
  1495. .set_settings = smc911x_ethtool_setsettings,
  1496. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1497. .get_msglevel = smc911x_ethtool_getmsglevel,
  1498. .set_msglevel = smc911x_ethtool_setmsglevel,
  1499. .nway_reset = smc911x_ethtool_nwayreset,
  1500. .get_link = ethtool_op_get_link,
  1501. .get_regs_len = smc911x_ethtool_getregslen,
  1502. .get_regs = smc911x_ethtool_getregs,
  1503. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1504. .get_eeprom = smc911x_ethtool_geteeprom,
  1505. .set_eeprom = smc911x_ethtool_seteeprom,
  1506. };
  1507. /*
  1508. * smc911x_findirq
  1509. *
  1510. * This routine has a simple purpose -- make the SMC chip generate an
  1511. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1512. */
  1513. static int __init smc911x_findirq(struct net_device *dev)
  1514. {
  1515. struct smc911x_local *lp = netdev_priv(dev);
  1516. int timeout = 20;
  1517. unsigned long cookie;
  1518. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1519. cookie = probe_irq_on();
  1520. /*
  1521. * Force a SW interrupt
  1522. */
  1523. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1524. /*
  1525. * Wait until positive that the interrupt has been generated
  1526. */
  1527. do {
  1528. int int_status;
  1529. udelay(10);
  1530. int_status = SMC_GET_INT_EN(lp);
  1531. if (int_status & INT_EN_SW_INT_EN_)
  1532. break; /* got the interrupt */
  1533. } while (--timeout);
  1534. /*
  1535. * there is really nothing that I can do here if timeout fails,
  1536. * as autoirq_report will return a 0 anyway, which is what I
  1537. * want in this case. Plus, the clean up is needed in both
  1538. * cases.
  1539. */
  1540. /* and disable all interrupts again */
  1541. SMC_SET_INT_EN(lp, 0);
  1542. /* and return what I found */
  1543. return probe_irq_off(cookie);
  1544. }
  1545. /*
  1546. * Function: smc911x_probe(unsigned long ioaddr)
  1547. *
  1548. * Purpose:
  1549. * Tests to see if a given ioaddr points to an SMC911x chip.
  1550. * Returns a 0 on success
  1551. *
  1552. * Algorithm:
  1553. * (1) see if the endian word is OK
  1554. * (1) see if I recognize the chip ID in the appropriate register
  1555. *
  1556. * Here I do typical initialization tasks.
  1557. *
  1558. * o Initialize the structure if needed
  1559. * o print out my vanity message if not done so already
  1560. * o print out what type of hardware is detected
  1561. * o print out the ethernet address
  1562. * o find the IRQ
  1563. * o set up my private data
  1564. * o configure the dev structure with my subroutines
  1565. * o actually GRAB the irq.
  1566. * o GRAB the region
  1567. */
  1568. static int __init smc911x_probe(struct net_device *dev)
  1569. {
  1570. struct smc911x_local *lp = netdev_priv(dev);
  1571. int i, retval;
  1572. unsigned int val, chip_id, revision;
  1573. const char *version_string;
  1574. unsigned long irq_flags;
  1575. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__);
  1576. /* First, see if the endian word is recognized */
  1577. val = SMC_GET_BYTE_TEST(lp);
  1578. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1579. if (val != 0x87654321) {
  1580. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1581. retval = -ENODEV;
  1582. goto err_out;
  1583. }
  1584. /*
  1585. * check if the revision register is something that I
  1586. * recognize. These might need to be added to later,
  1587. * as future revisions could be added.
  1588. */
  1589. chip_id = SMC_GET_PN(lp);
  1590. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1591. for(i=0;chip_ids[i].id != 0; i++) {
  1592. if (chip_ids[i].id == chip_id) break;
  1593. }
  1594. if (!chip_ids[i].id) {
  1595. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1596. retval = -ENODEV;
  1597. goto err_out;
  1598. }
  1599. version_string = chip_ids[i].name;
  1600. revision = SMC_GET_REV(lp);
  1601. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1602. /* At this point I'll assume that the chip is an SMC911x. */
  1603. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1604. /* Validate the TX FIFO size requested */
  1605. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1606. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1607. retval = -EINVAL;
  1608. goto err_out;
  1609. }
  1610. /* fill in some of the fields */
  1611. lp->version = chip_ids[i].id;
  1612. lp->revision = revision;
  1613. lp->tx_fifo_kb = tx_fifo_kb;
  1614. /* Reverse calculate the RX FIFO size from the TX */
  1615. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1616. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1617. /* Set the automatic flow control values */
  1618. switch(lp->tx_fifo_kb) {
  1619. /*
  1620. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1621. * AFC_LO is AFC_HI/2
  1622. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1623. */
  1624. case 2:/* 13440 Rx Data Fifo Size */
  1625. lp->afc_cfg=0x008C46AF;break;
  1626. case 3:/* 12480 Rx Data Fifo Size */
  1627. lp->afc_cfg=0x0082419F;break;
  1628. case 4:/* 11520 Rx Data Fifo Size */
  1629. lp->afc_cfg=0x00783C9F;break;
  1630. case 5:/* 10560 Rx Data Fifo Size */
  1631. lp->afc_cfg=0x006E374F;break;
  1632. case 6:/* 9600 Rx Data Fifo Size */
  1633. lp->afc_cfg=0x0064328F;break;
  1634. case 7:/* 8640 Rx Data Fifo Size */
  1635. lp->afc_cfg=0x005A2D7F;break;
  1636. case 8:/* 7680 Rx Data Fifo Size */
  1637. lp->afc_cfg=0x0050287F;break;
  1638. case 9:/* 6720 Rx Data Fifo Size */
  1639. lp->afc_cfg=0x0046236F;break;
  1640. case 10:/* 5760 Rx Data Fifo Size */
  1641. lp->afc_cfg=0x003C1E6F;break;
  1642. case 11:/* 4800 Rx Data Fifo Size */
  1643. lp->afc_cfg=0x0032195F;break;
  1644. /*
  1645. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1646. * AFC_LO is AFC_HI/2
  1647. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1648. */
  1649. case 12:/* 3840 Rx Data Fifo Size */
  1650. lp->afc_cfg=0x0024124F;break;
  1651. case 13:/* 2880 Rx Data Fifo Size */
  1652. lp->afc_cfg=0x0015073F;break;
  1653. case 14:/* 1920 Rx Data Fifo Size */
  1654. lp->afc_cfg=0x0006032F;break;
  1655. default:
  1656. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1657. dev->name);
  1658. break;
  1659. }
  1660. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1661. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1662. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1663. spin_lock_init(&lp->lock);
  1664. /* Get the MAC address */
  1665. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1666. /* now, reset the chip, and put it into a known state */
  1667. smc911x_reset(dev);
  1668. /*
  1669. * If dev->irq is 0, then the device has to be banged on to see
  1670. * what the IRQ is.
  1671. *
  1672. * Specifying an IRQ is done with the assumption that the user knows
  1673. * what (s)he is doing. No checking is done!!!!
  1674. */
  1675. if (dev->irq < 1) {
  1676. int trials;
  1677. trials = 3;
  1678. while (trials--) {
  1679. dev->irq = smc911x_findirq(dev);
  1680. if (dev->irq)
  1681. break;
  1682. /* kick the card and try again */
  1683. smc911x_reset(dev);
  1684. }
  1685. }
  1686. if (dev->irq == 0) {
  1687. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1688. dev->name);
  1689. retval = -ENODEV;
  1690. goto err_out;
  1691. }
  1692. dev->irq = irq_canonicalize(dev->irq);
  1693. /* Fill in the fields of the device structure with ethernet values. */
  1694. ether_setup(dev);
  1695. dev->open = smc911x_open;
  1696. dev->stop = smc911x_close;
  1697. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1698. dev->tx_timeout = smc911x_timeout;
  1699. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1700. dev->set_multicast_list = smc911x_set_multicast_list;
  1701. dev->ethtool_ops = &smc911x_ethtool_ops;
  1702. #ifdef CONFIG_NET_POLL_CONTROLLER
  1703. dev->poll_controller = smc911x_poll_controller;
  1704. #endif
  1705. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1706. lp->mii.phy_id_mask = 0x1f;
  1707. lp->mii.reg_num_mask = 0x1f;
  1708. lp->mii.force_media = 0;
  1709. lp->mii.full_duplex = 0;
  1710. lp->mii.dev = dev;
  1711. lp->mii.mdio_read = smc911x_phy_read;
  1712. lp->mii.mdio_write = smc911x_phy_write;
  1713. /*
  1714. * Locate the phy, if any.
  1715. */
  1716. smc911x_phy_detect(dev);
  1717. /* Set default parameters */
  1718. lp->msg_enable = NETIF_MSG_LINK;
  1719. lp->ctl_rfduplx = 1;
  1720. lp->ctl_rspeed = 100;
  1721. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1722. irq_flags = lp->cfg.irq_flags;
  1723. #else
  1724. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1725. #endif
  1726. /* Grab the IRQ */
  1727. retval = request_irq(dev->irq, &smc911x_interrupt,
  1728. irq_flags, dev->name, dev);
  1729. if (retval)
  1730. goto err_out;
  1731. #ifdef SMC_USE_DMA
  1732. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1733. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1734. lp->rxdma_active = 0;
  1735. lp->txdma_active = 0;
  1736. dev->dma = lp->rxdma;
  1737. #endif
  1738. retval = register_netdev(dev);
  1739. if (retval == 0) {
  1740. /* now, print out the card info, in a short format.. */
  1741. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1742. dev->name, version_string, lp->revision,
  1743. dev->base_addr, dev->irq);
  1744. #ifdef SMC_USE_DMA
  1745. if (lp->rxdma != -1)
  1746. printk(" RXDMA %d ", lp->rxdma);
  1747. if (lp->txdma != -1)
  1748. printk("TXDMA %d", lp->txdma);
  1749. #endif
  1750. printk("\n");
  1751. if (!is_valid_ether_addr(dev->dev_addr)) {
  1752. printk("%s: Invalid ethernet MAC address. Please "
  1753. "set using ifconfig\n", dev->name);
  1754. } else {
  1755. /* Print the Ethernet address */
  1756. printk("%s: Ethernet addr: ", dev->name);
  1757. for (i = 0; i < 5; i++)
  1758. printk("%2.2x:", dev->dev_addr[i]);
  1759. printk("%2.2x\n", dev->dev_addr[5]);
  1760. }
  1761. if (lp->phy_type == 0) {
  1762. PRINTK("%s: No PHY found\n", dev->name);
  1763. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1764. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1765. } else {
  1766. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1767. }
  1768. }
  1769. err_out:
  1770. #ifdef SMC_USE_DMA
  1771. if (retval) {
  1772. if (lp->rxdma != -1) {
  1773. SMC_DMA_FREE(dev, lp->rxdma);
  1774. }
  1775. if (lp->txdma != -1) {
  1776. SMC_DMA_FREE(dev, lp->txdma);
  1777. }
  1778. }
  1779. #endif
  1780. return retval;
  1781. }
  1782. /*
  1783. * smc911x_init(void)
  1784. *
  1785. * Output:
  1786. * 0 --> there is a device
  1787. * anything else, error
  1788. */
  1789. static int smc911x_drv_probe(struct platform_device *pdev)
  1790. {
  1791. struct smc91x_platdata *pd = pdev->dev.platform_data;
  1792. struct net_device *ndev;
  1793. struct resource *res;
  1794. struct smc911x_local *lp;
  1795. unsigned int *addr;
  1796. int ret;
  1797. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1798. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1799. if (!res) {
  1800. ret = -ENODEV;
  1801. goto out;
  1802. }
  1803. /*
  1804. * Request the regions.
  1805. */
  1806. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1807. ret = -EBUSY;
  1808. goto out;
  1809. }
  1810. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1811. if (!ndev) {
  1812. printk("%s: could not allocate device.\n", CARDNAME);
  1813. ret = -ENOMEM;
  1814. goto release_1;
  1815. }
  1816. SET_NETDEV_DEV(ndev, &pdev->dev);
  1817. ndev->dma = (unsigned char)-1;
  1818. ndev->irq = platform_get_irq(pdev, 0);
  1819. lp = netdev_priv(ndev);
  1820. lp->netdev = ndev;
  1821. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1822. if (!pd) {
  1823. ret = -EINVAL;
  1824. goto release_both;
  1825. }
  1826. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1827. #endif
  1828. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1829. if (!addr) {
  1830. ret = -ENOMEM;
  1831. goto release_both;
  1832. }
  1833. platform_set_drvdata(pdev, ndev);
  1834. lp->base = addr;
  1835. ndev->base_addr = res->start;
  1836. ret = smc911x_probe(ndev);
  1837. if (ret != 0) {
  1838. platform_set_drvdata(pdev, NULL);
  1839. iounmap(addr);
  1840. release_both:
  1841. free_netdev(ndev);
  1842. release_1:
  1843. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1844. out:
  1845. printk("%s: not found (%d).\n", CARDNAME, ret);
  1846. }
  1847. #ifdef SMC_USE_DMA
  1848. else {
  1849. lp->physaddr = res->start;
  1850. lp->dev = &pdev->dev;
  1851. }
  1852. #endif
  1853. return ret;
  1854. }
  1855. static int smc911x_drv_remove(struct platform_device *pdev)
  1856. {
  1857. struct net_device *ndev = platform_get_drvdata(pdev);
  1858. struct smc911x_local *lp = netdev_priv(ndev);
  1859. struct resource *res;
  1860. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1861. platform_set_drvdata(pdev, NULL);
  1862. unregister_netdev(ndev);
  1863. free_irq(ndev->irq, ndev);
  1864. #ifdef SMC_USE_DMA
  1865. {
  1866. if (lp->rxdma != -1) {
  1867. SMC_DMA_FREE(dev, lp->rxdma);
  1868. }
  1869. if (lp->txdma != -1) {
  1870. SMC_DMA_FREE(dev, lp->txdma);
  1871. }
  1872. }
  1873. #endif
  1874. iounmap(lp->base);
  1875. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1876. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1877. free_netdev(ndev);
  1878. return 0;
  1879. }
  1880. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1881. {
  1882. struct net_device *ndev = platform_get_drvdata(dev);
  1883. struct smc911x_local *lp = netdev_priv(ndev);
  1884. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1885. if (ndev) {
  1886. if (netif_running(ndev)) {
  1887. netif_device_detach(ndev);
  1888. smc911x_shutdown(ndev);
  1889. #if POWER_DOWN
  1890. /* Set D2 - Energy detect only setting */
  1891. SMC_SET_PMT_CTRL(lp, 2<<12);
  1892. #endif
  1893. }
  1894. }
  1895. return 0;
  1896. }
  1897. static int smc911x_drv_resume(struct platform_device *dev)
  1898. {
  1899. struct net_device *ndev = platform_get_drvdata(dev);
  1900. DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__);
  1901. if (ndev) {
  1902. struct smc911x_local *lp = netdev_priv(ndev);
  1903. if (netif_running(ndev)) {
  1904. smc911x_reset(ndev);
  1905. smc911x_enable(ndev);
  1906. if (lp->phy_type != 0)
  1907. smc911x_phy_configure(&lp->phy_configure);
  1908. netif_device_attach(ndev);
  1909. }
  1910. }
  1911. return 0;
  1912. }
  1913. static struct platform_driver smc911x_driver = {
  1914. .probe = smc911x_drv_probe,
  1915. .remove = smc911x_drv_remove,
  1916. .suspend = smc911x_drv_suspend,
  1917. .resume = smc911x_drv_resume,
  1918. .driver = {
  1919. .name = CARDNAME,
  1920. .owner = THIS_MODULE,
  1921. },
  1922. };
  1923. static int __init smc911x_init(void)
  1924. {
  1925. return platform_driver_register(&smc911x_driver);
  1926. }
  1927. static void __exit smc911x_cleanup(void)
  1928. {
  1929. platform_driver_unregister(&smc911x_driver);
  1930. }
  1931. module_init(smc911x_init);
  1932. module_exit(smc911x_cleanup);