swim3.c 29 KB

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  1. /*
  2. * Driver for the SWIM3 (Super Woz Integrated Machine 3)
  3. * floppy controller found on Power Macintoshes.
  4. *
  5. * Copyright (C) 1996 Paul Mackerras.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * TODO:
  14. * handle 2 drives
  15. * handle GCR disks
  16. */
  17. #include <linux/config.h>
  18. #include <linux/stddef.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/timer.h>
  22. #include <linux/delay.h>
  23. #include <linux/fd.h>
  24. #include <linux/ioctl.h>
  25. #include <linux/blkdev.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/module.h>
  28. #include <linux/spinlock.h>
  29. #include <asm/io.h>
  30. #include <asm/dbdma.h>
  31. #include <asm/prom.h>
  32. #include <asm/uaccess.h>
  33. #include <asm/mediabay.h>
  34. #include <asm/machdep.h>
  35. #include <asm/pmac_feature.h>
  36. static struct request_queue *swim3_queue;
  37. static struct gendisk *disks[2];
  38. static struct request *fd_req;
  39. #define MAX_FLOPPIES 2
  40. enum swim_state {
  41. idle,
  42. locating,
  43. seeking,
  44. settling,
  45. do_transfer,
  46. jogging,
  47. available,
  48. revalidating,
  49. ejecting
  50. };
  51. #define REG(x) unsigned char x; char x ## _pad[15];
  52. /*
  53. * The names for these registers mostly represent speculation on my part.
  54. * It will be interesting to see how close they are to the names Apple uses.
  55. */
  56. struct swim3 {
  57. REG(data);
  58. REG(timer); /* counts down at 1MHz */
  59. REG(error);
  60. REG(mode);
  61. REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
  62. REG(setup);
  63. REG(control); /* writing bits clears them */
  64. REG(status); /* writing bits sets them in control */
  65. REG(intr);
  66. REG(nseek); /* # tracks to seek */
  67. REG(ctrack); /* current track number */
  68. REG(csect); /* current sector number */
  69. REG(gap3); /* size of gap 3 in track format */
  70. REG(sector); /* sector # to read or write */
  71. REG(nsect); /* # sectors to read or write */
  72. REG(intr_enable);
  73. };
  74. #define control_bic control
  75. #define control_bis status
  76. /* Bits in select register */
  77. #define CA_MASK 7
  78. #define LSTRB 8
  79. /* Bits in control register */
  80. #define DO_SEEK 0x80
  81. #define FORMAT 0x40
  82. #define SELECT 0x20
  83. #define WRITE_SECTORS 0x10
  84. #define DO_ACTION 0x08
  85. #define DRIVE2_ENABLE 0x04
  86. #define DRIVE_ENABLE 0x02
  87. #define INTR_ENABLE 0x01
  88. /* Bits in status register */
  89. #define FIFO_1BYTE 0x80
  90. #define FIFO_2BYTE 0x40
  91. #define ERROR 0x20
  92. #define DATA 0x08
  93. #define RDDATA 0x04
  94. #define INTR_PENDING 0x02
  95. #define MARK_BYTE 0x01
  96. /* Bits in intr and intr_enable registers */
  97. #define ERROR_INTR 0x20
  98. #define DATA_CHANGED 0x10
  99. #define TRANSFER_DONE 0x08
  100. #define SEEN_SECTOR 0x04
  101. #define SEEK_DONE 0x02
  102. #define TIMER_DONE 0x01
  103. /* Bits in error register */
  104. #define ERR_DATA_CRC 0x80
  105. #define ERR_ADDR_CRC 0x40
  106. #define ERR_OVERRUN 0x04
  107. #define ERR_UNDERRUN 0x01
  108. /* Bits in setup register */
  109. #define S_SW_RESET 0x80
  110. #define S_GCR_WRITE 0x40
  111. #define S_IBM_DRIVE 0x20
  112. #define S_TEST_MODE 0x10
  113. #define S_FCLK_DIV2 0x08
  114. #define S_GCR 0x04
  115. #define S_COPY_PROT 0x02
  116. #define S_INV_WDATA 0x01
  117. /* Select values for swim3_action */
  118. #define SEEK_POSITIVE 0
  119. #define SEEK_NEGATIVE 4
  120. #define STEP 1
  121. #define MOTOR_ON 2
  122. #define MOTOR_OFF 6
  123. #define INDEX 3
  124. #define EJECT 7
  125. #define SETMFM 9
  126. #define SETGCR 13
  127. /* Select values for swim3_select and swim3_readbit */
  128. #define STEP_DIR 0
  129. #define STEPPING 1
  130. #define MOTOR_ON 2
  131. #define RELAX 3 /* also eject in progress */
  132. #define READ_DATA_0 4
  133. #define TWOMEG_DRIVE 5
  134. #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
  135. #define DRIVE_PRESENT 7
  136. #define DISK_IN 8
  137. #define WRITE_PROT 9
  138. #define TRACK_ZERO 10
  139. #define TACHO 11
  140. #define READ_DATA_1 12
  141. #define MFM_MODE 13
  142. #define SEEK_COMPLETE 14
  143. #define ONEMEG_MEDIA 15
  144. /* Definitions of values used in writing and formatting */
  145. #define DATA_ESCAPE 0x99
  146. #define GCR_SYNC_EXC 0x3f
  147. #define GCR_SYNC_CONV 0x80
  148. #define GCR_FIRST_MARK 0xd5
  149. #define GCR_SECOND_MARK 0xaa
  150. #define GCR_ADDR_MARK "\xd5\xaa\x00"
  151. #define GCR_DATA_MARK "\xd5\xaa\x0b"
  152. #define GCR_SLIP_BYTE "\x27\xaa"
  153. #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
  154. #define DATA_99 "\x99\x99"
  155. #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
  156. #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
  157. #define MFM_GAP_LEN 12
  158. struct floppy_state {
  159. enum swim_state state;
  160. spinlock_t lock;
  161. struct swim3 __iomem *swim3; /* hardware registers */
  162. struct dbdma_regs __iomem *dma; /* DMA controller registers */
  163. int swim3_intr; /* interrupt number for SWIM3 */
  164. int dma_intr; /* interrupt number for DMA channel */
  165. int cur_cyl; /* cylinder head is on, or -1 */
  166. int cur_sector; /* last sector we saw go past */
  167. int req_cyl; /* the cylinder for the current r/w request */
  168. int head; /* head number ditto */
  169. int req_sector; /* sector number ditto */
  170. int scount; /* # sectors we're transferring at present */
  171. int retries;
  172. int settle_time;
  173. int secpercyl; /* disk geometry information */
  174. int secpertrack;
  175. int total_secs;
  176. int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
  177. struct dbdma_cmd *dma_cmd;
  178. int ref_count;
  179. int expect_cyl;
  180. struct timer_list timeout;
  181. int timeout_pending;
  182. int ejected;
  183. wait_queue_head_t wait;
  184. int wanted;
  185. struct device_node* media_bay; /* NULL when not in bay */
  186. char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
  187. };
  188. static struct floppy_state floppy_states[MAX_FLOPPIES];
  189. static int floppy_count = 0;
  190. static DEFINE_SPINLOCK(swim3_lock);
  191. static unsigned short write_preamble[] = {
  192. 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
  193. 0, 0, 0, 0, 0, 0, /* sync field */
  194. 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
  195. 0x990f /* no escape for 512 bytes */
  196. };
  197. static unsigned short write_postamble[] = {
  198. 0x9904, /* insert CRC */
  199. 0x4e4e, 0x4e4e,
  200. 0x9908, /* stop writing */
  201. 0, 0, 0, 0, 0, 0
  202. };
  203. static void swim3_select(struct floppy_state *fs, int sel);
  204. static void swim3_action(struct floppy_state *fs, int action);
  205. static int swim3_readbit(struct floppy_state *fs, int bit);
  206. static void do_fd_request(request_queue_t * q);
  207. static void start_request(struct floppy_state *fs);
  208. static void set_timeout(struct floppy_state *fs, int nticks,
  209. void (*proc)(unsigned long));
  210. static void scan_track(struct floppy_state *fs);
  211. static void seek_track(struct floppy_state *fs, int n);
  212. static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
  213. static void setup_transfer(struct floppy_state *fs);
  214. static void act(struct floppy_state *fs);
  215. static void scan_timeout(unsigned long data);
  216. static void seek_timeout(unsigned long data);
  217. static void settle_timeout(unsigned long data);
  218. static void xfer_timeout(unsigned long data);
  219. static irqreturn_t swim3_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  220. /*static void fd_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs);*/
  221. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  222. int interruptible);
  223. static void release_drive(struct floppy_state *fs);
  224. static int fd_eject(struct floppy_state *fs);
  225. static int floppy_ioctl(struct inode *inode, struct file *filp,
  226. unsigned int cmd, unsigned long param);
  227. static int floppy_open(struct inode *inode, struct file *filp);
  228. static int floppy_release(struct inode *inode, struct file *filp);
  229. static int floppy_check_change(struct gendisk *disk);
  230. static int floppy_revalidate(struct gendisk *disk);
  231. static int swim3_add_device(struct device_node *swims);
  232. int swim3_init(void);
  233. #ifndef CONFIG_PMAC_MEDIABAY
  234. #define check_media_bay(which, what) 1
  235. #endif
  236. static void swim3_select(struct floppy_state *fs, int sel)
  237. {
  238. struct swim3 __iomem *sw = fs->swim3;
  239. out_8(&sw->select, RELAX);
  240. if (sel & 8)
  241. out_8(&sw->control_bis, SELECT);
  242. else
  243. out_8(&sw->control_bic, SELECT);
  244. out_8(&sw->select, sel & CA_MASK);
  245. }
  246. static void swim3_action(struct floppy_state *fs, int action)
  247. {
  248. struct swim3 __iomem *sw = fs->swim3;
  249. swim3_select(fs, action);
  250. udelay(1);
  251. out_8(&sw->select, sw->select | LSTRB);
  252. udelay(2);
  253. out_8(&sw->select, sw->select & ~LSTRB);
  254. udelay(1);
  255. }
  256. static int swim3_readbit(struct floppy_state *fs, int bit)
  257. {
  258. struct swim3 __iomem *sw = fs->swim3;
  259. int stat;
  260. swim3_select(fs, bit);
  261. udelay(1);
  262. stat = in_8(&sw->status);
  263. return (stat & DATA) == 0;
  264. }
  265. static void do_fd_request(request_queue_t * q)
  266. {
  267. int i;
  268. for(i=0;i<floppy_count;i++)
  269. {
  270. #ifdef CONFIG_PMAC_MEDIABAY
  271. if (floppy_states[i].media_bay &&
  272. check_media_bay(floppy_states[i].media_bay, MB_FD))
  273. continue;
  274. #endif /* CONFIG_PMAC_MEDIABAY */
  275. start_request(&floppy_states[i]);
  276. }
  277. }
  278. static void start_request(struct floppy_state *fs)
  279. {
  280. struct request *req;
  281. unsigned long x;
  282. if (fs->state == idle && fs->wanted) {
  283. fs->state = available;
  284. wake_up(&fs->wait);
  285. return;
  286. }
  287. while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
  288. #if 0
  289. printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
  290. req->rq_disk->disk_name, req->cmd,
  291. (long)req->sector, req->nr_sectors, req->buffer);
  292. printk(" rq_status=%d errors=%d current_nr_sectors=%ld\n",
  293. req->rq_status, req->errors, req->current_nr_sectors);
  294. #endif
  295. if (req->sector < 0 || req->sector >= fs->total_secs) {
  296. end_request(req, 0);
  297. continue;
  298. }
  299. if (req->current_nr_sectors == 0) {
  300. end_request(req, 1);
  301. continue;
  302. }
  303. if (fs->ejected) {
  304. end_request(req, 0);
  305. continue;
  306. }
  307. if (rq_data_dir(req) == WRITE) {
  308. if (fs->write_prot < 0)
  309. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  310. if (fs->write_prot) {
  311. end_request(req, 0);
  312. continue;
  313. }
  314. }
  315. /* Do not remove the cast. req->sector is now a sector_t and
  316. * can be 64 bits, but it will never go past 32 bits for this
  317. * driver anyway, so we can safely cast it down and not have
  318. * to do a 64/32 division
  319. */
  320. fs->req_cyl = ((long)req->sector) / fs->secpercyl;
  321. x = ((long)req->sector) % fs->secpercyl;
  322. fs->head = x / fs->secpertrack;
  323. fs->req_sector = x % fs->secpertrack + 1;
  324. fd_req = req;
  325. fs->state = do_transfer;
  326. fs->retries = 0;
  327. act(fs);
  328. }
  329. }
  330. static void set_timeout(struct floppy_state *fs, int nticks,
  331. void (*proc)(unsigned long))
  332. {
  333. unsigned long flags;
  334. spin_lock_irqsave(&fs->lock, flags);
  335. if (fs->timeout_pending)
  336. del_timer(&fs->timeout);
  337. fs->timeout.expires = jiffies + nticks;
  338. fs->timeout.function = proc;
  339. fs->timeout.data = (unsigned long) fs;
  340. add_timer(&fs->timeout);
  341. fs->timeout_pending = 1;
  342. spin_unlock_irqrestore(&fs->lock, flags);
  343. }
  344. static inline void scan_track(struct floppy_state *fs)
  345. {
  346. struct swim3 __iomem *sw = fs->swim3;
  347. swim3_select(fs, READ_DATA_0);
  348. in_8(&sw->intr); /* clear SEEN_SECTOR bit */
  349. in_8(&sw->error);
  350. out_8(&sw->intr_enable, SEEN_SECTOR);
  351. out_8(&sw->control_bis, DO_ACTION);
  352. /* enable intr when track found */
  353. set_timeout(fs, HZ, scan_timeout); /* enable timeout */
  354. }
  355. static inline void seek_track(struct floppy_state *fs, int n)
  356. {
  357. struct swim3 __iomem *sw = fs->swim3;
  358. if (n >= 0) {
  359. swim3_action(fs, SEEK_POSITIVE);
  360. sw->nseek = n;
  361. } else {
  362. swim3_action(fs, SEEK_NEGATIVE);
  363. sw->nseek = -n;
  364. }
  365. fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
  366. swim3_select(fs, STEP);
  367. in_8(&sw->error);
  368. /* enable intr when seek finished */
  369. out_8(&sw->intr_enable, SEEK_DONE);
  370. out_8(&sw->control_bis, DO_SEEK);
  371. set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
  372. fs->settle_time = 0;
  373. }
  374. static inline void init_dma(struct dbdma_cmd *cp, int cmd,
  375. void *buf, int count)
  376. {
  377. st_le16(&cp->req_count, count);
  378. st_le16(&cp->command, cmd);
  379. st_le32(&cp->phy_addr, virt_to_bus(buf));
  380. cp->xfer_status = 0;
  381. }
  382. static inline void setup_transfer(struct floppy_state *fs)
  383. {
  384. int n;
  385. struct swim3 __iomem *sw = fs->swim3;
  386. struct dbdma_cmd *cp = fs->dma_cmd;
  387. struct dbdma_regs __iomem *dr = fs->dma;
  388. if (fd_req->current_nr_sectors <= 0) {
  389. printk(KERN_ERR "swim3: transfer 0 sectors?\n");
  390. return;
  391. }
  392. if (rq_data_dir(fd_req) == WRITE)
  393. n = 1;
  394. else {
  395. n = fs->secpertrack - fs->req_sector + 1;
  396. if (n > fd_req->current_nr_sectors)
  397. n = fd_req->current_nr_sectors;
  398. }
  399. fs->scount = n;
  400. swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
  401. out_8(&sw->sector, fs->req_sector);
  402. out_8(&sw->nsect, n);
  403. out_8(&sw->gap3, 0);
  404. out_le32(&dr->cmdptr, virt_to_bus(cp));
  405. if (rq_data_dir(fd_req) == WRITE) {
  406. /* Set up 3 dma commands: write preamble, data, postamble */
  407. init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
  408. ++cp;
  409. init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
  410. ++cp;
  411. init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
  412. } else {
  413. init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
  414. }
  415. ++cp;
  416. out_le16(&cp->command, DBDMA_STOP);
  417. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  418. in_8(&sw->error);
  419. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  420. if (rq_data_dir(fd_req) == WRITE)
  421. out_8(&sw->control_bis, WRITE_SECTORS);
  422. in_8(&sw->intr);
  423. out_le32(&dr->control, (RUN << 16) | RUN);
  424. /* enable intr when transfer complete */
  425. out_8(&sw->intr_enable, TRANSFER_DONE);
  426. out_8(&sw->control_bis, DO_ACTION);
  427. set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
  428. }
  429. static void act(struct floppy_state *fs)
  430. {
  431. for (;;) {
  432. switch (fs->state) {
  433. case idle:
  434. return; /* XXX shouldn't get here */
  435. case locating:
  436. if (swim3_readbit(fs, TRACK_ZERO)) {
  437. fs->cur_cyl = 0;
  438. if (fs->req_cyl == 0)
  439. fs->state = do_transfer;
  440. else
  441. fs->state = seeking;
  442. break;
  443. }
  444. scan_track(fs);
  445. return;
  446. case seeking:
  447. if (fs->cur_cyl < 0) {
  448. fs->expect_cyl = -1;
  449. fs->state = locating;
  450. break;
  451. }
  452. if (fs->req_cyl == fs->cur_cyl) {
  453. printk("whoops, seeking 0\n");
  454. fs->state = do_transfer;
  455. break;
  456. }
  457. seek_track(fs, fs->req_cyl - fs->cur_cyl);
  458. return;
  459. case settling:
  460. /* check for SEEK_COMPLETE after 30ms */
  461. fs->settle_time = (HZ + 32) / 33;
  462. set_timeout(fs, fs->settle_time, settle_timeout);
  463. return;
  464. case do_transfer:
  465. if (fs->cur_cyl != fs->req_cyl) {
  466. if (fs->retries > 5) {
  467. end_request(fd_req, 0);
  468. fs->state = idle;
  469. return;
  470. }
  471. fs->state = seeking;
  472. break;
  473. }
  474. setup_transfer(fs);
  475. return;
  476. case jogging:
  477. seek_track(fs, -5);
  478. return;
  479. default:
  480. printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
  481. return;
  482. }
  483. }
  484. }
  485. static void scan_timeout(unsigned long data)
  486. {
  487. struct floppy_state *fs = (struct floppy_state *) data;
  488. struct swim3 __iomem *sw = fs->swim3;
  489. fs->timeout_pending = 0;
  490. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  491. out_8(&sw->select, RELAX);
  492. out_8(&sw->intr_enable, 0);
  493. fs->cur_cyl = -1;
  494. if (fs->retries > 5) {
  495. end_request(fd_req, 0);
  496. fs->state = idle;
  497. start_request(fs);
  498. } else {
  499. fs->state = jogging;
  500. act(fs);
  501. }
  502. }
  503. static void seek_timeout(unsigned long data)
  504. {
  505. struct floppy_state *fs = (struct floppy_state *) data;
  506. struct swim3 __iomem *sw = fs->swim3;
  507. fs->timeout_pending = 0;
  508. out_8(&sw->control_bic, DO_SEEK);
  509. out_8(&sw->select, RELAX);
  510. out_8(&sw->intr_enable, 0);
  511. printk(KERN_ERR "swim3: seek timeout\n");
  512. end_request(fd_req, 0);
  513. fs->state = idle;
  514. start_request(fs);
  515. }
  516. static void settle_timeout(unsigned long data)
  517. {
  518. struct floppy_state *fs = (struct floppy_state *) data;
  519. struct swim3 __iomem *sw = fs->swim3;
  520. fs->timeout_pending = 0;
  521. if (swim3_readbit(fs, SEEK_COMPLETE)) {
  522. out_8(&sw->select, RELAX);
  523. fs->state = locating;
  524. act(fs);
  525. return;
  526. }
  527. out_8(&sw->select, RELAX);
  528. if (fs->settle_time < 2*HZ) {
  529. ++fs->settle_time;
  530. set_timeout(fs, 1, settle_timeout);
  531. return;
  532. }
  533. printk(KERN_ERR "swim3: seek settle timeout\n");
  534. end_request(fd_req, 0);
  535. fs->state = idle;
  536. start_request(fs);
  537. }
  538. static void xfer_timeout(unsigned long data)
  539. {
  540. struct floppy_state *fs = (struct floppy_state *) data;
  541. struct swim3 __iomem *sw = fs->swim3;
  542. struct dbdma_regs __iomem *dr = fs->dma;
  543. struct dbdma_cmd *cp = fs->dma_cmd;
  544. unsigned long s;
  545. int n;
  546. fs->timeout_pending = 0;
  547. out_le32(&dr->control, RUN << 16);
  548. /* We must wait a bit for dbdma to stop */
  549. for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
  550. udelay(1);
  551. out_8(&sw->intr_enable, 0);
  552. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  553. out_8(&sw->select, RELAX);
  554. if (rq_data_dir(fd_req) == WRITE)
  555. ++cp;
  556. if (ld_le16(&cp->xfer_status) != 0)
  557. s = fs->scount - ((ld_le16(&cp->res_count) + 511) >> 9);
  558. else
  559. s = 0;
  560. fd_req->sector += s;
  561. fd_req->current_nr_sectors -= s;
  562. printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
  563. (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
  564. end_request(fd_req, 0);
  565. fs->state = idle;
  566. start_request(fs);
  567. }
  568. static irqreturn_t swim3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  569. {
  570. struct floppy_state *fs = (struct floppy_state *) dev_id;
  571. struct swim3 __iomem *sw = fs->swim3;
  572. int intr, err, n;
  573. int stat, resid;
  574. struct dbdma_regs __iomem *dr;
  575. struct dbdma_cmd *cp;
  576. intr = in_8(&sw->intr);
  577. err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
  578. if ((intr & ERROR_INTR) && fs->state != do_transfer)
  579. printk(KERN_ERR "swim3_interrupt, state=%d, dir=%lx, intr=%x, err=%x\n",
  580. fs->state, rq_data_dir(fd_req), intr, err);
  581. switch (fs->state) {
  582. case locating:
  583. if (intr & SEEN_SECTOR) {
  584. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  585. out_8(&sw->select, RELAX);
  586. out_8(&sw->intr_enable, 0);
  587. del_timer(&fs->timeout);
  588. fs->timeout_pending = 0;
  589. if (sw->ctrack == 0xff) {
  590. printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
  591. fs->cur_cyl = -1;
  592. if (fs->retries > 5) {
  593. end_request(fd_req, 0);
  594. fs->state = idle;
  595. start_request(fs);
  596. } else {
  597. fs->state = jogging;
  598. act(fs);
  599. }
  600. break;
  601. }
  602. fs->cur_cyl = sw->ctrack;
  603. fs->cur_sector = sw->csect;
  604. if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
  605. printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
  606. fs->expect_cyl, fs->cur_cyl);
  607. fs->state = do_transfer;
  608. act(fs);
  609. }
  610. break;
  611. case seeking:
  612. case jogging:
  613. if (sw->nseek == 0) {
  614. out_8(&sw->control_bic, DO_SEEK);
  615. out_8(&sw->select, RELAX);
  616. out_8(&sw->intr_enable, 0);
  617. del_timer(&fs->timeout);
  618. fs->timeout_pending = 0;
  619. if (fs->state == seeking)
  620. ++fs->retries;
  621. fs->state = settling;
  622. act(fs);
  623. }
  624. break;
  625. case settling:
  626. out_8(&sw->intr_enable, 0);
  627. del_timer(&fs->timeout);
  628. fs->timeout_pending = 0;
  629. act(fs);
  630. break;
  631. case do_transfer:
  632. if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
  633. break;
  634. out_8(&sw->intr_enable, 0);
  635. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  636. out_8(&sw->select, RELAX);
  637. del_timer(&fs->timeout);
  638. fs->timeout_pending = 0;
  639. dr = fs->dma;
  640. cp = fs->dma_cmd;
  641. if (rq_data_dir(fd_req) == WRITE)
  642. ++cp;
  643. /*
  644. * Check that the main data transfer has finished.
  645. * On writing, the swim3 sometimes doesn't use
  646. * up all the bytes of the postamble, so we can still
  647. * see DMA active here. That doesn't matter as long
  648. * as all the sector data has been transferred.
  649. */
  650. if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
  651. /* wait a little while for DMA to complete */
  652. for (n = 0; n < 100; ++n) {
  653. if (cp->xfer_status != 0)
  654. break;
  655. udelay(1);
  656. barrier();
  657. }
  658. }
  659. /* turn off DMA */
  660. out_le32(&dr->control, (RUN | PAUSE) << 16);
  661. stat = ld_le16(&cp->xfer_status);
  662. resid = ld_le16(&cp->res_count);
  663. if (intr & ERROR_INTR) {
  664. n = fs->scount - 1 - resid / 512;
  665. if (n > 0) {
  666. fd_req->sector += n;
  667. fd_req->current_nr_sectors -= n;
  668. fd_req->buffer += n * 512;
  669. fs->req_sector += n;
  670. }
  671. if (fs->retries < 5) {
  672. ++fs->retries;
  673. act(fs);
  674. } else {
  675. printk("swim3: error %sing block %ld (err=%x)\n",
  676. rq_data_dir(fd_req) == WRITE? "writ": "read",
  677. (long)fd_req->sector, err);
  678. end_request(fd_req, 0);
  679. fs->state = idle;
  680. }
  681. } else {
  682. if ((stat & ACTIVE) == 0 || resid != 0) {
  683. /* musta been an error */
  684. printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
  685. printk(KERN_ERR " state=%d, dir=%lx, intr=%x, err=%x\n",
  686. fs->state, rq_data_dir(fd_req), intr, err);
  687. end_request(fd_req, 0);
  688. fs->state = idle;
  689. start_request(fs);
  690. break;
  691. }
  692. fd_req->sector += fs->scount;
  693. fd_req->current_nr_sectors -= fs->scount;
  694. fd_req->buffer += fs->scount * 512;
  695. if (fd_req->current_nr_sectors <= 0) {
  696. end_request(fd_req, 1);
  697. fs->state = idle;
  698. } else {
  699. fs->req_sector += fs->scount;
  700. if (fs->req_sector > fs->secpertrack) {
  701. fs->req_sector -= fs->secpertrack;
  702. if (++fs->head > 1) {
  703. fs->head = 0;
  704. ++fs->req_cyl;
  705. }
  706. }
  707. act(fs);
  708. }
  709. }
  710. if (fs->state == idle)
  711. start_request(fs);
  712. break;
  713. default:
  714. printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
  715. }
  716. return IRQ_HANDLED;
  717. }
  718. /*
  719. static void fd_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  720. {
  721. }
  722. */
  723. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  724. int interruptible)
  725. {
  726. unsigned long flags;
  727. spin_lock_irqsave(&fs->lock, flags);
  728. if (fs->state != idle) {
  729. ++fs->wanted;
  730. while (fs->state != available) {
  731. if (interruptible && signal_pending(current)) {
  732. --fs->wanted;
  733. spin_unlock_irqrestore(&fs->lock, flags);
  734. return -EINTR;
  735. }
  736. interruptible_sleep_on(&fs->wait);
  737. }
  738. --fs->wanted;
  739. }
  740. fs->state = state;
  741. spin_unlock_irqrestore(&fs->lock, flags);
  742. return 0;
  743. }
  744. static void release_drive(struct floppy_state *fs)
  745. {
  746. unsigned long flags;
  747. spin_lock_irqsave(&fs->lock, flags);
  748. fs->state = idle;
  749. start_request(fs);
  750. spin_unlock_irqrestore(&fs->lock, flags);
  751. }
  752. static int fd_eject(struct floppy_state *fs)
  753. {
  754. int err, n;
  755. err = grab_drive(fs, ejecting, 1);
  756. if (err)
  757. return err;
  758. swim3_action(fs, EJECT);
  759. for (n = 20; n > 0; --n) {
  760. if (signal_pending(current)) {
  761. err = -EINTR;
  762. break;
  763. }
  764. swim3_select(fs, RELAX);
  765. schedule_timeout_interruptible(1);
  766. if (swim3_readbit(fs, DISK_IN) == 0)
  767. break;
  768. }
  769. swim3_select(fs, RELAX);
  770. udelay(150);
  771. fs->ejected = 1;
  772. release_drive(fs);
  773. return err;
  774. }
  775. static struct floppy_struct floppy_type =
  776. { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
  777. static int floppy_ioctl(struct inode *inode, struct file *filp,
  778. unsigned int cmd, unsigned long param)
  779. {
  780. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  781. int err;
  782. if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
  783. return -EPERM;
  784. #ifdef CONFIG_PMAC_MEDIABAY
  785. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  786. return -ENXIO;
  787. #endif
  788. switch (cmd) {
  789. case FDEJECT:
  790. if (fs->ref_count != 1)
  791. return -EBUSY;
  792. err = fd_eject(fs);
  793. return err;
  794. case FDGETPRM:
  795. if (copy_to_user((void __user *) param, &floppy_type,
  796. sizeof(struct floppy_struct)))
  797. return -EFAULT;
  798. return 0;
  799. }
  800. return -ENOTTY;
  801. }
  802. static int floppy_open(struct inode *inode, struct file *filp)
  803. {
  804. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  805. struct swim3 __iomem *sw = fs->swim3;
  806. int n, err = 0;
  807. if (fs->ref_count == 0) {
  808. #ifdef CONFIG_PMAC_MEDIABAY
  809. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  810. return -ENXIO;
  811. #endif
  812. out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
  813. out_8(&sw->control_bic, 0xff);
  814. out_8(&sw->mode, 0x95);
  815. udelay(10);
  816. out_8(&sw->intr_enable, 0);
  817. out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
  818. swim3_action(fs, MOTOR_ON);
  819. fs->write_prot = -1;
  820. fs->cur_cyl = -1;
  821. for (n = 0; n < 2 * HZ; ++n) {
  822. if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
  823. break;
  824. if (signal_pending(current)) {
  825. err = -EINTR;
  826. break;
  827. }
  828. swim3_select(fs, RELAX);
  829. schedule_timeout_interruptible(1);
  830. }
  831. if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
  832. || swim3_readbit(fs, DISK_IN) == 0))
  833. err = -ENXIO;
  834. swim3_action(fs, SETMFM);
  835. swim3_select(fs, RELAX);
  836. } else if (fs->ref_count == -1 || filp->f_flags & O_EXCL)
  837. return -EBUSY;
  838. if (err == 0 && (filp->f_flags & O_NDELAY) == 0
  839. && (filp->f_mode & 3)) {
  840. check_disk_change(inode->i_bdev);
  841. if (fs->ejected)
  842. err = -ENXIO;
  843. }
  844. if (err == 0 && (filp->f_mode & 2)) {
  845. if (fs->write_prot < 0)
  846. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  847. if (fs->write_prot)
  848. err = -EROFS;
  849. }
  850. if (err) {
  851. if (fs->ref_count == 0) {
  852. swim3_action(fs, MOTOR_OFF);
  853. out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
  854. swim3_select(fs, RELAX);
  855. }
  856. return err;
  857. }
  858. if (filp->f_flags & O_EXCL)
  859. fs->ref_count = -1;
  860. else
  861. ++fs->ref_count;
  862. return 0;
  863. }
  864. static int floppy_release(struct inode *inode, struct file *filp)
  865. {
  866. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  867. struct swim3 __iomem *sw = fs->swim3;
  868. if (fs->ref_count > 0 && --fs->ref_count == 0) {
  869. swim3_action(fs, MOTOR_OFF);
  870. out_8(&sw->control_bic, 0xff);
  871. swim3_select(fs, RELAX);
  872. }
  873. return 0;
  874. }
  875. static int floppy_check_change(struct gendisk *disk)
  876. {
  877. struct floppy_state *fs = disk->private_data;
  878. return fs->ejected;
  879. }
  880. static int floppy_revalidate(struct gendisk *disk)
  881. {
  882. struct floppy_state *fs = disk->private_data;
  883. struct swim3 __iomem *sw;
  884. int ret, n;
  885. #ifdef CONFIG_PMAC_MEDIABAY
  886. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  887. return -ENXIO;
  888. #endif
  889. sw = fs->swim3;
  890. grab_drive(fs, revalidating, 0);
  891. out_8(&sw->intr_enable, 0);
  892. out_8(&sw->control_bis, DRIVE_ENABLE);
  893. swim3_action(fs, MOTOR_ON); /* necessary? */
  894. fs->write_prot = -1;
  895. fs->cur_cyl = -1;
  896. mdelay(1);
  897. for (n = HZ; n > 0; --n) {
  898. if (swim3_readbit(fs, SEEK_COMPLETE))
  899. break;
  900. if (signal_pending(current))
  901. break;
  902. swim3_select(fs, RELAX);
  903. schedule_timeout_interruptible(1);
  904. }
  905. ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
  906. || swim3_readbit(fs, DISK_IN) == 0;
  907. if (ret)
  908. swim3_action(fs, MOTOR_OFF);
  909. else {
  910. fs->ejected = 0;
  911. swim3_action(fs, SETMFM);
  912. }
  913. swim3_select(fs, RELAX);
  914. release_drive(fs);
  915. return ret;
  916. }
  917. static struct block_device_operations floppy_fops = {
  918. .open = floppy_open,
  919. .release = floppy_release,
  920. .ioctl = floppy_ioctl,
  921. .media_changed = floppy_check_change,
  922. .revalidate_disk= floppy_revalidate,
  923. };
  924. int swim3_init(void)
  925. {
  926. struct device_node *swim;
  927. int err = -ENOMEM;
  928. int i;
  929. swim = find_devices("floppy");
  930. while (swim && (floppy_count < MAX_FLOPPIES))
  931. {
  932. swim3_add_device(swim);
  933. swim = swim->next;
  934. }
  935. swim = find_devices("swim3");
  936. while (swim && (floppy_count < MAX_FLOPPIES))
  937. {
  938. swim3_add_device(swim);
  939. swim = swim->next;
  940. }
  941. if (!floppy_count)
  942. return -ENODEV;
  943. for (i = 0; i < floppy_count; i++) {
  944. disks[i] = alloc_disk(1);
  945. if (!disks[i])
  946. goto out;
  947. }
  948. if (register_blkdev(FLOPPY_MAJOR, "fd")) {
  949. err = -EBUSY;
  950. goto out;
  951. }
  952. swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
  953. if (!swim3_queue) {
  954. err = -ENOMEM;
  955. goto out_queue;
  956. }
  957. for (i = 0; i < floppy_count; i++) {
  958. struct gendisk *disk = disks[i];
  959. disk->major = FLOPPY_MAJOR;
  960. disk->first_minor = i;
  961. disk->fops = &floppy_fops;
  962. disk->private_data = &floppy_states[i];
  963. disk->queue = swim3_queue;
  964. disk->flags |= GENHD_FL_REMOVABLE;
  965. sprintf(disk->disk_name, "fd%d", i);
  966. sprintf(disk->devfs_name, "floppy/%d", i);
  967. set_capacity(disk, 2880);
  968. add_disk(disk);
  969. }
  970. return 0;
  971. out_queue:
  972. unregister_blkdev(FLOPPY_MAJOR, "fd");
  973. out:
  974. while (i--)
  975. put_disk(disks[i]);
  976. /* shouldn't we do something with results of swim_add_device()? */
  977. return err;
  978. }
  979. static int swim3_add_device(struct device_node *swim)
  980. {
  981. struct device_node *mediabay;
  982. struct floppy_state *fs = &floppy_states[floppy_count];
  983. struct resource res_reg, res_dma;
  984. if (of_address_to_resource(swim, 0, &res_reg) ||
  985. of_address_to_resource(swim, 1, &res_dma)) {
  986. printk(KERN_ERR "swim3: Can't get addresses\n");
  987. return -EINVAL;
  988. }
  989. if (request_mem_region(res_reg.start, res_reg.end - res_reg.start + 1,
  990. " (reg)") == NULL) {
  991. printk(KERN_ERR "swim3: Can't request register space\n");
  992. return -EINVAL;
  993. }
  994. if (request_mem_region(res_dma.start, res_dma.end - res_dma.start + 1,
  995. " (dma)") == NULL) {
  996. release_mem_region(res_reg.start,
  997. res_reg.end - res_reg.start + 1);
  998. printk(KERN_ERR "swim3: Can't request DMA space\n");
  999. return -EINVAL;
  1000. }
  1001. if (swim->n_intrs < 2) {
  1002. printk(KERN_INFO "swim3: expecting 2 intrs (n_intrs:%d)\n",
  1003. swim->n_intrs);
  1004. release_mem_region(res_reg.start,
  1005. res_reg.end - res_reg.start + 1);
  1006. release_mem_region(res_dma.start,
  1007. res_dma.end - res_dma.start + 1);
  1008. return -EINVAL;
  1009. }
  1010. mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ? swim->parent : NULL;
  1011. if (mediabay == NULL)
  1012. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
  1013. memset(fs, 0, sizeof(*fs));
  1014. spin_lock_init(&fs->lock);
  1015. fs->state = idle;
  1016. fs->swim3 = (struct swim3 __iomem *)ioremap(res_reg.start, 0x200);
  1017. fs->dma = (struct dbdma_regs __iomem *)ioremap(res_dma.start, 0x200);
  1018. fs->swim3_intr = swim->intrs[0].line;
  1019. fs->dma_intr = swim->intrs[1].line;
  1020. fs->cur_cyl = -1;
  1021. fs->cur_sector = -1;
  1022. fs->secpercyl = 36;
  1023. fs->secpertrack = 18;
  1024. fs->total_secs = 2880;
  1025. fs->media_bay = mediabay;
  1026. init_waitqueue_head(&fs->wait);
  1027. fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
  1028. memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
  1029. st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
  1030. if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
  1031. printk(KERN_ERR "Couldn't get irq %d for SWIM3\n", fs->swim3_intr);
  1032. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  1033. return -EBUSY;
  1034. }
  1035. /*
  1036. if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
  1037. printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
  1038. fs->dma_intr);
  1039. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  1040. return -EBUSY;
  1041. }
  1042. */
  1043. init_timer(&fs->timeout);
  1044. printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
  1045. mediabay ? "in media bay" : "");
  1046. floppy_count++;
  1047. return 0;
  1048. }
  1049. module_init(swim3_init)
  1050. MODULE_LICENSE("GPL");
  1051. MODULE_AUTHOR("Paul Mackerras");
  1052. MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);