skge.c 147 KB

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  1. /******************************************************************************
  2. *
  3. * Name: skge.c
  4. * Project: GEnesis, PCI Gigabit Ethernet Adapter
  5. * Version: $Revision: 1.45 $
  6. * Date: $Date: 2004/02/12 14:41:02 $
  7. * Purpose: The main driver source module
  8. *
  9. ******************************************************************************/
  10. /******************************************************************************
  11. *
  12. * (C)Copyright 1998-2002 SysKonnect GmbH.
  13. * (C)Copyright 2002-2003 Marvell.
  14. *
  15. * Driver for Marvell Yukon chipset and SysKonnect Gigabit Ethernet
  16. * Server Adapters.
  17. *
  18. * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
  19. * SysKonnects GEnesis Solaris driver
  20. * Author: Christoph Goos (cgoos@syskonnect.de)
  21. * Mirko Lindner (mlindner@syskonnect.de)
  22. *
  23. * Address all question to: linux@syskonnect.de
  24. *
  25. * The technical manual for the adapters is available from SysKonnect's
  26. * web pages: www.syskonnect.com
  27. * Goto "Support" and search Knowledge Base for "manual".
  28. *
  29. * This program is free software; you can redistribute it and/or modify
  30. * it under the terms of the GNU General Public License as published by
  31. * the Free Software Foundation; either version 2 of the License, or
  32. * (at your option) any later version.
  33. *
  34. * The information in this file is provided "AS IS" without warranty.
  35. *
  36. ******************************************************************************/
  37. /******************************************************************************
  38. *
  39. * Possible compiler options (#define xxx / -Dxxx):
  40. *
  41. * debugging can be enable by changing SK_DEBUG_CHKMOD and
  42. * SK_DEBUG_CHKCAT in makefile (described there).
  43. *
  44. ******************************************************************************/
  45. /******************************************************************************
  46. *
  47. * Description:
  48. *
  49. * This is the main module of the Linux GE driver.
  50. *
  51. * All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
  52. * are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
  53. * Those are used for drivers on multiple OS', so some thing may seem
  54. * unnecessary complicated on Linux. Please do not try to 'clean up'
  55. * them without VERY good reasons, because this will make it more
  56. * difficult to keep the Linux driver in synchronisation with the
  57. * other versions.
  58. *
  59. * Include file hierarchy:
  60. *
  61. * <linux/module.h>
  62. *
  63. * "h/skdrv1st.h"
  64. * <linux/types.h>
  65. * <linux/kernel.h>
  66. * <linux/string.h>
  67. * <linux/errno.h>
  68. * <linux/ioport.h>
  69. * <linux/slab.h>
  70. * <linux/interrupt.h>
  71. * <linux/pci.h>
  72. * <linux/bitops.h>
  73. * <asm/byteorder.h>
  74. * <asm/io.h>
  75. * <linux/netdevice.h>
  76. * <linux/etherdevice.h>
  77. * <linux/skbuff.h>
  78. * those three depending on kernel version used:
  79. * <linux/bios32.h>
  80. * <linux/init.h>
  81. * <asm/uaccess.h>
  82. * <net/checksum.h>
  83. *
  84. * "h/skerror.h"
  85. * "h/skdebug.h"
  86. * "h/sktypes.h"
  87. * "h/lm80.h"
  88. * "h/xmac_ii.h"
  89. *
  90. * "h/skdrv2nd.h"
  91. * "h/skqueue.h"
  92. * "h/skgehwt.h"
  93. * "h/sktimer.h"
  94. * "h/ski2c.h"
  95. * "h/skgepnmi.h"
  96. * "h/skvpd.h"
  97. * "h/skgehw.h"
  98. * "h/skgeinit.h"
  99. * "h/skaddr.h"
  100. * "h/skgesirq.h"
  101. * "h/skrlmt.h"
  102. *
  103. ******************************************************************************/
  104. #include "h/skversion.h"
  105. #include <linux/in.h>
  106. #include <linux/module.h>
  107. #include <linux/moduleparam.h>
  108. #include <linux/init.h>
  109. #include <linux/dma-mapping.h>
  110. #include <linux/ip.h>
  111. #include <linux/mii.h>
  112. #include "h/skdrv1st.h"
  113. #include "h/skdrv2nd.h"
  114. /*******************************************************************************
  115. *
  116. * Defines
  117. *
  118. ******************************************************************************/
  119. /* for debuging on x86 only */
  120. /* #define BREAKPOINT() asm(" int $3"); */
  121. /* use the transmit hw checksum driver functionality */
  122. #define USE_SK_TX_CHECKSUM
  123. /* use the receive hw checksum driver functionality */
  124. #define USE_SK_RX_CHECKSUM
  125. /* use the scatter-gather functionality with sendfile() */
  126. #define SK_ZEROCOPY
  127. /* use of a transmit complete interrupt */
  128. #define USE_TX_COMPLETE
  129. /*
  130. * threshold for copying small receive frames
  131. * set to 0 to avoid copying, set to 9001 to copy all frames
  132. */
  133. #define SK_COPY_THRESHOLD 50
  134. /* number of adapters that can be configured via command line params */
  135. #define SK_MAX_CARD_PARAM 16
  136. /*
  137. * use those defines for a compile-in version of the driver instead
  138. * of command line parameters
  139. */
  140. // #define LINK_SPEED_A {"Auto", }
  141. // #define LINK_SPEED_B {"Auto", }
  142. // #define AUTO_NEG_A {"Sense", }
  143. // #define AUTO_NEG_B {"Sense", }
  144. // #define DUP_CAP_A {"Both", }
  145. // #define DUP_CAP_B {"Both", }
  146. // #define FLOW_CTRL_A {"SymOrRem", }
  147. // #define FLOW_CTRL_B {"SymOrRem", }
  148. // #define ROLE_A {"Auto", }
  149. // #define ROLE_B {"Auto", }
  150. // #define PREF_PORT {"A", }
  151. // #define CON_TYPE {"Auto", }
  152. // #define RLMT_MODE {"CheckLinkState", }
  153. #define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
  154. #define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
  155. #define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
  156. /* Set blink mode*/
  157. #define OEM_CONFIG_VALUE ( SK_ACT_LED_BLINK | \
  158. SK_DUP_LED_NORMAL | \
  159. SK_LED_LINK100_ON)
  160. /* Isr return value */
  161. #define SkIsrRetVar irqreturn_t
  162. #define SkIsrRetNone IRQ_NONE
  163. #define SkIsrRetHandled IRQ_HANDLED
  164. /*******************************************************************************
  165. *
  166. * Local Function Prototypes
  167. *
  168. ******************************************************************************/
  169. static void FreeResources(struct SK_NET_DEVICE *dev);
  170. static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
  171. static SK_BOOL BoardAllocMem(SK_AC *pAC);
  172. static void BoardFreeMem(SK_AC *pAC);
  173. static void BoardInitMem(SK_AC *pAC);
  174. static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, SK_BOOL);
  175. static SkIsrRetVar SkGeIsr(int irq, void *dev_id);
  176. static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id);
  177. static int SkGeOpen(struct SK_NET_DEVICE *dev);
  178. static int SkGeClose(struct SK_NET_DEVICE *dev);
  179. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
  180. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
  181. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
  182. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
  183. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
  184. static void GetConfiguration(SK_AC*);
  185. static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
  186. static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
  187. static void FillRxRing(SK_AC*, RX_PORT*);
  188. static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
  189. static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
  190. static void ClearAndStartRx(SK_AC*, int);
  191. static void ClearTxIrq(SK_AC*, int, int);
  192. static void ClearRxRing(SK_AC*, RX_PORT*);
  193. static void ClearTxRing(SK_AC*, TX_PORT*);
  194. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
  195. static void PortReInitBmu(SK_AC*, int);
  196. static int SkGeIocMib(DEV_NET*, unsigned int, int);
  197. static int SkGeInitPCI(SK_AC *pAC);
  198. static void StartDrvCleanupTimer(SK_AC *pAC);
  199. static void StopDrvCleanupTimer(SK_AC *pAC);
  200. static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
  201. #ifdef SK_DIAG_SUPPORT
  202. static SK_U32 ParseDeviceNbrFromSlotName(const char *SlotName);
  203. static int SkDrvInitAdapter(SK_AC *pAC, int devNbr);
  204. static int SkDrvDeInitAdapter(SK_AC *pAC, int devNbr);
  205. #endif
  206. /*******************************************************************************
  207. *
  208. * Extern Function Prototypes
  209. *
  210. ******************************************************************************/
  211. extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);
  212. extern void SkDimDisplayModerationSettings(SK_AC *pAC);
  213. extern void SkDimStartModerationTimer(SK_AC *pAC);
  214. extern void SkDimModerate(SK_AC *pAC);
  215. extern void SkGeBlinkTimer(unsigned long data);
  216. #ifdef DEBUG
  217. static void DumpMsg(struct sk_buff*, char*);
  218. static void DumpData(char*, int);
  219. static void DumpLong(char*, int);
  220. #endif
  221. /* global variables *********************************************************/
  222. static SK_BOOL DoPrintInterfaceChange = SK_TRUE;
  223. extern const struct ethtool_ops SkGeEthtoolOps;
  224. /* local variables **********************************************************/
  225. static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
  226. static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
  227. /*****************************************************************************
  228. *
  229. * SkPciWriteCfgDWord - write a 32 bit value to pci config space
  230. *
  231. * Description:
  232. * This routine writes a 32 bit value to the pci configuration
  233. * space.
  234. *
  235. * Returns:
  236. * 0 - indicate everything worked ok.
  237. * != 0 - error indication
  238. */
  239. static inline int SkPciWriteCfgDWord(
  240. SK_AC *pAC, /* Adapter Control structure pointer */
  241. int PciAddr, /* PCI register address */
  242. SK_U32 Val) /* pointer to store the read value */
  243. {
  244. pci_write_config_dword(pAC->PciDev, PciAddr, Val);
  245. return(0);
  246. } /* SkPciWriteCfgDWord */
  247. /*****************************************************************************
  248. *
  249. * SkGeInitPCI - Init the PCI resources
  250. *
  251. * Description:
  252. * This function initialize the PCI resources and IO
  253. *
  254. * Returns:
  255. * 0 - indicate everything worked ok.
  256. * != 0 - error indication
  257. */
  258. static __devinit int SkGeInitPCI(SK_AC *pAC)
  259. {
  260. struct SK_NET_DEVICE *dev = pAC->dev[0];
  261. struct pci_dev *pdev = pAC->PciDev;
  262. int retval;
  263. dev->mem_start = pci_resource_start (pdev, 0);
  264. pci_set_master(pdev);
  265. retval = pci_request_regions(pdev, "sk98lin");
  266. if (retval)
  267. goto out;
  268. #ifdef SK_BIG_ENDIAN
  269. /*
  270. * On big endian machines, we use the adapter's aibility of
  271. * reading the descriptors as big endian.
  272. */
  273. {
  274. SK_U32 our2;
  275. SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
  276. our2 |= PCI_REV_DESC;
  277. SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
  278. }
  279. #endif
  280. /*
  281. * Remap the regs into kernel space.
  282. */
  283. pAC->IoBase = ioremap_nocache(dev->mem_start, 0x4000);
  284. if (!pAC->IoBase) {
  285. retval = -EIO;
  286. goto out_release;
  287. }
  288. return 0;
  289. out_release:
  290. pci_release_regions(pdev);
  291. out:
  292. return retval;
  293. }
  294. /*****************************************************************************
  295. *
  296. * FreeResources - release resources allocated for adapter
  297. *
  298. * Description:
  299. * This function releases the IRQ, unmaps the IO and
  300. * frees the desriptor ring.
  301. *
  302. * Returns: N/A
  303. *
  304. */
  305. static void FreeResources(struct SK_NET_DEVICE *dev)
  306. {
  307. SK_U32 AllocFlag;
  308. DEV_NET *pNet;
  309. SK_AC *pAC;
  310. pNet = netdev_priv(dev);
  311. pAC = pNet->pAC;
  312. AllocFlag = pAC->AllocFlag;
  313. if (pAC->PciDev) {
  314. pci_release_regions(pAC->PciDev);
  315. }
  316. if (AllocFlag & SK_ALLOC_IRQ) {
  317. free_irq(dev->irq, dev);
  318. }
  319. if (pAC->IoBase) {
  320. iounmap(pAC->IoBase);
  321. }
  322. if (pAC->pDescrMem) {
  323. BoardFreeMem(pAC);
  324. }
  325. } /* FreeResources */
  326. MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
  327. MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
  328. MODULE_LICENSE("GPL");
  329. #ifdef LINK_SPEED_A
  330. static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED;
  331. #else
  332. static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
  333. #endif
  334. #ifdef LINK_SPEED_B
  335. static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED;
  336. #else
  337. static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
  338. #endif
  339. #ifdef AUTO_NEG_A
  340. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
  341. #else
  342. static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
  343. #endif
  344. #ifdef DUP_CAP_A
  345. static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
  346. #else
  347. static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
  348. #endif
  349. #ifdef FLOW_CTRL_A
  350. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
  351. #else
  352. static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
  353. #endif
  354. #ifdef ROLE_A
  355. static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
  356. #else
  357. static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
  358. #endif
  359. #ifdef AUTO_NEG_B
  360. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
  361. #else
  362. static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
  363. #endif
  364. #ifdef DUP_CAP_B
  365. static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
  366. #else
  367. static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
  368. #endif
  369. #ifdef FLOW_CTRL_B
  370. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
  371. #else
  372. static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
  373. #endif
  374. #ifdef ROLE_B
  375. static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
  376. #else
  377. static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
  378. #endif
  379. #ifdef CON_TYPE
  380. static char *ConType[SK_MAX_CARD_PARAM] = CON_TYPE;
  381. #else
  382. static char *ConType[SK_MAX_CARD_PARAM] = {"", };
  383. #endif
  384. #ifdef PREF_PORT
  385. static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
  386. #else
  387. static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
  388. #endif
  389. #ifdef RLMT_MODE
  390. static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
  391. #else
  392. static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
  393. #endif
  394. static int IntsPerSec[SK_MAX_CARD_PARAM];
  395. static char *Moderation[SK_MAX_CARD_PARAM];
  396. static char *ModerationMask[SK_MAX_CARD_PARAM];
  397. static char *AutoSizing[SK_MAX_CARD_PARAM];
  398. static char *Stats[SK_MAX_CARD_PARAM];
  399. module_param_array(Speed_A, charp, NULL, 0);
  400. module_param_array(Speed_B, charp, NULL, 0);
  401. module_param_array(AutoNeg_A, charp, NULL, 0);
  402. module_param_array(AutoNeg_B, charp, NULL, 0);
  403. module_param_array(DupCap_A, charp, NULL, 0);
  404. module_param_array(DupCap_B, charp, NULL, 0);
  405. module_param_array(FlowCtrl_A, charp, NULL, 0);
  406. module_param_array(FlowCtrl_B, charp, NULL, 0);
  407. module_param_array(Role_A, charp, NULL, 0);
  408. module_param_array(Role_B, charp, NULL, 0);
  409. module_param_array(ConType, charp, NULL, 0);
  410. module_param_array(PrefPort, charp, NULL, 0);
  411. module_param_array(RlmtMode, charp, NULL, 0);
  412. /* used for interrupt moderation */
  413. module_param_array(IntsPerSec, int, NULL, 0);
  414. module_param_array(Moderation, charp, NULL, 0);
  415. module_param_array(Stats, charp, NULL, 0);
  416. module_param_array(ModerationMask, charp, NULL, 0);
  417. module_param_array(AutoSizing, charp, NULL, 0);
  418. /*****************************************************************************
  419. *
  420. * SkGeBoardInit - do level 0 and 1 initialization
  421. *
  422. * Description:
  423. * This function prepares the board hardware for running. The desriptor
  424. * ring is set up, the IRQ is allocated and the configuration settings
  425. * are examined.
  426. *
  427. * Returns:
  428. * 0, if everything is ok
  429. * !=0, on error
  430. */
  431. static int __devinit SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
  432. {
  433. short i;
  434. unsigned long Flags;
  435. char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
  436. char *VerStr = VER_STRING;
  437. int Ret; /* return code of request_irq */
  438. SK_BOOL DualNet;
  439. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  440. ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
  441. for (i=0; i<SK_MAX_MACS; i++) {
  442. pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
  443. pAC->TxPort[i][0].PortIndex = i;
  444. pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
  445. pAC->RxPort[i].PortIndex = i;
  446. }
  447. /* Initialize the mutexes */
  448. for (i=0; i<SK_MAX_MACS; i++) {
  449. spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
  450. spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
  451. }
  452. spin_lock_init(&pAC->SlowPathLock);
  453. /* setup phy_id blink timer */
  454. pAC->BlinkTimer.function = SkGeBlinkTimer;
  455. pAC->BlinkTimer.data = (unsigned long) dev;
  456. init_timer(&pAC->BlinkTimer);
  457. /* level 0 init common modules here */
  458. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  459. /* Does a RESET on board ...*/
  460. if (SkGeInit(pAC, pAC->IoBase, SK_INIT_DATA) != 0) {
  461. printk("HWInit (0) failed.\n");
  462. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  463. return -EIO;
  464. }
  465. SkI2cInit( pAC, pAC->IoBase, SK_INIT_DATA);
  466. SkEventInit(pAC, pAC->IoBase, SK_INIT_DATA);
  467. SkPnmiInit( pAC, pAC->IoBase, SK_INIT_DATA);
  468. SkAddrInit( pAC, pAC->IoBase, SK_INIT_DATA);
  469. SkRlmtInit( pAC, pAC->IoBase, SK_INIT_DATA);
  470. SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
  471. pAC->BoardLevel = SK_INIT_DATA;
  472. pAC->RxBufSize = ETH_BUF_SIZE;
  473. SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
  474. SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
  475. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  476. /* level 1 init common modules here (HW init) */
  477. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  478. if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
  479. printk("sk98lin: HWInit (1) failed.\n");
  480. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  481. return -EIO;
  482. }
  483. SkI2cInit( pAC, pAC->IoBase, SK_INIT_IO);
  484. SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
  485. SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
  486. SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
  487. SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
  488. SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
  489. /* Set chipset type support */
  490. pAC->ChipsetType = 0;
  491. if ((pAC->GIni.GIChipId == CHIP_ID_YUKON) ||
  492. (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE)) {
  493. pAC->ChipsetType = 1;
  494. }
  495. GetConfiguration(pAC);
  496. if (pAC->RlmtNets == 2) {
  497. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  498. }
  499. pAC->BoardLevel = SK_INIT_IO;
  500. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  501. if (pAC->GIni.GIMacsFound == 2) {
  502. Ret = request_irq(dev->irq, SkGeIsr, IRQF_SHARED, "sk98lin", dev);
  503. } else if (pAC->GIni.GIMacsFound == 1) {
  504. Ret = request_irq(dev->irq, SkGeIsrOnePort, IRQF_SHARED,
  505. "sk98lin", dev);
  506. } else {
  507. printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
  508. pAC->GIni.GIMacsFound);
  509. return -EIO;
  510. }
  511. if (Ret) {
  512. printk(KERN_WARNING "sk98lin: Requested IRQ %d is busy.\n",
  513. dev->irq);
  514. return Ret;
  515. }
  516. pAC->AllocFlag |= SK_ALLOC_IRQ;
  517. /* Alloc memory for this board (Mem for RxD/TxD) : */
  518. if(!BoardAllocMem(pAC)) {
  519. printk("No memory for descriptor rings.\n");
  520. return -ENOMEM;
  521. }
  522. BoardInitMem(pAC);
  523. /* tschilling: New common function with minimum size check. */
  524. DualNet = SK_FALSE;
  525. if (pAC->RlmtNets == 2) {
  526. DualNet = SK_TRUE;
  527. }
  528. if (SkGeInitAssignRamToQueues(
  529. pAC,
  530. pAC->ActivePort,
  531. DualNet)) {
  532. BoardFreeMem(pAC);
  533. printk("sk98lin: SkGeInitAssignRamToQueues failed.\n");
  534. return -EIO;
  535. }
  536. return (0);
  537. } /* SkGeBoardInit */
  538. /*****************************************************************************
  539. *
  540. * BoardAllocMem - allocate the memory for the descriptor rings
  541. *
  542. * Description:
  543. * This function allocates the memory for all descriptor rings.
  544. * Each ring is aligned for the desriptor alignment and no ring
  545. * has a 4 GByte boundary in it (because the upper 32 bit must
  546. * be constant for all descriptiors in one rings).
  547. *
  548. * Returns:
  549. * SK_TRUE, if all memory could be allocated
  550. * SK_FALSE, if not
  551. */
  552. static __devinit SK_BOOL BoardAllocMem(SK_AC *pAC)
  553. {
  554. caddr_t pDescrMem; /* pointer to descriptor memory area */
  555. size_t AllocLength; /* length of complete descriptor area */
  556. int i; /* loop counter */
  557. unsigned long BusAddr;
  558. /* rings plus one for alignment (do not cross 4 GB boundary) */
  559. /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
  560. #if (BITS_PER_LONG == 32)
  561. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  562. #else
  563. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  564. + RX_RING_SIZE + 8;
  565. #endif
  566. pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
  567. &pAC->pDescrMemDMA);
  568. if (pDescrMem == NULL) {
  569. return (SK_FALSE);
  570. }
  571. pAC->pDescrMem = pDescrMem;
  572. BusAddr = (unsigned long) pAC->pDescrMemDMA;
  573. /* Descriptors need 8 byte alignment, and this is ensured
  574. * by pci_alloc_consistent.
  575. */
  576. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  577. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  578. ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
  579. i, (unsigned long) pDescrMem,
  580. BusAddr));
  581. pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
  582. pAC->TxPort[i][0].VTxDescrRing = BusAddr;
  583. pDescrMem += TX_RING_SIZE;
  584. BusAddr += TX_RING_SIZE;
  585. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  586. ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
  587. i, (unsigned long) pDescrMem,
  588. (unsigned long)BusAddr));
  589. pAC->RxPort[i].pRxDescrRing = pDescrMem;
  590. pAC->RxPort[i].VRxDescrRing = BusAddr;
  591. pDescrMem += RX_RING_SIZE;
  592. BusAddr += RX_RING_SIZE;
  593. } /* for */
  594. return (SK_TRUE);
  595. } /* BoardAllocMem */
  596. /****************************************************************************
  597. *
  598. * BoardFreeMem - reverse of BoardAllocMem
  599. *
  600. * Description:
  601. * Free all memory allocated in BoardAllocMem: adapter context,
  602. * descriptor rings, locks.
  603. *
  604. * Returns: N/A
  605. */
  606. static void BoardFreeMem(
  607. SK_AC *pAC)
  608. {
  609. size_t AllocLength; /* length of complete descriptor area */
  610. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  611. ("BoardFreeMem\n"));
  612. #if (BITS_PER_LONG == 32)
  613. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
  614. #else
  615. AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
  616. + RX_RING_SIZE + 8;
  617. #endif
  618. pci_free_consistent(pAC->PciDev, AllocLength,
  619. pAC->pDescrMem, pAC->pDescrMemDMA);
  620. pAC->pDescrMem = NULL;
  621. } /* BoardFreeMem */
  622. /*****************************************************************************
  623. *
  624. * BoardInitMem - initiate the descriptor rings
  625. *
  626. * Description:
  627. * This function sets the descriptor rings up in memory.
  628. * The adapter is initialized with the descriptor start addresses.
  629. *
  630. * Returns: N/A
  631. */
  632. static __devinit void BoardInitMem(SK_AC *pAC)
  633. {
  634. int i; /* loop counter */
  635. int RxDescrSize; /* the size of a rx descriptor rounded up to alignment*/
  636. int TxDescrSize; /* the size of a tx descriptor rounded up to alignment*/
  637. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  638. ("BoardInitMem\n"));
  639. RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  640. pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
  641. TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
  642. pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
  643. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  644. SetupRing(
  645. pAC,
  646. pAC->TxPort[i][0].pTxDescrRing,
  647. pAC->TxPort[i][0].VTxDescrRing,
  648. (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
  649. (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
  650. (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
  651. &pAC->TxPort[i][0].TxdRingFree,
  652. SK_TRUE);
  653. SetupRing(
  654. pAC,
  655. pAC->RxPort[i].pRxDescrRing,
  656. pAC->RxPort[i].VRxDescrRing,
  657. &pAC->RxPort[i].pRxdRingHead,
  658. &pAC->RxPort[i].pRxdRingTail,
  659. &pAC->RxPort[i].pRxdRingPrev,
  660. &pAC->RxPort[i].RxdRingFree,
  661. SK_FALSE);
  662. }
  663. } /* BoardInitMem */
  664. /*****************************************************************************
  665. *
  666. * SetupRing - create one descriptor ring
  667. *
  668. * Description:
  669. * This function creates one descriptor ring in the given memory area.
  670. * The head, tail and number of free descriptors in the ring are set.
  671. *
  672. * Returns:
  673. * none
  674. */
  675. static void SetupRing(
  676. SK_AC *pAC,
  677. void *pMemArea, /* a pointer to the memory area for the ring */
  678. uintptr_t VMemArea, /* the virtual bus address of the memory area */
  679. RXD **ppRingHead, /* address where the head should be written */
  680. RXD **ppRingTail, /* address where the tail should be written */
  681. RXD **ppRingPrev, /* address where the tail should be written */
  682. int *pRingFree, /* address where the # of free descr. goes */
  683. SK_BOOL IsTx) /* flag: is this a tx ring */
  684. {
  685. int i; /* loop counter */
  686. int DescrSize; /* the size of a descriptor rounded up to alignment*/
  687. int DescrNum; /* number of descriptors per ring */
  688. RXD *pDescr; /* pointer to a descriptor (receive or transmit) */
  689. RXD *pNextDescr; /* pointer to the next descriptor */
  690. RXD *pPrevDescr; /* pointer to the previous descriptor */
  691. uintptr_t VNextDescr; /* the virtual bus address of the next descriptor */
  692. if (IsTx == SK_TRUE) {
  693. DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
  694. DESCR_ALIGN;
  695. DescrNum = TX_RING_SIZE / DescrSize;
  696. } else {
  697. DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
  698. DESCR_ALIGN;
  699. DescrNum = RX_RING_SIZE / DescrSize;
  700. }
  701. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
  702. ("Descriptor size: %d Descriptor Number: %d\n",
  703. DescrSize,DescrNum));
  704. pDescr = (RXD*) pMemArea;
  705. pPrevDescr = NULL;
  706. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  707. VNextDescr = VMemArea + DescrSize;
  708. for(i=0; i<DescrNum; i++) {
  709. /* set the pointers right */
  710. pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
  711. pDescr->pNextRxd = pNextDescr;
  712. if (!IsTx) pDescr->TcpSumStarts = ETH_HLEN << 16 | ETH_HLEN;
  713. /* advance one step */
  714. pPrevDescr = pDescr;
  715. pDescr = pNextDescr;
  716. pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
  717. VNextDescr += DescrSize;
  718. }
  719. pPrevDescr->pNextRxd = (RXD*) pMemArea;
  720. pPrevDescr->VNextRxd = VMemArea;
  721. pDescr = (RXD*) pMemArea;
  722. *ppRingHead = (RXD*) pMemArea;
  723. *ppRingTail = *ppRingHead;
  724. *ppRingPrev = pPrevDescr;
  725. *pRingFree = DescrNum;
  726. } /* SetupRing */
  727. /*****************************************************************************
  728. *
  729. * PortReInitBmu - re-initiate the descriptor rings for one port
  730. *
  731. * Description:
  732. * This function reinitializes the descriptor rings of one port
  733. * in memory. The port must be stopped before.
  734. * The HW is initialized with the descriptor start addresses.
  735. *
  736. * Returns:
  737. * none
  738. */
  739. static void PortReInitBmu(
  740. SK_AC *pAC, /* pointer to adapter context */
  741. int PortIndex) /* index of the port for which to re-init */
  742. {
  743. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  744. ("PortReInitBmu "));
  745. /* set address of first descriptor of ring in BMU */
  746. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_L,
  747. (uint32_t)(((caddr_t)
  748. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  749. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  750. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
  751. 0xFFFFFFFF));
  752. SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_H,
  753. (uint32_t)(((caddr_t)
  754. (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
  755. pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
  756. pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
  757. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_L,
  758. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  759. pAC->RxPort[PortIndex].pRxDescrRing +
  760. pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
  761. SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_H,
  762. (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
  763. pAC->RxPort[PortIndex].pRxDescrRing +
  764. pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
  765. } /* PortReInitBmu */
  766. /****************************************************************************
  767. *
  768. * SkGeIsr - handle adapter interrupts
  769. *
  770. * Description:
  771. * The interrupt routine is called when the network adapter
  772. * generates an interrupt. It may also be called if another device
  773. * shares this interrupt vector with the driver.
  774. *
  775. * Returns: N/A
  776. *
  777. */
  778. static SkIsrRetVar SkGeIsr(int irq, void *dev_id)
  779. {
  780. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  781. DEV_NET *pNet;
  782. SK_AC *pAC;
  783. SK_U32 IntSrc; /* interrupts source register contents */
  784. pNet = netdev_priv(dev);
  785. pAC = pNet->pAC;
  786. /*
  787. * Check and process if its our interrupt
  788. */
  789. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  790. if (IntSrc == 0) {
  791. return SkIsrRetNone;
  792. }
  793. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  794. #if 0 /* software irq currently not used */
  795. if (IntSrc & IS_IRQ_SW) {
  796. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  797. SK_DBGCAT_DRV_INT_SRC,
  798. ("Software IRQ\n"));
  799. }
  800. #endif
  801. if (IntSrc & IS_R1_F) {
  802. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  803. SK_DBGCAT_DRV_INT_SRC,
  804. ("EOF RX1 IRQ\n"));
  805. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  806. SK_PNMI_CNT_RX_INTR(pAC, 0);
  807. }
  808. if (IntSrc & IS_R2_F) {
  809. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  810. SK_DBGCAT_DRV_INT_SRC,
  811. ("EOF RX2 IRQ\n"));
  812. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  813. SK_PNMI_CNT_RX_INTR(pAC, 1);
  814. }
  815. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  816. if (IntSrc & IS_XA1_F) {
  817. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  818. SK_DBGCAT_DRV_INT_SRC,
  819. ("EOF AS TX1 IRQ\n"));
  820. SK_PNMI_CNT_TX_INTR(pAC, 0);
  821. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  822. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  823. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  824. }
  825. if (IntSrc & IS_XA2_F) {
  826. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  827. SK_DBGCAT_DRV_INT_SRC,
  828. ("EOF AS TX2 IRQ\n"));
  829. SK_PNMI_CNT_TX_INTR(pAC, 1);
  830. spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  831. FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
  832. spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
  833. }
  834. #if 0 /* only if sync. queues used */
  835. if (IntSrc & IS_XS1_F) {
  836. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  837. SK_DBGCAT_DRV_INT_SRC,
  838. ("EOF SY TX1 IRQ\n"));
  839. SK_PNMI_CNT_TX_INTR(pAC, 1);
  840. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  841. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  842. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  843. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  844. }
  845. if (IntSrc & IS_XS2_F) {
  846. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  847. SK_DBGCAT_DRV_INT_SRC,
  848. ("EOF SY TX2 IRQ\n"));
  849. SK_PNMI_CNT_TX_INTR(pAC, 1);
  850. spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  851. FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
  852. spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
  853. ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
  854. }
  855. #endif
  856. #endif
  857. /* do all IO at once */
  858. if (IntSrc & IS_R1_F)
  859. ClearAndStartRx(pAC, 0);
  860. if (IntSrc & IS_R2_F)
  861. ClearAndStartRx(pAC, 1);
  862. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  863. if (IntSrc & IS_XA1_F)
  864. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  865. if (IntSrc & IS_XA2_F)
  866. ClearTxIrq(pAC, 1, TX_PRIO_LOW);
  867. #endif
  868. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  869. } /* while (IntSrc & IRQ_MASK != 0) */
  870. IntSrc &= pAC->GIni.GIValIrqMask;
  871. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  872. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  873. ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
  874. pAC->CheckQueue = SK_FALSE;
  875. spin_lock(&pAC->SlowPathLock);
  876. if (IntSrc & SPECIAL_IRQS)
  877. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  878. SkEventDispatcher(pAC, pAC->IoBase);
  879. spin_unlock(&pAC->SlowPathLock);
  880. }
  881. /*
  882. * do it all again is case we cleared an interrupt that
  883. * came in after handling the ring (OUTs may be delayed
  884. * in hardware buffers, but are through after IN)
  885. *
  886. * rroesler: has been commented out and shifted to
  887. * SkGeDrvEvent(), because it is timer
  888. * guarded now
  889. *
  890. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  891. ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
  892. */
  893. if (pAC->CheckQueue) {
  894. pAC->CheckQueue = SK_FALSE;
  895. spin_lock(&pAC->SlowPathLock);
  896. SkEventDispatcher(pAC, pAC->IoBase);
  897. spin_unlock(&pAC->SlowPathLock);
  898. }
  899. /* IRQ is processed - Enable IRQs again*/
  900. SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
  901. return SkIsrRetHandled;
  902. } /* SkGeIsr */
  903. /****************************************************************************
  904. *
  905. * SkGeIsrOnePort - handle adapter interrupts for single port adapter
  906. *
  907. * Description:
  908. * The interrupt routine is called when the network adapter
  909. * generates an interrupt. It may also be called if another device
  910. * shares this interrupt vector with the driver.
  911. * This is the same as above, but handles only one port.
  912. *
  913. * Returns: N/A
  914. *
  915. */
  916. static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id)
  917. {
  918. struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
  919. DEV_NET *pNet;
  920. SK_AC *pAC;
  921. SK_U32 IntSrc; /* interrupts source register contents */
  922. pNet = netdev_priv(dev);
  923. pAC = pNet->pAC;
  924. /*
  925. * Check and process if its our interrupt
  926. */
  927. SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
  928. if (IntSrc == 0) {
  929. return SkIsrRetNone;
  930. }
  931. while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
  932. #if 0 /* software irq currently not used */
  933. if (IntSrc & IS_IRQ_SW) {
  934. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  935. SK_DBGCAT_DRV_INT_SRC,
  936. ("Software IRQ\n"));
  937. }
  938. #endif
  939. if (IntSrc & IS_R1_F) {
  940. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  941. SK_DBGCAT_DRV_INT_SRC,
  942. ("EOF RX1 IRQ\n"));
  943. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  944. SK_PNMI_CNT_RX_INTR(pAC, 0);
  945. }
  946. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  947. if (IntSrc & IS_XA1_F) {
  948. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  949. SK_DBGCAT_DRV_INT_SRC,
  950. ("EOF AS TX1 IRQ\n"));
  951. SK_PNMI_CNT_TX_INTR(pAC, 0);
  952. spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  953. FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
  954. spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
  955. }
  956. #if 0 /* only if sync. queues used */
  957. if (IntSrc & IS_XS1_F) {
  958. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  959. SK_DBGCAT_DRV_INT_SRC,
  960. ("EOF SY TX1 IRQ\n"));
  961. SK_PNMI_CNT_TX_INTR(pAC, 0);
  962. spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  963. FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
  964. spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
  965. ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
  966. }
  967. #endif
  968. #endif
  969. /* do all IO at once */
  970. if (IntSrc & IS_R1_F)
  971. ClearAndStartRx(pAC, 0);
  972. #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
  973. if (IntSrc & IS_XA1_F)
  974. ClearTxIrq(pAC, 0, TX_PRIO_LOW);
  975. #endif
  976. SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
  977. } /* while (IntSrc & IRQ_MASK != 0) */
  978. IntSrc &= pAC->GIni.GIValIrqMask;
  979. if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
  980. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
  981. ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
  982. pAC->CheckQueue = SK_FALSE;
  983. spin_lock(&pAC->SlowPathLock);
  984. if (IntSrc & SPECIAL_IRQS)
  985. SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
  986. SkEventDispatcher(pAC, pAC->IoBase);
  987. spin_unlock(&pAC->SlowPathLock);
  988. }
  989. /*
  990. * do it all again is case we cleared an interrupt that
  991. * came in after handling the ring (OUTs may be delayed
  992. * in hardware buffers, but are through after IN)
  993. *
  994. * rroesler: has been commented out and shifted to
  995. * SkGeDrvEvent(), because it is timer
  996. * guarded now
  997. *
  998. ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
  999. */
  1000. /* IRQ is processed - Enable IRQs again*/
  1001. SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
  1002. return SkIsrRetHandled;
  1003. } /* SkGeIsrOnePort */
  1004. #ifdef CONFIG_NET_POLL_CONTROLLER
  1005. /****************************************************************************
  1006. *
  1007. * SkGePollController - polling receive, for netconsole
  1008. *
  1009. * Description:
  1010. * Polling receive - used by netconsole and other diagnostic tools
  1011. * to allow network i/o with interrupts disabled.
  1012. *
  1013. * Returns: N/A
  1014. */
  1015. static void SkGePollController(struct net_device *dev)
  1016. {
  1017. disable_irq(dev->irq);
  1018. SkGeIsr(dev->irq, dev);
  1019. enable_irq(dev->irq);
  1020. }
  1021. #endif
  1022. /****************************************************************************
  1023. *
  1024. * SkGeOpen - handle start of initialized adapter
  1025. *
  1026. * Description:
  1027. * This function starts the initialized adapter.
  1028. * The board level variable is set and the adapter is
  1029. * brought to full functionality.
  1030. * The device flags are set for operation.
  1031. * Do all necessary level 2 initialization, enable interrupts and
  1032. * give start command to RLMT.
  1033. *
  1034. * Returns:
  1035. * 0 on success
  1036. * != 0 on error
  1037. */
  1038. static int SkGeOpen(
  1039. struct SK_NET_DEVICE *dev)
  1040. {
  1041. DEV_NET *pNet;
  1042. SK_AC *pAC;
  1043. unsigned long Flags; /* for spin lock */
  1044. int i;
  1045. SK_EVPARA EvPara; /* an event parameter union */
  1046. pNet = netdev_priv(dev);
  1047. pAC = pNet->pAC;
  1048. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1049. ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
  1050. #ifdef SK_DIAG_SUPPORT
  1051. if (pAC->DiagModeActive == DIAG_ACTIVE) {
  1052. if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
  1053. return (-1); /* still in use by diag; deny actions */
  1054. }
  1055. }
  1056. #endif
  1057. /* Set blink mode */
  1058. if ((pAC->PciDev->vendor == 0x1186) || (pAC->PciDev->vendor == 0x11ab ))
  1059. pAC->GIni.GILedBlinkCtrl = OEM_CONFIG_VALUE;
  1060. if (pAC->BoardLevel == SK_INIT_DATA) {
  1061. /* level 1 init common modules here */
  1062. if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
  1063. printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
  1064. return (-1);
  1065. }
  1066. SkI2cInit (pAC, pAC->IoBase, SK_INIT_IO);
  1067. SkEventInit (pAC, pAC->IoBase, SK_INIT_IO);
  1068. SkPnmiInit (pAC, pAC->IoBase, SK_INIT_IO);
  1069. SkAddrInit (pAC, pAC->IoBase, SK_INIT_IO);
  1070. SkRlmtInit (pAC, pAC->IoBase, SK_INIT_IO);
  1071. SkTimerInit (pAC, pAC->IoBase, SK_INIT_IO);
  1072. pAC->BoardLevel = SK_INIT_IO;
  1073. }
  1074. if (pAC->BoardLevel != SK_INIT_RUN) {
  1075. /* tschilling: Level 2 init modules here, check return value. */
  1076. if (SkGeInit(pAC, pAC->IoBase, SK_INIT_RUN) != 0) {
  1077. printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
  1078. return (-1);
  1079. }
  1080. SkI2cInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1081. SkEventInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1082. SkPnmiInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1083. SkAddrInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1084. SkRlmtInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1085. SkTimerInit (pAC, pAC->IoBase, SK_INIT_RUN);
  1086. pAC->BoardLevel = SK_INIT_RUN;
  1087. }
  1088. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1089. /* Enable transmit descriptor polling. */
  1090. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  1091. FillRxRing(pAC, &pAC->RxPort[i]);
  1092. }
  1093. SkGeYellowLED(pAC, pAC->IoBase, 1);
  1094. StartDrvCleanupTimer(pAC);
  1095. SkDimEnableModerationIfNeeded(pAC);
  1096. SkDimDisplayModerationSettings(pAC);
  1097. pAC->GIni.GIValIrqMask &= IRQ_MASK;
  1098. /* enable Interrupts */
  1099. SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
  1100. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  1101. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1102. if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
  1103. EvPara.Para32[0] = pAC->RlmtNets;
  1104. EvPara.Para32[1] = -1;
  1105. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
  1106. EvPara);
  1107. EvPara.Para32[0] = pAC->RlmtMode;
  1108. EvPara.Para32[1] = 0;
  1109. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
  1110. EvPara);
  1111. }
  1112. EvPara.Para32[0] = pNet->NetNr;
  1113. EvPara.Para32[1] = -1;
  1114. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  1115. SkEventDispatcher(pAC, pAC->IoBase);
  1116. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1117. pAC->MaxPorts++;
  1118. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1119. ("SkGeOpen suceeded\n"));
  1120. return (0);
  1121. } /* SkGeOpen */
  1122. /****************************************************************************
  1123. *
  1124. * SkGeClose - Stop initialized adapter
  1125. *
  1126. * Description:
  1127. * Close initialized adapter.
  1128. *
  1129. * Returns:
  1130. * 0 - on success
  1131. * error code - on error
  1132. */
  1133. static int SkGeClose(
  1134. struct SK_NET_DEVICE *dev)
  1135. {
  1136. DEV_NET *pNet;
  1137. DEV_NET *newPtrNet;
  1138. SK_AC *pAC;
  1139. unsigned long Flags; /* for spin lock */
  1140. int i;
  1141. int PortIdx;
  1142. SK_EVPARA EvPara;
  1143. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1144. ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
  1145. pNet = netdev_priv(dev);
  1146. pAC = pNet->pAC;
  1147. #ifdef SK_DIAG_SUPPORT
  1148. if (pAC->DiagModeActive == DIAG_ACTIVE) {
  1149. if (pAC->DiagFlowCtrl == SK_FALSE) {
  1150. /*
  1151. ** notify that the interface which has been closed
  1152. ** by operator interaction must not be started up
  1153. ** again when the DIAG has finished.
  1154. */
  1155. newPtrNet = netdev_priv(pAC->dev[0]);
  1156. if (newPtrNet == pNet) {
  1157. pAC->WasIfUp[0] = SK_FALSE;
  1158. } else {
  1159. pAC->WasIfUp[1] = SK_FALSE;
  1160. }
  1161. return 0; /* return to system everything is fine... */
  1162. } else {
  1163. pAC->DiagFlowCtrl = SK_FALSE;
  1164. }
  1165. }
  1166. #endif
  1167. netif_stop_queue(dev);
  1168. if (pAC->RlmtNets == 1)
  1169. PortIdx = pAC->ActivePort;
  1170. else
  1171. PortIdx = pNet->NetNr;
  1172. StopDrvCleanupTimer(pAC);
  1173. /*
  1174. * Clear multicast table, promiscuous mode ....
  1175. */
  1176. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  1177. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  1178. SK_PROM_MODE_NONE);
  1179. if (pAC->MaxPorts == 1) {
  1180. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1181. /* disable interrupts */
  1182. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1183. EvPara.Para32[0] = pNet->NetNr;
  1184. EvPara.Para32[1] = -1;
  1185. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1186. SkEventDispatcher(pAC, pAC->IoBase);
  1187. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  1188. /* stop the hardware */
  1189. SkGeDeInit(pAC, pAC->IoBase);
  1190. pAC->BoardLevel = SK_INIT_DATA;
  1191. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1192. } else {
  1193. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1194. EvPara.Para32[0] = pNet->NetNr;
  1195. EvPara.Para32[1] = -1;
  1196. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  1197. SkPnmiEvent(pAC, pAC->IoBase, SK_PNMI_EVT_XMAC_RESET, EvPara);
  1198. SkEventDispatcher(pAC, pAC->IoBase);
  1199. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1200. /* Stop port */
  1201. spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
  1202. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1203. SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
  1204. SK_STOP_ALL, SK_HARD_RST);
  1205. spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
  1206. [TX_PRIO_LOW].TxDesRingLock, Flags);
  1207. }
  1208. if (pAC->RlmtNets == 1) {
  1209. /* clear all descriptor rings */
  1210. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  1211. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  1212. ClearRxRing(pAC, &pAC->RxPort[i]);
  1213. ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
  1214. }
  1215. } else {
  1216. /* clear port descriptor rings */
  1217. ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
  1218. ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
  1219. ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
  1220. }
  1221. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  1222. ("SkGeClose: done "));
  1223. SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
  1224. SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct),
  1225. sizeof(SK_PNMI_STRUCT_DATA));
  1226. pAC->MaxPorts--;
  1227. return (0);
  1228. } /* SkGeClose */
  1229. /*****************************************************************************
  1230. *
  1231. * SkGeXmit - Linux frame transmit function
  1232. *
  1233. * Description:
  1234. * The system calls this function to send frames onto the wire.
  1235. * It puts the frame in the tx descriptor ring. If the ring is
  1236. * full then, the 'tbusy' flag is set.
  1237. *
  1238. * Returns:
  1239. * 0, if everything is ok
  1240. * !=0, on error
  1241. * WARNING: returning 1 in 'tbusy' case caused system crashes (double
  1242. * allocated skb's) !!!
  1243. */
  1244. static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
  1245. {
  1246. DEV_NET *pNet;
  1247. SK_AC *pAC;
  1248. int Rc; /* return code of XmitFrame */
  1249. pNet = netdev_priv(dev);
  1250. pAC = pNet->pAC;
  1251. if ((!skb_shinfo(skb)->nr_frags) ||
  1252. (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
  1253. /* Don't activate scatter-gather and hardware checksum */
  1254. if (pAC->RlmtNets == 2)
  1255. Rc = XmitFrame(
  1256. pAC,
  1257. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1258. skb);
  1259. else
  1260. Rc = XmitFrame(
  1261. pAC,
  1262. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1263. skb);
  1264. } else {
  1265. /* scatter-gather and hardware TCP checksumming anabled*/
  1266. if (pAC->RlmtNets == 2)
  1267. Rc = XmitFrameSG(
  1268. pAC,
  1269. &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
  1270. skb);
  1271. else
  1272. Rc = XmitFrameSG(
  1273. pAC,
  1274. &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
  1275. skb);
  1276. }
  1277. /* Transmitter out of resources? */
  1278. if (Rc <= 0) {
  1279. netif_stop_queue(dev);
  1280. }
  1281. /* If not taken, give buffer ownership back to the
  1282. * queueing layer.
  1283. */
  1284. if (Rc < 0)
  1285. return (1);
  1286. dev->trans_start = jiffies;
  1287. return (0);
  1288. } /* SkGeXmit */
  1289. /*****************************************************************************
  1290. *
  1291. * XmitFrame - fill one socket buffer into the transmit ring
  1292. *
  1293. * Description:
  1294. * This function puts a message into the transmit descriptor ring
  1295. * if there is a descriptors left.
  1296. * Linux skb's consist of only one continuous buffer.
  1297. * The first step locks the ring. It is held locked
  1298. * all time to avoid problems with SWITCH_../PORT_RESET.
  1299. * Then the descriptoris allocated.
  1300. * The second part is linking the buffer to the descriptor.
  1301. * At the very last, the Control field of the descriptor
  1302. * is made valid for the BMU and a start TX command is given
  1303. * if necessary.
  1304. *
  1305. * Returns:
  1306. * > 0 - on succes: the number of bytes in the message
  1307. * = 0 - on resource shortage: this frame sent or dropped, now
  1308. * the ring is full ( -> set tbusy)
  1309. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1310. */
  1311. static int XmitFrame(
  1312. SK_AC *pAC, /* pointer to adapter context */
  1313. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1314. struct sk_buff *pMessage) /* pointer to send-message */
  1315. {
  1316. TXD *pTxd; /* the rxd to fill */
  1317. TXD *pOldTxd;
  1318. unsigned long Flags;
  1319. SK_U64 PhysAddr;
  1320. int BytesSend = pMessage->len;
  1321. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS, ("X"));
  1322. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1323. #ifndef USE_TX_COMPLETE
  1324. FreeTxDescriptors(pAC, pTxPort);
  1325. #endif
  1326. if (pTxPort->TxdRingFree == 0) {
  1327. /*
  1328. ** no enough free descriptors in ring at the moment.
  1329. ** Maybe free'ing some old one help?
  1330. */
  1331. FreeTxDescriptors(pAC, pTxPort);
  1332. if (pTxPort->TxdRingFree == 0) {
  1333. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1334. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1335. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1336. SK_DBGCAT_DRV_TX_PROGRESS,
  1337. ("XmitFrame failed\n"));
  1338. /*
  1339. ** the desired message can not be sent
  1340. ** Because tbusy seems to be set, the message
  1341. ** should not be freed here. It will be used
  1342. ** by the scheduler of the ethernet handler
  1343. */
  1344. return (-1);
  1345. }
  1346. }
  1347. /*
  1348. ** If the passed socket buffer is of smaller MTU-size than 60,
  1349. ** copy everything into new buffer and fill all bytes between
  1350. ** the original packet end and the new packet end of 60 with 0x00.
  1351. ** This is to resolve faulty padding by the HW with 0xaa bytes.
  1352. */
  1353. if (BytesSend < C_LEN_ETHERNET_MINSIZE) {
  1354. if (skb_padto(pMessage, C_LEN_ETHERNET_MINSIZE)) {
  1355. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1356. return 0;
  1357. }
  1358. pMessage->len = C_LEN_ETHERNET_MINSIZE;
  1359. }
  1360. /*
  1361. ** advance head counter behind descriptor needed for this frame,
  1362. ** so that needed descriptor is reserved from that on. The next
  1363. ** action will be to add the passed buffer to the TX-descriptor
  1364. */
  1365. pTxd = pTxPort->pTxdRingHead;
  1366. pTxPort->pTxdRingHead = pTxd->pNextTxd;
  1367. pTxPort->TxdRingFree--;
  1368. #ifdef SK_DUMP_TX
  1369. DumpMsg(pMessage, "XmitFrame");
  1370. #endif
  1371. /*
  1372. ** First step is to map the data to be sent via the adapter onto
  1373. ** the DMA memory. Kernel 2.2 uses virt_to_bus(), but kernels 2.4
  1374. ** and 2.6 need to use pci_map_page() for that mapping.
  1375. */
  1376. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1377. virt_to_page(pMessage->data),
  1378. ((unsigned long) pMessage->data & ~PAGE_MASK),
  1379. pMessage->len,
  1380. PCI_DMA_TODEVICE);
  1381. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1382. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1383. pTxd->pMBuf = pMessage;
  1384. if (pMessage->ip_summed == CHECKSUM_PARTIAL) {
  1385. u16 hdrlen = pMessage->h.raw - pMessage->data;
  1386. u16 offset = hdrlen + pMessage->csum_offset;
  1387. if ((pMessage->h.ipiph->protocol == IPPROTO_UDP ) &&
  1388. (pAC->GIni.GIChipRev == 0) &&
  1389. (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
  1390. pTxd->TBControl = BMU_TCP_CHECK;
  1391. } else {
  1392. pTxd->TBControl = BMU_UDP_CHECK;
  1393. }
  1394. pTxd->TcpSumOfs = 0;
  1395. pTxd->TcpSumSt = hdrlen;
  1396. pTxd->TcpSumWr = offset;
  1397. pTxd->TBControl |= BMU_OWN | BMU_STF |
  1398. BMU_SW | BMU_EOF |
  1399. #ifdef USE_TX_COMPLETE
  1400. BMU_IRQ_EOF |
  1401. #endif
  1402. pMessage->len;
  1403. } else {
  1404. pTxd->TBControl = BMU_OWN | BMU_STF | BMU_CHECK |
  1405. BMU_SW | BMU_EOF |
  1406. #ifdef USE_TX_COMPLETE
  1407. BMU_IRQ_EOF |
  1408. #endif
  1409. pMessage->len;
  1410. }
  1411. /*
  1412. ** If previous descriptor already done, give TX start cmd
  1413. */
  1414. pOldTxd = xchg(&pTxPort->pTxdRingPrev, pTxd);
  1415. if ((pOldTxd->TBControl & BMU_OWN) == 0) {
  1416. SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
  1417. }
  1418. /*
  1419. ** after releasing the lock, the skb may immediately be free'd
  1420. */
  1421. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1422. if (pTxPort->TxdRingFree != 0) {
  1423. return (BytesSend);
  1424. } else {
  1425. return (0);
  1426. }
  1427. } /* XmitFrame */
  1428. /*****************************************************************************
  1429. *
  1430. * XmitFrameSG - fill one socket buffer into the transmit ring
  1431. * (use SG and TCP/UDP hardware checksumming)
  1432. *
  1433. * Description:
  1434. * This function puts a message into the transmit descriptor ring
  1435. * if there is a descriptors left.
  1436. *
  1437. * Returns:
  1438. * > 0 - on succes: the number of bytes in the message
  1439. * = 0 - on resource shortage: this frame sent or dropped, now
  1440. * the ring is full ( -> set tbusy)
  1441. * < 0 - on failure: other problems ( -> return failure to upper layers)
  1442. */
  1443. static int XmitFrameSG(
  1444. SK_AC *pAC, /* pointer to adapter context */
  1445. TX_PORT *pTxPort, /* pointer to struct of port to send to */
  1446. struct sk_buff *pMessage) /* pointer to send-message */
  1447. {
  1448. TXD *pTxd;
  1449. TXD *pTxdFst;
  1450. TXD *pTxdLst;
  1451. int CurrFrag;
  1452. int BytesSend;
  1453. skb_frag_t *sk_frag;
  1454. SK_U64 PhysAddr;
  1455. unsigned long Flags;
  1456. SK_U32 Control;
  1457. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  1458. #ifndef USE_TX_COMPLETE
  1459. FreeTxDescriptors(pAC, pTxPort);
  1460. #endif
  1461. if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
  1462. FreeTxDescriptors(pAC, pTxPort);
  1463. if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
  1464. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1465. SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
  1466. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1467. SK_DBGCAT_DRV_TX_PROGRESS,
  1468. ("XmitFrameSG failed - Ring full\n"));
  1469. /* this message can not be sent now */
  1470. return(-1);
  1471. }
  1472. }
  1473. pTxd = pTxPort->pTxdRingHead;
  1474. pTxdFst = pTxd;
  1475. pTxdLst = pTxd;
  1476. BytesSend = 0;
  1477. /*
  1478. ** Map the first fragment (header) into the DMA-space
  1479. */
  1480. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1481. virt_to_page(pMessage->data),
  1482. ((unsigned long) pMessage->data & ~PAGE_MASK),
  1483. skb_headlen(pMessage),
  1484. PCI_DMA_TODEVICE);
  1485. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1486. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1487. /*
  1488. ** Does the HW need to evaluate checksum for TCP or UDP packets?
  1489. */
  1490. if (pMessage->ip_summed == CHECKSUM_PARTIAL) {
  1491. u16 hdrlen = pMessage->h.raw - pMessage->data;
  1492. u16 offset = hdrlen + pMessage->csum_offset;
  1493. Control = BMU_STFWD;
  1494. /*
  1495. ** We have to use the opcode for tcp here, because the
  1496. ** opcode for udp is not working in the hardware yet
  1497. ** (Revision 2.0)
  1498. */
  1499. if ((pMessage->h.ipiph->protocol == IPPROTO_UDP ) &&
  1500. (pAC->GIni.GIChipRev == 0) &&
  1501. (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
  1502. Control |= BMU_TCP_CHECK;
  1503. } else {
  1504. Control |= BMU_UDP_CHECK;
  1505. }
  1506. pTxd->TcpSumOfs = 0;
  1507. pTxd->TcpSumSt = hdrlen;
  1508. pTxd->TcpSumWr = offset;
  1509. } else
  1510. Control = BMU_CHECK | BMU_SW;
  1511. pTxd->TBControl = BMU_STF | Control | skb_headlen(pMessage);
  1512. pTxd = pTxd->pNextTxd;
  1513. pTxPort->TxdRingFree--;
  1514. BytesSend += skb_headlen(pMessage);
  1515. /*
  1516. ** Browse over all SG fragments and map each of them into the DMA space
  1517. */
  1518. for (CurrFrag = 0; CurrFrag < skb_shinfo(pMessage)->nr_frags; CurrFrag++) {
  1519. sk_frag = &skb_shinfo(pMessage)->frags[CurrFrag];
  1520. /*
  1521. ** we already have the proper value in entry
  1522. */
  1523. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1524. sk_frag->page,
  1525. sk_frag->page_offset,
  1526. sk_frag->size,
  1527. PCI_DMA_TODEVICE);
  1528. pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1529. pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1530. pTxd->pMBuf = pMessage;
  1531. pTxd->TBControl = Control | BMU_OWN | sk_frag->size;
  1532. /*
  1533. ** Do we have the last fragment?
  1534. */
  1535. if( (CurrFrag+1) == skb_shinfo(pMessage)->nr_frags ) {
  1536. #ifdef USE_TX_COMPLETE
  1537. pTxd->TBControl |= BMU_EOF | BMU_IRQ_EOF;
  1538. #else
  1539. pTxd->TBControl |= BMU_EOF;
  1540. #endif
  1541. pTxdFst->TBControl |= BMU_OWN | BMU_SW;
  1542. }
  1543. pTxdLst = pTxd;
  1544. pTxd = pTxd->pNextTxd;
  1545. pTxPort->TxdRingFree--;
  1546. BytesSend += sk_frag->size;
  1547. }
  1548. /*
  1549. ** If previous descriptor already done, give TX start cmd
  1550. */
  1551. if ((pTxPort->pTxdRingPrev->TBControl & BMU_OWN) == 0) {
  1552. SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
  1553. }
  1554. pTxPort->pTxdRingPrev = pTxdLst;
  1555. pTxPort->pTxdRingHead = pTxd;
  1556. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  1557. if (pTxPort->TxdRingFree > 0) {
  1558. return (BytesSend);
  1559. } else {
  1560. return (0);
  1561. }
  1562. }
  1563. /*****************************************************************************
  1564. *
  1565. * FreeTxDescriptors - release descriptors from the descriptor ring
  1566. *
  1567. * Description:
  1568. * This function releases descriptors from a transmit ring if they
  1569. * have been sent by the BMU.
  1570. * If a descriptors is sent, it can be freed and the message can
  1571. * be freed, too.
  1572. * The SOFTWARE controllable bit is used to prevent running around a
  1573. * completely free ring for ever. If this bit is no set in the
  1574. * frame (by XmitFrame), this frame has never been sent or is
  1575. * already freed.
  1576. * The Tx descriptor ring lock must be held while calling this function !!!
  1577. *
  1578. * Returns:
  1579. * none
  1580. */
  1581. static void FreeTxDescriptors(
  1582. SK_AC *pAC, /* pointer to the adapter context */
  1583. TX_PORT *pTxPort) /* pointer to destination port structure */
  1584. {
  1585. TXD *pTxd; /* pointer to the checked descriptor */
  1586. TXD *pNewTail; /* pointer to 'end' of the ring */
  1587. SK_U32 Control; /* TBControl field of descriptor */
  1588. SK_U64 PhysAddr; /* address of DMA mapping */
  1589. pNewTail = pTxPort->pTxdRingTail;
  1590. pTxd = pNewTail;
  1591. /*
  1592. ** loop forever; exits if BMU_SW bit not set in start frame
  1593. ** or BMU_OWN bit set in any frame
  1594. */
  1595. while (1) {
  1596. Control = pTxd->TBControl;
  1597. if ((Control & BMU_SW) == 0) {
  1598. /*
  1599. ** software controllable bit is set in first
  1600. ** fragment when given to BMU. Not set means that
  1601. ** this fragment was never sent or is already
  1602. ** freed ( -> ring completely free now).
  1603. */
  1604. pTxPort->pTxdRingTail = pTxd;
  1605. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  1606. return;
  1607. }
  1608. if (Control & BMU_OWN) {
  1609. pTxPort->pTxdRingTail = pTxd;
  1610. if (pTxPort->TxdRingFree > 0) {
  1611. netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
  1612. }
  1613. return;
  1614. }
  1615. /*
  1616. ** release the DMA mapping, because until not unmapped
  1617. ** this buffer is considered being under control of the
  1618. ** adapter card!
  1619. */
  1620. PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
  1621. PhysAddr |= (SK_U64) pTxd->VDataLow;
  1622. pci_unmap_page(pAC->PciDev, PhysAddr,
  1623. pTxd->pMBuf->len,
  1624. PCI_DMA_TODEVICE);
  1625. if (Control & BMU_EOF)
  1626. DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
  1627. pTxPort->TxdRingFree++;
  1628. pTxd->TBControl &= ~BMU_SW;
  1629. pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
  1630. } /* while(forever) */
  1631. } /* FreeTxDescriptors */
  1632. /*****************************************************************************
  1633. *
  1634. * FillRxRing - fill the receive ring with valid descriptors
  1635. *
  1636. * Description:
  1637. * This function fills the receive ring descriptors with data
  1638. * segments and makes them valid for the BMU.
  1639. * The active ring is filled completely, if possible.
  1640. * The non-active ring is filled only partial to save memory.
  1641. *
  1642. * Description of rx ring structure:
  1643. * head - points to the descriptor which will be used next by the BMU
  1644. * tail - points to the next descriptor to give to the BMU
  1645. *
  1646. * Returns: N/A
  1647. */
  1648. static void FillRxRing(
  1649. SK_AC *pAC, /* pointer to the adapter context */
  1650. RX_PORT *pRxPort) /* ptr to port struct for which the ring
  1651. should be filled */
  1652. {
  1653. unsigned long Flags;
  1654. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  1655. while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
  1656. if(!FillRxDescriptor(pAC, pRxPort))
  1657. break;
  1658. }
  1659. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  1660. } /* FillRxRing */
  1661. /*****************************************************************************
  1662. *
  1663. * FillRxDescriptor - fill one buffer into the receive ring
  1664. *
  1665. * Description:
  1666. * The function allocates a new receive buffer and
  1667. * puts it into the next descriptor.
  1668. *
  1669. * Returns:
  1670. * SK_TRUE - a buffer was added to the ring
  1671. * SK_FALSE - a buffer could not be added
  1672. */
  1673. static SK_BOOL FillRxDescriptor(
  1674. SK_AC *pAC, /* pointer to the adapter context struct */
  1675. RX_PORT *pRxPort) /* ptr to port struct of ring to fill */
  1676. {
  1677. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  1678. RXD *pRxd; /* the rxd to fill */
  1679. SK_U16 Length; /* data fragment length */
  1680. SK_U64 PhysAddr; /* physical address of a rx buffer */
  1681. pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
  1682. if (pMsgBlock == NULL) {
  1683. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1684. SK_DBGCAT_DRV_ENTRY,
  1685. ("%s: Allocation of rx buffer failed !\n",
  1686. pAC->dev[pRxPort->PortIndex]->name));
  1687. SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
  1688. return(SK_FALSE);
  1689. }
  1690. skb_reserve(pMsgBlock, 2); /* to align IP frames */
  1691. /* skb allocated ok, so add buffer */
  1692. pRxd = pRxPort->pRxdRingTail;
  1693. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  1694. pRxPort->RxdRingFree--;
  1695. Length = pAC->RxBufSize;
  1696. PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
  1697. virt_to_page(pMsgBlock->data),
  1698. ((unsigned long) pMsgBlock->data &
  1699. ~PAGE_MASK),
  1700. pAC->RxBufSize - 2,
  1701. PCI_DMA_FROMDEVICE);
  1702. pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
  1703. pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
  1704. pRxd->pMBuf = pMsgBlock;
  1705. pRxd->RBControl = BMU_OWN |
  1706. BMU_STF |
  1707. BMU_IRQ_EOF |
  1708. BMU_TCP_CHECK |
  1709. Length;
  1710. return (SK_TRUE);
  1711. } /* FillRxDescriptor */
  1712. /*****************************************************************************
  1713. *
  1714. * ReQueueRxBuffer - fill one buffer back into the receive ring
  1715. *
  1716. * Description:
  1717. * Fill a given buffer back into the rx ring. The buffer
  1718. * has been previously allocated and aligned, and its phys.
  1719. * address calculated, so this is no more necessary.
  1720. *
  1721. * Returns: N/A
  1722. */
  1723. static void ReQueueRxBuffer(
  1724. SK_AC *pAC, /* pointer to the adapter context struct */
  1725. RX_PORT *pRxPort, /* ptr to port struct of ring to fill */
  1726. struct sk_buff *pMsg, /* pointer to the buffer */
  1727. SK_U32 PhysHigh, /* phys address high dword */
  1728. SK_U32 PhysLow) /* phys address low dword */
  1729. {
  1730. RXD *pRxd; /* the rxd to fill */
  1731. SK_U16 Length; /* data fragment length */
  1732. pRxd = pRxPort->pRxdRingTail;
  1733. pRxPort->pRxdRingTail = pRxd->pNextRxd;
  1734. pRxPort->RxdRingFree--;
  1735. Length = pAC->RxBufSize;
  1736. pRxd->VDataLow = PhysLow;
  1737. pRxd->VDataHigh = PhysHigh;
  1738. pRxd->pMBuf = pMsg;
  1739. pRxd->RBControl = BMU_OWN |
  1740. BMU_STF |
  1741. BMU_IRQ_EOF |
  1742. BMU_TCP_CHECK |
  1743. Length;
  1744. return;
  1745. } /* ReQueueRxBuffer */
  1746. /*****************************************************************************
  1747. *
  1748. * ReceiveIrq - handle a receive IRQ
  1749. *
  1750. * Description:
  1751. * This function is called when a receive IRQ is set.
  1752. * It walks the receive descriptor ring and sends up all
  1753. * frames that are complete.
  1754. *
  1755. * Returns: N/A
  1756. */
  1757. static void ReceiveIrq(
  1758. SK_AC *pAC, /* pointer to adapter context */
  1759. RX_PORT *pRxPort, /* pointer to receive port struct */
  1760. SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
  1761. {
  1762. RXD *pRxd; /* pointer to receive descriptors */
  1763. SK_U32 Control; /* control field of descriptor */
  1764. struct sk_buff *pMsg; /* pointer to message holding frame */
  1765. struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
  1766. int FrameLength; /* total length of received frame */
  1767. SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
  1768. SK_EVPARA EvPara; /* an event parameter union */
  1769. unsigned long Flags; /* for spin lock */
  1770. int PortIndex = pRxPort->PortIndex;
  1771. unsigned int Offset;
  1772. unsigned int NumBytes;
  1773. unsigned int ForRlmt;
  1774. SK_BOOL IsBc;
  1775. SK_BOOL IsMc;
  1776. SK_BOOL IsBadFrame; /* Bad frame */
  1777. SK_U32 FrameStat;
  1778. SK_U64 PhysAddr;
  1779. rx_start:
  1780. /* do forever; exit if BMU_OWN found */
  1781. for ( pRxd = pRxPort->pRxdRingHead ;
  1782. pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
  1783. pRxd = pRxd->pNextRxd,
  1784. pRxPort->pRxdRingHead = pRxd,
  1785. pRxPort->RxdRingFree ++) {
  1786. /*
  1787. * For a better understanding of this loop
  1788. * Go through every descriptor beginning at the head
  1789. * Please note: the ring might be completely received so the OWN bit
  1790. * set is not a good crirteria to leave that loop.
  1791. * Therefore the RingFree counter is used.
  1792. * On entry of this loop pRxd is a pointer to the Rxd that needs
  1793. * to be checked next.
  1794. */
  1795. Control = pRxd->RBControl;
  1796. /* check if this descriptor is ready */
  1797. if ((Control & BMU_OWN) != 0) {
  1798. /* this descriptor is not yet ready */
  1799. /* This is the usual end of the loop */
  1800. /* We don't need to start the ring again */
  1801. FillRxRing(pAC, pRxPort);
  1802. return;
  1803. }
  1804. pAC->DynIrqModInfo.NbrProcessedDescr++;
  1805. /* get length of frame and check it */
  1806. FrameLength = Control & BMU_BBC;
  1807. if (FrameLength > pAC->RxBufSize) {
  1808. goto rx_failed;
  1809. }
  1810. /* check for STF and EOF */
  1811. if ((Control & (BMU_STF | BMU_EOF)) != (BMU_STF | BMU_EOF)) {
  1812. goto rx_failed;
  1813. }
  1814. /* here we have a complete frame in the ring */
  1815. pMsg = pRxd->pMBuf;
  1816. FrameStat = pRxd->FrameStat;
  1817. /* check for frame length mismatch */
  1818. #define XMR_FS_LEN_SHIFT 18
  1819. #define GMR_FS_LEN_SHIFT 16
  1820. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  1821. if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
  1822. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1823. SK_DBGCAT_DRV_RX_PROGRESS,
  1824. ("skge: Frame length mismatch (%u/%u).\n",
  1825. FrameLength,
  1826. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  1827. goto rx_failed;
  1828. }
  1829. }
  1830. else {
  1831. if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
  1832. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1833. SK_DBGCAT_DRV_RX_PROGRESS,
  1834. ("skge: Frame length mismatch (%u/%u).\n",
  1835. FrameLength,
  1836. (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
  1837. goto rx_failed;
  1838. }
  1839. }
  1840. /* Set Rx Status */
  1841. if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
  1842. IsBc = (FrameStat & XMR_FS_BC) != 0;
  1843. IsMc = (FrameStat & XMR_FS_MC) != 0;
  1844. IsBadFrame = (FrameStat &
  1845. (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
  1846. } else {
  1847. IsBc = (FrameStat & GMR_FS_BC) != 0;
  1848. IsMc = (FrameStat & GMR_FS_MC) != 0;
  1849. IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
  1850. ((FrameStat & GMR_FS_RX_OK) == 0));
  1851. }
  1852. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  1853. ("Received frame of length %d on port %d\n",
  1854. FrameLength, PortIndex));
  1855. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
  1856. ("Number of free rx descriptors: %d\n",
  1857. pRxPort->RxdRingFree));
  1858. /* DumpMsg(pMsg, "Rx"); */
  1859. if ((Control & BMU_STAT_VAL) != BMU_STAT_VAL || (IsBadFrame)) {
  1860. #if 0
  1861. (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
  1862. #endif
  1863. /* there is a receive error in this frame */
  1864. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1865. SK_DBGCAT_DRV_RX_PROGRESS,
  1866. ("skge: Error in received frame, dropped!\n"
  1867. "Control: %x\nRxStat: %x\n",
  1868. Control, FrameStat));
  1869. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  1870. pRxd->VDataHigh, pRxd->VDataLow);
  1871. continue;
  1872. }
  1873. /*
  1874. * if short frame then copy data to reduce memory waste
  1875. */
  1876. if ((FrameLength < SK_COPY_THRESHOLD) &&
  1877. ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
  1878. /*
  1879. * Short frame detected and allocation successfull
  1880. */
  1881. /* use new skb and copy data */
  1882. skb_reserve(pNewMsg, 2);
  1883. skb_put(pNewMsg, FrameLength);
  1884. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  1885. PhysAddr |= (SK_U64) pRxd->VDataLow;
  1886. pci_dma_sync_single_for_cpu(pAC->PciDev,
  1887. (dma_addr_t) PhysAddr,
  1888. FrameLength,
  1889. PCI_DMA_FROMDEVICE);
  1890. memcpy(pNewMsg->data, pMsg, FrameLength);
  1891. pci_dma_sync_single_for_device(pAC->PciDev,
  1892. (dma_addr_t) PhysAddr,
  1893. FrameLength,
  1894. PCI_DMA_FROMDEVICE);
  1895. ReQueueRxBuffer(pAC, pRxPort, pMsg,
  1896. pRxd->VDataHigh, pRxd->VDataLow);
  1897. pMsg = pNewMsg;
  1898. }
  1899. else {
  1900. /*
  1901. * if large frame, or SKB allocation failed, pass
  1902. * the SKB directly to the networking
  1903. */
  1904. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  1905. PhysAddr |= (SK_U64) pRxd->VDataLow;
  1906. /* release the DMA mapping */
  1907. pci_unmap_single(pAC->PciDev,
  1908. PhysAddr,
  1909. pAC->RxBufSize - 2,
  1910. PCI_DMA_FROMDEVICE);
  1911. /* set length in message */
  1912. skb_put(pMsg, FrameLength);
  1913. } /* frame > SK_COPY_TRESHOLD */
  1914. #ifdef USE_SK_RX_CHECKSUM
  1915. pMsg->csum = pRxd->TcpSums & 0xffff;
  1916. pMsg->ip_summed = CHECKSUM_COMPLETE;
  1917. #else
  1918. pMsg->ip_summed = CHECKSUM_NONE;
  1919. #endif
  1920. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
  1921. ForRlmt = SK_RLMT_RX_PROTOCOL;
  1922. #if 0
  1923. IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
  1924. #endif
  1925. SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
  1926. IsBc, &Offset, &NumBytes);
  1927. if (NumBytes != 0) {
  1928. #if 0
  1929. IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
  1930. #endif
  1931. SK_RLMT_LOOKAHEAD(pAC, PortIndex,
  1932. &pMsg->data[Offset],
  1933. IsBc, IsMc, &ForRlmt);
  1934. }
  1935. if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
  1936. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
  1937. /* send up only frames from active port */
  1938. if ((PortIndex == pAC->ActivePort) ||
  1939. (pAC->RlmtNets == 2)) {
  1940. /* frame for upper layer */
  1941. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
  1942. #ifdef xDEBUG
  1943. DumpMsg(pMsg, "Rx");
  1944. #endif
  1945. SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
  1946. FrameLength, pRxPort->PortIndex);
  1947. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  1948. pMsg->protocol = eth_type_trans(pMsg,
  1949. pAC->dev[pRxPort->PortIndex]);
  1950. netif_rx(pMsg);
  1951. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  1952. }
  1953. else {
  1954. /* drop frame */
  1955. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1956. SK_DBGCAT_DRV_RX_PROGRESS,
  1957. ("D"));
  1958. DEV_KFREE_SKB(pMsg);
  1959. }
  1960. } /* if not for rlmt */
  1961. else {
  1962. /* packet for rlmt */
  1963. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1964. SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
  1965. pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
  1966. pAC->IoBase, FrameLength);
  1967. if (pRlmtMbuf != NULL) {
  1968. pRlmtMbuf->pNext = NULL;
  1969. pRlmtMbuf->Length = FrameLength;
  1970. pRlmtMbuf->PortIdx = PortIndex;
  1971. EvPara.pParaPtr = pRlmtMbuf;
  1972. memcpy((char*)(pRlmtMbuf->pData),
  1973. (char*)(pMsg->data),
  1974. FrameLength);
  1975. /* SlowPathLock needed? */
  1976. if (SlowPathLock == SK_TRUE) {
  1977. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  1978. SkEventQueue(pAC, SKGE_RLMT,
  1979. SK_RLMT_PACKET_RECEIVED,
  1980. EvPara);
  1981. pAC->CheckQueue = SK_TRUE;
  1982. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  1983. } else {
  1984. SkEventQueue(pAC, SKGE_RLMT,
  1985. SK_RLMT_PACKET_RECEIVED,
  1986. EvPara);
  1987. pAC->CheckQueue = SK_TRUE;
  1988. }
  1989. SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
  1990. SK_DBGCAT_DRV_RX_PROGRESS,
  1991. ("Q"));
  1992. }
  1993. if ((pAC->dev[pRxPort->PortIndex]->flags &
  1994. (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
  1995. (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
  1996. SK_RLMT_RX_PROTOCOL) {
  1997. pMsg->dev = pAC->dev[pRxPort->PortIndex];
  1998. pMsg->protocol = eth_type_trans(pMsg,
  1999. pAC->dev[pRxPort->PortIndex]);
  2000. netif_rx(pMsg);
  2001. pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
  2002. }
  2003. else {
  2004. DEV_KFREE_SKB(pMsg);
  2005. }
  2006. } /* if packet for rlmt */
  2007. } /* for ... scanning the RXD ring */
  2008. /* RXD ring is empty -> fill and restart */
  2009. FillRxRing(pAC, pRxPort);
  2010. /* do not start if called from Close */
  2011. if (pAC->BoardLevel > SK_INIT_DATA) {
  2012. ClearAndStartRx(pAC, PortIndex);
  2013. }
  2014. return;
  2015. rx_failed:
  2016. /* remove error frame */
  2017. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
  2018. ("Schrottdescriptor, length: 0x%x\n", FrameLength));
  2019. /* release the DMA mapping */
  2020. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2021. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2022. pci_unmap_page(pAC->PciDev,
  2023. PhysAddr,
  2024. pAC->RxBufSize - 2,
  2025. PCI_DMA_FROMDEVICE);
  2026. DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
  2027. pRxd->pMBuf = NULL;
  2028. pRxPort->RxdRingFree++;
  2029. pRxPort->pRxdRingHead = pRxd->pNextRxd;
  2030. goto rx_start;
  2031. } /* ReceiveIrq */
  2032. /*****************************************************************************
  2033. *
  2034. * ClearAndStartRx - give a start receive command to BMU, clear IRQ
  2035. *
  2036. * Description:
  2037. * This function sends a start command and a clear interrupt
  2038. * command for one receive queue to the BMU.
  2039. *
  2040. * Returns: N/A
  2041. * none
  2042. */
  2043. static void ClearAndStartRx(
  2044. SK_AC *pAC, /* pointer to the adapter context */
  2045. int PortIndex) /* index of the receive port (XMAC) */
  2046. {
  2047. SK_OUT8(pAC->IoBase,
  2048. RxQueueAddr[PortIndex]+Q_CSR,
  2049. CSR_START | CSR_IRQ_CL_F);
  2050. } /* ClearAndStartRx */
  2051. /*****************************************************************************
  2052. *
  2053. * ClearTxIrq - give a clear transmit IRQ command to BMU
  2054. *
  2055. * Description:
  2056. * This function sends a clear tx IRQ command for one
  2057. * transmit queue to the BMU.
  2058. *
  2059. * Returns: N/A
  2060. */
  2061. static void ClearTxIrq(
  2062. SK_AC *pAC, /* pointer to the adapter context */
  2063. int PortIndex, /* index of the transmit port (XMAC) */
  2064. int Prio) /* priority or normal queue */
  2065. {
  2066. SK_OUT8(pAC->IoBase,
  2067. TxQueueAddr[PortIndex][Prio]+Q_CSR,
  2068. CSR_IRQ_CL_F);
  2069. } /* ClearTxIrq */
  2070. /*****************************************************************************
  2071. *
  2072. * ClearRxRing - remove all buffers from the receive ring
  2073. *
  2074. * Description:
  2075. * This function removes all receive buffers from the ring.
  2076. * The receive BMU must be stopped before calling this function.
  2077. *
  2078. * Returns: N/A
  2079. */
  2080. static void ClearRxRing(
  2081. SK_AC *pAC, /* pointer to adapter context */
  2082. RX_PORT *pRxPort) /* pointer to rx port struct */
  2083. {
  2084. RXD *pRxd; /* pointer to the current descriptor */
  2085. unsigned long Flags;
  2086. SK_U64 PhysAddr;
  2087. if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
  2088. return;
  2089. }
  2090. spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
  2091. pRxd = pRxPort->pRxdRingHead;
  2092. do {
  2093. if (pRxd->pMBuf != NULL) {
  2094. PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
  2095. PhysAddr |= (SK_U64) pRxd->VDataLow;
  2096. pci_unmap_page(pAC->PciDev,
  2097. PhysAddr,
  2098. pAC->RxBufSize - 2,
  2099. PCI_DMA_FROMDEVICE);
  2100. DEV_KFREE_SKB(pRxd->pMBuf);
  2101. pRxd->pMBuf = NULL;
  2102. }
  2103. pRxd->RBControl &= BMU_OWN;
  2104. pRxd = pRxd->pNextRxd;
  2105. pRxPort->RxdRingFree++;
  2106. } while (pRxd != pRxPort->pRxdRingTail);
  2107. pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
  2108. spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
  2109. } /* ClearRxRing */
  2110. /*****************************************************************************
  2111. *
  2112. * ClearTxRing - remove all buffers from the transmit ring
  2113. *
  2114. * Description:
  2115. * This function removes all transmit buffers from the ring.
  2116. * The transmit BMU must be stopped before calling this function
  2117. * and transmitting at the upper level must be disabled.
  2118. * The BMU own bit of all descriptors is cleared, the rest is
  2119. * done by calling FreeTxDescriptors.
  2120. *
  2121. * Returns: N/A
  2122. */
  2123. static void ClearTxRing(
  2124. SK_AC *pAC, /* pointer to adapter context */
  2125. TX_PORT *pTxPort) /* pointer to tx prt struct */
  2126. {
  2127. TXD *pTxd; /* pointer to the current descriptor */
  2128. int i;
  2129. unsigned long Flags;
  2130. spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
  2131. pTxd = pTxPort->pTxdRingHead;
  2132. for (i=0; i<pAC->TxDescrPerRing; i++) {
  2133. pTxd->TBControl &= ~BMU_OWN;
  2134. pTxd = pTxd->pNextTxd;
  2135. }
  2136. FreeTxDescriptors(pAC, pTxPort);
  2137. spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
  2138. } /* ClearTxRing */
  2139. /*****************************************************************************
  2140. *
  2141. * SkGeSetMacAddr - Set the hardware MAC address
  2142. *
  2143. * Description:
  2144. * This function sets the MAC address used by the adapter.
  2145. *
  2146. * Returns:
  2147. * 0, if everything is ok
  2148. * !=0, on error
  2149. */
  2150. static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
  2151. {
  2152. DEV_NET *pNet = netdev_priv(dev);
  2153. SK_AC *pAC = pNet->pAC;
  2154. struct sockaddr *addr = p;
  2155. unsigned long Flags;
  2156. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2157. ("SkGeSetMacAddr starts now...\n"));
  2158. if(netif_running(dev))
  2159. return -EBUSY;
  2160. memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
  2161. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2162. if (pAC->RlmtNets == 2)
  2163. SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
  2164. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2165. else
  2166. SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
  2167. (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
  2168. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2169. return 0;
  2170. } /* SkGeSetMacAddr */
  2171. /*****************************************************************************
  2172. *
  2173. * SkGeSetRxMode - set receive mode
  2174. *
  2175. * Description:
  2176. * This function sets the receive mode of an adapter. The adapter
  2177. * supports promiscuous mode, allmulticast mode and a number of
  2178. * multicast addresses. If more multicast addresses the available
  2179. * are selected, a hash function in the hardware is used.
  2180. *
  2181. * Returns:
  2182. * 0, if everything is ok
  2183. * !=0, on error
  2184. */
  2185. static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
  2186. {
  2187. DEV_NET *pNet;
  2188. SK_AC *pAC;
  2189. struct dev_mc_list *pMcList;
  2190. int i;
  2191. int PortIdx;
  2192. unsigned long Flags;
  2193. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2194. ("SkGeSetRxMode starts now... "));
  2195. pNet = netdev_priv(dev);
  2196. pAC = pNet->pAC;
  2197. if (pAC->RlmtNets == 1)
  2198. PortIdx = pAC->ActivePort;
  2199. else
  2200. PortIdx = pNet->NetNr;
  2201. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2202. if (dev->flags & IFF_PROMISC) {
  2203. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2204. ("PROMISCUOUS mode\n"));
  2205. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2206. SK_PROM_MODE_LLC);
  2207. } else if (dev->flags & IFF_ALLMULTI) {
  2208. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2209. ("ALLMULTI mode\n"));
  2210. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2211. SK_PROM_MODE_ALL_MC);
  2212. } else {
  2213. SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
  2214. SK_PROM_MODE_NONE);
  2215. SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
  2216. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2217. ("Number of MC entries: %d ", dev->mc_count));
  2218. pMcList = dev->mc_list;
  2219. for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
  2220. SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
  2221. (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
  2222. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
  2223. ("%02x:%02x:%02x:%02x:%02x:%02x\n",
  2224. pMcList->dmi_addr[0],
  2225. pMcList->dmi_addr[1],
  2226. pMcList->dmi_addr[2],
  2227. pMcList->dmi_addr[3],
  2228. pMcList->dmi_addr[4],
  2229. pMcList->dmi_addr[5]));
  2230. }
  2231. SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
  2232. }
  2233. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2234. return;
  2235. } /* SkGeSetRxMode */
  2236. /*****************************************************************************
  2237. *
  2238. * SkGeChangeMtu - set the MTU to another value
  2239. *
  2240. * Description:
  2241. * This function sets is called whenever the MTU size is changed
  2242. * (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
  2243. * ethernet MTU size, long frame support is activated.
  2244. *
  2245. * Returns:
  2246. * 0, if everything is ok
  2247. * !=0, on error
  2248. */
  2249. static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
  2250. {
  2251. DEV_NET *pNet;
  2252. struct net_device *pOtherDev;
  2253. SK_AC *pAC;
  2254. unsigned long Flags;
  2255. int i;
  2256. SK_EVPARA EvPara;
  2257. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2258. ("SkGeChangeMtu starts now...\n"));
  2259. pNet = netdev_priv(dev);
  2260. pAC = pNet->pAC;
  2261. if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
  2262. return -EINVAL;
  2263. }
  2264. if(pAC->BoardLevel != SK_INIT_RUN) {
  2265. return -EINVAL;
  2266. }
  2267. #ifdef SK_DIAG_SUPPORT
  2268. if (pAC->DiagModeActive == DIAG_ACTIVE) {
  2269. if (pAC->DiagFlowCtrl == SK_FALSE) {
  2270. return -1; /* still in use, deny any actions of MTU */
  2271. } else {
  2272. pAC->DiagFlowCtrl = SK_FALSE;
  2273. }
  2274. }
  2275. #endif
  2276. pOtherDev = pAC->dev[1 - pNet->NetNr];
  2277. if ( netif_running(pOtherDev) && (pOtherDev->mtu > 1500)
  2278. && (NewMtu <= 1500))
  2279. return 0;
  2280. pAC->RxBufSize = NewMtu + 32;
  2281. dev->mtu = NewMtu;
  2282. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2283. ("New MTU: %d\n", NewMtu));
  2284. /*
  2285. ** Prevent any reconfiguration while changing the MTU
  2286. ** by disabling any interrupts
  2287. */
  2288. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  2289. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2290. /*
  2291. ** Notify RLMT that any ports are to be stopped
  2292. */
  2293. EvPara.Para32[0] = 0;
  2294. EvPara.Para32[1] = -1;
  2295. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  2296. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2297. EvPara.Para32[0] = 1;
  2298. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2299. } else {
  2300. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  2301. }
  2302. /*
  2303. ** After calling the SkEventDispatcher(), RLMT is aware about
  2304. ** the stopped ports -> configuration can take place!
  2305. */
  2306. SkEventDispatcher(pAC, pAC->IoBase);
  2307. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2308. spin_lock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
  2309. netif_stop_queue(pAC->dev[i]);
  2310. }
  2311. /*
  2312. ** Depending on the desired MTU size change, a different number of
  2313. ** RX buffers need to be allocated
  2314. */
  2315. if (NewMtu > 1500) {
  2316. /*
  2317. ** Use less rx buffers
  2318. */
  2319. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2320. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  2321. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
  2322. (pAC->RxDescrPerRing / 4);
  2323. } else {
  2324. if (i == pAC->ActivePort) {
  2325. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
  2326. (pAC->RxDescrPerRing / 4);
  2327. } else {
  2328. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
  2329. (pAC->RxDescrPerRing / 10);
  2330. }
  2331. }
  2332. }
  2333. } else {
  2334. /*
  2335. ** Use the normal amount of rx buffers
  2336. */
  2337. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2338. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  2339. pAC->RxPort[i].RxFillLimit = 1;
  2340. } else {
  2341. if (i == pAC->ActivePort) {
  2342. pAC->RxPort[i].RxFillLimit = 1;
  2343. } else {
  2344. pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
  2345. (pAC->RxDescrPerRing / 4);
  2346. }
  2347. }
  2348. }
  2349. }
  2350. SkGeDeInit(pAC, pAC->IoBase);
  2351. /*
  2352. ** enable/disable hardware support for long frames
  2353. */
  2354. if (NewMtu > 1500) {
  2355. // pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
  2356. pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
  2357. } else {
  2358. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  2359. pAC->GIni.GIPortUsage = SK_MUL_LINK;
  2360. } else {
  2361. pAC->GIni.GIPortUsage = SK_RED_LINK;
  2362. }
  2363. }
  2364. SkGeInit( pAC, pAC->IoBase, SK_INIT_IO);
  2365. SkI2cInit( pAC, pAC->IoBase, SK_INIT_IO);
  2366. SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
  2367. SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
  2368. SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
  2369. SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
  2370. SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
  2371. /*
  2372. ** tschilling:
  2373. ** Speed and others are set back to default in level 1 init!
  2374. */
  2375. GetConfiguration(pAC);
  2376. SkGeInit( pAC, pAC->IoBase, SK_INIT_RUN);
  2377. SkI2cInit( pAC, pAC->IoBase, SK_INIT_RUN);
  2378. SkEventInit(pAC, pAC->IoBase, SK_INIT_RUN);
  2379. SkPnmiInit( pAC, pAC->IoBase, SK_INIT_RUN);
  2380. SkAddrInit( pAC, pAC->IoBase, SK_INIT_RUN);
  2381. SkRlmtInit( pAC, pAC->IoBase, SK_INIT_RUN);
  2382. SkTimerInit(pAC, pAC->IoBase, SK_INIT_RUN);
  2383. /*
  2384. ** clear and reinit the rx rings here
  2385. */
  2386. for (i=0; i<pAC->GIni.GIMacsFound; i++) {
  2387. ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
  2388. ClearRxRing(pAC, &pAC->RxPort[i]);
  2389. FillRxRing(pAC, &pAC->RxPort[i]);
  2390. /*
  2391. ** Enable transmit descriptor polling
  2392. */
  2393. SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
  2394. FillRxRing(pAC, &pAC->RxPort[i]);
  2395. };
  2396. SkGeYellowLED(pAC, pAC->IoBase, 1);
  2397. SkDimEnableModerationIfNeeded(pAC);
  2398. SkDimDisplayModerationSettings(pAC);
  2399. netif_start_queue(pAC->dev[pNet->PortNr]);
  2400. for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
  2401. spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
  2402. }
  2403. /*
  2404. ** Enable Interrupts again
  2405. */
  2406. SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
  2407. SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
  2408. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  2409. SkEventDispatcher(pAC, pAC->IoBase);
  2410. /*
  2411. ** Notify RLMT about the changing and restarting one (or more) ports
  2412. */
  2413. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  2414. EvPara.Para32[0] = pAC->RlmtNets;
  2415. EvPara.Para32[1] = -1;
  2416. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS, EvPara);
  2417. EvPara.Para32[0] = pNet->PortNr;
  2418. EvPara.Para32[1] = -1;
  2419. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  2420. if (netif_running(pOtherDev)) {
  2421. DEV_NET *pOtherNet = netdev_priv(pOtherDev);
  2422. EvPara.Para32[0] = pOtherNet->PortNr;
  2423. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  2424. }
  2425. } else {
  2426. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
  2427. }
  2428. SkEventDispatcher(pAC, pAC->IoBase);
  2429. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2430. /*
  2431. ** While testing this driver with latest kernel 2.5 (2.5.70), it
  2432. ** seems as if upper layers have a problem to handle a successful
  2433. ** return value of '0'. If such a zero is returned, the complete
  2434. ** system hangs for several minutes (!), which is in acceptable.
  2435. **
  2436. ** Currently it is not clear, what the exact reason for this problem
  2437. ** is. The implemented workaround for 2.5 is to return the desired
  2438. ** new MTU size if all needed changes for the new MTU size where
  2439. ** performed. In kernels 2.2 and 2.4, a zero value is returned,
  2440. ** which indicates the successful change of the mtu-size.
  2441. */
  2442. return NewMtu;
  2443. } /* SkGeChangeMtu */
  2444. /*****************************************************************************
  2445. *
  2446. * SkGeStats - return ethernet device statistics
  2447. *
  2448. * Description:
  2449. * This function return statistic data about the ethernet device
  2450. * to the operating system.
  2451. *
  2452. * Returns:
  2453. * pointer to the statistic structure.
  2454. */
  2455. static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
  2456. {
  2457. DEV_NET *pNet = netdev_priv(dev);
  2458. SK_AC *pAC = pNet->pAC;
  2459. SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
  2460. SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
  2461. SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
  2462. unsigned int Size; /* size of pnmi struct */
  2463. unsigned long Flags; /* for spin lock */
  2464. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2465. ("SkGeStats starts now...\n"));
  2466. pPnmiStruct = &pAC->PnmiStruct;
  2467. #ifdef SK_DIAG_SUPPORT
  2468. if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
  2469. (pAC->BoardLevel == SK_INIT_RUN)) {
  2470. #endif
  2471. SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
  2472. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2473. Size = SK_PNMI_STRUCT_SIZE;
  2474. SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
  2475. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2476. #ifdef SK_DIAG_SUPPORT
  2477. }
  2478. #endif
  2479. pPnmiStat = &pPnmiStruct->Stat[0];
  2480. pPnmiConf = &pPnmiStruct->Conf[0];
  2481. pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
  2482. pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
  2483. pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
  2484. pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
  2485. if (dev->mtu <= 1500) {
  2486. pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
  2487. } else {
  2488. pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
  2489. pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
  2490. }
  2491. if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
  2492. pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
  2493. pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  2494. pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
  2495. pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
  2496. pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
  2497. pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
  2498. /* detailed rx_errors: */
  2499. pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
  2500. pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  2501. pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
  2502. pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
  2503. pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
  2504. pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
  2505. /* detailed tx_errors */
  2506. pAC->stats.tx_aborted_errors = (SK_U32) 0;
  2507. pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  2508. pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
  2509. pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
  2510. pAC->stats.tx_window_errors = (SK_U32) 0;
  2511. return(&pAC->stats);
  2512. } /* SkGeStats */
  2513. /*
  2514. * Basic MII register access
  2515. */
  2516. static int SkGeMiiIoctl(struct net_device *dev,
  2517. struct mii_ioctl_data *data, int cmd)
  2518. {
  2519. DEV_NET *pNet = netdev_priv(dev);
  2520. SK_AC *pAC = pNet->pAC;
  2521. SK_IOC IoC = pAC->IoBase;
  2522. int Port = pNet->PortNr;
  2523. SK_GEPORT *pPrt = &pAC->GIni.GP[Port];
  2524. unsigned long Flags;
  2525. int err = 0;
  2526. int reg = data->reg_num & 0x1f;
  2527. SK_U16 val = data->val_in;
  2528. if (!netif_running(dev))
  2529. return -ENODEV; /* Phy still in reset */
  2530. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2531. switch(cmd) {
  2532. case SIOCGMIIPHY:
  2533. data->phy_id = pPrt->PhyAddr;
  2534. /* fallthru */
  2535. case SIOCGMIIREG:
  2536. if (pAC->GIni.GIGenesis)
  2537. SkXmPhyRead(pAC, IoC, Port, reg, &val);
  2538. else
  2539. SkGmPhyRead(pAC, IoC, Port, reg, &val);
  2540. data->val_out = val;
  2541. break;
  2542. case SIOCSMIIREG:
  2543. if (!capable(CAP_NET_ADMIN))
  2544. err = -EPERM;
  2545. else if (pAC->GIni.GIGenesis)
  2546. SkXmPhyWrite(pAC, IoC, Port, reg, val);
  2547. else
  2548. SkGmPhyWrite(pAC, IoC, Port, reg, val);
  2549. break;
  2550. default:
  2551. err = -EOPNOTSUPP;
  2552. }
  2553. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2554. return err;
  2555. }
  2556. /*****************************************************************************
  2557. *
  2558. * SkGeIoctl - IO-control function
  2559. *
  2560. * Description:
  2561. * This function is called if an ioctl is issued on the device.
  2562. * There are three subfunction for reading, writing and test-writing
  2563. * the private MIB data structure (useful for SysKonnect-internal tools).
  2564. *
  2565. * Returns:
  2566. * 0, if everything is ok
  2567. * !=0, on error
  2568. */
  2569. static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
  2570. {
  2571. DEV_NET *pNet;
  2572. SK_AC *pAC;
  2573. void *pMemBuf;
  2574. struct pci_dev *pdev = NULL;
  2575. SK_GE_IOCTL Ioctl;
  2576. unsigned int Err = 0;
  2577. int Size = 0;
  2578. int Ret = 0;
  2579. unsigned int Length = 0;
  2580. int HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
  2581. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2582. ("SkGeIoctl starts now...\n"));
  2583. pNet = netdev_priv(dev);
  2584. pAC = pNet->pAC;
  2585. if (cmd == SIOCGMIIPHY || cmd == SIOCSMIIREG || cmd == SIOCGMIIREG)
  2586. return SkGeMiiIoctl(dev, if_mii(rq), cmd);
  2587. if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
  2588. return -EFAULT;
  2589. }
  2590. switch(cmd) {
  2591. case SK_IOCTL_SETMIB:
  2592. case SK_IOCTL_PRESETMIB:
  2593. if (!capable(CAP_NET_ADMIN)) return -EPERM;
  2594. case SK_IOCTL_GETMIB:
  2595. if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
  2596. Ioctl.Len<sizeof(pAC->PnmiStruct)?
  2597. Ioctl.Len : sizeof(pAC->PnmiStruct))) {
  2598. return -EFAULT;
  2599. }
  2600. Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
  2601. if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
  2602. Ioctl.Len<Size? Ioctl.Len : Size)) {
  2603. return -EFAULT;
  2604. }
  2605. Ioctl.Len = Size;
  2606. if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
  2607. return -EFAULT;
  2608. }
  2609. break;
  2610. case SK_IOCTL_GEN:
  2611. if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
  2612. Length = Ioctl.Len;
  2613. } else {
  2614. Length = sizeof(pAC->PnmiStruct) + HeaderLength;
  2615. }
  2616. if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
  2617. return -ENOMEM;
  2618. }
  2619. if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
  2620. Err = -EFAULT;
  2621. goto fault_gen;
  2622. }
  2623. if ((Ret = SkPnmiGenIoctl(pAC, pAC->IoBase, pMemBuf, &Length, 0)) < 0) {
  2624. Err = -EFAULT;
  2625. goto fault_gen;
  2626. }
  2627. if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
  2628. Err = -EFAULT;
  2629. goto fault_gen;
  2630. }
  2631. Ioctl.Len = Length;
  2632. if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
  2633. Err = -EFAULT;
  2634. goto fault_gen;
  2635. }
  2636. fault_gen:
  2637. kfree(pMemBuf); /* cleanup everything */
  2638. break;
  2639. #ifdef SK_DIAG_SUPPORT
  2640. case SK_IOCTL_DIAG:
  2641. if (!capable(CAP_NET_ADMIN)) return -EPERM;
  2642. if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
  2643. Length = Ioctl.Len;
  2644. } else {
  2645. Length = sizeof(pAC->PnmiStruct) + HeaderLength;
  2646. }
  2647. if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
  2648. return -ENOMEM;
  2649. }
  2650. if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
  2651. Err = -EFAULT;
  2652. goto fault_diag;
  2653. }
  2654. pdev = pAC->PciDev;
  2655. Length = 3 * sizeof(SK_U32); /* Error, Bus and Device */
  2656. /*
  2657. ** While coding this new IOCTL interface, only a few lines of code
  2658. ** are to to be added. Therefore no dedicated function has been
  2659. ** added. If more functionality is added, a separate function
  2660. ** should be used...
  2661. */
  2662. * ((SK_U32 *)pMemBuf) = 0;
  2663. * ((SK_U32 *)pMemBuf + 1) = pdev->bus->number;
  2664. * ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pci_name(pdev));
  2665. if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
  2666. Err = -EFAULT;
  2667. goto fault_diag;
  2668. }
  2669. Ioctl.Len = Length;
  2670. if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
  2671. Err = -EFAULT;
  2672. goto fault_diag;
  2673. }
  2674. fault_diag:
  2675. kfree(pMemBuf); /* cleanup everything */
  2676. break;
  2677. #endif
  2678. default:
  2679. Err = -EOPNOTSUPP;
  2680. }
  2681. return(Err);
  2682. } /* SkGeIoctl */
  2683. /*****************************************************************************
  2684. *
  2685. * SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
  2686. *
  2687. * Description:
  2688. * This function reads/writes the MIB data using PNMI (Private Network
  2689. * Management Interface).
  2690. * The destination for the data must be provided with the
  2691. * ioctl call and is given to the driver in the form of
  2692. * a user space address.
  2693. * Copying from the user-provided data area into kernel messages
  2694. * and back is done by copy_from_user and copy_to_user calls in
  2695. * SkGeIoctl.
  2696. *
  2697. * Returns:
  2698. * returned size from PNMI call
  2699. */
  2700. static int SkGeIocMib(
  2701. DEV_NET *pNet, /* pointer to the adapter context */
  2702. unsigned int Size, /* length of ioctl data */
  2703. int mode) /* flag for set/preset */
  2704. {
  2705. unsigned long Flags; /* for spin lock */
  2706. SK_AC *pAC;
  2707. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2708. ("SkGeIocMib starts now...\n"));
  2709. pAC = pNet->pAC;
  2710. /* access MIB */
  2711. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  2712. switch(mode) {
  2713. case SK_IOCTL_GETMIB:
  2714. SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  2715. pNet->NetNr);
  2716. break;
  2717. case SK_IOCTL_PRESETMIB:
  2718. SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  2719. pNet->NetNr);
  2720. break;
  2721. case SK_IOCTL_SETMIB:
  2722. SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
  2723. pNet->NetNr);
  2724. break;
  2725. default:
  2726. break;
  2727. }
  2728. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  2729. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
  2730. ("MIB data access succeeded\n"));
  2731. return (Size);
  2732. } /* SkGeIocMib */
  2733. /*****************************************************************************
  2734. *
  2735. * GetConfiguration - read configuration information
  2736. *
  2737. * Description:
  2738. * This function reads per-adapter configuration information from
  2739. * the options provided on the command line.
  2740. *
  2741. * Returns:
  2742. * none
  2743. */
  2744. static void GetConfiguration(
  2745. SK_AC *pAC) /* pointer to the adapter context structure */
  2746. {
  2747. SK_I32 Port; /* preferred port */
  2748. SK_BOOL AutoSet;
  2749. SK_BOOL DupSet;
  2750. int LinkSpeed = SK_LSPEED_AUTO; /* Link speed */
  2751. int AutoNeg = 1; /* autoneg off (0) or on (1) */
  2752. int DuplexCap = 0; /* 0=both,1=full,2=half */
  2753. int FlowCtrl = SK_FLOW_MODE_SYM_OR_REM; /* FlowControl */
  2754. int MSMode = SK_MS_MODE_AUTO; /* master/slave mode */
  2755. SK_BOOL IsConTypeDefined = SK_TRUE;
  2756. SK_BOOL IsLinkSpeedDefined = SK_TRUE;
  2757. SK_BOOL IsFlowCtrlDefined = SK_TRUE;
  2758. SK_BOOL IsRoleDefined = SK_TRUE;
  2759. SK_BOOL IsModeDefined = SK_TRUE;
  2760. /*
  2761. * The two parameters AutoNeg. and DuplexCap. map to one configuration
  2762. * parameter. The mapping is described by this table:
  2763. * DuplexCap -> | both | full | half |
  2764. * AutoNeg | | | |
  2765. * -----------------------------------------------------------------
  2766. * Off | illegal | Full | Half |
  2767. * -----------------------------------------------------------------
  2768. * On | AutoBoth | AutoFull | AutoHalf |
  2769. * -----------------------------------------------------------------
  2770. * Sense | AutoSense | AutoSense | AutoSense |
  2771. */
  2772. int Capabilities[3][3] =
  2773. { { -1, SK_LMODE_FULL , SK_LMODE_HALF },
  2774. {SK_LMODE_AUTOBOTH , SK_LMODE_AUTOFULL , SK_LMODE_AUTOHALF },
  2775. {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
  2776. #define DC_BOTH 0
  2777. #define DC_FULL 1
  2778. #define DC_HALF 2
  2779. #define AN_OFF 0
  2780. #define AN_ON 1
  2781. #define AN_SENS 2
  2782. #define M_CurrPort pAC->GIni.GP[Port]
  2783. /*
  2784. ** Set the default values first for both ports!
  2785. */
  2786. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2787. M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
  2788. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  2789. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2790. M_CurrPort.PLinkSpeed = SK_LSPEED_AUTO;
  2791. }
  2792. /*
  2793. ** Check merged parameter ConType. If it has not been used,
  2794. ** verify any other parameter (e.g. AutoNeg) and use default values.
  2795. **
  2796. ** Stating both ConType and other lowlevel link parameters is also
  2797. ** possible. If this is the case, the passed ConType-parameter is
  2798. ** overwritten by the lowlevel link parameter.
  2799. **
  2800. ** The following settings are used for a merged ConType-parameter:
  2801. **
  2802. ** ConType DupCap AutoNeg FlowCtrl Role Speed
  2803. ** ------- ------ ------- -------- ---------- -----
  2804. ** Auto Both On SymOrRem Auto Auto
  2805. ** 100FD Full Off None <ignored> 100
  2806. ** 100HD Half Off None <ignored> 100
  2807. ** 10FD Full Off None <ignored> 10
  2808. ** 10HD Half Off None <ignored> 10
  2809. **
  2810. ** This ConType parameter is used for all ports of the adapter!
  2811. */
  2812. if ( (ConType != NULL) &&
  2813. (pAC->Index < SK_MAX_CARD_PARAM) &&
  2814. (ConType[pAC->Index] != NULL) ) {
  2815. /* Check chipset family */
  2816. if ((!pAC->ChipsetType) &&
  2817. (strcmp(ConType[pAC->Index],"Auto")!=0) &&
  2818. (strcmp(ConType[pAC->Index],"")!=0)) {
  2819. /* Set the speed parameter back */
  2820. printk("sk98lin: Illegal value \"%s\" "
  2821. "for ConType."
  2822. " Using Auto.\n",
  2823. ConType[pAC->Index]);
  2824. sprintf(ConType[pAC->Index], "Auto");
  2825. }
  2826. if (strcmp(ConType[pAC->Index],"")==0) {
  2827. IsConTypeDefined = SK_FALSE; /* No ConType defined */
  2828. } else if (strcmp(ConType[pAC->Index],"Auto")==0) {
  2829. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2830. M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
  2831. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
  2832. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2833. M_CurrPort.PLinkSpeed = SK_LSPEED_AUTO;
  2834. }
  2835. } else if (strcmp(ConType[pAC->Index],"100FD")==0) {
  2836. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2837. M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
  2838. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
  2839. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2840. M_CurrPort.PLinkSpeed = SK_LSPEED_100MBPS;
  2841. }
  2842. } else if (strcmp(ConType[pAC->Index],"100HD")==0) {
  2843. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2844. M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
  2845. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
  2846. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2847. M_CurrPort.PLinkSpeed = SK_LSPEED_100MBPS;
  2848. }
  2849. } else if (strcmp(ConType[pAC->Index],"10FD")==0) {
  2850. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2851. M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
  2852. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
  2853. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2854. M_CurrPort.PLinkSpeed = SK_LSPEED_10MBPS;
  2855. }
  2856. } else if (strcmp(ConType[pAC->Index],"10HD")==0) {
  2857. for (Port = 0; Port < SK_MAX_MACS; Port++) {
  2858. M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
  2859. M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
  2860. M_CurrPort.PMSMode = SK_MS_MODE_AUTO;
  2861. M_CurrPort.PLinkSpeed = SK_LSPEED_10MBPS;
  2862. }
  2863. } else {
  2864. printk("sk98lin: Illegal value \"%s\" for ConType\n",
  2865. ConType[pAC->Index]);
  2866. IsConTypeDefined = SK_FALSE; /* Wrong ConType defined */
  2867. }
  2868. } else {
  2869. IsConTypeDefined = SK_FALSE; /* No ConType defined */
  2870. }
  2871. /*
  2872. ** Parse any parameter settings for port A:
  2873. ** a) any LinkSpeed stated?
  2874. */
  2875. if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  2876. Speed_A[pAC->Index] != NULL) {
  2877. if (strcmp(Speed_A[pAC->Index],"")==0) {
  2878. IsLinkSpeedDefined = SK_FALSE;
  2879. } else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
  2880. LinkSpeed = SK_LSPEED_AUTO;
  2881. } else if (strcmp(Speed_A[pAC->Index],"10")==0) {
  2882. LinkSpeed = SK_LSPEED_10MBPS;
  2883. } else if (strcmp(Speed_A[pAC->Index],"100")==0) {
  2884. LinkSpeed = SK_LSPEED_100MBPS;
  2885. } else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
  2886. LinkSpeed = SK_LSPEED_1000MBPS;
  2887. } else {
  2888. printk("sk98lin: Illegal value \"%s\" for Speed_A\n",
  2889. Speed_A[pAC->Index]);
  2890. IsLinkSpeedDefined = SK_FALSE;
  2891. }
  2892. } else {
  2893. IsLinkSpeedDefined = SK_FALSE;
  2894. }
  2895. /*
  2896. ** Check speed parameter:
  2897. ** Only copper type adapter and GE V2 cards
  2898. */
  2899. if (((!pAC->ChipsetType) || (pAC->GIni.GICopperType != SK_TRUE)) &&
  2900. ((LinkSpeed != SK_LSPEED_AUTO) &&
  2901. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  2902. printk("sk98lin: Illegal value for Speed_A. "
  2903. "Not a copper card or GE V2 card\n Using "
  2904. "speed 1000\n");
  2905. LinkSpeed = SK_LSPEED_1000MBPS;
  2906. }
  2907. /*
  2908. ** Decide whether to set new config value if somethig valid has
  2909. ** been received.
  2910. */
  2911. if (IsLinkSpeedDefined) {
  2912. pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
  2913. }
  2914. /*
  2915. ** b) Any Autonegotiation and DuplexCapabilities set?
  2916. ** Please note that both belong together...
  2917. */
  2918. AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
  2919. AutoSet = SK_FALSE;
  2920. if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  2921. AutoNeg_A[pAC->Index] != NULL) {
  2922. AutoSet = SK_TRUE;
  2923. if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
  2924. AutoSet = SK_FALSE;
  2925. } else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
  2926. AutoNeg = AN_ON;
  2927. } else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
  2928. AutoNeg = AN_OFF;
  2929. } else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
  2930. AutoNeg = AN_SENS;
  2931. } else {
  2932. printk("sk98lin: Illegal value \"%s\" for AutoNeg_A\n",
  2933. AutoNeg_A[pAC->Index]);
  2934. }
  2935. }
  2936. DuplexCap = DC_BOTH;
  2937. DupSet = SK_FALSE;
  2938. if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  2939. DupCap_A[pAC->Index] != NULL) {
  2940. DupSet = SK_TRUE;
  2941. if (strcmp(DupCap_A[pAC->Index],"")==0) {
  2942. DupSet = SK_FALSE;
  2943. } else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
  2944. DuplexCap = DC_BOTH;
  2945. } else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
  2946. DuplexCap = DC_FULL;
  2947. } else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
  2948. DuplexCap = DC_HALF;
  2949. } else {
  2950. printk("sk98lin: Illegal value \"%s\" for DupCap_A\n",
  2951. DupCap_A[pAC->Index]);
  2952. }
  2953. }
  2954. /*
  2955. ** Check for illegal combinations
  2956. */
  2957. if ((LinkSpeed == SK_LSPEED_1000MBPS) &&
  2958. ((DuplexCap == SK_LMODE_STAT_AUTOHALF) ||
  2959. (DuplexCap == SK_LMODE_STAT_HALF)) &&
  2960. (pAC->ChipsetType)) {
  2961. printk("sk98lin: Half Duplex not possible with Gigabit speed!\n"
  2962. " Using Full Duplex.\n");
  2963. DuplexCap = DC_FULL;
  2964. }
  2965. if ( AutoSet && AutoNeg==AN_SENS && DupSet) {
  2966. printk("sk98lin, Port A: DuplexCapabilities"
  2967. " ignored using Sense mode\n");
  2968. }
  2969. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  2970. printk("sk98lin: Port A: Illegal combination"
  2971. " of values AutoNeg. and DuplexCap.\n Using "
  2972. "Full Duplex\n");
  2973. DuplexCap = DC_FULL;
  2974. }
  2975. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  2976. DuplexCap = DC_FULL;
  2977. }
  2978. if (!AutoSet && DupSet) {
  2979. printk("sk98lin: Port A: Duplex setting not"
  2980. " possible in\n default AutoNegotiation mode"
  2981. " (Sense).\n Using AutoNegotiation On\n");
  2982. AutoNeg = AN_ON;
  2983. }
  2984. /*
  2985. ** set the desired mode
  2986. */
  2987. if (AutoSet || DupSet) {
  2988. pAC->GIni.GP[0].PLinkModeConf = Capabilities[AutoNeg][DuplexCap];
  2989. }
  2990. /*
  2991. ** c) Any Flowcontrol-parameter set?
  2992. */
  2993. if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  2994. FlowCtrl_A[pAC->Index] != NULL) {
  2995. if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
  2996. IsFlowCtrlDefined = SK_FALSE;
  2997. } else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
  2998. FlowCtrl = SK_FLOW_MODE_SYM_OR_REM;
  2999. } else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
  3000. FlowCtrl = SK_FLOW_MODE_SYMMETRIC;
  3001. } else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
  3002. FlowCtrl = SK_FLOW_MODE_LOC_SEND;
  3003. } else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
  3004. FlowCtrl = SK_FLOW_MODE_NONE;
  3005. } else {
  3006. printk("sk98lin: Illegal value \"%s\" for FlowCtrl_A\n",
  3007. FlowCtrl_A[pAC->Index]);
  3008. IsFlowCtrlDefined = SK_FALSE;
  3009. }
  3010. } else {
  3011. IsFlowCtrlDefined = SK_FALSE;
  3012. }
  3013. if (IsFlowCtrlDefined) {
  3014. if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
  3015. printk("sk98lin: Port A: FlowControl"
  3016. " impossible without AutoNegotiation,"
  3017. " disabled\n");
  3018. FlowCtrl = SK_FLOW_MODE_NONE;
  3019. }
  3020. pAC->GIni.GP[0].PFlowCtrlMode = FlowCtrl;
  3021. }
  3022. /*
  3023. ** d) What is with the RoleParameter?
  3024. */
  3025. if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3026. Role_A[pAC->Index] != NULL) {
  3027. if (strcmp(Role_A[pAC->Index],"")==0) {
  3028. IsRoleDefined = SK_FALSE;
  3029. } else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
  3030. MSMode = SK_MS_MODE_AUTO;
  3031. } else if (strcmp(Role_A[pAC->Index],"Master")==0) {
  3032. MSMode = SK_MS_MODE_MASTER;
  3033. } else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
  3034. MSMode = SK_MS_MODE_SLAVE;
  3035. } else {
  3036. printk("sk98lin: Illegal value \"%s\" for Role_A\n",
  3037. Role_A[pAC->Index]);
  3038. IsRoleDefined = SK_FALSE;
  3039. }
  3040. } else {
  3041. IsRoleDefined = SK_FALSE;
  3042. }
  3043. if (IsRoleDefined == SK_TRUE) {
  3044. pAC->GIni.GP[0].PMSMode = MSMode;
  3045. }
  3046. /*
  3047. ** Parse any parameter settings for port B:
  3048. ** a) any LinkSpeed stated?
  3049. */
  3050. IsConTypeDefined = SK_TRUE;
  3051. IsLinkSpeedDefined = SK_TRUE;
  3052. IsFlowCtrlDefined = SK_TRUE;
  3053. IsModeDefined = SK_TRUE;
  3054. if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3055. Speed_B[pAC->Index] != NULL) {
  3056. if (strcmp(Speed_B[pAC->Index],"")==0) {
  3057. IsLinkSpeedDefined = SK_FALSE;
  3058. } else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
  3059. LinkSpeed = SK_LSPEED_AUTO;
  3060. } else if (strcmp(Speed_B[pAC->Index],"10")==0) {
  3061. LinkSpeed = SK_LSPEED_10MBPS;
  3062. } else if (strcmp(Speed_B[pAC->Index],"100")==0) {
  3063. LinkSpeed = SK_LSPEED_100MBPS;
  3064. } else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
  3065. LinkSpeed = SK_LSPEED_1000MBPS;
  3066. } else {
  3067. printk("sk98lin: Illegal value \"%s\" for Speed_B\n",
  3068. Speed_B[pAC->Index]);
  3069. IsLinkSpeedDefined = SK_FALSE;
  3070. }
  3071. } else {
  3072. IsLinkSpeedDefined = SK_FALSE;
  3073. }
  3074. /*
  3075. ** Check speed parameter:
  3076. ** Only copper type adapter and GE V2 cards
  3077. */
  3078. if (((!pAC->ChipsetType) || (pAC->GIni.GICopperType != SK_TRUE)) &&
  3079. ((LinkSpeed != SK_LSPEED_AUTO) &&
  3080. (LinkSpeed != SK_LSPEED_1000MBPS))) {
  3081. printk("sk98lin: Illegal value for Speed_B. "
  3082. "Not a copper card or GE V2 card\n Using "
  3083. "speed 1000\n");
  3084. LinkSpeed = SK_LSPEED_1000MBPS;
  3085. }
  3086. /*
  3087. ** Decide whether to set new config value if somethig valid has
  3088. ** been received.
  3089. */
  3090. if (IsLinkSpeedDefined) {
  3091. pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
  3092. }
  3093. /*
  3094. ** b) Any Autonegotiation and DuplexCapabilities set?
  3095. ** Please note that both belong together...
  3096. */
  3097. AutoNeg = AN_SENS; /* default: do auto Sense */
  3098. AutoSet = SK_FALSE;
  3099. if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3100. AutoNeg_B[pAC->Index] != NULL) {
  3101. AutoSet = SK_TRUE;
  3102. if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
  3103. AutoSet = SK_FALSE;
  3104. } else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
  3105. AutoNeg = AN_ON;
  3106. } else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
  3107. AutoNeg = AN_OFF;
  3108. } else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
  3109. AutoNeg = AN_SENS;
  3110. } else {
  3111. printk("sk98lin: Illegal value \"%s\" for AutoNeg_B\n",
  3112. AutoNeg_B[pAC->Index]);
  3113. }
  3114. }
  3115. DuplexCap = DC_BOTH;
  3116. DupSet = SK_FALSE;
  3117. if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3118. DupCap_B[pAC->Index] != NULL) {
  3119. DupSet = SK_TRUE;
  3120. if (strcmp(DupCap_B[pAC->Index],"")==0) {
  3121. DupSet = SK_FALSE;
  3122. } else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
  3123. DuplexCap = DC_BOTH;
  3124. } else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
  3125. DuplexCap = DC_FULL;
  3126. } else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
  3127. DuplexCap = DC_HALF;
  3128. } else {
  3129. printk("sk98lin: Illegal value \"%s\" for DupCap_B\n",
  3130. DupCap_B[pAC->Index]);
  3131. }
  3132. }
  3133. /*
  3134. ** Check for illegal combinations
  3135. */
  3136. if ((LinkSpeed == SK_LSPEED_1000MBPS) &&
  3137. ((DuplexCap == SK_LMODE_STAT_AUTOHALF) ||
  3138. (DuplexCap == SK_LMODE_STAT_HALF)) &&
  3139. (pAC->ChipsetType)) {
  3140. printk("sk98lin: Half Duplex not possible with Gigabit speed!\n"
  3141. " Using Full Duplex.\n");
  3142. DuplexCap = DC_FULL;
  3143. }
  3144. if (AutoSet && AutoNeg==AN_SENS && DupSet) {
  3145. printk("sk98lin, Port B: DuplexCapabilities"
  3146. " ignored using Sense mode\n");
  3147. }
  3148. if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
  3149. printk("sk98lin: Port B: Illegal combination"
  3150. " of values AutoNeg. and DuplexCap.\n Using "
  3151. "Full Duplex\n");
  3152. DuplexCap = DC_FULL;
  3153. }
  3154. if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
  3155. DuplexCap = DC_FULL;
  3156. }
  3157. if (!AutoSet && DupSet) {
  3158. printk("sk98lin: Port B: Duplex setting not"
  3159. " possible in\n default AutoNegotiation mode"
  3160. " (Sense).\n Using AutoNegotiation On\n");
  3161. AutoNeg = AN_ON;
  3162. }
  3163. /*
  3164. ** set the desired mode
  3165. */
  3166. if (AutoSet || DupSet) {
  3167. pAC->GIni.GP[1].PLinkModeConf = Capabilities[AutoNeg][DuplexCap];
  3168. }
  3169. /*
  3170. ** c) Any FlowCtrl parameter set?
  3171. */
  3172. if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3173. FlowCtrl_B[pAC->Index] != NULL) {
  3174. if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
  3175. IsFlowCtrlDefined = SK_FALSE;
  3176. } else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
  3177. FlowCtrl = SK_FLOW_MODE_SYM_OR_REM;
  3178. } else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
  3179. FlowCtrl = SK_FLOW_MODE_SYMMETRIC;
  3180. } else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
  3181. FlowCtrl = SK_FLOW_MODE_LOC_SEND;
  3182. } else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
  3183. FlowCtrl = SK_FLOW_MODE_NONE;
  3184. } else {
  3185. printk("sk98lin: Illegal value \"%s\" for FlowCtrl_B\n",
  3186. FlowCtrl_B[pAC->Index]);
  3187. IsFlowCtrlDefined = SK_FALSE;
  3188. }
  3189. } else {
  3190. IsFlowCtrlDefined = SK_FALSE;
  3191. }
  3192. if (IsFlowCtrlDefined) {
  3193. if ((AutoNeg == AN_OFF) && (FlowCtrl != SK_FLOW_MODE_NONE)) {
  3194. printk("sk98lin: Port B: FlowControl"
  3195. " impossible without AutoNegotiation,"
  3196. " disabled\n");
  3197. FlowCtrl = SK_FLOW_MODE_NONE;
  3198. }
  3199. pAC->GIni.GP[1].PFlowCtrlMode = FlowCtrl;
  3200. }
  3201. /*
  3202. ** d) What is the RoleParameter?
  3203. */
  3204. if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3205. Role_B[pAC->Index] != NULL) {
  3206. if (strcmp(Role_B[pAC->Index],"")==0) {
  3207. IsRoleDefined = SK_FALSE;
  3208. } else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
  3209. MSMode = SK_MS_MODE_AUTO;
  3210. } else if (strcmp(Role_B[pAC->Index],"Master")==0) {
  3211. MSMode = SK_MS_MODE_MASTER;
  3212. } else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
  3213. MSMode = SK_MS_MODE_SLAVE;
  3214. } else {
  3215. printk("sk98lin: Illegal value \"%s\" for Role_B\n",
  3216. Role_B[pAC->Index]);
  3217. IsRoleDefined = SK_FALSE;
  3218. }
  3219. } else {
  3220. IsRoleDefined = SK_FALSE;
  3221. }
  3222. if (IsRoleDefined) {
  3223. pAC->GIni.GP[1].PMSMode = MSMode;
  3224. }
  3225. /*
  3226. ** Evaluate settings for both ports
  3227. */
  3228. pAC->ActivePort = 0;
  3229. if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3230. PrefPort[pAC->Index] != NULL) {
  3231. if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
  3232. pAC->ActivePort = 0;
  3233. pAC->Rlmt.Net[0].Preference = -1; /* auto */
  3234. pAC->Rlmt.Net[0].PrefPort = 0;
  3235. } else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
  3236. /*
  3237. ** do not set ActivePort here, thus a port
  3238. ** switch is issued after net up.
  3239. */
  3240. Port = 0;
  3241. pAC->Rlmt.Net[0].Preference = Port;
  3242. pAC->Rlmt.Net[0].PrefPort = Port;
  3243. } else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
  3244. /*
  3245. ** do not set ActivePort here, thus a port
  3246. ** switch is issued after net up.
  3247. */
  3248. if (pAC->GIni.GIMacsFound == 1) {
  3249. printk("sk98lin: Illegal value \"B\" for PrefPort.\n"
  3250. " Port B not available on single port adapters.\n");
  3251. pAC->ActivePort = 0;
  3252. pAC->Rlmt.Net[0].Preference = -1; /* auto */
  3253. pAC->Rlmt.Net[0].PrefPort = 0;
  3254. } else {
  3255. Port = 1;
  3256. pAC->Rlmt.Net[0].Preference = Port;
  3257. pAC->Rlmt.Net[0].PrefPort = Port;
  3258. }
  3259. } else {
  3260. printk("sk98lin: Illegal value \"%s\" for PrefPort\n",
  3261. PrefPort[pAC->Index]);
  3262. }
  3263. }
  3264. pAC->RlmtNets = 1;
  3265. if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
  3266. RlmtMode[pAC->Index] != NULL) {
  3267. if (strcmp(RlmtMode[pAC->Index], "") == 0) {
  3268. pAC->RlmtMode = 0;
  3269. } else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
  3270. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3271. } else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
  3272. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3273. SK_RLMT_CHECK_LOC_LINK;
  3274. } else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
  3275. pAC->RlmtMode = SK_RLMT_CHECK_LINK |
  3276. SK_RLMT_CHECK_LOC_LINK |
  3277. SK_RLMT_CHECK_SEG;
  3278. } else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
  3279. (pAC->GIni.GIMacsFound == 2)) {
  3280. pAC->RlmtMode = SK_RLMT_CHECK_LINK;
  3281. pAC->RlmtNets = 2;
  3282. } else {
  3283. printk("sk98lin: Illegal value \"%s\" for"
  3284. " RlmtMode, using default\n",
  3285. RlmtMode[pAC->Index]);
  3286. pAC->RlmtMode = 0;
  3287. }
  3288. } else {
  3289. pAC->RlmtMode = 0;
  3290. }
  3291. /*
  3292. ** Check the interrupt moderation parameters
  3293. */
  3294. if (Moderation[pAC->Index] != NULL) {
  3295. if (strcmp(Moderation[pAC->Index], "") == 0) {
  3296. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
  3297. } else if (strcmp(Moderation[pAC->Index], "Static") == 0) {
  3298. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_STATIC;
  3299. } else if (strcmp(Moderation[pAC->Index], "Dynamic") == 0) {
  3300. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_DYNAMIC;
  3301. } else if (strcmp(Moderation[pAC->Index], "None") == 0) {
  3302. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
  3303. } else {
  3304. printk("sk98lin: Illegal value \"%s\" for Moderation.\n"
  3305. " Disable interrupt moderation.\n",
  3306. Moderation[pAC->Index]);
  3307. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
  3308. }
  3309. } else {
  3310. pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
  3311. }
  3312. if (Stats[pAC->Index] != NULL) {
  3313. if (strcmp(Stats[pAC->Index], "Yes") == 0) {
  3314. pAC->DynIrqModInfo.DisplayStats = SK_TRUE;
  3315. } else {
  3316. pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
  3317. }
  3318. } else {
  3319. pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
  3320. }
  3321. if (ModerationMask[pAC->Index] != NULL) {
  3322. if (strcmp(ModerationMask[pAC->Index], "Rx") == 0) {
  3323. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
  3324. } else if (strcmp(ModerationMask[pAC->Index], "Tx") == 0) {
  3325. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_ONLY;
  3326. } else if (strcmp(ModerationMask[pAC->Index], "Sp") == 0) {
  3327. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_ONLY;
  3328. } else if (strcmp(ModerationMask[pAC->Index], "RxSp") == 0) {
  3329. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
  3330. } else if (strcmp(ModerationMask[pAC->Index], "SpRx") == 0) {
  3331. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
  3332. } else if (strcmp(ModerationMask[pAC->Index], "RxTx") == 0) {
  3333. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
  3334. } else if (strcmp(ModerationMask[pAC->Index], "TxRx") == 0) {
  3335. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
  3336. } else if (strcmp(ModerationMask[pAC->Index], "TxSp") == 0) {
  3337. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
  3338. } else if (strcmp(ModerationMask[pAC->Index], "SpTx") == 0) {
  3339. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
  3340. } else if (strcmp(ModerationMask[pAC->Index], "RxTxSp") == 0) {
  3341. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3342. } else if (strcmp(ModerationMask[pAC->Index], "RxSpTx") == 0) {
  3343. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3344. } else if (strcmp(ModerationMask[pAC->Index], "TxRxSp") == 0) {
  3345. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3346. } else if (strcmp(ModerationMask[pAC->Index], "TxSpRx") == 0) {
  3347. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3348. } else if (strcmp(ModerationMask[pAC->Index], "SpTxRx") == 0) {
  3349. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3350. } else if (strcmp(ModerationMask[pAC->Index], "SpRxTx") == 0) {
  3351. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
  3352. } else { /* some rubbish */
  3353. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
  3354. }
  3355. } else { /* operator has stated nothing */
  3356. pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
  3357. }
  3358. if (AutoSizing[pAC->Index] != NULL) {
  3359. if (strcmp(AutoSizing[pAC->Index], "On") == 0) {
  3360. pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
  3361. } else {
  3362. pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
  3363. }
  3364. } else { /* operator has stated nothing */
  3365. pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
  3366. }
  3367. if (IntsPerSec[pAC->Index] != 0) {
  3368. if ((IntsPerSec[pAC->Index]< C_INT_MOD_IPS_LOWER_RANGE) ||
  3369. (IntsPerSec[pAC->Index] > C_INT_MOD_IPS_UPPER_RANGE)) {
  3370. printk("sk98lin: Illegal value \"%d\" for IntsPerSec. (Range: %d - %d)\n"
  3371. " Using default value of %i.\n",
  3372. IntsPerSec[pAC->Index],
  3373. C_INT_MOD_IPS_LOWER_RANGE,
  3374. C_INT_MOD_IPS_UPPER_RANGE,
  3375. C_INTS_PER_SEC_DEFAULT);
  3376. pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
  3377. } else {
  3378. pAC->DynIrqModInfo.MaxModIntsPerSec = IntsPerSec[pAC->Index];
  3379. }
  3380. } else {
  3381. pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
  3382. }
  3383. /*
  3384. ** Evaluate upper and lower moderation threshold
  3385. */
  3386. pAC->DynIrqModInfo.MaxModIntsPerSecUpperLimit =
  3387. pAC->DynIrqModInfo.MaxModIntsPerSec +
  3388. (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
  3389. pAC->DynIrqModInfo.MaxModIntsPerSecLowerLimit =
  3390. pAC->DynIrqModInfo.MaxModIntsPerSec -
  3391. (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
  3392. pAC->DynIrqModInfo.PrevTimeVal = jiffies; /* initial value */
  3393. } /* GetConfiguration */
  3394. /*****************************************************************************
  3395. *
  3396. * ProductStr - return a adapter identification string from vpd
  3397. *
  3398. * Description:
  3399. * This function reads the product name string from the vpd area
  3400. * and puts it the field pAC->DeviceString.
  3401. *
  3402. * Returns: N/A
  3403. */
  3404. static inline int ProductStr(
  3405. SK_AC *pAC, /* pointer to adapter context */
  3406. char *DeviceStr, /* result string */
  3407. int StrLen /* length of the string */
  3408. )
  3409. {
  3410. char Keyword[] = VPD_NAME; /* vpd productname identifier */
  3411. int ReturnCode; /* return code from vpd_read */
  3412. unsigned long Flags;
  3413. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  3414. ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, DeviceStr, &StrLen);
  3415. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  3416. return ReturnCode;
  3417. } /* ProductStr */
  3418. /*****************************************************************************
  3419. *
  3420. * StartDrvCleanupTimer - Start timer to check for descriptors which
  3421. * might be placed in descriptor ring, but
  3422. * havent been handled up to now
  3423. *
  3424. * Description:
  3425. * This function requests a HW-timer fo the Yukon card. The actions to
  3426. * perform when this timer expires, are located in the SkDrvEvent().
  3427. *
  3428. * Returns: N/A
  3429. */
  3430. static void
  3431. StartDrvCleanupTimer(SK_AC *pAC) {
  3432. SK_EVPARA EventParam; /* Event struct for timer event */
  3433. SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
  3434. EventParam.Para32[0] = SK_DRV_RX_CLEANUP_TIMER;
  3435. SkTimerStart(pAC, pAC->IoBase, &pAC->DrvCleanupTimer,
  3436. SK_DRV_RX_CLEANUP_TIMER_LENGTH,
  3437. SKGE_DRV, SK_DRV_TIMER, EventParam);
  3438. }
  3439. /*****************************************************************************
  3440. *
  3441. * StopDrvCleanupTimer - Stop timer to check for descriptors
  3442. *
  3443. * Description:
  3444. * This function requests a HW-timer fo the Yukon card. The actions to
  3445. * perform when this timer expires, are located in the SkDrvEvent().
  3446. *
  3447. * Returns: N/A
  3448. */
  3449. static void
  3450. StopDrvCleanupTimer(SK_AC *pAC) {
  3451. SkTimerStop(pAC, pAC->IoBase, &pAC->DrvCleanupTimer);
  3452. SK_MEMSET((char *) &pAC->DrvCleanupTimer, 0, sizeof(SK_TIMER));
  3453. }
  3454. /****************************************************************************/
  3455. /* functions for common modules *********************************************/
  3456. /****************************************************************************/
  3457. /*****************************************************************************
  3458. *
  3459. * SkDrvAllocRlmtMbuf - allocate an RLMT mbuf
  3460. *
  3461. * Description:
  3462. * This routine returns an RLMT mbuf or NULL. The RLMT Mbuf structure
  3463. * is embedded into a socket buff data area.
  3464. *
  3465. * Context:
  3466. * runtime
  3467. *
  3468. * Returns:
  3469. * NULL or pointer to Mbuf.
  3470. */
  3471. SK_MBUF *SkDrvAllocRlmtMbuf(
  3472. SK_AC *pAC, /* pointer to adapter context */
  3473. SK_IOC IoC, /* the IO-context */
  3474. unsigned BufferSize) /* size of the requested buffer */
  3475. {
  3476. SK_MBUF *pRlmtMbuf; /* pointer to a new rlmt-mbuf structure */
  3477. struct sk_buff *pMsgBlock; /* pointer to a new message block */
  3478. pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
  3479. if (pMsgBlock == NULL) {
  3480. return (NULL);
  3481. }
  3482. pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
  3483. skb_reserve(pMsgBlock, sizeof(SK_MBUF));
  3484. pRlmtMbuf->pNext = NULL;
  3485. pRlmtMbuf->pOs = pMsgBlock;
  3486. pRlmtMbuf->pData = pMsgBlock->data; /* Data buffer. */
  3487. pRlmtMbuf->Size = BufferSize; /* Data buffer size. */
  3488. pRlmtMbuf->Length = 0; /* Length of packet (<= Size). */
  3489. return (pRlmtMbuf);
  3490. } /* SkDrvAllocRlmtMbuf */
  3491. /*****************************************************************************
  3492. *
  3493. * SkDrvFreeRlmtMbuf - free an RLMT mbuf
  3494. *
  3495. * Description:
  3496. * This routine frees one or more RLMT mbuf(s).
  3497. *
  3498. * Context:
  3499. * runtime
  3500. *
  3501. * Returns:
  3502. * Nothing
  3503. */
  3504. void SkDrvFreeRlmtMbuf(
  3505. SK_AC *pAC, /* pointer to adapter context */
  3506. SK_IOC IoC, /* the IO-context */
  3507. SK_MBUF *pMbuf) /* size of the requested buffer */
  3508. {
  3509. SK_MBUF *pFreeMbuf;
  3510. SK_MBUF *pNextMbuf;
  3511. pFreeMbuf = pMbuf;
  3512. do {
  3513. pNextMbuf = pFreeMbuf->pNext;
  3514. DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
  3515. pFreeMbuf = pNextMbuf;
  3516. } while ( pFreeMbuf != NULL );
  3517. } /* SkDrvFreeRlmtMbuf */
  3518. /*****************************************************************************
  3519. *
  3520. * SkOsGetTime - provide a time value
  3521. *
  3522. * Description:
  3523. * This routine provides a time value. The unit is 1/HZ (defined by Linux).
  3524. * It is not used for absolute time, but only for time differences.
  3525. *
  3526. *
  3527. * Returns:
  3528. * Time value
  3529. */
  3530. SK_U64 SkOsGetTime(SK_AC *pAC)
  3531. {
  3532. SK_U64 PrivateJiffies;
  3533. SkOsGetTimeCurrent(pAC, &PrivateJiffies);
  3534. return PrivateJiffies;
  3535. } /* SkOsGetTime */
  3536. /*****************************************************************************
  3537. *
  3538. * SkPciReadCfgDWord - read a 32 bit value from pci config space
  3539. *
  3540. * Description:
  3541. * This routine reads a 32 bit value from the pci configuration
  3542. * space.
  3543. *
  3544. * Returns:
  3545. * 0 - indicate everything worked ok.
  3546. * != 0 - error indication
  3547. */
  3548. int SkPciReadCfgDWord(
  3549. SK_AC *pAC, /* Adapter Control structure pointer */
  3550. int PciAddr, /* PCI register address */
  3551. SK_U32 *pVal) /* pointer to store the read value */
  3552. {
  3553. pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
  3554. return(0);
  3555. } /* SkPciReadCfgDWord */
  3556. /*****************************************************************************
  3557. *
  3558. * SkPciReadCfgWord - read a 16 bit value from pci config space
  3559. *
  3560. * Description:
  3561. * This routine reads a 16 bit value from the pci configuration
  3562. * space.
  3563. *
  3564. * Returns:
  3565. * 0 - indicate everything worked ok.
  3566. * != 0 - error indication
  3567. */
  3568. int SkPciReadCfgWord(
  3569. SK_AC *pAC, /* Adapter Control structure pointer */
  3570. int PciAddr, /* PCI register address */
  3571. SK_U16 *pVal) /* pointer to store the read value */
  3572. {
  3573. pci_read_config_word(pAC->PciDev, PciAddr, pVal);
  3574. return(0);
  3575. } /* SkPciReadCfgWord */
  3576. /*****************************************************************************
  3577. *
  3578. * SkPciReadCfgByte - read a 8 bit value from pci config space
  3579. *
  3580. * Description:
  3581. * This routine reads a 8 bit value from the pci configuration
  3582. * space.
  3583. *
  3584. * Returns:
  3585. * 0 - indicate everything worked ok.
  3586. * != 0 - error indication
  3587. */
  3588. int SkPciReadCfgByte(
  3589. SK_AC *pAC, /* Adapter Control structure pointer */
  3590. int PciAddr, /* PCI register address */
  3591. SK_U8 *pVal) /* pointer to store the read value */
  3592. {
  3593. pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
  3594. return(0);
  3595. } /* SkPciReadCfgByte */
  3596. /*****************************************************************************
  3597. *
  3598. * SkPciWriteCfgWord - write a 16 bit value to pci config space
  3599. *
  3600. * Description:
  3601. * This routine writes a 16 bit value to the pci configuration
  3602. * space. The flag PciConfigUp indicates whether the config space
  3603. * is accesible or must be set up first.
  3604. *
  3605. * Returns:
  3606. * 0 - indicate everything worked ok.
  3607. * != 0 - error indication
  3608. */
  3609. int SkPciWriteCfgWord(
  3610. SK_AC *pAC, /* Adapter Control structure pointer */
  3611. int PciAddr, /* PCI register address */
  3612. SK_U16 Val) /* pointer to store the read value */
  3613. {
  3614. pci_write_config_word(pAC->PciDev, PciAddr, Val);
  3615. return(0);
  3616. } /* SkPciWriteCfgWord */
  3617. /*****************************************************************************
  3618. *
  3619. * SkPciWriteCfgWord - write a 8 bit value to pci config space
  3620. *
  3621. * Description:
  3622. * This routine writes a 8 bit value to the pci configuration
  3623. * space. The flag PciConfigUp indicates whether the config space
  3624. * is accesible or must be set up first.
  3625. *
  3626. * Returns:
  3627. * 0 - indicate everything worked ok.
  3628. * != 0 - error indication
  3629. */
  3630. int SkPciWriteCfgByte(
  3631. SK_AC *pAC, /* Adapter Control structure pointer */
  3632. int PciAddr, /* PCI register address */
  3633. SK_U8 Val) /* pointer to store the read value */
  3634. {
  3635. pci_write_config_byte(pAC->PciDev, PciAddr, Val);
  3636. return(0);
  3637. } /* SkPciWriteCfgByte */
  3638. /*****************************************************************************
  3639. *
  3640. * SkDrvEvent - handle driver events
  3641. *
  3642. * Description:
  3643. * This function handles events from all modules directed to the driver
  3644. *
  3645. * Context:
  3646. * Is called under protection of slow path lock.
  3647. *
  3648. * Returns:
  3649. * 0 if everything ok
  3650. * < 0 on error
  3651. *
  3652. */
  3653. int SkDrvEvent(
  3654. SK_AC *pAC, /* pointer to adapter context */
  3655. SK_IOC IoC, /* io-context */
  3656. SK_U32 Event, /* event-id */
  3657. SK_EVPARA Param) /* event-parameter */
  3658. {
  3659. SK_MBUF *pRlmtMbuf; /* pointer to a rlmt-mbuf structure */
  3660. struct sk_buff *pMsg; /* pointer to a message block */
  3661. int FromPort; /* the port from which we switch away */
  3662. int ToPort; /* the port we switch to */
  3663. SK_EVPARA NewPara; /* parameter for further events */
  3664. int Stat;
  3665. unsigned long Flags;
  3666. SK_BOOL DualNet;
  3667. switch (Event) {
  3668. case SK_DRV_ADAP_FAIL:
  3669. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3670. ("ADAPTER FAIL EVENT\n"));
  3671. printk("%s: Adapter failed.\n", pAC->dev[0]->name);
  3672. /* disable interrupts */
  3673. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  3674. /* cgoos */
  3675. break;
  3676. case SK_DRV_PORT_FAIL:
  3677. FromPort = Param.Para32[0];
  3678. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3679. ("PORT FAIL EVENT, Port: %d\n", FromPort));
  3680. if (FromPort == 0) {
  3681. printk("%s: Port A failed.\n", pAC->dev[0]->name);
  3682. } else {
  3683. printk("%s: Port B failed.\n", pAC->dev[1]->name);
  3684. }
  3685. /* cgoos */
  3686. break;
  3687. case SK_DRV_PORT_RESET: /* SK_U32 PortIdx */
  3688. /* action list 4 */
  3689. FromPort = Param.Para32[0];
  3690. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3691. ("PORT RESET EVENT, Port: %d ", FromPort));
  3692. NewPara.Para64 = FromPort;
  3693. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  3694. spin_lock_irqsave(
  3695. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3696. Flags);
  3697. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
  3698. netif_carrier_off(pAC->dev[Param.Para32[0]]);
  3699. spin_unlock_irqrestore(
  3700. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3701. Flags);
  3702. /* clear rx ring from received frames */
  3703. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
  3704. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  3705. spin_lock_irqsave(
  3706. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3707. Flags);
  3708. /* tschilling: Handling of return value inserted. */
  3709. if (SkGeInitPort(pAC, IoC, FromPort)) {
  3710. if (FromPort == 0) {
  3711. printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
  3712. } else {
  3713. printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
  3714. }
  3715. }
  3716. SkAddrMcUpdate(pAC,IoC, FromPort);
  3717. PortReInitBmu(pAC, FromPort);
  3718. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  3719. ClearAndStartRx(pAC, FromPort);
  3720. spin_unlock_irqrestore(
  3721. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3722. Flags);
  3723. break;
  3724. case SK_DRV_NET_UP: /* SK_U32 PortIdx */
  3725. { struct net_device *dev = pAC->dev[Param.Para32[0]];
  3726. /* action list 5 */
  3727. FromPort = Param.Para32[0];
  3728. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3729. ("NET UP EVENT, Port: %d ", Param.Para32[0]));
  3730. /* Mac update */
  3731. SkAddrMcUpdate(pAC,IoC, FromPort);
  3732. if (DoPrintInterfaceChange) {
  3733. printk("%s: network connection up using"
  3734. " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
  3735. /* tschilling: Values changed according to LinkSpeedUsed. */
  3736. Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
  3737. if (Stat == SK_LSPEED_STAT_10MBPS) {
  3738. printk(" speed: 10\n");
  3739. } else if (Stat == SK_LSPEED_STAT_100MBPS) {
  3740. printk(" speed: 100\n");
  3741. } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
  3742. printk(" speed: 1000\n");
  3743. } else {
  3744. printk(" speed: unknown\n");
  3745. }
  3746. Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
  3747. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  3748. Stat == SK_LMODE_STAT_AUTOFULL) {
  3749. printk(" autonegotiation: yes\n");
  3750. }
  3751. else {
  3752. printk(" autonegotiation: no\n");
  3753. }
  3754. if (Stat == SK_LMODE_STAT_AUTOHALF ||
  3755. Stat == SK_LMODE_STAT_HALF) {
  3756. printk(" duplex mode: half\n");
  3757. }
  3758. else {
  3759. printk(" duplex mode: full\n");
  3760. }
  3761. Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
  3762. if (Stat == SK_FLOW_STAT_REM_SEND ) {
  3763. printk(" flowctrl: remote send\n");
  3764. }
  3765. else if (Stat == SK_FLOW_STAT_LOC_SEND ){
  3766. printk(" flowctrl: local send\n");
  3767. }
  3768. else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
  3769. printk(" flowctrl: symmetric\n");
  3770. }
  3771. else {
  3772. printk(" flowctrl: none\n");
  3773. }
  3774. /* tschilling: Check against CopperType now. */
  3775. if ((pAC->GIni.GICopperType == SK_TRUE) &&
  3776. (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
  3777. SK_LSPEED_STAT_1000MBPS)) {
  3778. Stat = pAC->GIni.GP[FromPort].PMSStatus;
  3779. if (Stat == SK_MS_STAT_MASTER ) {
  3780. printk(" role: master\n");
  3781. }
  3782. else if (Stat == SK_MS_STAT_SLAVE ) {
  3783. printk(" role: slave\n");
  3784. }
  3785. else {
  3786. printk(" role: ???\n");
  3787. }
  3788. }
  3789. /*
  3790. Display dim (dynamic interrupt moderation)
  3791. informations
  3792. */
  3793. if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC)
  3794. printk(" irq moderation: static (%d ints/sec)\n",
  3795. pAC->DynIrqModInfo.MaxModIntsPerSec);
  3796. else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC)
  3797. printk(" irq moderation: dynamic (%d ints/sec)\n",
  3798. pAC->DynIrqModInfo.MaxModIntsPerSec);
  3799. else
  3800. printk(" irq moderation: disabled\n");
  3801. printk(" scatter-gather: %s\n",
  3802. (dev->features & NETIF_F_SG) ? "enabled" : "disabled");
  3803. printk(" tx-checksum: %s\n",
  3804. (dev->features & NETIF_F_IP_CSUM) ? "enabled" : "disabled");
  3805. printk(" rx-checksum: %s\n",
  3806. pAC->RxPort[Param.Para32[0]].RxCsum ? "enabled" : "disabled");
  3807. } else {
  3808. DoPrintInterfaceChange = SK_TRUE;
  3809. }
  3810. if ((Param.Para32[0] != pAC->ActivePort) &&
  3811. (pAC->RlmtNets == 1)) {
  3812. NewPara.Para32[0] = pAC->ActivePort;
  3813. NewPara.Para32[1] = Param.Para32[0];
  3814. SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
  3815. NewPara);
  3816. }
  3817. /* Inform the world that link protocol is up. */
  3818. netif_carrier_on(dev);
  3819. break;
  3820. }
  3821. case SK_DRV_NET_DOWN: /* SK_U32 Reason */
  3822. /* action list 7 */
  3823. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3824. ("NET DOWN EVENT "));
  3825. if (DoPrintInterfaceChange) {
  3826. printk("%s: network connection down\n",
  3827. pAC->dev[Param.Para32[1]]->name);
  3828. } else {
  3829. DoPrintInterfaceChange = SK_TRUE;
  3830. }
  3831. netif_carrier_off(pAC->dev[Param.Para32[1]]);
  3832. break;
  3833. case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  3834. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3835. ("PORT SWITCH HARD "));
  3836. case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  3837. /* action list 6 */
  3838. printk("%s: switching to port %c\n", pAC->dev[0]->name,
  3839. 'A'+Param.Para32[1]);
  3840. case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
  3841. FromPort = Param.Para32[0];
  3842. ToPort = Param.Para32[1];
  3843. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3844. ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
  3845. FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
  3846. NewPara.Para64 = FromPort;
  3847. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  3848. NewPara.Para64 = ToPort;
  3849. SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
  3850. spin_lock_irqsave(
  3851. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3852. Flags);
  3853. spin_lock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
  3854. SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
  3855. SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
  3856. spin_unlock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
  3857. spin_unlock_irqrestore(
  3858. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3859. Flags);
  3860. ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
  3861. ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
  3862. ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
  3863. ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
  3864. spin_lock_irqsave(
  3865. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3866. Flags);
  3867. spin_lock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
  3868. pAC->ActivePort = ToPort;
  3869. #if 0
  3870. SetQueueSizes(pAC);
  3871. #else
  3872. /* tschilling: New common function with minimum size check. */
  3873. DualNet = SK_FALSE;
  3874. if (pAC->RlmtNets == 2) {
  3875. DualNet = SK_TRUE;
  3876. }
  3877. if (SkGeInitAssignRamToQueues(
  3878. pAC,
  3879. pAC->ActivePort,
  3880. DualNet)) {
  3881. spin_unlock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
  3882. spin_unlock_irqrestore(
  3883. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3884. Flags);
  3885. printk("SkGeInitAssignRamToQueues failed.\n");
  3886. break;
  3887. }
  3888. #endif
  3889. /* tschilling: Handling of return values inserted. */
  3890. if (SkGeInitPort(pAC, IoC, FromPort) ||
  3891. SkGeInitPort(pAC, IoC, ToPort)) {
  3892. printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
  3893. }
  3894. if (Event == SK_DRV_SWITCH_SOFT) {
  3895. SkMacRxTxEnable(pAC, IoC, FromPort);
  3896. }
  3897. SkMacRxTxEnable(pAC, IoC, ToPort);
  3898. SkAddrSwap(pAC, IoC, FromPort, ToPort);
  3899. SkAddrMcUpdate(pAC, IoC, FromPort);
  3900. SkAddrMcUpdate(pAC, IoC, ToPort);
  3901. PortReInitBmu(pAC, FromPort);
  3902. PortReInitBmu(pAC, ToPort);
  3903. SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
  3904. SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
  3905. ClearAndStartRx(pAC, FromPort);
  3906. ClearAndStartRx(pAC, ToPort);
  3907. spin_unlock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
  3908. spin_unlock_irqrestore(
  3909. &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
  3910. Flags);
  3911. break;
  3912. case SK_DRV_RLMT_SEND: /* SK_MBUF *pMb */
  3913. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3914. ("RLS "));
  3915. pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
  3916. pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
  3917. skb_put(pMsg, pRlmtMbuf->Length);
  3918. if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
  3919. pMsg) < 0)
  3920. DEV_KFREE_SKB_ANY(pMsg);
  3921. break;
  3922. case SK_DRV_TIMER:
  3923. if (Param.Para32[0] == SK_DRV_MODERATION_TIMER) {
  3924. /*
  3925. ** expiration of the moderation timer implies that
  3926. ** dynamic moderation is to be applied
  3927. */
  3928. SkDimStartModerationTimer(pAC);
  3929. SkDimModerate(pAC);
  3930. if (pAC->DynIrqModInfo.DisplayStats) {
  3931. SkDimDisplayModerationSettings(pAC);
  3932. }
  3933. } else if (Param.Para32[0] == SK_DRV_RX_CLEANUP_TIMER) {
  3934. /*
  3935. ** check if we need to check for descriptors which
  3936. ** haven't been handled the last millisecs
  3937. */
  3938. StartDrvCleanupTimer(pAC);
  3939. if (pAC->GIni.GIMacsFound == 2) {
  3940. ReceiveIrq(pAC, &pAC->RxPort[1], SK_FALSE);
  3941. }
  3942. ReceiveIrq(pAC, &pAC->RxPort[0], SK_FALSE);
  3943. } else {
  3944. printk("Expiration of unknown timer\n");
  3945. }
  3946. break;
  3947. default:
  3948. break;
  3949. }
  3950. SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
  3951. ("END EVENT "));
  3952. return (0);
  3953. } /* SkDrvEvent */
  3954. /*****************************************************************************
  3955. *
  3956. * SkErrorLog - log errors
  3957. *
  3958. * Description:
  3959. * This function logs errors to the system buffer and to the console
  3960. *
  3961. * Returns:
  3962. * 0 if everything ok
  3963. * < 0 on error
  3964. *
  3965. */
  3966. void SkErrorLog(
  3967. SK_AC *pAC,
  3968. int ErrClass,
  3969. int ErrNum,
  3970. char *pErrorMsg)
  3971. {
  3972. char ClassStr[80];
  3973. switch (ErrClass) {
  3974. case SK_ERRCL_OTHER:
  3975. strcpy(ClassStr, "Other error");
  3976. break;
  3977. case SK_ERRCL_CONFIG:
  3978. strcpy(ClassStr, "Configuration error");
  3979. break;
  3980. case SK_ERRCL_INIT:
  3981. strcpy(ClassStr, "Initialization error");
  3982. break;
  3983. case SK_ERRCL_NORES:
  3984. strcpy(ClassStr, "Out of resources error");
  3985. break;
  3986. case SK_ERRCL_SW:
  3987. strcpy(ClassStr, "internal Software error");
  3988. break;
  3989. case SK_ERRCL_HW:
  3990. strcpy(ClassStr, "Hardware failure");
  3991. break;
  3992. case SK_ERRCL_COMM:
  3993. strcpy(ClassStr, "Communication error");
  3994. break;
  3995. }
  3996. printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
  3997. " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
  3998. ClassStr, ErrNum, pErrorMsg);
  3999. } /* SkErrorLog */
  4000. #ifdef SK_DIAG_SUPPORT
  4001. /*****************************************************************************
  4002. *
  4003. * SkDrvEnterDiagMode - handles DIAG attach request
  4004. *
  4005. * Description:
  4006. * Notify the kernel to NOT access the card any longer due to DIAG
  4007. * Deinitialize the Card
  4008. *
  4009. * Returns:
  4010. * int
  4011. */
  4012. int SkDrvEnterDiagMode(
  4013. SK_AC *pAc) /* pointer to adapter context */
  4014. {
  4015. DEV_NET *pNet = netdev_priv(pAc->dev[0]);
  4016. SK_AC *pAC = pNet->pAC;
  4017. SK_MEMCPY(&(pAc->PnmiBackup), &(pAc->PnmiStruct),
  4018. sizeof(SK_PNMI_STRUCT_DATA));
  4019. pAC->DiagModeActive = DIAG_ACTIVE;
  4020. if (pAC->BoardLevel > SK_INIT_DATA) {
  4021. if (netif_running(pAC->dev[0])) {
  4022. pAC->WasIfUp[0] = SK_TRUE;
  4023. pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
  4024. DoPrintInterfaceChange = SK_FALSE;
  4025. SkDrvDeInitAdapter(pAC, 0); /* performs SkGeClose */
  4026. } else {
  4027. pAC->WasIfUp[0] = SK_FALSE;
  4028. }
  4029. if (pNet != netdev_priv(pAC->dev[1])) {
  4030. pNet = netdev_priv(pAC->dev[1]);
  4031. if (netif_running(pAC->dev[1])) {
  4032. pAC->WasIfUp[1] = SK_TRUE;
  4033. pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
  4034. DoPrintInterfaceChange = SK_FALSE;
  4035. SkDrvDeInitAdapter(pAC, 1); /* do SkGeClose */
  4036. } else {
  4037. pAC->WasIfUp[1] = SK_FALSE;
  4038. }
  4039. }
  4040. pAC->BoardLevel = SK_INIT_DATA;
  4041. }
  4042. return(0);
  4043. }
  4044. /*****************************************************************************
  4045. *
  4046. * SkDrvLeaveDiagMode - handles DIAG detach request
  4047. *
  4048. * Description:
  4049. * Notify the kernel to may access the card again after use by DIAG
  4050. * Initialize the Card
  4051. *
  4052. * Returns:
  4053. * int
  4054. */
  4055. int SkDrvLeaveDiagMode(
  4056. SK_AC *pAc) /* pointer to adapter control context */
  4057. {
  4058. SK_MEMCPY(&(pAc->PnmiStruct), &(pAc->PnmiBackup),
  4059. sizeof(SK_PNMI_STRUCT_DATA));
  4060. pAc->DiagModeActive = DIAG_NOTACTIVE;
  4061. pAc->Pnmi.DiagAttached = SK_DIAG_IDLE;
  4062. if (pAc->WasIfUp[0] == SK_TRUE) {
  4063. pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
  4064. DoPrintInterfaceChange = SK_FALSE;
  4065. SkDrvInitAdapter(pAc, 0); /* first device */
  4066. }
  4067. if (pAc->WasIfUp[1] == SK_TRUE) {
  4068. pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
  4069. DoPrintInterfaceChange = SK_FALSE;
  4070. SkDrvInitAdapter(pAc, 1); /* second device */
  4071. }
  4072. return(0);
  4073. }
  4074. /*****************************************************************************
  4075. *
  4076. * ParseDeviceNbrFromSlotName - Evaluate PCI device number
  4077. *
  4078. * Description:
  4079. * This function parses the PCI slot name information string and will
  4080. * retrieve the devcie number out of it. The slot_name maintianed by
  4081. * linux is in the form of '02:0a.0', whereas the first two characters
  4082. * represent the bus number in hex (in the sample above this is
  4083. * pci bus 0x02) and the next two characters the device number (0x0a).
  4084. *
  4085. * Returns:
  4086. * SK_U32: The device number from the PCI slot name
  4087. */
  4088. static SK_U32 ParseDeviceNbrFromSlotName(
  4089. const char *SlotName) /* pointer to pci slot name eg. '02:0a.0' */
  4090. {
  4091. char *CurrCharPos = (char *) SlotName;
  4092. int FirstNibble = -1;
  4093. int SecondNibble = -1;
  4094. SK_U32 Result = 0;
  4095. while (*CurrCharPos != '\0') {
  4096. if (*CurrCharPos == ':') {
  4097. while (*CurrCharPos != '.') {
  4098. CurrCharPos++;
  4099. if ( (*CurrCharPos >= '0') &&
  4100. (*CurrCharPos <= '9')) {
  4101. if (FirstNibble == -1) {
  4102. /* dec. value for '0' */
  4103. FirstNibble = *CurrCharPos - 48;
  4104. } else {
  4105. SecondNibble = *CurrCharPos - 48;
  4106. }
  4107. } else if ( (*CurrCharPos >= 'a') &&
  4108. (*CurrCharPos <= 'f') ) {
  4109. if (FirstNibble == -1) {
  4110. FirstNibble = *CurrCharPos - 87;
  4111. } else {
  4112. SecondNibble = *CurrCharPos - 87;
  4113. }
  4114. } else {
  4115. Result = 0;
  4116. }
  4117. }
  4118. Result = FirstNibble;
  4119. Result = Result << 4; /* first nibble is higher one */
  4120. Result = Result | SecondNibble;
  4121. }
  4122. CurrCharPos++; /* next character */
  4123. }
  4124. return (Result);
  4125. }
  4126. /****************************************************************************
  4127. *
  4128. * SkDrvDeInitAdapter - deinitialize adapter (this function is only
  4129. * called if Diag attaches to that card)
  4130. *
  4131. * Description:
  4132. * Close initialized adapter.
  4133. *
  4134. * Returns:
  4135. * 0 - on success
  4136. * error code - on error
  4137. */
  4138. static int SkDrvDeInitAdapter(
  4139. SK_AC *pAC, /* pointer to adapter context */
  4140. int devNbr) /* what device is to be handled */
  4141. {
  4142. struct SK_NET_DEVICE *dev;
  4143. dev = pAC->dev[devNbr];
  4144. /* On Linux 2.6 the network driver does NOT mess with reference
  4145. ** counts. The driver MUST be able to be unloaded at any time
  4146. ** due to the possibility of hotplug.
  4147. */
  4148. if (SkGeClose(dev) != 0) {
  4149. return (-1);
  4150. }
  4151. return (0);
  4152. } /* SkDrvDeInitAdapter() */
  4153. /****************************************************************************
  4154. *
  4155. * SkDrvInitAdapter - Initialize adapter (this function is only
  4156. * called if Diag deattaches from that card)
  4157. *
  4158. * Description:
  4159. * Close initialized adapter.
  4160. *
  4161. * Returns:
  4162. * 0 - on success
  4163. * error code - on error
  4164. */
  4165. static int SkDrvInitAdapter(
  4166. SK_AC *pAC, /* pointer to adapter context */
  4167. int devNbr) /* what device is to be handled */
  4168. {
  4169. struct SK_NET_DEVICE *dev;
  4170. dev = pAC->dev[devNbr];
  4171. if (SkGeOpen(dev) != 0) {
  4172. return (-1);
  4173. }
  4174. /*
  4175. ** Use correct MTU size and indicate to kernel TX queue can be started
  4176. */
  4177. if (SkGeChangeMtu(dev, dev->mtu) != 0) {
  4178. return (-1);
  4179. }
  4180. return (0);
  4181. } /* SkDrvInitAdapter */
  4182. #endif
  4183. #ifdef DEBUG
  4184. /****************************************************************************/
  4185. /* "debug only" section *****************************************************/
  4186. /****************************************************************************/
  4187. /*****************************************************************************
  4188. *
  4189. * DumpMsg - print a frame
  4190. *
  4191. * Description:
  4192. * This function prints frames to the system logfile/to the console.
  4193. *
  4194. * Returns: N/A
  4195. *
  4196. */
  4197. static void DumpMsg(struct sk_buff *skb, char *str)
  4198. {
  4199. int msglen;
  4200. if (skb == NULL) {
  4201. printk("DumpMsg(): NULL-Message\n");
  4202. return;
  4203. }
  4204. if (skb->data == NULL) {
  4205. printk("DumpMsg(): Message empty\n");
  4206. return;
  4207. }
  4208. msglen = skb->len;
  4209. if (msglen > 64)
  4210. msglen = 64;
  4211. printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
  4212. DumpData((char *)skb->data, msglen);
  4213. printk("------- End of message ---------\n");
  4214. } /* DumpMsg */
  4215. /*****************************************************************************
  4216. *
  4217. * DumpData - print a data area
  4218. *
  4219. * Description:
  4220. * This function prints a area of data to the system logfile/to the
  4221. * console.
  4222. *
  4223. * Returns: N/A
  4224. *
  4225. */
  4226. static void DumpData(char *p, int size)
  4227. {
  4228. register int i;
  4229. int haddr, addr;
  4230. char hex_buffer[180];
  4231. char asc_buffer[180];
  4232. char HEXCHAR[] = "0123456789ABCDEF";
  4233. addr = 0;
  4234. haddr = 0;
  4235. hex_buffer[0] = 0;
  4236. asc_buffer[0] = 0;
  4237. for (i=0; i < size; ) {
  4238. if (*p >= '0' && *p <='z')
  4239. asc_buffer[addr] = *p;
  4240. else
  4241. asc_buffer[addr] = '.';
  4242. addr++;
  4243. asc_buffer[addr] = 0;
  4244. hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
  4245. haddr++;
  4246. hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
  4247. haddr++;
  4248. hex_buffer[haddr] = ' ';
  4249. haddr++;
  4250. hex_buffer[haddr] = 0;
  4251. p++;
  4252. i++;
  4253. if (i%16 == 0) {
  4254. printk("%s %s\n", hex_buffer, asc_buffer);
  4255. addr = 0;
  4256. haddr = 0;
  4257. }
  4258. }
  4259. } /* DumpData */
  4260. /*****************************************************************************
  4261. *
  4262. * DumpLong - print a data area as long values
  4263. *
  4264. * Description:
  4265. * This function prints a area of data to the system logfile/to the
  4266. * console.
  4267. *
  4268. * Returns: N/A
  4269. *
  4270. */
  4271. static void DumpLong(char *pc, int size)
  4272. {
  4273. register int i;
  4274. int haddr, addr;
  4275. char hex_buffer[180];
  4276. char asc_buffer[180];
  4277. char HEXCHAR[] = "0123456789ABCDEF";
  4278. long *p;
  4279. int l;
  4280. addr = 0;
  4281. haddr = 0;
  4282. hex_buffer[0] = 0;
  4283. asc_buffer[0] = 0;
  4284. p = (long*) pc;
  4285. for (i=0; i < size; ) {
  4286. l = (long) *p;
  4287. hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
  4288. haddr++;
  4289. hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
  4290. haddr++;
  4291. hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
  4292. haddr++;
  4293. hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
  4294. haddr++;
  4295. hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
  4296. haddr++;
  4297. hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
  4298. haddr++;
  4299. hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
  4300. haddr++;
  4301. hex_buffer[haddr] = HEXCHAR[l & 0x0f];
  4302. haddr++;
  4303. hex_buffer[haddr] = ' ';
  4304. haddr++;
  4305. hex_buffer[haddr] = 0;
  4306. p++;
  4307. i++;
  4308. if (i%8 == 0) {
  4309. printk("%4x %s\n", (i-8)*4, hex_buffer);
  4310. haddr = 0;
  4311. }
  4312. }
  4313. printk("------------------------\n");
  4314. } /* DumpLong */
  4315. #endif
  4316. static int __devinit skge_probe_one(struct pci_dev *pdev,
  4317. const struct pci_device_id *ent)
  4318. {
  4319. SK_AC *pAC;
  4320. DEV_NET *pNet = NULL;
  4321. struct net_device *dev = NULL;
  4322. static int boards_found = 0;
  4323. int error = -ENODEV;
  4324. int using_dac = 0;
  4325. char DeviceStr[80];
  4326. if (pci_enable_device(pdev))
  4327. goto out;
  4328. /* Configure DMA attributes. */
  4329. if (sizeof(dma_addr_t) > sizeof(u32) &&
  4330. !(error = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  4331. using_dac = 1;
  4332. error = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
  4333. if (error < 0) {
  4334. printk(KERN_ERR "sk98lin %s unable to obtain 64 bit DMA "
  4335. "for consistent allocations\n", pci_name(pdev));
  4336. goto out_disable_device;
  4337. }
  4338. } else {
  4339. error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  4340. if (error) {
  4341. printk(KERN_ERR "sk98lin %s no usable DMA configuration\n",
  4342. pci_name(pdev));
  4343. goto out_disable_device;
  4344. }
  4345. }
  4346. error = -ENOMEM;
  4347. dev = alloc_etherdev(sizeof(DEV_NET));
  4348. if (!dev) {
  4349. printk(KERN_ERR "sk98lin: unable to allocate etherdev "
  4350. "structure!\n");
  4351. goto out_disable_device;
  4352. }
  4353. pNet = netdev_priv(dev);
  4354. pNet->pAC = kzalloc(sizeof(SK_AC), GFP_KERNEL);
  4355. if (!pNet->pAC) {
  4356. printk(KERN_ERR "sk98lin: unable to allocate adapter "
  4357. "structure!\n");
  4358. goto out_free_netdev;
  4359. }
  4360. pAC = pNet->pAC;
  4361. pAC->PciDev = pdev;
  4362. pAC->dev[0] = dev;
  4363. pAC->dev[1] = dev;
  4364. pAC->CheckQueue = SK_FALSE;
  4365. dev->irq = pdev->irq;
  4366. error = SkGeInitPCI(pAC);
  4367. if (error) {
  4368. printk(KERN_ERR "sk98lin: PCI setup failed: %i\n", error);
  4369. goto out_free_netdev;
  4370. }
  4371. SET_MODULE_OWNER(dev);
  4372. dev->open = &SkGeOpen;
  4373. dev->stop = &SkGeClose;
  4374. dev->hard_start_xmit = &SkGeXmit;
  4375. dev->get_stats = &SkGeStats;
  4376. dev->set_multicast_list = &SkGeSetRxMode;
  4377. dev->set_mac_address = &SkGeSetMacAddr;
  4378. dev->do_ioctl = &SkGeIoctl;
  4379. dev->change_mtu = &SkGeChangeMtu;
  4380. #ifdef CONFIG_NET_POLL_CONTROLLER
  4381. dev->poll_controller = &SkGePollController;
  4382. #endif
  4383. SET_NETDEV_DEV(dev, &pdev->dev);
  4384. SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps);
  4385. /* Use only if yukon hardware */
  4386. if (pAC->ChipsetType) {
  4387. #ifdef USE_SK_TX_CHECKSUM
  4388. dev->features |= NETIF_F_IP_CSUM;
  4389. #endif
  4390. #ifdef SK_ZEROCOPY
  4391. dev->features |= NETIF_F_SG;
  4392. #endif
  4393. #ifdef USE_SK_RX_CHECKSUM
  4394. pAC->RxPort[0].RxCsum = 1;
  4395. #endif
  4396. }
  4397. if (using_dac)
  4398. dev->features |= NETIF_F_HIGHDMA;
  4399. pAC->Index = boards_found++;
  4400. error = SkGeBoardInit(dev, pAC);
  4401. if (error)
  4402. goto out_free_netdev;
  4403. /* Read Adapter name from VPD */
  4404. if (ProductStr(pAC, DeviceStr, sizeof(DeviceStr)) != 0) {
  4405. error = -EIO;
  4406. printk(KERN_ERR "sk98lin: Could not read VPD data.\n");
  4407. goto out_free_resources;
  4408. }
  4409. /* Register net device */
  4410. error = register_netdev(dev);
  4411. if (error) {
  4412. printk(KERN_ERR "sk98lin: Could not register device.\n");
  4413. goto out_free_resources;
  4414. }
  4415. /* Print adapter specific string from vpd */
  4416. printk("%s: %s\n", dev->name, DeviceStr);
  4417. /* Print configuration settings */
  4418. printk(" PrefPort:%c RlmtMode:%s\n",
  4419. 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
  4420. (pAC->RlmtMode==0) ? "Check Link State" :
  4421. ((pAC->RlmtMode==1) ? "Check Link State" :
  4422. ((pAC->RlmtMode==3) ? "Check Local Port" :
  4423. ((pAC->RlmtMode==7) ? "Check Segmentation" :
  4424. ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
  4425. SkGeYellowLED(pAC, pAC->IoBase, 1);
  4426. memcpy(&dev->dev_addr, &pAC->Addr.Net[0].CurrentMacAddress, 6);
  4427. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  4428. pNet->PortNr = 0;
  4429. pNet->NetNr = 0;
  4430. boards_found++;
  4431. pci_set_drvdata(pdev, dev);
  4432. /* More then one port found */
  4433. if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
  4434. dev = alloc_etherdev(sizeof(DEV_NET));
  4435. if (!dev) {
  4436. printk(KERN_ERR "sk98lin: unable to allocate etherdev "
  4437. "structure!\n");
  4438. goto single_port;
  4439. }
  4440. pNet = netdev_priv(dev);
  4441. pNet->PortNr = 1;
  4442. pNet->NetNr = 1;
  4443. pNet->pAC = pAC;
  4444. dev->open = &SkGeOpen;
  4445. dev->stop = &SkGeClose;
  4446. dev->hard_start_xmit = &SkGeXmit;
  4447. dev->get_stats = &SkGeStats;
  4448. dev->set_multicast_list = &SkGeSetRxMode;
  4449. dev->set_mac_address = &SkGeSetMacAddr;
  4450. dev->do_ioctl = &SkGeIoctl;
  4451. dev->change_mtu = &SkGeChangeMtu;
  4452. SET_NETDEV_DEV(dev, &pdev->dev);
  4453. SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps);
  4454. if (pAC->ChipsetType) {
  4455. #ifdef USE_SK_TX_CHECKSUM
  4456. dev->features |= NETIF_F_IP_CSUM;
  4457. #endif
  4458. #ifdef SK_ZEROCOPY
  4459. dev->features |= NETIF_F_SG;
  4460. #endif
  4461. #ifdef USE_SK_RX_CHECKSUM
  4462. pAC->RxPort[1].RxCsum = 1;
  4463. #endif
  4464. }
  4465. if (using_dac)
  4466. dev->features |= NETIF_F_HIGHDMA;
  4467. error = register_netdev(dev);
  4468. if (error) {
  4469. printk(KERN_ERR "sk98lin: Could not register device"
  4470. " for second port. (%d)\n", error);
  4471. free_netdev(dev);
  4472. goto single_port;
  4473. }
  4474. pAC->dev[1] = dev;
  4475. memcpy(&dev->dev_addr,
  4476. &pAC->Addr.Net[1].CurrentMacAddress, 6);
  4477. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  4478. printk("%s: %s\n", dev->name, DeviceStr);
  4479. printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
  4480. }
  4481. single_port:
  4482. /* Save the hardware revision */
  4483. pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
  4484. (pAC->GIni.GIPciHwRev & 0x0F);
  4485. /* Set driver globals */
  4486. pAC->Pnmi.pDriverFileName = DRIVER_FILE_NAME;
  4487. pAC->Pnmi.pDriverReleaseDate = DRIVER_REL_DATE;
  4488. memset(&pAC->PnmiBackup, 0, sizeof(SK_PNMI_STRUCT_DATA));
  4489. memcpy(&pAC->PnmiBackup, &pAC->PnmiStruct, sizeof(SK_PNMI_STRUCT_DATA));
  4490. return 0;
  4491. out_free_resources:
  4492. FreeResources(dev);
  4493. out_free_netdev:
  4494. free_netdev(dev);
  4495. out_disable_device:
  4496. pci_disable_device(pdev);
  4497. out:
  4498. return error;
  4499. }
  4500. static void __devexit skge_remove_one(struct pci_dev *pdev)
  4501. {
  4502. struct net_device *dev = pci_get_drvdata(pdev);
  4503. DEV_NET *pNet = netdev_priv(dev);
  4504. SK_AC *pAC = pNet->pAC;
  4505. struct net_device *otherdev = pAC->dev[1];
  4506. unregister_netdev(dev);
  4507. SkGeYellowLED(pAC, pAC->IoBase, 0);
  4508. if (pAC->BoardLevel == SK_INIT_RUN) {
  4509. SK_EVPARA EvPara;
  4510. unsigned long Flags;
  4511. /* board is still alive */
  4512. spin_lock_irqsave(&pAC->SlowPathLock, Flags);
  4513. EvPara.Para32[0] = 0;
  4514. EvPara.Para32[1] = -1;
  4515. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  4516. EvPara.Para32[0] = 1;
  4517. EvPara.Para32[1] = -1;
  4518. SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
  4519. SkEventDispatcher(pAC, pAC->IoBase);
  4520. /* disable interrupts */
  4521. SK_OUT32(pAC->IoBase, B0_IMSK, 0);
  4522. SkGeDeInit(pAC, pAC->IoBase);
  4523. spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
  4524. pAC->BoardLevel = SK_INIT_DATA;
  4525. /* We do NOT check here, if IRQ was pending, of course*/
  4526. }
  4527. if (pAC->BoardLevel == SK_INIT_IO) {
  4528. /* board is still alive */
  4529. SkGeDeInit(pAC, pAC->IoBase);
  4530. pAC->BoardLevel = SK_INIT_DATA;
  4531. }
  4532. FreeResources(dev);
  4533. free_netdev(dev);
  4534. if (otherdev != dev)
  4535. free_netdev(otherdev);
  4536. kfree(pAC);
  4537. }
  4538. #ifdef CONFIG_PM
  4539. static int skge_suspend(struct pci_dev *pdev, pm_message_t state)
  4540. {
  4541. struct net_device *dev = pci_get_drvdata(pdev);
  4542. DEV_NET *pNet = netdev_priv(dev);
  4543. SK_AC *pAC = pNet->pAC;
  4544. struct net_device *otherdev = pAC->dev[1];
  4545. if (netif_running(dev)) {
  4546. netif_carrier_off(dev);
  4547. DoPrintInterfaceChange = SK_FALSE;
  4548. SkDrvDeInitAdapter(pAC, 0); /* performs SkGeClose */
  4549. netif_device_detach(dev);
  4550. }
  4551. if (otherdev != dev) {
  4552. if (netif_running(otherdev)) {
  4553. netif_carrier_off(otherdev);
  4554. DoPrintInterfaceChange = SK_FALSE;
  4555. SkDrvDeInitAdapter(pAC, 1); /* performs SkGeClose */
  4556. netif_device_detach(otherdev);
  4557. }
  4558. }
  4559. pci_save_state(pdev);
  4560. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  4561. if (pAC->AllocFlag & SK_ALLOC_IRQ) {
  4562. free_irq(dev->irq, dev);
  4563. }
  4564. pci_disable_device(pdev);
  4565. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4566. return 0;
  4567. }
  4568. static int skge_resume(struct pci_dev *pdev)
  4569. {
  4570. struct net_device *dev = pci_get_drvdata(pdev);
  4571. DEV_NET *pNet = netdev_priv(dev);
  4572. SK_AC *pAC = pNet->pAC;
  4573. struct net_device *otherdev = pAC->dev[1];
  4574. int ret;
  4575. pci_set_power_state(pdev, PCI_D0);
  4576. pci_restore_state(pdev);
  4577. pci_enable_device(pdev);
  4578. pci_set_master(pdev);
  4579. if (pAC->GIni.GIMacsFound == 2)
  4580. ret = request_irq(dev->irq, SkGeIsr, IRQF_SHARED, "sk98lin", dev);
  4581. else
  4582. ret = request_irq(dev->irq, SkGeIsrOnePort, IRQF_SHARED, "sk98lin", dev);
  4583. if (ret) {
  4584. printk(KERN_WARNING "sk98lin: unable to acquire IRQ %d\n", dev->irq);
  4585. pAC->AllocFlag &= ~SK_ALLOC_IRQ;
  4586. dev->irq = 0;
  4587. pci_disable_device(pdev);
  4588. return -EBUSY;
  4589. }
  4590. netif_device_attach(dev);
  4591. if (netif_running(dev)) {
  4592. DoPrintInterfaceChange = SK_FALSE;
  4593. SkDrvInitAdapter(pAC, 0); /* first device */
  4594. }
  4595. if (otherdev != dev) {
  4596. netif_device_attach(otherdev);
  4597. if (netif_running(otherdev)) {
  4598. DoPrintInterfaceChange = SK_FALSE;
  4599. SkDrvInitAdapter(pAC, 1); /* second device */
  4600. }
  4601. }
  4602. return 0;
  4603. }
  4604. #else
  4605. #define skge_suspend NULL
  4606. #define skge_resume NULL
  4607. #endif
  4608. static struct pci_device_id skge_pci_tbl[] = {
  4609. { PCI_VENDOR_ID_3COM, 0x1700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4610. { PCI_VENDOR_ID_3COM, 0x80eb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4611. { PCI_VENDOR_ID_SYSKONNECT, 0x4300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4612. { PCI_VENDOR_ID_SYSKONNECT, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4613. /* DLink card does not have valid VPD so this driver gags
  4614. * { PCI_VENDOR_ID_DLINK, 0x4c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4615. */
  4616. { PCI_VENDOR_ID_MARVELL, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4617. { PCI_VENDOR_ID_MARVELL, 0x5005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4618. { PCI_VENDOR_ID_CNET, 0x434e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4619. { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, 0x0015, },
  4620. { PCI_VENDOR_ID_LINKSYS, 0x1064, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  4621. { 0 }
  4622. };
  4623. MODULE_DEVICE_TABLE(pci, skge_pci_tbl);
  4624. static struct pci_driver skge_driver = {
  4625. .name = "sk98lin",
  4626. .id_table = skge_pci_tbl,
  4627. .probe = skge_probe_one,
  4628. .remove = __devexit_p(skge_remove_one),
  4629. .suspend = skge_suspend,
  4630. .resume = skge_resume,
  4631. };
  4632. static int __init skge_init(void)
  4633. {
  4634. return pci_register_driver(&skge_driver);
  4635. }
  4636. static void __exit skge_exit(void)
  4637. {
  4638. pci_unregister_driver(&skge_driver);
  4639. }
  4640. module_init(skge_init);
  4641. module_exit(skge_exit);