iwl-agn-lib.c 59 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/sched.h>
  34. #include "iwl-dev.h"
  35. #include "iwl-core.h"
  36. #include "iwl-io.h"
  37. #include "iwl-helpers.h"
  38. #include "iwl-agn-hw.h"
  39. #include "iwl-agn.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-trans.h"
  42. #include "iwl-shared.h"
  43. static inline u32 iwlagn_get_scd_ssn(struct iwlagn_tx_resp *tx_resp)
  44. {
  45. return le32_to_cpup((__le32 *)&tx_resp->status +
  46. tx_resp->frame_count) & MAX_SN;
  47. }
  48. static void iwlagn_count_tx_err_status(struct iwl_priv *priv, u16 status)
  49. {
  50. status &= TX_STATUS_MSK;
  51. switch (status) {
  52. case TX_STATUS_POSTPONE_DELAY:
  53. priv->reply_tx_stats.pp_delay++;
  54. break;
  55. case TX_STATUS_POSTPONE_FEW_BYTES:
  56. priv->reply_tx_stats.pp_few_bytes++;
  57. break;
  58. case TX_STATUS_POSTPONE_BT_PRIO:
  59. priv->reply_tx_stats.pp_bt_prio++;
  60. break;
  61. case TX_STATUS_POSTPONE_QUIET_PERIOD:
  62. priv->reply_tx_stats.pp_quiet_period++;
  63. break;
  64. case TX_STATUS_POSTPONE_CALC_TTAK:
  65. priv->reply_tx_stats.pp_calc_ttak++;
  66. break;
  67. case TX_STATUS_FAIL_INTERNAL_CROSSED_RETRY:
  68. priv->reply_tx_stats.int_crossed_retry++;
  69. break;
  70. case TX_STATUS_FAIL_SHORT_LIMIT:
  71. priv->reply_tx_stats.short_limit++;
  72. break;
  73. case TX_STATUS_FAIL_LONG_LIMIT:
  74. priv->reply_tx_stats.long_limit++;
  75. break;
  76. case TX_STATUS_FAIL_FIFO_UNDERRUN:
  77. priv->reply_tx_stats.fifo_underrun++;
  78. break;
  79. case TX_STATUS_FAIL_DRAIN_FLOW:
  80. priv->reply_tx_stats.drain_flow++;
  81. break;
  82. case TX_STATUS_FAIL_RFKILL_FLUSH:
  83. priv->reply_tx_stats.rfkill_flush++;
  84. break;
  85. case TX_STATUS_FAIL_LIFE_EXPIRE:
  86. priv->reply_tx_stats.life_expire++;
  87. break;
  88. case TX_STATUS_FAIL_DEST_PS:
  89. priv->reply_tx_stats.dest_ps++;
  90. break;
  91. case TX_STATUS_FAIL_HOST_ABORTED:
  92. priv->reply_tx_stats.host_abort++;
  93. break;
  94. case TX_STATUS_FAIL_BT_RETRY:
  95. priv->reply_tx_stats.bt_retry++;
  96. break;
  97. case TX_STATUS_FAIL_STA_INVALID:
  98. priv->reply_tx_stats.sta_invalid++;
  99. break;
  100. case TX_STATUS_FAIL_FRAG_DROPPED:
  101. priv->reply_tx_stats.frag_drop++;
  102. break;
  103. case TX_STATUS_FAIL_TID_DISABLE:
  104. priv->reply_tx_stats.tid_disable++;
  105. break;
  106. case TX_STATUS_FAIL_FIFO_FLUSHED:
  107. priv->reply_tx_stats.fifo_flush++;
  108. break;
  109. case TX_STATUS_FAIL_INSUFFICIENT_CF_POLL:
  110. priv->reply_tx_stats.insuff_cf_poll++;
  111. break;
  112. case TX_STATUS_FAIL_PASSIVE_NO_RX:
  113. priv->reply_tx_stats.fail_hw_drop++;
  114. break;
  115. case TX_STATUS_FAIL_NO_BEACON_ON_RADAR:
  116. priv->reply_tx_stats.sta_color_mismatch++;
  117. break;
  118. default:
  119. priv->reply_tx_stats.unknown++;
  120. break;
  121. }
  122. }
  123. static void iwlagn_count_agg_tx_err_status(struct iwl_priv *priv, u16 status)
  124. {
  125. status &= AGG_TX_STATUS_MSK;
  126. switch (status) {
  127. case AGG_TX_STATE_UNDERRUN_MSK:
  128. priv->reply_agg_tx_stats.underrun++;
  129. break;
  130. case AGG_TX_STATE_BT_PRIO_MSK:
  131. priv->reply_agg_tx_stats.bt_prio++;
  132. break;
  133. case AGG_TX_STATE_FEW_BYTES_MSK:
  134. priv->reply_agg_tx_stats.few_bytes++;
  135. break;
  136. case AGG_TX_STATE_ABORT_MSK:
  137. priv->reply_agg_tx_stats.abort++;
  138. break;
  139. case AGG_TX_STATE_LAST_SENT_TTL_MSK:
  140. priv->reply_agg_tx_stats.last_sent_ttl++;
  141. break;
  142. case AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK:
  143. priv->reply_agg_tx_stats.last_sent_try++;
  144. break;
  145. case AGG_TX_STATE_LAST_SENT_BT_KILL_MSK:
  146. priv->reply_agg_tx_stats.last_sent_bt_kill++;
  147. break;
  148. case AGG_TX_STATE_SCD_QUERY_MSK:
  149. priv->reply_agg_tx_stats.scd_query++;
  150. break;
  151. case AGG_TX_STATE_TEST_BAD_CRC32_MSK:
  152. priv->reply_agg_tx_stats.bad_crc32++;
  153. break;
  154. case AGG_TX_STATE_RESPONSE_MSK:
  155. priv->reply_agg_tx_stats.response++;
  156. break;
  157. case AGG_TX_STATE_DUMP_TX_MSK:
  158. priv->reply_agg_tx_stats.dump_tx++;
  159. break;
  160. case AGG_TX_STATE_DELAY_TX_MSK:
  161. priv->reply_agg_tx_stats.delay_tx++;
  162. break;
  163. default:
  164. priv->reply_agg_tx_stats.unknown++;
  165. break;
  166. }
  167. }
  168. static void iwlagn_set_tx_status(struct iwl_priv *priv,
  169. struct ieee80211_tx_info *info,
  170. struct iwl_rxon_context *ctx,
  171. struct iwlagn_tx_resp *tx_resp,
  172. int txq_id, bool is_agg)
  173. {
  174. u16 status = le16_to_cpu(tx_resp->status.status);
  175. info->status.rates[0].count = tx_resp->failure_frame + 1;
  176. if (is_agg)
  177. info->flags &= ~IEEE80211_TX_CTL_AMPDU;
  178. info->flags |= iwl_tx_status_to_mac80211(status);
  179. iwlagn_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  180. info);
  181. if (!iwl_is_tx_success(status))
  182. iwlagn_count_tx_err_status(priv, status);
  183. if (status == TX_STATUS_FAIL_PASSIVE_NO_RX &&
  184. iwl_is_associated_ctx(ctx) && ctx->vif &&
  185. ctx->vif->type == NL80211_IFTYPE_STATION) {
  186. ctx->last_tx_rejected = true;
  187. iwl_stop_queue(priv, &priv->txq[txq_id]);
  188. }
  189. IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
  190. "0x%x retries %d\n",
  191. txq_id,
  192. iwl_get_tx_fail_reason(status), status,
  193. le32_to_cpu(tx_resp->rate_n_flags),
  194. tx_resp->failure_frame);
  195. }
  196. #ifdef CONFIG_IWLWIFI_DEBUG
  197. #define AGG_TX_STATE_FAIL(x) case AGG_TX_STATE_ ## x: return #x
  198. const char *iwl_get_agg_tx_fail_reason(u16 status)
  199. {
  200. status &= AGG_TX_STATUS_MSK;
  201. switch (status) {
  202. case AGG_TX_STATE_TRANSMITTED:
  203. return "SUCCESS";
  204. AGG_TX_STATE_FAIL(UNDERRUN_MSK);
  205. AGG_TX_STATE_FAIL(BT_PRIO_MSK);
  206. AGG_TX_STATE_FAIL(FEW_BYTES_MSK);
  207. AGG_TX_STATE_FAIL(ABORT_MSK);
  208. AGG_TX_STATE_FAIL(LAST_SENT_TTL_MSK);
  209. AGG_TX_STATE_FAIL(LAST_SENT_TRY_CNT_MSK);
  210. AGG_TX_STATE_FAIL(LAST_SENT_BT_KILL_MSK);
  211. AGG_TX_STATE_FAIL(SCD_QUERY_MSK);
  212. AGG_TX_STATE_FAIL(TEST_BAD_CRC32_MSK);
  213. AGG_TX_STATE_FAIL(RESPONSE_MSK);
  214. AGG_TX_STATE_FAIL(DUMP_TX_MSK);
  215. AGG_TX_STATE_FAIL(DELAY_TX_MSK);
  216. }
  217. return "UNKNOWN";
  218. }
  219. #endif /* CONFIG_IWLWIFI_DEBUG */
  220. static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv,
  221. struct iwl_ht_agg *agg,
  222. struct iwlagn_tx_resp *tx_resp,
  223. int txq_id, u16 start_idx)
  224. {
  225. u16 status;
  226. struct agg_tx_status *frame_status = &tx_resp->status;
  227. struct ieee80211_hdr *hdr = NULL;
  228. int i, sh, idx;
  229. u16 seq;
  230. if (agg->wait_for_ba)
  231. IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
  232. agg->frame_count = tx_resp->frame_count;
  233. agg->start_idx = start_idx;
  234. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  235. agg->bitmap = 0;
  236. /* # frames attempted by Tx command */
  237. if (agg->frame_count == 1) {
  238. struct iwl_tx_info *txb;
  239. /* Only one frame was attempted; no block-ack will arrive */
  240. idx = start_idx;
  241. IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
  242. agg->frame_count, agg->start_idx, idx);
  243. txb = &priv->txq[txq_id].txb[idx];
  244. iwlagn_set_tx_status(priv, IEEE80211_SKB_CB(txb->skb),
  245. txb->ctx, tx_resp, txq_id, true);
  246. agg->wait_for_ba = 0;
  247. } else {
  248. /* Two or more frames were attempted; expect block-ack */
  249. u64 bitmap = 0;
  250. /*
  251. * Start is the lowest frame sent. It may not be the first
  252. * frame in the batch; we figure this out dynamically during
  253. * the following loop.
  254. */
  255. int start = agg->start_idx;
  256. /* Construct bit-map of pending frames within Tx window */
  257. for (i = 0; i < agg->frame_count; i++) {
  258. u16 sc;
  259. status = le16_to_cpu(frame_status[i].status);
  260. seq = le16_to_cpu(frame_status[i].sequence);
  261. idx = SEQ_TO_INDEX(seq);
  262. txq_id = SEQ_TO_QUEUE(seq);
  263. if (status & AGG_TX_STATUS_MSK)
  264. iwlagn_count_agg_tx_err_status(priv, status);
  265. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  266. AGG_TX_STATE_ABORT_MSK))
  267. continue;
  268. IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
  269. agg->frame_count, txq_id, idx);
  270. IWL_DEBUG_TX_REPLY(priv, "status %s (0x%08x), "
  271. "try-count (0x%08x)\n",
  272. iwl_get_agg_tx_fail_reason(status),
  273. status & AGG_TX_STATUS_MSK,
  274. status & AGG_TX_TRY_MSK);
  275. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  276. if (!hdr) {
  277. IWL_ERR(priv,
  278. "BUG_ON idx doesn't point to valid skb"
  279. " idx=%d, txq_id=%d\n", idx, txq_id);
  280. return -1;
  281. }
  282. sc = le16_to_cpu(hdr->seq_ctrl);
  283. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  284. IWL_ERR(priv,
  285. "BUG_ON idx doesn't match seq control"
  286. " idx=%d, seq_idx=%d, seq=%d\n",
  287. idx, SEQ_TO_SN(sc),
  288. hdr->seq_ctrl);
  289. return -1;
  290. }
  291. IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
  292. i, idx, SEQ_TO_SN(sc));
  293. /*
  294. * sh -> how many frames ahead of the starting frame is
  295. * the current one?
  296. *
  297. * Note that all frames sent in the batch must be in a
  298. * 64-frame window, so this number should be in [0,63].
  299. * If outside of this window, then we've found a new
  300. * "first" frame in the batch and need to change start.
  301. */
  302. sh = idx - start;
  303. /*
  304. * If >= 64, out of window. start must be at the front
  305. * of the circular buffer, idx must be near the end of
  306. * the buffer, and idx is the new "first" frame. Shift
  307. * the indices around.
  308. */
  309. if (sh >= 64) {
  310. /* Shift bitmap by start - idx, wrapped */
  311. sh = 0x100 - idx + start;
  312. bitmap = bitmap << sh;
  313. /* Now idx is the new start so sh = 0 */
  314. sh = 0;
  315. start = idx;
  316. /*
  317. * If <= -64 then wraps the 256-pkt circular buffer
  318. * (e.g., start = 255 and idx = 0, sh should be 1)
  319. */
  320. } else if (sh <= -64) {
  321. sh = 0x100 - start + idx;
  322. /*
  323. * If < 0 but > -64, out of window. idx is before start
  324. * but not wrapped. Shift the indices around.
  325. */
  326. } else if (sh < 0) {
  327. /* Shift by how far start is ahead of idx */
  328. sh = start - idx;
  329. bitmap = bitmap << sh;
  330. /* Now idx is the new start so sh = 0 */
  331. start = idx;
  332. sh = 0;
  333. }
  334. /* Sequence number start + sh was sent in this batch */
  335. bitmap |= 1ULL << sh;
  336. IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
  337. start, (unsigned long long)bitmap);
  338. }
  339. /*
  340. * Store the bitmap and possibly the new start, if we wrapped
  341. * the buffer above
  342. */
  343. agg->bitmap = bitmap;
  344. agg->start_idx = start;
  345. IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
  346. agg->frame_count, agg->start_idx,
  347. (unsigned long long)agg->bitmap);
  348. if (bitmap)
  349. agg->wait_for_ba = 1;
  350. }
  351. return 0;
  352. }
  353. void iwl_check_abort_status(struct iwl_priv *priv,
  354. u8 frame_count, u32 status)
  355. {
  356. if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
  357. IWL_ERR(priv, "Tx flush command to flush out all frames\n");
  358. if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
  359. queue_work(priv->shrd->workqueue, &priv->tx_flush);
  360. }
  361. }
  362. void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  363. {
  364. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  365. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  366. int txq_id = SEQ_TO_QUEUE(sequence);
  367. int index = SEQ_TO_INDEX(sequence);
  368. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  369. struct ieee80211_tx_info *info;
  370. struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  371. struct ieee80211_hdr *hdr;
  372. struct iwl_tx_info *txb;
  373. u32 status = le16_to_cpu(tx_resp->status.status);
  374. int tid;
  375. int sta_id;
  376. int freed;
  377. unsigned long flags;
  378. if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
  379. IWL_ERR(priv, "%s: Read index for DMA queue txq_id (%d) "
  380. "index %d is out of range [0-%d] %d %d\n", __func__,
  381. txq_id, index, txq->q.n_bd, txq->q.write_ptr,
  382. txq->q.read_ptr);
  383. return;
  384. }
  385. txq->time_stamp = jiffies;
  386. txb = &txq->txb[txq->q.read_ptr];
  387. info = IEEE80211_SKB_CB(txb->skb);
  388. memset(&info->status, 0, sizeof(info->status));
  389. tid = (tx_resp->ra_tid & IWLAGN_TX_RES_TID_MSK) >>
  390. IWLAGN_TX_RES_TID_POS;
  391. sta_id = (tx_resp->ra_tid & IWLAGN_TX_RES_RA_MSK) >>
  392. IWLAGN_TX_RES_RA_POS;
  393. spin_lock_irqsave(&priv->shrd->sta_lock, flags);
  394. hdr = (void *)txb->skb->data;
  395. if (!ieee80211_is_data_qos(hdr->frame_control))
  396. priv->last_seq_ctl = tx_resp->seq_ctl;
  397. if (txq->sched_retry) {
  398. const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp);
  399. struct iwl_ht_agg *agg;
  400. agg = &priv->stations[sta_id].tid[tid].agg;
  401. /*
  402. * If the BT kill count is non-zero, we'll get this
  403. * notification again.
  404. */
  405. if (tx_resp->bt_kill_count && tx_resp->frame_count == 1 &&
  406. priv->cfg->bt_params &&
  407. priv->cfg->bt_params->advanced_bt_coexist) {
  408. IWL_DEBUG_COEX(priv, "receive reply tx with bt_kill\n");
  409. }
  410. iwlagn_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
  411. /* check if BAR is needed */
  412. if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
  413. info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
  414. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  415. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  416. IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
  417. "scd_ssn=%d idx=%d txq=%d swq=%d\n",
  418. scd_ssn , index, txq_id, txq->swq_id);
  419. freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
  420. iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
  421. if (priv->mac80211_registered &&
  422. (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
  423. (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
  424. iwl_wake_queue(priv, txq);
  425. }
  426. } else {
  427. iwlagn_set_tx_status(priv, info, txb->ctx, tx_resp,
  428. txq_id, false);
  429. freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
  430. iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
  431. if (priv->mac80211_registered &&
  432. iwl_queue_space(&txq->q) > txq->q.low_mark &&
  433. status != TX_STATUS_FAIL_PASSIVE_NO_RX)
  434. iwl_wake_queue(priv, txq);
  435. }
  436. iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
  437. iwl_check_abort_status(priv, tx_resp->frame_count, status);
  438. spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
  439. }
  440. int iwlagn_hw_valid_rtc_data_addr(u32 addr)
  441. {
  442. return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
  443. (addr < IWLAGN_RTC_DATA_UPPER_BOUND);
  444. }
  445. int iwlagn_send_tx_power(struct iwl_priv *priv)
  446. {
  447. struct iwlagn_tx_power_dbm_cmd tx_power_cmd;
  448. u8 tx_ant_cfg_cmd;
  449. if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &priv->shrd->status),
  450. "TX Power requested while scanning!\n"))
  451. return -EAGAIN;
  452. /* half dBm need to multiply */
  453. tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
  454. if (priv->tx_power_lmt_in_half_dbm &&
  455. priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
  456. /*
  457. * For the newer devices which using enhanced/extend tx power
  458. * table in EEPROM, the format is in half dBm. driver need to
  459. * convert to dBm format before report to mac80211.
  460. * By doing so, there is a possibility of 1/2 dBm resolution
  461. * lost. driver will perform "round-up" operation before
  462. * reporting, but it will cause 1/2 dBm tx power over the
  463. * regulatory limit. Perform the checking here, if the
  464. * "tx_power_user_lmt" is higher than EEPROM value (in
  465. * half-dBm format), lower the tx power based on EEPROM
  466. */
  467. tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
  468. }
  469. tx_power_cmd.flags = IWLAGN_TX_POWER_NO_CLOSED;
  470. tx_power_cmd.srv_chan_lmt = IWLAGN_TX_POWER_AUTO;
  471. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  472. tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
  473. else
  474. tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
  475. return iwl_trans_send_cmd_pdu(trans(priv), tx_ant_cfg_cmd, CMD_SYNC,
  476. sizeof(tx_power_cmd), &tx_power_cmd);
  477. }
  478. void iwlagn_temperature(struct iwl_priv *priv)
  479. {
  480. /* store temperature from correct statistics (in Celsius) */
  481. priv->temperature = le32_to_cpu(priv->statistics.common.temperature);
  482. iwl_tt_handler(priv);
  483. }
  484. u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv)
  485. {
  486. struct iwl_eeprom_calib_hdr {
  487. u8 version;
  488. u8 pa_type;
  489. u16 voltage;
  490. } *hdr;
  491. hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
  492. EEPROM_CALIB_ALL);
  493. return hdr->version;
  494. }
  495. /*
  496. * EEPROM
  497. */
  498. static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
  499. {
  500. u16 offset = 0;
  501. if ((address & INDIRECT_ADDRESS) == 0)
  502. return address;
  503. switch (address & INDIRECT_TYPE_MSK) {
  504. case INDIRECT_HOST:
  505. offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);
  506. break;
  507. case INDIRECT_GENERAL:
  508. offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);
  509. break;
  510. case INDIRECT_REGULATORY:
  511. offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);
  512. break;
  513. case INDIRECT_TXP_LIMIT:
  514. offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT);
  515. break;
  516. case INDIRECT_TXP_LIMIT_SIZE:
  517. offset = iwl_eeprom_query16(priv, EEPROM_LINK_TXP_LIMIT_SIZE);
  518. break;
  519. case INDIRECT_CALIBRATION:
  520. offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);
  521. break;
  522. case INDIRECT_PROCESS_ADJST:
  523. offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);
  524. break;
  525. case INDIRECT_OTHERS:
  526. offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);
  527. break;
  528. default:
  529. IWL_ERR(priv, "illegal indirect type: 0x%X\n",
  530. address & INDIRECT_TYPE_MSK);
  531. break;
  532. }
  533. /* translate the offset from words to byte */
  534. return (address & ADDRESS_MSK) + (offset << 1);
  535. }
  536. const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
  537. {
  538. u32 address = eeprom_indirect_address(priv, offset);
  539. BUG_ON(address >= priv->cfg->base_params->eeprom_size);
  540. return &priv->eeprom[address];
  541. }
  542. struct iwl_mod_params iwlagn_mod_params = {
  543. .amsdu_size_8K = 1,
  544. .restart_fw = 1,
  545. .plcp_check = true,
  546. .bt_coex_active = true,
  547. .no_sleep_autoadjust = true,
  548. .power_level = IWL_POWER_INDEX_1,
  549. .bt_ch_announce = true,
  550. .wanted_ucode_alternative = 1,
  551. .auto_agg = true,
  552. /* the rest are 0 by default */
  553. };
  554. int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
  555. {
  556. int idx = 0;
  557. int band_offset = 0;
  558. /* HT rate format: mac80211 wants an MCS number, which is just LSB */
  559. if (rate_n_flags & RATE_MCS_HT_MSK) {
  560. idx = (rate_n_flags & 0xff);
  561. return idx;
  562. /* Legacy rate format, search for match in table */
  563. } else {
  564. if (band == IEEE80211_BAND_5GHZ)
  565. band_offset = IWL_FIRST_OFDM_RATE;
  566. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  567. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  568. return idx - band_offset;
  569. }
  570. return -1;
  571. }
  572. static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
  573. struct ieee80211_vif *vif,
  574. enum ieee80211_band band,
  575. struct iwl_scan_channel *scan_ch)
  576. {
  577. const struct ieee80211_supported_band *sband;
  578. u16 passive_dwell = 0;
  579. u16 active_dwell = 0;
  580. int added = 0;
  581. u16 channel = 0;
  582. sband = iwl_get_hw_mode(priv, band);
  583. if (!sband) {
  584. IWL_ERR(priv, "invalid band\n");
  585. return added;
  586. }
  587. active_dwell = iwl_get_active_dwell_time(priv, band, 0);
  588. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  589. if (passive_dwell <= active_dwell)
  590. passive_dwell = active_dwell + 1;
  591. channel = iwl_get_single_channel_number(priv, band);
  592. if (channel) {
  593. scan_ch->channel = cpu_to_le16(channel);
  594. scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
  595. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  596. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  597. /* Set txpower levels to defaults */
  598. scan_ch->dsp_atten = 110;
  599. if (band == IEEE80211_BAND_5GHZ)
  600. scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
  601. else
  602. scan_ch->tx_gain = ((1 << 5) | (5 << 3));
  603. added++;
  604. } else
  605. IWL_ERR(priv, "no valid channel found\n");
  606. return added;
  607. }
  608. static int iwl_get_channels_for_scan(struct iwl_priv *priv,
  609. struct ieee80211_vif *vif,
  610. enum ieee80211_band band,
  611. u8 is_active, u8 n_probes,
  612. struct iwl_scan_channel *scan_ch)
  613. {
  614. struct ieee80211_channel *chan;
  615. const struct ieee80211_supported_band *sband;
  616. const struct iwl_channel_info *ch_info;
  617. u16 passive_dwell = 0;
  618. u16 active_dwell = 0;
  619. int added, i;
  620. u16 channel;
  621. sband = iwl_get_hw_mode(priv, band);
  622. if (!sband)
  623. return 0;
  624. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  625. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  626. if (passive_dwell <= active_dwell)
  627. passive_dwell = active_dwell + 1;
  628. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  629. chan = priv->scan_request->channels[i];
  630. if (chan->band != band)
  631. continue;
  632. channel = chan->hw_value;
  633. scan_ch->channel = cpu_to_le16(channel);
  634. ch_info = iwl_get_channel_info(priv, band, channel);
  635. if (!is_channel_valid(ch_info)) {
  636. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  637. channel);
  638. continue;
  639. }
  640. if (!is_active || is_channel_passive(ch_info) ||
  641. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
  642. scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
  643. else
  644. scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
  645. if (n_probes)
  646. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  647. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  648. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  649. /* Set txpower levels to defaults */
  650. scan_ch->dsp_atten = 110;
  651. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  652. * power level:
  653. * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
  654. */
  655. if (band == IEEE80211_BAND_5GHZ)
  656. scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
  657. else
  658. scan_ch->tx_gain = ((1 << 5) | (5 << 3));
  659. IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
  660. channel, le32_to_cpu(scan_ch->type),
  661. (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
  662. "ACTIVE" : "PASSIVE",
  663. (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
  664. active_dwell : passive_dwell);
  665. scan_ch++;
  666. added++;
  667. }
  668. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  669. return added;
  670. }
  671. int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
  672. {
  673. struct iwl_host_cmd cmd = {
  674. .id = REPLY_SCAN_CMD,
  675. .len = { sizeof(struct iwl_scan_cmd), },
  676. .flags = CMD_SYNC,
  677. };
  678. struct iwl_scan_cmd *scan;
  679. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  680. u32 rate_flags = 0;
  681. u16 cmd_len;
  682. u16 rx_chain = 0;
  683. enum ieee80211_band band;
  684. u8 n_probes = 0;
  685. u8 rx_ant = hw_params(priv).valid_rx_ant;
  686. u8 rate;
  687. bool is_active = false;
  688. int chan_mod;
  689. u8 active_chains;
  690. u8 scan_tx_antennas = hw_params(priv).valid_tx_ant;
  691. int ret;
  692. lockdep_assert_held(&priv->shrd->mutex);
  693. if (vif)
  694. ctx = iwl_rxon_ctx_from_vif(vif);
  695. if (!priv->scan_cmd) {
  696. priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
  697. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  698. if (!priv->scan_cmd) {
  699. IWL_DEBUG_SCAN(priv,
  700. "fail to allocate memory for scan\n");
  701. return -ENOMEM;
  702. }
  703. }
  704. scan = priv->scan_cmd;
  705. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  706. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  707. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  708. if (priv->scan_type != IWL_SCAN_ROC &&
  709. iwl_is_any_associated(priv)) {
  710. u16 interval = 0;
  711. u32 extra;
  712. u32 suspend_time = 100;
  713. u32 scan_suspend_time = 100;
  714. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  715. switch (priv->scan_type) {
  716. case IWL_SCAN_ROC:
  717. WARN_ON(1);
  718. break;
  719. case IWL_SCAN_RADIO_RESET:
  720. interval = 0;
  721. break;
  722. case IWL_SCAN_NORMAL:
  723. interval = vif->bss_conf.beacon_int;
  724. break;
  725. }
  726. scan->suspend_time = 0;
  727. scan->max_out_time = cpu_to_le32(200 * 1024);
  728. if (!interval)
  729. interval = suspend_time;
  730. extra = (suspend_time / interval) << 22;
  731. scan_suspend_time = (extra |
  732. ((suspend_time % interval) * 1024));
  733. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  734. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  735. scan_suspend_time, interval);
  736. } else if (priv->scan_type == IWL_SCAN_ROC) {
  737. scan->suspend_time = 0;
  738. scan->max_out_time = 0;
  739. scan->quiet_time = 0;
  740. scan->quiet_plcp_th = 0;
  741. }
  742. switch (priv->scan_type) {
  743. case IWL_SCAN_RADIO_RESET:
  744. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  745. break;
  746. case IWL_SCAN_NORMAL:
  747. if (priv->scan_request->n_ssids) {
  748. int i, p = 0;
  749. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  750. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  751. /* always does wildcard anyway */
  752. if (!priv->scan_request->ssids[i].ssid_len)
  753. continue;
  754. scan->direct_scan[p].id = WLAN_EID_SSID;
  755. scan->direct_scan[p].len =
  756. priv->scan_request->ssids[i].ssid_len;
  757. memcpy(scan->direct_scan[p].ssid,
  758. priv->scan_request->ssids[i].ssid,
  759. priv->scan_request->ssids[i].ssid_len);
  760. n_probes++;
  761. p++;
  762. }
  763. is_active = true;
  764. } else
  765. IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
  766. break;
  767. case IWL_SCAN_ROC:
  768. IWL_DEBUG_SCAN(priv, "Start ROC scan.\n");
  769. break;
  770. }
  771. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  772. scan->tx_cmd.sta_id = ctx->bcast_sta_id;
  773. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  774. switch (priv->scan_band) {
  775. case IEEE80211_BAND_2GHZ:
  776. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  777. chan_mod = le32_to_cpu(
  778. priv->contexts[IWL_RXON_CTX_BSS].active.flags &
  779. RXON_FLG_CHANNEL_MODE_MSK)
  780. >> RXON_FLG_CHANNEL_MODE_POS;
  781. if (chan_mod == CHANNEL_MODE_PURE_40) {
  782. rate = IWL_RATE_6M_PLCP;
  783. } else {
  784. rate = IWL_RATE_1M_PLCP;
  785. rate_flags = RATE_MCS_CCK_MSK;
  786. }
  787. /*
  788. * Internal scans are passive, so we can indiscriminately set
  789. * the BT ignore flag on 2.4 GHz since it applies to TX only.
  790. */
  791. if (priv->cfg->bt_params &&
  792. priv->cfg->bt_params->advanced_bt_coexist)
  793. scan->tx_cmd.tx_flags |= TX_CMD_FLG_IGNORE_BT;
  794. break;
  795. case IEEE80211_BAND_5GHZ:
  796. rate = IWL_RATE_6M_PLCP;
  797. break;
  798. default:
  799. IWL_WARN(priv, "Invalid scan band\n");
  800. return -EIO;
  801. }
  802. /*
  803. * If active scanning is requested but a certain channel is
  804. * marked passive, we can do active scanning if we detect
  805. * transmissions.
  806. *
  807. * There is an issue with some firmware versions that triggers
  808. * a sysassert on a "good CRC threshold" of zero (== disabled),
  809. * on a radar channel even though this means that we should NOT
  810. * send probes.
  811. *
  812. * The "good CRC threshold" is the number of frames that we
  813. * need to receive during our dwell time on a channel before
  814. * sending out probes -- setting this to a huge value will
  815. * mean we never reach it, but at the same time work around
  816. * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
  817. * here instead of IWL_GOOD_CRC_TH_DISABLED.
  818. *
  819. * This was fixed in later versions along with some other
  820. * scan changes, and the threshold behaves as a flag in those
  821. * versions.
  822. */
  823. if (priv->new_scan_threshold_behaviour)
  824. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  825. IWL_GOOD_CRC_TH_DISABLED;
  826. else
  827. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  828. IWL_GOOD_CRC_TH_NEVER;
  829. band = priv->scan_band;
  830. if (priv->cfg->scan_rx_antennas[band])
  831. rx_ant = priv->cfg->scan_rx_antennas[band];
  832. if (band == IEEE80211_BAND_2GHZ &&
  833. priv->cfg->bt_params &&
  834. priv->cfg->bt_params->advanced_bt_coexist) {
  835. /* transmit 2.4 GHz probes only on first antenna */
  836. scan_tx_antennas = first_antenna(scan_tx_antennas);
  837. }
  838. priv->scan_tx_ant[band] = iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band],
  839. scan_tx_antennas);
  840. rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
  841. scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
  842. /* In power save mode use one chain, otherwise use all chains */
  843. if (test_bit(STATUS_POWER_PMI, &priv->shrd->status)) {
  844. /* rx_ant has been set to all valid chains previously */
  845. active_chains = rx_ant &
  846. ((u8)(priv->chain_noise_data.active_chains));
  847. if (!active_chains)
  848. active_chains = rx_ant;
  849. IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
  850. priv->chain_noise_data.active_chains);
  851. rx_ant = first_antenna(active_chains);
  852. }
  853. if (priv->cfg->bt_params &&
  854. priv->cfg->bt_params->advanced_bt_coexist &&
  855. priv->bt_full_concurrent) {
  856. /* operated as 1x1 in full concurrency mode */
  857. rx_ant = first_antenna(rx_ant);
  858. }
  859. /* MIMO is not used here, but value is required */
  860. rx_chain |=
  861. hw_params(priv).valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
  862. rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
  863. rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
  864. rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
  865. scan->rx_chain = cpu_to_le16(rx_chain);
  866. switch (priv->scan_type) {
  867. case IWL_SCAN_NORMAL:
  868. cmd_len = iwl_fill_probe_req(priv,
  869. (struct ieee80211_mgmt *)scan->data,
  870. vif->addr,
  871. priv->scan_request->ie,
  872. priv->scan_request->ie_len,
  873. IWL_MAX_SCAN_SIZE - sizeof(*scan));
  874. break;
  875. case IWL_SCAN_RADIO_RESET:
  876. case IWL_SCAN_ROC:
  877. /* use bcast addr, will not be transmitted but must be valid */
  878. cmd_len = iwl_fill_probe_req(priv,
  879. (struct ieee80211_mgmt *)scan->data,
  880. iwl_bcast_addr, NULL, 0,
  881. IWL_MAX_SCAN_SIZE - sizeof(*scan));
  882. break;
  883. default:
  884. BUG();
  885. }
  886. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  887. scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
  888. RXON_FILTER_BCON_AWARE_MSK);
  889. switch (priv->scan_type) {
  890. case IWL_SCAN_RADIO_RESET:
  891. scan->channel_count =
  892. iwl_get_single_channel_for_scan(priv, vif, band,
  893. (void *)&scan->data[cmd_len]);
  894. break;
  895. case IWL_SCAN_NORMAL:
  896. scan->channel_count =
  897. iwl_get_channels_for_scan(priv, vif, band,
  898. is_active, n_probes,
  899. (void *)&scan->data[cmd_len]);
  900. break;
  901. case IWL_SCAN_ROC: {
  902. struct iwl_scan_channel *scan_ch;
  903. scan->channel_count = 1;
  904. scan_ch = (void *)&scan->data[cmd_len];
  905. scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
  906. scan_ch->channel =
  907. cpu_to_le16(priv->hw_roc_channel->hw_value);
  908. scan_ch->active_dwell =
  909. scan_ch->passive_dwell =
  910. cpu_to_le16(priv->hw_roc_duration);
  911. /* Set txpower levels to defaults */
  912. scan_ch->dsp_atten = 110;
  913. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  914. * power level:
  915. * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
  916. */
  917. if (priv->hw_roc_channel->band == IEEE80211_BAND_5GHZ)
  918. scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
  919. else
  920. scan_ch->tx_gain = ((1 << 5) | (5 << 3));
  921. }
  922. break;
  923. }
  924. if (scan->channel_count == 0) {
  925. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  926. return -EIO;
  927. }
  928. cmd.len[0] += le16_to_cpu(scan->tx_cmd.len) +
  929. scan->channel_count * sizeof(struct iwl_scan_channel);
  930. cmd.data[0] = scan;
  931. cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
  932. scan->len = cpu_to_le16(cmd.len[0]);
  933. /* set scan bit here for PAN params */
  934. set_bit(STATUS_SCAN_HW, &priv->shrd->status);
  935. ret = iwlagn_set_pan_params(priv);
  936. if (ret)
  937. return ret;
  938. ret = iwl_trans_send_cmd(trans(priv), &cmd);
  939. if (ret) {
  940. clear_bit(STATUS_SCAN_HW, &priv->shrd->status);
  941. iwlagn_set_pan_params(priv);
  942. }
  943. return ret;
  944. }
  945. int iwlagn_manage_ibss_station(struct iwl_priv *priv,
  946. struct ieee80211_vif *vif, bool add)
  947. {
  948. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  949. if (add)
  950. return iwlagn_add_bssid_station(priv, vif_priv->ctx,
  951. vif->bss_conf.bssid,
  952. &vif_priv->ibss_bssid_sta_id);
  953. return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id,
  954. vif->bss_conf.bssid);
  955. }
  956. void iwl_free_tfds_in_queue(struct iwl_priv *priv,
  957. int sta_id, int tid, int freed)
  958. {
  959. lockdep_assert_held(&priv->shrd->sta_lock);
  960. if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
  961. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  962. else {
  963. IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
  964. priv->stations[sta_id].tid[tid].tfds_in_queue,
  965. freed);
  966. priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
  967. }
  968. }
  969. #define IWL_FLUSH_WAIT_MS 2000
  970. int iwlagn_wait_tx_queue_empty(struct iwl_priv *priv)
  971. {
  972. struct iwl_tx_queue *txq;
  973. struct iwl_queue *q;
  974. int cnt;
  975. unsigned long now = jiffies;
  976. int ret = 0;
  977. /* waiting for all the tx frames complete might take a while */
  978. for (cnt = 0; cnt < hw_params(priv).max_txq_num; cnt++) {
  979. if (cnt == priv->shrd->cmd_queue)
  980. continue;
  981. txq = &priv->txq[cnt];
  982. q = &txq->q;
  983. while (q->read_ptr != q->write_ptr && !time_after(jiffies,
  984. now + msecs_to_jiffies(IWL_FLUSH_WAIT_MS)))
  985. msleep(1);
  986. if (q->read_ptr != q->write_ptr) {
  987. IWL_ERR(priv, "fail to flush all tx fifo queues\n");
  988. ret = -ETIMEDOUT;
  989. break;
  990. }
  991. }
  992. return ret;
  993. }
  994. #define IWL_TX_QUEUE_MSK 0xfffff
  995. /**
  996. * iwlagn_txfifo_flush: send REPLY_TXFIFO_FLUSH command to uCode
  997. *
  998. * pre-requirements:
  999. * 1. acquire mutex before calling
  1000. * 2. make sure rf is on and not in exit state
  1001. */
  1002. int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
  1003. {
  1004. struct iwl_txfifo_flush_cmd flush_cmd;
  1005. struct iwl_host_cmd cmd = {
  1006. .id = REPLY_TXFIFO_FLUSH,
  1007. .len = { sizeof(struct iwl_txfifo_flush_cmd), },
  1008. .flags = CMD_SYNC,
  1009. .data = { &flush_cmd, },
  1010. };
  1011. might_sleep();
  1012. memset(&flush_cmd, 0, sizeof(flush_cmd));
  1013. if (flush_control & BIT(IWL_RXON_CTX_BSS))
  1014. flush_cmd.fifo_control = IWL_SCD_VO_MSK | IWL_SCD_VI_MSK |
  1015. IWL_SCD_BE_MSK | IWL_SCD_BK_MSK |
  1016. IWL_SCD_MGMT_MSK;
  1017. if ((flush_control & BIT(IWL_RXON_CTX_PAN)) &&
  1018. (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)))
  1019. flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK |
  1020. IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK |
  1021. IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |
  1022. IWL_PAN_SCD_MULTICAST_MSK;
  1023. if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
  1024. flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK;
  1025. IWL_DEBUG_INFO(priv, "fifo queue control: 0X%x\n",
  1026. flush_cmd.fifo_control);
  1027. flush_cmd.flush_control = cpu_to_le16(flush_control);
  1028. return iwl_trans_send_cmd(trans(priv), &cmd);
  1029. }
  1030. void iwlagn_dev_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
  1031. {
  1032. mutex_lock(&priv->shrd->mutex);
  1033. ieee80211_stop_queues(priv->hw);
  1034. if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
  1035. IWL_ERR(priv, "flush request fail\n");
  1036. goto done;
  1037. }
  1038. IWL_DEBUG_INFO(priv, "wait transmit/flush all frames\n");
  1039. iwlagn_wait_tx_queue_empty(priv);
  1040. done:
  1041. ieee80211_wake_queues(priv->hw);
  1042. mutex_unlock(&priv->shrd->mutex);
  1043. }
  1044. /*
  1045. * BT coex
  1046. */
  1047. /*
  1048. * Macros to access the lookup table.
  1049. *
  1050. * The lookup table has 7 inputs: bt3_prio, bt3_txrx, bt_rf_act, wifi_req,
  1051. * wifi_prio, wifi_txrx and wifi_sh_ant_req.
  1052. *
  1053. * It has three outputs: WLAN_ACTIVE, WLAN_KILL and ANT_SWITCH
  1054. *
  1055. * The format is that "registers" 8 through 11 contain the WLAN_ACTIVE bits
  1056. * one after another in 32-bit registers, and "registers" 0 through 7 contain
  1057. * the WLAN_KILL and ANT_SWITCH bits interleaved (in that order).
  1058. *
  1059. * These macros encode that format.
  1060. */
  1061. #define LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, wifi_req, wifi_prio, \
  1062. wifi_txrx, wifi_sh_ant_req) \
  1063. (bt3_prio | (bt3_txrx << 1) | (bt_rf_act << 2) | (wifi_req << 3) | \
  1064. (wifi_prio << 4) | (wifi_txrx << 5) | (wifi_sh_ant_req << 6))
  1065. #define LUT_PTA_WLAN_ACTIVE_OP(lut, op, val) \
  1066. lut[8 + ((val) >> 5)] op (cpu_to_le32(BIT((val) & 0x1f)))
  1067. #define LUT_TEST_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1068. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1069. (!!(LUT_PTA_WLAN_ACTIVE_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, \
  1070. bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
  1071. wifi_sh_ant_req))))
  1072. #define LUT_SET_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1073. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1074. LUT_PTA_WLAN_ACTIVE_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, \
  1075. bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
  1076. wifi_sh_ant_req))
  1077. #define LUT_CLEAR_PTA_WLAN_ACTIVE(lut, bt3_prio, bt3_txrx, bt_rf_act, \
  1078. wifi_req, wifi_prio, wifi_txrx, \
  1079. wifi_sh_ant_req) \
  1080. LUT_PTA_WLAN_ACTIVE_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, \
  1081. bt_rf_act, wifi_req, wifi_prio, wifi_txrx, \
  1082. wifi_sh_ant_req))
  1083. #define LUT_WLAN_KILL_OP(lut, op, val) \
  1084. lut[(val) >> 4] op (cpu_to_le32(BIT(((val) << 1) & 0x1e)))
  1085. #define LUT_TEST_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1086. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1087. (!!(LUT_WLAN_KILL_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1088. wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))))
  1089. #define LUT_SET_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1090. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1091. LUT_WLAN_KILL_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1092. wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
  1093. #define LUT_CLEAR_WLAN_KILL(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1094. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1095. LUT_WLAN_KILL_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1096. wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
  1097. #define LUT_ANT_SWITCH_OP(lut, op, val) \
  1098. lut[(val) >> 4] op (cpu_to_le32(BIT((((val) << 1) & 0x1e) + 1)))
  1099. #define LUT_TEST_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1100. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1101. (!!(LUT_ANT_SWITCH_OP(lut, &, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1102. wifi_req, wifi_prio, wifi_txrx, \
  1103. wifi_sh_ant_req))))
  1104. #define LUT_SET_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1105. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1106. LUT_ANT_SWITCH_OP(lut, |=, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1107. wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
  1108. #define LUT_CLEAR_ANT_SWITCH(lut, bt3_prio, bt3_txrx, bt_rf_act, wifi_req, \
  1109. wifi_prio, wifi_txrx, wifi_sh_ant_req) \
  1110. LUT_ANT_SWITCH_OP(lut, &= ~, LUT_VALUE(bt3_prio, bt3_txrx, bt_rf_act, \
  1111. wifi_req, wifi_prio, wifi_txrx, wifi_sh_ant_req))
  1112. static const __le32 iwlagn_def_3w_lookup[12] = {
  1113. cpu_to_le32(0xaaaaaaaa),
  1114. cpu_to_le32(0xaaaaaaaa),
  1115. cpu_to_le32(0xaeaaaaaa),
  1116. cpu_to_le32(0xaaaaaaaa),
  1117. cpu_to_le32(0xcc00ff28),
  1118. cpu_to_le32(0x0000aaaa),
  1119. cpu_to_le32(0xcc00aaaa),
  1120. cpu_to_le32(0x0000aaaa),
  1121. cpu_to_le32(0xc0004000),
  1122. cpu_to_le32(0x00004000),
  1123. cpu_to_le32(0xf0005000),
  1124. cpu_to_le32(0xf0005000),
  1125. };
  1126. static const __le32 iwlagn_concurrent_lookup[12] = {
  1127. cpu_to_le32(0xaaaaaaaa),
  1128. cpu_to_le32(0xaaaaaaaa),
  1129. cpu_to_le32(0xaaaaaaaa),
  1130. cpu_to_le32(0xaaaaaaaa),
  1131. cpu_to_le32(0xaaaaaaaa),
  1132. cpu_to_le32(0xaaaaaaaa),
  1133. cpu_to_le32(0xaaaaaaaa),
  1134. cpu_to_le32(0xaaaaaaaa),
  1135. cpu_to_le32(0x00000000),
  1136. cpu_to_le32(0x00000000),
  1137. cpu_to_le32(0x00000000),
  1138. cpu_to_le32(0x00000000),
  1139. };
  1140. void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
  1141. {
  1142. struct iwl_basic_bt_cmd basic = {
  1143. .max_kill = IWLAGN_BT_MAX_KILL_DEFAULT,
  1144. .bt3_timer_t7_value = IWLAGN_BT3_T7_DEFAULT,
  1145. .bt3_prio_sample_time = IWLAGN_BT3_PRIO_SAMPLE_DEFAULT,
  1146. .bt3_timer_t2_value = IWLAGN_BT3_T2_DEFAULT,
  1147. };
  1148. struct iwl6000_bt_cmd bt_cmd_6000;
  1149. struct iwl2000_bt_cmd bt_cmd_2000;
  1150. int ret;
  1151. BUILD_BUG_ON(sizeof(iwlagn_def_3w_lookup) !=
  1152. sizeof(basic.bt3_lookup_table));
  1153. if (priv->cfg->bt_params) {
  1154. if (priv->cfg->bt_params->bt_session_2) {
  1155. bt_cmd_2000.prio_boost = cpu_to_le32(
  1156. priv->cfg->bt_params->bt_prio_boost);
  1157. bt_cmd_2000.tx_prio_boost = 0;
  1158. bt_cmd_2000.rx_prio_boost = 0;
  1159. } else {
  1160. bt_cmd_6000.prio_boost =
  1161. priv->cfg->bt_params->bt_prio_boost;
  1162. bt_cmd_6000.tx_prio_boost = 0;
  1163. bt_cmd_6000.rx_prio_boost = 0;
  1164. }
  1165. } else {
  1166. IWL_ERR(priv, "failed to construct BT Coex Config\n");
  1167. return;
  1168. }
  1169. basic.kill_ack_mask = priv->kill_ack_mask;
  1170. basic.kill_cts_mask = priv->kill_cts_mask;
  1171. basic.valid = priv->bt_valid;
  1172. /*
  1173. * Configure BT coex mode to "no coexistence" when the
  1174. * user disabled BT coexistence, we have no interface
  1175. * (might be in monitor mode), or the interface is in
  1176. * IBSS mode (no proper uCode support for coex then).
  1177. */
  1178. if (!iwlagn_mod_params.bt_coex_active ||
  1179. priv->iw_mode == NL80211_IFTYPE_ADHOC) {
  1180. basic.flags = IWLAGN_BT_FLAG_COEX_MODE_DISABLED;
  1181. } else {
  1182. basic.flags = IWLAGN_BT_FLAG_COEX_MODE_3W <<
  1183. IWLAGN_BT_FLAG_COEX_MODE_SHIFT;
  1184. if (!priv->bt_enable_pspoll)
  1185. basic.flags |= IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE;
  1186. else
  1187. basic.flags &= ~IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE;
  1188. if (priv->bt_ch_announce)
  1189. basic.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION;
  1190. IWL_DEBUG_COEX(priv, "BT coex flag: 0X%x\n", basic.flags);
  1191. }
  1192. priv->bt_enable_flag = basic.flags;
  1193. if (priv->bt_full_concurrent)
  1194. memcpy(basic.bt3_lookup_table, iwlagn_concurrent_lookup,
  1195. sizeof(iwlagn_concurrent_lookup));
  1196. else
  1197. memcpy(basic.bt3_lookup_table, iwlagn_def_3w_lookup,
  1198. sizeof(iwlagn_def_3w_lookup));
  1199. IWL_DEBUG_COEX(priv, "BT coex %s in %s mode\n",
  1200. basic.flags ? "active" : "disabled",
  1201. priv->bt_full_concurrent ?
  1202. "full concurrency" : "3-wire");
  1203. if (priv->cfg->bt_params->bt_session_2) {
  1204. memcpy(&bt_cmd_2000.basic, &basic,
  1205. sizeof(basic));
  1206. ret = iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
  1207. CMD_SYNC, sizeof(bt_cmd_2000), &bt_cmd_2000);
  1208. } else {
  1209. memcpy(&bt_cmd_6000.basic, &basic,
  1210. sizeof(basic));
  1211. ret = iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
  1212. CMD_SYNC, sizeof(bt_cmd_6000), &bt_cmd_6000);
  1213. }
  1214. if (ret)
  1215. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1216. }
  1217. void iwlagn_bt_adjust_rssi_monitor(struct iwl_priv *priv, bool rssi_ena)
  1218. {
  1219. struct iwl_rxon_context *ctx, *found_ctx = NULL;
  1220. bool found_ap = false;
  1221. lockdep_assert_held(&priv->shrd->mutex);
  1222. /* Check whether AP or GO mode is active. */
  1223. if (rssi_ena) {
  1224. for_each_context(priv, ctx) {
  1225. if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_AP &&
  1226. iwl_is_associated_ctx(ctx)) {
  1227. found_ap = true;
  1228. break;
  1229. }
  1230. }
  1231. }
  1232. /*
  1233. * If disable was received or If GO/AP mode, disable RSSI
  1234. * measurements.
  1235. */
  1236. if (!rssi_ena || found_ap) {
  1237. if (priv->cur_rssi_ctx) {
  1238. ctx = priv->cur_rssi_ctx;
  1239. ieee80211_disable_rssi_reports(ctx->vif);
  1240. priv->cur_rssi_ctx = NULL;
  1241. }
  1242. return;
  1243. }
  1244. /*
  1245. * If rssi measurements need to be enabled, consider all cases now.
  1246. * Figure out how many contexts are active.
  1247. */
  1248. for_each_context(priv, ctx) {
  1249. if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION &&
  1250. iwl_is_associated_ctx(ctx)) {
  1251. found_ctx = ctx;
  1252. break;
  1253. }
  1254. }
  1255. /*
  1256. * rssi monitor already enabled for the correct interface...nothing
  1257. * to do.
  1258. */
  1259. if (found_ctx == priv->cur_rssi_ctx)
  1260. return;
  1261. /*
  1262. * Figure out if rssi monitor is currently enabled, and needs
  1263. * to be changed. If rssi monitor is already enabled, disable
  1264. * it first else just enable rssi measurements on the
  1265. * interface found above.
  1266. */
  1267. if (priv->cur_rssi_ctx) {
  1268. ctx = priv->cur_rssi_ctx;
  1269. if (ctx->vif)
  1270. ieee80211_disable_rssi_reports(ctx->vif);
  1271. }
  1272. priv->cur_rssi_ctx = found_ctx;
  1273. if (!found_ctx)
  1274. return;
  1275. ieee80211_enable_rssi_reports(found_ctx->vif,
  1276. IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD,
  1277. IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD);
  1278. }
  1279. static bool iwlagn_bt_traffic_is_sco(struct iwl_bt_uart_msg *uart_msg)
  1280. {
  1281. return BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3 >>
  1282. BT_UART_MSG_FRAME3SCOESCO_POS;
  1283. }
  1284. static void iwlagn_bt_traffic_change_work(struct work_struct *work)
  1285. {
  1286. struct iwl_priv *priv =
  1287. container_of(work, struct iwl_priv, bt_traffic_change_work);
  1288. struct iwl_rxon_context *ctx;
  1289. int smps_request = -1;
  1290. if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
  1291. /* bt coex disabled */
  1292. return;
  1293. }
  1294. /*
  1295. * Note: bt_traffic_load can be overridden by scan complete and
  1296. * coex profile notifications. Ignore that since only bad consequence
  1297. * can be not matching debug print with actual state.
  1298. */
  1299. IWL_DEBUG_COEX(priv, "BT traffic load changes: %d\n",
  1300. priv->bt_traffic_load);
  1301. switch (priv->bt_traffic_load) {
  1302. case IWL_BT_COEX_TRAFFIC_LOAD_NONE:
  1303. if (priv->bt_status)
  1304. smps_request = IEEE80211_SMPS_DYNAMIC;
  1305. else
  1306. smps_request = IEEE80211_SMPS_AUTOMATIC;
  1307. break;
  1308. case IWL_BT_COEX_TRAFFIC_LOAD_LOW:
  1309. smps_request = IEEE80211_SMPS_DYNAMIC;
  1310. break;
  1311. case IWL_BT_COEX_TRAFFIC_LOAD_HIGH:
  1312. case IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS:
  1313. smps_request = IEEE80211_SMPS_STATIC;
  1314. break;
  1315. default:
  1316. IWL_ERR(priv, "Invalid BT traffic load: %d\n",
  1317. priv->bt_traffic_load);
  1318. break;
  1319. }
  1320. mutex_lock(&priv->shrd->mutex);
  1321. /*
  1322. * We can not send command to firmware while scanning. When the scan
  1323. * complete we will schedule this work again. We do check with mutex
  1324. * locked to prevent new scan request to arrive. We do not check
  1325. * STATUS_SCANNING to avoid race when queue_work two times from
  1326. * different notifications, but quit and not perform any work at all.
  1327. */
  1328. if (test_bit(STATUS_SCAN_HW, &priv->shrd->status))
  1329. goto out;
  1330. iwl_update_chain_flags(priv);
  1331. if (smps_request != -1) {
  1332. priv->current_ht_config.smps = smps_request;
  1333. for_each_context(priv, ctx) {
  1334. if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION)
  1335. ieee80211_request_smps(ctx->vif, smps_request);
  1336. }
  1337. }
  1338. /*
  1339. * Dynamic PS poll related functionality. Adjust RSSI measurements if
  1340. * necessary.
  1341. */
  1342. iwlagn_bt_coex_rssi_monitor(priv);
  1343. out:
  1344. mutex_unlock(&priv->shrd->mutex);
  1345. }
  1346. /*
  1347. * If BT sco traffic, and RSSI monitor is enabled, move measurements to the
  1348. * correct interface or disable it if this is the last interface to be
  1349. * removed.
  1350. */
  1351. void iwlagn_bt_coex_rssi_monitor(struct iwl_priv *priv)
  1352. {
  1353. if (priv->bt_is_sco &&
  1354. priv->bt_traffic_load == IWL_BT_COEX_TRAFFIC_LOAD_CONTINUOUS)
  1355. iwlagn_bt_adjust_rssi_monitor(priv, true);
  1356. else
  1357. iwlagn_bt_adjust_rssi_monitor(priv, false);
  1358. }
  1359. static void iwlagn_print_uartmsg(struct iwl_priv *priv,
  1360. struct iwl_bt_uart_msg *uart_msg)
  1361. {
  1362. IWL_DEBUG_COEX(priv, "Message Type = 0x%X, SSN = 0x%X, "
  1363. "Update Req = 0x%X",
  1364. (BT_UART_MSG_FRAME1MSGTYPE_MSK & uart_msg->frame1) >>
  1365. BT_UART_MSG_FRAME1MSGTYPE_POS,
  1366. (BT_UART_MSG_FRAME1SSN_MSK & uart_msg->frame1) >>
  1367. BT_UART_MSG_FRAME1SSN_POS,
  1368. (BT_UART_MSG_FRAME1UPDATEREQ_MSK & uart_msg->frame1) >>
  1369. BT_UART_MSG_FRAME1UPDATEREQ_POS);
  1370. IWL_DEBUG_COEX(priv, "Open connections = 0x%X, Traffic load = 0x%X, "
  1371. "Chl_SeqN = 0x%X, In band = 0x%X",
  1372. (BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK & uart_msg->frame2) >>
  1373. BT_UART_MSG_FRAME2OPENCONNECTIONS_POS,
  1374. (BT_UART_MSG_FRAME2TRAFFICLOAD_MSK & uart_msg->frame2) >>
  1375. BT_UART_MSG_FRAME2TRAFFICLOAD_POS,
  1376. (BT_UART_MSG_FRAME2CHLSEQN_MSK & uart_msg->frame2) >>
  1377. BT_UART_MSG_FRAME2CHLSEQN_POS,
  1378. (BT_UART_MSG_FRAME2INBAND_MSK & uart_msg->frame2) >>
  1379. BT_UART_MSG_FRAME2INBAND_POS);
  1380. IWL_DEBUG_COEX(priv, "SCO/eSCO = 0x%X, Sniff = 0x%X, A2DP = 0x%X, "
  1381. "ACL = 0x%X, Master = 0x%X, OBEX = 0x%X",
  1382. (BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3) >>
  1383. BT_UART_MSG_FRAME3SCOESCO_POS,
  1384. (BT_UART_MSG_FRAME3SNIFF_MSK & uart_msg->frame3) >>
  1385. BT_UART_MSG_FRAME3SNIFF_POS,
  1386. (BT_UART_MSG_FRAME3A2DP_MSK & uart_msg->frame3) >>
  1387. BT_UART_MSG_FRAME3A2DP_POS,
  1388. (BT_UART_MSG_FRAME3ACL_MSK & uart_msg->frame3) >>
  1389. BT_UART_MSG_FRAME3ACL_POS,
  1390. (BT_UART_MSG_FRAME3MASTER_MSK & uart_msg->frame3) >>
  1391. BT_UART_MSG_FRAME3MASTER_POS,
  1392. (BT_UART_MSG_FRAME3OBEX_MSK & uart_msg->frame3) >>
  1393. BT_UART_MSG_FRAME3OBEX_POS);
  1394. IWL_DEBUG_COEX(priv, "Idle duration = 0x%X",
  1395. (BT_UART_MSG_FRAME4IDLEDURATION_MSK & uart_msg->frame4) >>
  1396. BT_UART_MSG_FRAME4IDLEDURATION_POS);
  1397. IWL_DEBUG_COEX(priv, "Tx Activity = 0x%X, Rx Activity = 0x%X, "
  1398. "eSCO Retransmissions = 0x%X",
  1399. (BT_UART_MSG_FRAME5TXACTIVITY_MSK & uart_msg->frame5) >>
  1400. BT_UART_MSG_FRAME5TXACTIVITY_POS,
  1401. (BT_UART_MSG_FRAME5RXACTIVITY_MSK & uart_msg->frame5) >>
  1402. BT_UART_MSG_FRAME5RXACTIVITY_POS,
  1403. (BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK & uart_msg->frame5) >>
  1404. BT_UART_MSG_FRAME5ESCORETRANSMIT_POS);
  1405. IWL_DEBUG_COEX(priv, "Sniff Interval = 0x%X, Discoverable = 0x%X",
  1406. (BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK & uart_msg->frame6) >>
  1407. BT_UART_MSG_FRAME6SNIFFINTERVAL_POS,
  1408. (BT_UART_MSG_FRAME6DISCOVERABLE_MSK & uart_msg->frame6) >>
  1409. BT_UART_MSG_FRAME6DISCOVERABLE_POS);
  1410. IWL_DEBUG_COEX(priv, "Sniff Activity = 0x%X, Page = "
  1411. "0x%X, Inquiry = 0x%X, Connectable = 0x%X",
  1412. (BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK & uart_msg->frame7) >>
  1413. BT_UART_MSG_FRAME7SNIFFACTIVITY_POS,
  1414. (BT_UART_MSG_FRAME7PAGE_MSK & uart_msg->frame7) >>
  1415. BT_UART_MSG_FRAME7PAGE_POS,
  1416. (BT_UART_MSG_FRAME7INQUIRY_MSK & uart_msg->frame7) >>
  1417. BT_UART_MSG_FRAME7INQUIRY_POS,
  1418. (BT_UART_MSG_FRAME7CONNECTABLE_MSK & uart_msg->frame7) >>
  1419. BT_UART_MSG_FRAME7CONNECTABLE_POS);
  1420. }
  1421. static void iwlagn_set_kill_msk(struct iwl_priv *priv,
  1422. struct iwl_bt_uart_msg *uart_msg)
  1423. {
  1424. u8 kill_msk;
  1425. static const __le32 bt_kill_ack_msg[2] = {
  1426. IWLAGN_BT_KILL_ACK_MASK_DEFAULT,
  1427. IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };
  1428. static const __le32 bt_kill_cts_msg[2] = {
  1429. IWLAGN_BT_KILL_CTS_MASK_DEFAULT,
  1430. IWLAGN_BT_KILL_ACK_CTS_MASK_SCO };
  1431. kill_msk = (BT_UART_MSG_FRAME3SCOESCO_MSK & uart_msg->frame3)
  1432. ? 1 : 0;
  1433. if (priv->kill_ack_mask != bt_kill_ack_msg[kill_msk] ||
  1434. priv->kill_cts_mask != bt_kill_cts_msg[kill_msk]) {
  1435. priv->bt_valid |= IWLAGN_BT_VALID_KILL_ACK_MASK;
  1436. priv->kill_ack_mask = bt_kill_ack_msg[kill_msk];
  1437. priv->bt_valid |= IWLAGN_BT_VALID_KILL_CTS_MASK;
  1438. priv->kill_cts_mask = bt_kill_cts_msg[kill_msk];
  1439. /* schedule to send runtime bt_config */
  1440. queue_work(priv->shrd->workqueue, &priv->bt_runtime_config);
  1441. }
  1442. }
  1443. void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
  1444. struct iwl_rx_mem_buffer *rxb)
  1445. {
  1446. unsigned long flags;
  1447. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1448. struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif;
  1449. struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg;
  1450. if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
  1451. /* bt coex disabled */
  1452. return;
  1453. }
  1454. IWL_DEBUG_COEX(priv, "BT Coex notification:\n");
  1455. IWL_DEBUG_COEX(priv, " status: %d\n", coex->bt_status);
  1456. IWL_DEBUG_COEX(priv, " traffic load: %d\n", coex->bt_traffic_load);
  1457. IWL_DEBUG_COEX(priv, " CI compliance: %d\n",
  1458. coex->bt_ci_compliance);
  1459. iwlagn_print_uartmsg(priv, uart_msg);
  1460. priv->last_bt_traffic_load = priv->bt_traffic_load;
  1461. priv->bt_is_sco = iwlagn_bt_traffic_is_sco(uart_msg);
  1462. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  1463. if (priv->bt_status != coex->bt_status ||
  1464. priv->last_bt_traffic_load != coex->bt_traffic_load) {
  1465. if (coex->bt_status) {
  1466. /* BT on */
  1467. if (!priv->bt_ch_announce)
  1468. priv->bt_traffic_load =
  1469. IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
  1470. else
  1471. priv->bt_traffic_load =
  1472. coex->bt_traffic_load;
  1473. } else {
  1474. /* BT off */
  1475. priv->bt_traffic_load =
  1476. IWL_BT_COEX_TRAFFIC_LOAD_NONE;
  1477. }
  1478. priv->bt_status = coex->bt_status;
  1479. queue_work(priv->shrd->workqueue,
  1480. &priv->bt_traffic_change_work);
  1481. }
  1482. }
  1483. iwlagn_set_kill_msk(priv, uart_msg);
  1484. /* FIXME: based on notification, adjust the prio_boost */
  1485. spin_lock_irqsave(&priv->shrd->lock, flags);
  1486. priv->bt_ci_compliance = coex->bt_ci_compliance;
  1487. spin_unlock_irqrestore(&priv->shrd->lock, flags);
  1488. }
  1489. void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv)
  1490. {
  1491. priv->rx_handlers[REPLY_BT_COEX_PROFILE_NOTIF] =
  1492. iwlagn_bt_coex_profile_notif;
  1493. }
  1494. void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv)
  1495. {
  1496. INIT_WORK(&priv->bt_traffic_change_work,
  1497. iwlagn_bt_traffic_change_work);
  1498. }
  1499. void iwlagn_bt_cancel_deferred_work(struct iwl_priv *priv)
  1500. {
  1501. cancel_work_sync(&priv->bt_traffic_change_work);
  1502. }
  1503. static bool is_single_rx_stream(struct iwl_priv *priv)
  1504. {
  1505. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  1506. priv->current_ht_config.single_chain_sufficient;
  1507. }
  1508. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  1509. #define IWL_NUM_RX_CHAINS_SINGLE 2
  1510. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  1511. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  1512. /*
  1513. * Determine how many receiver/antenna chains to use.
  1514. *
  1515. * More provides better reception via diversity. Fewer saves power
  1516. * at the expense of throughput, but only when not in powersave to
  1517. * start with.
  1518. *
  1519. * MIMO (dual stream) requires at least 2, but works better with 3.
  1520. * This does not determine *which* chains to use, just how many.
  1521. */
  1522. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  1523. {
  1524. if (priv->cfg->bt_params &&
  1525. priv->cfg->bt_params->advanced_bt_coexist &&
  1526. (priv->bt_full_concurrent ||
  1527. priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
  1528. /*
  1529. * only use chain 'A' in bt high traffic load or
  1530. * full concurrency mode
  1531. */
  1532. return IWL_NUM_RX_CHAINS_SINGLE;
  1533. }
  1534. /* # of Rx chains to use when expecting MIMO. */
  1535. if (is_single_rx_stream(priv))
  1536. return IWL_NUM_RX_CHAINS_SINGLE;
  1537. else
  1538. return IWL_NUM_RX_CHAINS_MULTIPLE;
  1539. }
  1540. /*
  1541. * When we are in power saving mode, unless device support spatial
  1542. * multiplexing power save, use the active count for rx chain count.
  1543. */
  1544. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  1545. {
  1546. /* # Rx chains when idling, depending on SMPS mode */
  1547. switch (priv->current_ht_config.smps) {
  1548. case IEEE80211_SMPS_STATIC:
  1549. case IEEE80211_SMPS_DYNAMIC:
  1550. return IWL_NUM_IDLE_CHAINS_SINGLE;
  1551. case IEEE80211_SMPS_OFF:
  1552. return active_cnt;
  1553. default:
  1554. WARN(1, "invalid SMPS mode %d",
  1555. priv->current_ht_config.smps);
  1556. return active_cnt;
  1557. }
  1558. }
  1559. /* up to 4 chains */
  1560. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  1561. {
  1562. u8 res;
  1563. res = (chain_bitmap & BIT(0)) >> 0;
  1564. res += (chain_bitmap & BIT(1)) >> 1;
  1565. res += (chain_bitmap & BIT(2)) >> 2;
  1566. res += (chain_bitmap & BIT(3)) >> 3;
  1567. return res;
  1568. }
  1569. /**
  1570. * iwlagn_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  1571. *
  1572. * Selects how many and which Rx receivers/antennas/chains to use.
  1573. * This should not be used for scan command ... it puts data in wrong place.
  1574. */
  1575. void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  1576. {
  1577. bool is_single = is_single_rx_stream(priv);
  1578. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->shrd->status);
  1579. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  1580. u32 active_chains;
  1581. u16 rx_chain;
  1582. /* Tell uCode which antennas are actually connected.
  1583. * Before first association, we assume all antennas are connected.
  1584. * Just after first association, iwl_chain_noise_calibration()
  1585. * checks which antennas actually *are* connected. */
  1586. if (priv->chain_noise_data.active_chains)
  1587. active_chains = priv->chain_noise_data.active_chains;
  1588. else
  1589. active_chains = hw_params(priv).valid_rx_ant;
  1590. if (priv->cfg->bt_params &&
  1591. priv->cfg->bt_params->advanced_bt_coexist &&
  1592. (priv->bt_full_concurrent ||
  1593. priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
  1594. /*
  1595. * only use chain 'A' in bt high traffic load or
  1596. * full concurrency mode
  1597. */
  1598. active_chains = first_antenna(active_chains);
  1599. }
  1600. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  1601. /* How many receivers should we use? */
  1602. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  1603. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  1604. /* correct rx chain count according hw settings
  1605. * and chain noise calibration
  1606. */
  1607. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  1608. if (valid_rx_cnt < active_rx_cnt)
  1609. active_rx_cnt = valid_rx_cnt;
  1610. if (valid_rx_cnt < idle_rx_cnt)
  1611. idle_rx_cnt = valid_rx_cnt;
  1612. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  1613. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  1614. ctx->staging.rx_chain = cpu_to_le16(rx_chain);
  1615. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  1616. ctx->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  1617. else
  1618. ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  1619. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  1620. ctx->staging.rx_chain,
  1621. active_rx_cnt, idle_rx_cnt);
  1622. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  1623. active_rx_cnt < idle_rx_cnt);
  1624. }
  1625. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
  1626. {
  1627. int i;
  1628. u8 ind = ant;
  1629. if (priv->band == IEEE80211_BAND_2GHZ &&
  1630. priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
  1631. return 0;
  1632. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  1633. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  1634. if (valid & BIT(ind))
  1635. return ind;
  1636. }
  1637. return ant;
  1638. }
  1639. static const char *get_csr_string(int cmd)
  1640. {
  1641. switch (cmd) {
  1642. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  1643. IWL_CMD(CSR_INT_COALESCING);
  1644. IWL_CMD(CSR_INT);
  1645. IWL_CMD(CSR_INT_MASK);
  1646. IWL_CMD(CSR_FH_INT_STATUS);
  1647. IWL_CMD(CSR_GPIO_IN);
  1648. IWL_CMD(CSR_RESET);
  1649. IWL_CMD(CSR_GP_CNTRL);
  1650. IWL_CMD(CSR_HW_REV);
  1651. IWL_CMD(CSR_EEPROM_REG);
  1652. IWL_CMD(CSR_EEPROM_GP);
  1653. IWL_CMD(CSR_OTP_GP_REG);
  1654. IWL_CMD(CSR_GIO_REG);
  1655. IWL_CMD(CSR_GP_UCODE_REG);
  1656. IWL_CMD(CSR_GP_DRIVER_REG);
  1657. IWL_CMD(CSR_UCODE_DRV_GP1);
  1658. IWL_CMD(CSR_UCODE_DRV_GP2);
  1659. IWL_CMD(CSR_LED_REG);
  1660. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  1661. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  1662. IWL_CMD(CSR_ANA_PLL_CFG);
  1663. IWL_CMD(CSR_HW_REV_WA_REG);
  1664. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  1665. default:
  1666. return "UNKNOWN";
  1667. }
  1668. }
  1669. void iwl_dump_csr(struct iwl_priv *priv)
  1670. {
  1671. int i;
  1672. static const u32 csr_tbl[] = {
  1673. CSR_HW_IF_CONFIG_REG,
  1674. CSR_INT_COALESCING,
  1675. CSR_INT,
  1676. CSR_INT_MASK,
  1677. CSR_FH_INT_STATUS,
  1678. CSR_GPIO_IN,
  1679. CSR_RESET,
  1680. CSR_GP_CNTRL,
  1681. CSR_HW_REV,
  1682. CSR_EEPROM_REG,
  1683. CSR_EEPROM_GP,
  1684. CSR_OTP_GP_REG,
  1685. CSR_GIO_REG,
  1686. CSR_GP_UCODE_REG,
  1687. CSR_GP_DRIVER_REG,
  1688. CSR_UCODE_DRV_GP1,
  1689. CSR_UCODE_DRV_GP2,
  1690. CSR_LED_REG,
  1691. CSR_DRAM_INT_TBL_REG,
  1692. CSR_GIO_CHICKEN_BITS,
  1693. CSR_ANA_PLL_CFG,
  1694. CSR_HW_REV_WA_REG,
  1695. CSR_DBG_HPET_MEM_REG
  1696. };
  1697. IWL_ERR(priv, "CSR values:\n");
  1698. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  1699. "CSR_INT_PERIODIC_REG)\n");
  1700. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  1701. IWL_ERR(priv, " %25s: 0X%08x\n",
  1702. get_csr_string(csr_tbl[i]),
  1703. iwl_read32(priv, csr_tbl[i]));
  1704. }
  1705. }
  1706. static const char *get_fh_string(int cmd)
  1707. {
  1708. switch (cmd) {
  1709. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  1710. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  1711. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  1712. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  1713. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  1714. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  1715. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  1716. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  1717. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  1718. default:
  1719. return "UNKNOWN";
  1720. }
  1721. }
  1722. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  1723. {
  1724. int i;
  1725. #ifdef CONFIG_IWLWIFI_DEBUG
  1726. int pos = 0;
  1727. size_t bufsz = 0;
  1728. #endif
  1729. static const u32 fh_tbl[] = {
  1730. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  1731. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  1732. FH_RSCSR_CHNL0_WPTR,
  1733. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  1734. FH_MEM_RSSR_SHARED_CTRL_REG,
  1735. FH_MEM_RSSR_RX_STATUS_REG,
  1736. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  1737. FH_TSSR_TX_STATUS_REG,
  1738. FH_TSSR_TX_ERROR_REG
  1739. };
  1740. #ifdef CONFIG_IWLWIFI_DEBUG
  1741. if (display) {
  1742. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  1743. *buf = kmalloc(bufsz, GFP_KERNEL);
  1744. if (!*buf)
  1745. return -ENOMEM;
  1746. pos += scnprintf(*buf + pos, bufsz - pos,
  1747. "FH register values:\n");
  1748. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  1749. pos += scnprintf(*buf + pos, bufsz - pos,
  1750. " %34s: 0X%08x\n",
  1751. get_fh_string(fh_tbl[i]),
  1752. iwl_read_direct32(priv, fh_tbl[i]));
  1753. }
  1754. return pos;
  1755. }
  1756. #endif
  1757. IWL_ERR(priv, "FH register values:\n");
  1758. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  1759. IWL_ERR(priv, " %34s: 0X%08x\n",
  1760. get_fh_string(fh_tbl[i]),
  1761. iwl_read_direct32(priv, fh_tbl[i]));
  1762. }
  1763. return 0;
  1764. }
  1765. /* notification wait support */
  1766. void iwlagn_init_notification_wait(struct iwl_priv *priv,
  1767. struct iwl_notification_wait *wait_entry,
  1768. u8 cmd,
  1769. void (*fn)(struct iwl_priv *priv,
  1770. struct iwl_rx_packet *pkt,
  1771. void *data),
  1772. void *fn_data)
  1773. {
  1774. wait_entry->fn = fn;
  1775. wait_entry->fn_data = fn_data;
  1776. wait_entry->cmd = cmd;
  1777. wait_entry->triggered = false;
  1778. wait_entry->aborted = false;
  1779. spin_lock_bh(&priv->notif_wait_lock);
  1780. list_add(&wait_entry->list, &priv->notif_waits);
  1781. spin_unlock_bh(&priv->notif_wait_lock);
  1782. }
  1783. int iwlagn_wait_notification(struct iwl_priv *priv,
  1784. struct iwl_notification_wait *wait_entry,
  1785. unsigned long timeout)
  1786. {
  1787. int ret;
  1788. ret = wait_event_timeout(priv->notif_waitq,
  1789. wait_entry->triggered || wait_entry->aborted,
  1790. timeout);
  1791. spin_lock_bh(&priv->notif_wait_lock);
  1792. list_del(&wait_entry->list);
  1793. spin_unlock_bh(&priv->notif_wait_lock);
  1794. if (wait_entry->aborted)
  1795. return -EIO;
  1796. /* return value is always >= 0 */
  1797. if (ret <= 0)
  1798. return -ETIMEDOUT;
  1799. return 0;
  1800. }
  1801. void iwlagn_remove_notification(struct iwl_priv *priv,
  1802. struct iwl_notification_wait *wait_entry)
  1803. {
  1804. spin_lock_bh(&priv->notif_wait_lock);
  1805. list_del(&wait_entry->list);
  1806. spin_unlock_bh(&priv->notif_wait_lock);
  1807. }