hpsa.c 144 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d},
  104. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  105. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  106. {0,}
  107. };
  108. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  109. /* board_id = Subsystem Device ID & Vendor ID
  110. * product = Marketing Name for the board
  111. * access = Address of the struct of function pointers
  112. */
  113. static struct board_type products[] = {
  114. {0x3241103C, "Smart Array P212", &SA5_access},
  115. {0x3243103C, "Smart Array P410", &SA5_access},
  116. {0x3245103C, "Smart Array P410i", &SA5_access},
  117. {0x3247103C, "Smart Array P411", &SA5_access},
  118. {0x3249103C, "Smart Array P812", &SA5_access},
  119. {0x324a103C, "Smart Array P712m", &SA5_access},
  120. {0x324b103C, "Smart Array P711m", &SA5_access},
  121. {0x3350103C, "Smart Array P222", &SA5_access},
  122. {0x3351103C, "Smart Array P420", &SA5_access},
  123. {0x3352103C, "Smart Array P421", &SA5_access},
  124. {0x3353103C, "Smart Array P822", &SA5_access},
  125. {0x3354103C, "Smart Array P420i", &SA5_access},
  126. {0x3355103C, "Smart Array P220i", &SA5_access},
  127. {0x3356103C, "Smart Array P721m", &SA5_access},
  128. {0x1920103C, "Smart Array", &SA5_access},
  129. {0x1921103C, "Smart Array", &SA5_access},
  130. {0x1922103C, "Smart Array", &SA5_access},
  131. {0x1923103C, "Smart Array", &SA5_access},
  132. {0x1924103C, "Smart Array", &SA5_access},
  133. {0x1925103C, "Smart Array", &SA5_access},
  134. {0x1926103C, "Smart Array", &SA5_access},
  135. {0x1928103C, "Smart Array", &SA5_access},
  136. {0x334d103C, "Smart Array P822se", &SA5_access},
  137. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  138. };
  139. static int number_of_controllers;
  140. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  141. static spinlock_t lockup_detector_lock;
  142. static struct task_struct *hpsa_lockup_detector;
  143. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  144. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  145. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  146. static void start_io(struct ctlr_info *h);
  147. #ifdef CONFIG_COMPAT
  148. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  149. #endif
  150. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  151. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  152. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  153. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  154. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  155. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  156. int cmd_type);
  157. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  158. static void hpsa_scan_start(struct Scsi_Host *);
  159. static int hpsa_scan_finished(struct Scsi_Host *sh,
  160. unsigned long elapsed_time);
  161. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  162. int qdepth, int reason);
  163. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  164. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  165. static int hpsa_slave_alloc(struct scsi_device *sdev);
  166. static void hpsa_slave_destroy(struct scsi_device *sdev);
  167. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  168. static int check_for_unit_attention(struct ctlr_info *h,
  169. struct CommandList *c);
  170. static void check_ioctl_unit_attention(struct ctlr_info *h,
  171. struct CommandList *c);
  172. /* performant mode helper functions */
  173. static void calc_bucket_map(int *bucket, int num_buckets,
  174. int nsgs, int *bucket_map);
  175. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  176. static inline u32 next_command(struct ctlr_info *h, u8 q);
  177. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  178. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  179. u64 *cfg_offset);
  180. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  181. unsigned long *memory_bar);
  182. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  183. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  184. void __iomem *vaddr, int wait_for_ready);
  185. static inline void finish_cmd(struct CommandList *c);
  186. #define BOARD_NOT_READY 0
  187. #define BOARD_READY 1
  188. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  189. {
  190. unsigned long *priv = shost_priv(sdev->host);
  191. return (struct ctlr_info *) *priv;
  192. }
  193. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  194. {
  195. unsigned long *priv = shost_priv(sh);
  196. return (struct ctlr_info *) *priv;
  197. }
  198. static int check_for_unit_attention(struct ctlr_info *h,
  199. struct CommandList *c)
  200. {
  201. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  202. return 0;
  203. switch (c->err_info->SenseInfo[12]) {
  204. case STATE_CHANGED:
  205. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  206. "detected, command retried\n", h->ctlr);
  207. break;
  208. case LUN_FAILED:
  209. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  210. "detected, action required\n", h->ctlr);
  211. break;
  212. case REPORT_LUNS_CHANGED:
  213. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  214. "changed, action required\n", h->ctlr);
  215. /*
  216. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  217. * target (array) devices.
  218. */
  219. break;
  220. case POWER_OR_RESET:
  221. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  222. "or device reset detected\n", h->ctlr);
  223. break;
  224. case UNIT_ATTENTION_CLEARED:
  225. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  226. "cleared by another initiator\n", h->ctlr);
  227. break;
  228. default:
  229. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  230. "unit attention detected\n", h->ctlr);
  231. break;
  232. }
  233. return 1;
  234. }
  235. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  236. {
  237. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  238. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  239. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  240. return 0;
  241. dev_warn(&h->pdev->dev, HPSA "device busy");
  242. return 1;
  243. }
  244. static ssize_t host_store_rescan(struct device *dev,
  245. struct device_attribute *attr,
  246. const char *buf, size_t count)
  247. {
  248. struct ctlr_info *h;
  249. struct Scsi_Host *shost = class_to_shost(dev);
  250. h = shost_to_hba(shost);
  251. hpsa_scan_start(h->scsi_host);
  252. return count;
  253. }
  254. static ssize_t host_show_firmware_revision(struct device *dev,
  255. struct device_attribute *attr, char *buf)
  256. {
  257. struct ctlr_info *h;
  258. struct Scsi_Host *shost = class_to_shost(dev);
  259. unsigned char *fwrev;
  260. h = shost_to_hba(shost);
  261. if (!h->hba_inquiry_data)
  262. return 0;
  263. fwrev = &h->hba_inquiry_data[32];
  264. return snprintf(buf, 20, "%c%c%c%c\n",
  265. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  266. }
  267. static ssize_t host_show_commands_outstanding(struct device *dev,
  268. struct device_attribute *attr, char *buf)
  269. {
  270. struct Scsi_Host *shost = class_to_shost(dev);
  271. struct ctlr_info *h = shost_to_hba(shost);
  272. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  273. }
  274. static ssize_t host_show_transport_mode(struct device *dev,
  275. struct device_attribute *attr, char *buf)
  276. {
  277. struct ctlr_info *h;
  278. struct Scsi_Host *shost = class_to_shost(dev);
  279. h = shost_to_hba(shost);
  280. return snprintf(buf, 20, "%s\n",
  281. h->transMethod & CFGTBL_Trans_Performant ?
  282. "performant" : "simple");
  283. }
  284. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  285. static u32 unresettable_controller[] = {
  286. 0x324a103C, /* Smart Array P712m */
  287. 0x324b103C, /* SmartArray P711m */
  288. 0x3223103C, /* Smart Array P800 */
  289. 0x3234103C, /* Smart Array P400 */
  290. 0x3235103C, /* Smart Array P400i */
  291. 0x3211103C, /* Smart Array E200i */
  292. 0x3212103C, /* Smart Array E200 */
  293. 0x3213103C, /* Smart Array E200i */
  294. 0x3214103C, /* Smart Array E200i */
  295. 0x3215103C, /* Smart Array E200i */
  296. 0x3237103C, /* Smart Array E500 */
  297. 0x323D103C, /* Smart Array P700m */
  298. 0x40800E11, /* Smart Array 5i */
  299. 0x409C0E11, /* Smart Array 6400 */
  300. 0x409D0E11, /* Smart Array 6400 EM */
  301. 0x40700E11, /* Smart Array 5300 */
  302. 0x40820E11, /* Smart Array 532 */
  303. 0x40830E11, /* Smart Array 5312 */
  304. 0x409A0E11, /* Smart Array 641 */
  305. 0x409B0E11, /* Smart Array 642 */
  306. 0x40910E11, /* Smart Array 6i */
  307. };
  308. /* List of controllers which cannot even be soft reset */
  309. static u32 soft_unresettable_controller[] = {
  310. 0x40800E11, /* Smart Array 5i */
  311. 0x40700E11, /* Smart Array 5300 */
  312. 0x40820E11, /* Smart Array 532 */
  313. 0x40830E11, /* Smart Array 5312 */
  314. 0x409A0E11, /* Smart Array 641 */
  315. 0x409B0E11, /* Smart Array 642 */
  316. 0x40910E11, /* Smart Array 6i */
  317. /* Exclude 640x boards. These are two pci devices in one slot
  318. * which share a battery backed cache module. One controls the
  319. * cache, the other accesses the cache through the one that controls
  320. * it. If we reset the one controlling the cache, the other will
  321. * likely not be happy. Just forbid resetting this conjoined mess.
  322. * The 640x isn't really supported by hpsa anyway.
  323. */
  324. 0x409C0E11, /* Smart Array 6400 */
  325. 0x409D0E11, /* Smart Array 6400 EM */
  326. };
  327. static int ctlr_is_hard_resettable(u32 board_id)
  328. {
  329. int i;
  330. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  331. if (unresettable_controller[i] == board_id)
  332. return 0;
  333. return 1;
  334. }
  335. static int ctlr_is_soft_resettable(u32 board_id)
  336. {
  337. int i;
  338. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  339. if (soft_unresettable_controller[i] == board_id)
  340. return 0;
  341. return 1;
  342. }
  343. static int ctlr_is_resettable(u32 board_id)
  344. {
  345. return ctlr_is_hard_resettable(board_id) ||
  346. ctlr_is_soft_resettable(board_id);
  347. }
  348. static ssize_t host_show_resettable(struct device *dev,
  349. struct device_attribute *attr, char *buf)
  350. {
  351. struct ctlr_info *h;
  352. struct Scsi_Host *shost = class_to_shost(dev);
  353. h = shost_to_hba(shost);
  354. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  355. }
  356. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  357. {
  358. return (scsi3addr[3] & 0xC0) == 0x40;
  359. }
  360. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  361. "1(ADM)", "UNKNOWN"
  362. };
  363. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  364. static ssize_t raid_level_show(struct device *dev,
  365. struct device_attribute *attr, char *buf)
  366. {
  367. ssize_t l = 0;
  368. unsigned char rlevel;
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. sdev = to_scsi_device(dev);
  374. h = sdev_to_hba(sdev);
  375. spin_lock_irqsave(&h->lock, flags);
  376. hdev = sdev->hostdata;
  377. if (!hdev) {
  378. spin_unlock_irqrestore(&h->lock, flags);
  379. return -ENODEV;
  380. }
  381. /* Is this even a logical drive? */
  382. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  385. return l;
  386. }
  387. rlevel = hdev->raid_level;
  388. spin_unlock_irqrestore(&h->lock, flags);
  389. if (rlevel > RAID_UNKNOWN)
  390. rlevel = RAID_UNKNOWN;
  391. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  392. return l;
  393. }
  394. static ssize_t lunid_show(struct device *dev,
  395. struct device_attribute *attr, char *buf)
  396. {
  397. struct ctlr_info *h;
  398. struct scsi_device *sdev;
  399. struct hpsa_scsi_dev_t *hdev;
  400. unsigned long flags;
  401. unsigned char lunid[8];
  402. sdev = to_scsi_device(dev);
  403. h = sdev_to_hba(sdev);
  404. spin_lock_irqsave(&h->lock, flags);
  405. hdev = sdev->hostdata;
  406. if (!hdev) {
  407. spin_unlock_irqrestore(&h->lock, flags);
  408. return -ENODEV;
  409. }
  410. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  413. lunid[0], lunid[1], lunid[2], lunid[3],
  414. lunid[4], lunid[5], lunid[6], lunid[7]);
  415. }
  416. static ssize_t unique_id_show(struct device *dev,
  417. struct device_attribute *attr, char *buf)
  418. {
  419. struct ctlr_info *h;
  420. struct scsi_device *sdev;
  421. struct hpsa_scsi_dev_t *hdev;
  422. unsigned long flags;
  423. unsigned char sn[16];
  424. sdev = to_scsi_device(dev);
  425. h = sdev_to_hba(sdev);
  426. spin_lock_irqsave(&h->lock, flags);
  427. hdev = sdev->hostdata;
  428. if (!hdev) {
  429. spin_unlock_irqrestore(&h->lock, flags);
  430. return -ENODEV;
  431. }
  432. memcpy(sn, hdev->device_id, sizeof(sn));
  433. spin_unlock_irqrestore(&h->lock, flags);
  434. return snprintf(buf, 16 * 2 + 2,
  435. "%02X%02X%02X%02X%02X%02X%02X%02X"
  436. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  437. sn[0], sn[1], sn[2], sn[3],
  438. sn[4], sn[5], sn[6], sn[7],
  439. sn[8], sn[9], sn[10], sn[11],
  440. sn[12], sn[13], sn[14], sn[15]);
  441. }
  442. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  443. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  444. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  445. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  446. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  447. host_show_firmware_revision, NULL);
  448. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  449. host_show_commands_outstanding, NULL);
  450. static DEVICE_ATTR(transport_mode, S_IRUGO,
  451. host_show_transport_mode, NULL);
  452. static DEVICE_ATTR(resettable, S_IRUGO,
  453. host_show_resettable, NULL);
  454. static struct device_attribute *hpsa_sdev_attrs[] = {
  455. &dev_attr_raid_level,
  456. &dev_attr_lunid,
  457. &dev_attr_unique_id,
  458. NULL,
  459. };
  460. static struct device_attribute *hpsa_shost_attrs[] = {
  461. &dev_attr_rescan,
  462. &dev_attr_firmware_revision,
  463. &dev_attr_commands_outstanding,
  464. &dev_attr_transport_mode,
  465. &dev_attr_resettable,
  466. NULL,
  467. };
  468. static struct scsi_host_template hpsa_driver_template = {
  469. .module = THIS_MODULE,
  470. .name = HPSA,
  471. .proc_name = HPSA,
  472. .queuecommand = hpsa_scsi_queue_command,
  473. .scan_start = hpsa_scan_start,
  474. .scan_finished = hpsa_scan_finished,
  475. .change_queue_depth = hpsa_change_queue_depth,
  476. .this_id = -1,
  477. .use_clustering = ENABLE_CLUSTERING,
  478. .eh_abort_handler = hpsa_eh_abort_handler,
  479. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  480. .ioctl = hpsa_ioctl,
  481. .slave_alloc = hpsa_slave_alloc,
  482. .slave_destroy = hpsa_slave_destroy,
  483. #ifdef CONFIG_COMPAT
  484. .compat_ioctl = hpsa_compat_ioctl,
  485. #endif
  486. .sdev_attrs = hpsa_sdev_attrs,
  487. .shost_attrs = hpsa_shost_attrs,
  488. .max_sectors = 8192,
  489. };
  490. /* Enqueuing and dequeuing functions for cmdlists. */
  491. static inline void addQ(struct list_head *list, struct CommandList *c)
  492. {
  493. list_add_tail(&c->list, list);
  494. }
  495. static inline u32 next_command(struct ctlr_info *h, u8 q)
  496. {
  497. u32 a;
  498. struct reply_pool *rq = &h->reply_queue[q];
  499. unsigned long flags;
  500. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  501. return h->access.command_completed(h, q);
  502. if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
  503. a = rq->head[rq->current_entry];
  504. rq->current_entry++;
  505. spin_lock_irqsave(&h->lock, flags);
  506. h->commands_outstanding--;
  507. spin_unlock_irqrestore(&h->lock, flags);
  508. } else {
  509. a = FIFO_EMPTY;
  510. }
  511. /* Check for wraparound */
  512. if (rq->current_entry == h->max_commands) {
  513. rq->current_entry = 0;
  514. rq->wraparound ^= 1;
  515. }
  516. return a;
  517. }
  518. /* set_performant_mode: Modify the tag for cciss performant
  519. * set bit 0 for pull model, bits 3-1 for block fetch
  520. * register number
  521. */
  522. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  523. {
  524. if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
  525. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  526. if (likely(h->msix_vector))
  527. c->Header.ReplyQueue =
  528. smp_processor_id() % h->nreply_queues;
  529. }
  530. }
  531. static int is_firmware_flash_cmd(u8 *cdb)
  532. {
  533. return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
  534. }
  535. /*
  536. * During firmware flash, the heartbeat register may not update as frequently
  537. * as it should. So we dial down lockup detection during firmware flash. and
  538. * dial it back up when firmware flash completes.
  539. */
  540. #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
  541. #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
  542. static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
  543. struct CommandList *c)
  544. {
  545. if (!is_firmware_flash_cmd(c->Request.CDB))
  546. return;
  547. atomic_inc(&h->firmware_flash_in_progress);
  548. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
  549. }
  550. static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
  551. struct CommandList *c)
  552. {
  553. if (is_firmware_flash_cmd(c->Request.CDB) &&
  554. atomic_dec_and_test(&h->firmware_flash_in_progress))
  555. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  556. }
  557. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  558. struct CommandList *c)
  559. {
  560. unsigned long flags;
  561. set_performant_mode(h, c);
  562. dial_down_lockup_detection_during_fw_flash(h, c);
  563. spin_lock_irqsave(&h->lock, flags);
  564. addQ(&h->reqQ, c);
  565. h->Qdepth++;
  566. spin_unlock_irqrestore(&h->lock, flags);
  567. start_io(h);
  568. }
  569. static inline void removeQ(struct CommandList *c)
  570. {
  571. if (WARN_ON(list_empty(&c->list)))
  572. return;
  573. list_del_init(&c->list);
  574. }
  575. static inline int is_hba_lunid(unsigned char scsi3addr[])
  576. {
  577. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  578. }
  579. static inline int is_scsi_rev_5(struct ctlr_info *h)
  580. {
  581. if (!h->hba_inquiry_data)
  582. return 0;
  583. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  584. return 1;
  585. return 0;
  586. }
  587. static int hpsa_find_target_lun(struct ctlr_info *h,
  588. unsigned char scsi3addr[], int bus, int *target, int *lun)
  589. {
  590. /* finds an unused bus, target, lun for a new physical device
  591. * assumes h->devlock is held
  592. */
  593. int i, found = 0;
  594. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  595. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  596. for (i = 0; i < h->ndevices; i++) {
  597. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  598. __set_bit(h->dev[i]->target, lun_taken);
  599. }
  600. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  601. if (i < HPSA_MAX_DEVICES) {
  602. /* *bus = 1; */
  603. *target = i;
  604. *lun = 0;
  605. found = 1;
  606. }
  607. return !found;
  608. }
  609. /* Add an entry into h->dev[] array. */
  610. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  611. struct hpsa_scsi_dev_t *device,
  612. struct hpsa_scsi_dev_t *added[], int *nadded)
  613. {
  614. /* assumes h->devlock is held */
  615. int n = h->ndevices;
  616. int i;
  617. unsigned char addr1[8], addr2[8];
  618. struct hpsa_scsi_dev_t *sd;
  619. if (n >= HPSA_MAX_DEVICES) {
  620. dev_err(&h->pdev->dev, "too many devices, some will be "
  621. "inaccessible.\n");
  622. return -1;
  623. }
  624. /* physical devices do not have lun or target assigned until now. */
  625. if (device->lun != -1)
  626. /* Logical device, lun is already assigned. */
  627. goto lun_assigned;
  628. /* If this device a non-zero lun of a multi-lun device
  629. * byte 4 of the 8-byte LUN addr will contain the logical
  630. * unit no, zero otherise.
  631. */
  632. if (device->scsi3addr[4] == 0) {
  633. /* This is not a non-zero lun of a multi-lun device */
  634. if (hpsa_find_target_lun(h, device->scsi3addr,
  635. device->bus, &device->target, &device->lun) != 0)
  636. return -1;
  637. goto lun_assigned;
  638. }
  639. /* This is a non-zero lun of a multi-lun device.
  640. * Search through our list and find the device which
  641. * has the same 8 byte LUN address, excepting byte 4.
  642. * Assign the same bus and target for this new LUN.
  643. * Use the logical unit number from the firmware.
  644. */
  645. memcpy(addr1, device->scsi3addr, 8);
  646. addr1[4] = 0;
  647. for (i = 0; i < n; i++) {
  648. sd = h->dev[i];
  649. memcpy(addr2, sd->scsi3addr, 8);
  650. addr2[4] = 0;
  651. /* differ only in byte 4? */
  652. if (memcmp(addr1, addr2, 8) == 0) {
  653. device->bus = sd->bus;
  654. device->target = sd->target;
  655. device->lun = device->scsi3addr[4];
  656. break;
  657. }
  658. }
  659. if (device->lun == -1) {
  660. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  661. " suspect firmware bug or unsupported hardware "
  662. "configuration.\n");
  663. return -1;
  664. }
  665. lun_assigned:
  666. h->dev[n] = device;
  667. h->ndevices++;
  668. added[*nadded] = device;
  669. (*nadded)++;
  670. /* initially, (before registering with scsi layer) we don't
  671. * know our hostno and we don't want to print anything first
  672. * time anyway (the scsi layer's inquiries will show that info)
  673. */
  674. /* if (hostno != -1) */
  675. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  676. scsi_device_type(device->devtype), hostno,
  677. device->bus, device->target, device->lun);
  678. return 0;
  679. }
  680. /* Update an entry in h->dev[] array. */
  681. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  682. int entry, struct hpsa_scsi_dev_t *new_entry)
  683. {
  684. /* assumes h->devlock is held */
  685. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  686. /* Raid level changed. */
  687. h->dev[entry]->raid_level = new_entry->raid_level;
  688. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  689. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  690. new_entry->target, new_entry->lun);
  691. }
  692. /* Replace an entry from h->dev[] array. */
  693. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  694. int entry, struct hpsa_scsi_dev_t *new_entry,
  695. struct hpsa_scsi_dev_t *added[], int *nadded,
  696. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  697. {
  698. /* assumes h->devlock is held */
  699. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  700. removed[*nremoved] = h->dev[entry];
  701. (*nremoved)++;
  702. /*
  703. * New physical devices won't have target/lun assigned yet
  704. * so we need to preserve the values in the slot we are replacing.
  705. */
  706. if (new_entry->target == -1) {
  707. new_entry->target = h->dev[entry]->target;
  708. new_entry->lun = h->dev[entry]->lun;
  709. }
  710. h->dev[entry] = new_entry;
  711. added[*nadded] = new_entry;
  712. (*nadded)++;
  713. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  714. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  715. new_entry->target, new_entry->lun);
  716. }
  717. /* Remove an entry from h->dev[] array. */
  718. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  719. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  720. {
  721. /* assumes h->devlock is held */
  722. int i;
  723. struct hpsa_scsi_dev_t *sd;
  724. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  725. sd = h->dev[entry];
  726. removed[*nremoved] = h->dev[entry];
  727. (*nremoved)++;
  728. for (i = entry; i < h->ndevices-1; i++)
  729. h->dev[i] = h->dev[i+1];
  730. h->ndevices--;
  731. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  732. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  733. sd->lun);
  734. }
  735. #define SCSI3ADDR_EQ(a, b) ( \
  736. (a)[7] == (b)[7] && \
  737. (a)[6] == (b)[6] && \
  738. (a)[5] == (b)[5] && \
  739. (a)[4] == (b)[4] && \
  740. (a)[3] == (b)[3] && \
  741. (a)[2] == (b)[2] && \
  742. (a)[1] == (b)[1] && \
  743. (a)[0] == (b)[0])
  744. static void fixup_botched_add(struct ctlr_info *h,
  745. struct hpsa_scsi_dev_t *added)
  746. {
  747. /* called when scsi_add_device fails in order to re-adjust
  748. * h->dev[] to match the mid layer's view.
  749. */
  750. unsigned long flags;
  751. int i, j;
  752. spin_lock_irqsave(&h->lock, flags);
  753. for (i = 0; i < h->ndevices; i++) {
  754. if (h->dev[i] == added) {
  755. for (j = i; j < h->ndevices-1; j++)
  756. h->dev[j] = h->dev[j+1];
  757. h->ndevices--;
  758. break;
  759. }
  760. }
  761. spin_unlock_irqrestore(&h->lock, flags);
  762. kfree(added);
  763. }
  764. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  765. struct hpsa_scsi_dev_t *dev2)
  766. {
  767. /* we compare everything except lun and target as these
  768. * are not yet assigned. Compare parts likely
  769. * to differ first
  770. */
  771. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  772. sizeof(dev1->scsi3addr)) != 0)
  773. return 0;
  774. if (memcmp(dev1->device_id, dev2->device_id,
  775. sizeof(dev1->device_id)) != 0)
  776. return 0;
  777. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  778. return 0;
  779. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  780. return 0;
  781. if (dev1->devtype != dev2->devtype)
  782. return 0;
  783. if (dev1->bus != dev2->bus)
  784. return 0;
  785. return 1;
  786. }
  787. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  788. struct hpsa_scsi_dev_t *dev2)
  789. {
  790. /* Device attributes that can change, but don't mean
  791. * that the device is a different device, nor that the OS
  792. * needs to be told anything about the change.
  793. */
  794. if (dev1->raid_level != dev2->raid_level)
  795. return 1;
  796. return 0;
  797. }
  798. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  799. * and return needle location in *index. If scsi3addr matches, but not
  800. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  801. * location in *index.
  802. * In the case of a minor device attribute change, such as RAID level, just
  803. * return DEVICE_UPDATED, along with the updated device's location in index.
  804. * If needle not found, return DEVICE_NOT_FOUND.
  805. */
  806. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  807. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  808. int *index)
  809. {
  810. int i;
  811. #define DEVICE_NOT_FOUND 0
  812. #define DEVICE_CHANGED 1
  813. #define DEVICE_SAME 2
  814. #define DEVICE_UPDATED 3
  815. for (i = 0; i < haystack_size; i++) {
  816. if (haystack[i] == NULL) /* previously removed. */
  817. continue;
  818. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  819. *index = i;
  820. if (device_is_the_same(needle, haystack[i])) {
  821. if (device_updated(needle, haystack[i]))
  822. return DEVICE_UPDATED;
  823. return DEVICE_SAME;
  824. } else {
  825. return DEVICE_CHANGED;
  826. }
  827. }
  828. }
  829. *index = -1;
  830. return DEVICE_NOT_FOUND;
  831. }
  832. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  833. struct hpsa_scsi_dev_t *sd[], int nsds)
  834. {
  835. /* sd contains scsi3 addresses and devtypes, and inquiry
  836. * data. This function takes what's in sd to be the current
  837. * reality and updates h->dev[] to reflect that reality.
  838. */
  839. int i, entry, device_change, changes = 0;
  840. struct hpsa_scsi_dev_t *csd;
  841. unsigned long flags;
  842. struct hpsa_scsi_dev_t **added, **removed;
  843. int nadded, nremoved;
  844. struct Scsi_Host *sh = NULL;
  845. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  846. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  847. if (!added || !removed) {
  848. dev_warn(&h->pdev->dev, "out of memory in "
  849. "adjust_hpsa_scsi_table\n");
  850. goto free_and_out;
  851. }
  852. spin_lock_irqsave(&h->devlock, flags);
  853. /* find any devices in h->dev[] that are not in
  854. * sd[] and remove them from h->dev[], and for any
  855. * devices which have changed, remove the old device
  856. * info and add the new device info.
  857. * If minor device attributes change, just update
  858. * the existing device structure.
  859. */
  860. i = 0;
  861. nremoved = 0;
  862. nadded = 0;
  863. while (i < h->ndevices) {
  864. csd = h->dev[i];
  865. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  866. if (device_change == DEVICE_NOT_FOUND) {
  867. changes++;
  868. hpsa_scsi_remove_entry(h, hostno, i,
  869. removed, &nremoved);
  870. continue; /* remove ^^^, hence i not incremented */
  871. } else if (device_change == DEVICE_CHANGED) {
  872. changes++;
  873. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  874. added, &nadded, removed, &nremoved);
  875. /* Set it to NULL to prevent it from being freed
  876. * at the bottom of hpsa_update_scsi_devices()
  877. */
  878. sd[entry] = NULL;
  879. } else if (device_change == DEVICE_UPDATED) {
  880. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  881. }
  882. i++;
  883. }
  884. /* Now, make sure every device listed in sd[] is also
  885. * listed in h->dev[], adding them if they aren't found
  886. */
  887. for (i = 0; i < nsds; i++) {
  888. if (!sd[i]) /* if already added above. */
  889. continue;
  890. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  891. h->ndevices, &entry);
  892. if (device_change == DEVICE_NOT_FOUND) {
  893. changes++;
  894. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  895. added, &nadded) != 0)
  896. break;
  897. sd[i] = NULL; /* prevent from being freed later. */
  898. } else if (device_change == DEVICE_CHANGED) {
  899. /* should never happen... */
  900. changes++;
  901. dev_warn(&h->pdev->dev,
  902. "device unexpectedly changed.\n");
  903. /* but if it does happen, we just ignore that device */
  904. }
  905. }
  906. spin_unlock_irqrestore(&h->devlock, flags);
  907. /* Don't notify scsi mid layer of any changes the first time through
  908. * (or if there are no changes) scsi_scan_host will do it later the
  909. * first time through.
  910. */
  911. if (hostno == -1 || !changes)
  912. goto free_and_out;
  913. sh = h->scsi_host;
  914. /* Notify scsi mid layer of any removed devices */
  915. for (i = 0; i < nremoved; i++) {
  916. struct scsi_device *sdev =
  917. scsi_device_lookup(sh, removed[i]->bus,
  918. removed[i]->target, removed[i]->lun);
  919. if (sdev != NULL) {
  920. scsi_remove_device(sdev);
  921. scsi_device_put(sdev);
  922. } else {
  923. /* We don't expect to get here.
  924. * future cmds to this device will get selection
  925. * timeout as if the device was gone.
  926. */
  927. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  928. " for removal.", hostno, removed[i]->bus,
  929. removed[i]->target, removed[i]->lun);
  930. }
  931. kfree(removed[i]);
  932. removed[i] = NULL;
  933. }
  934. /* Notify scsi mid layer of any added devices */
  935. for (i = 0; i < nadded; i++) {
  936. if (scsi_add_device(sh, added[i]->bus,
  937. added[i]->target, added[i]->lun) == 0)
  938. continue;
  939. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  940. "device not added.\n", hostno, added[i]->bus,
  941. added[i]->target, added[i]->lun);
  942. /* now we have to remove it from h->dev,
  943. * since it didn't get added to scsi mid layer
  944. */
  945. fixup_botched_add(h, added[i]);
  946. }
  947. free_and_out:
  948. kfree(added);
  949. kfree(removed);
  950. }
  951. /*
  952. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  953. * Assume's h->devlock is held.
  954. */
  955. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  956. int bus, int target, int lun)
  957. {
  958. int i;
  959. struct hpsa_scsi_dev_t *sd;
  960. for (i = 0; i < h->ndevices; i++) {
  961. sd = h->dev[i];
  962. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  963. return sd;
  964. }
  965. return NULL;
  966. }
  967. /* link sdev->hostdata to our per-device structure. */
  968. static int hpsa_slave_alloc(struct scsi_device *sdev)
  969. {
  970. struct hpsa_scsi_dev_t *sd;
  971. unsigned long flags;
  972. struct ctlr_info *h;
  973. h = sdev_to_hba(sdev);
  974. spin_lock_irqsave(&h->devlock, flags);
  975. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  976. sdev_id(sdev), sdev->lun);
  977. if (sd != NULL)
  978. sdev->hostdata = sd;
  979. spin_unlock_irqrestore(&h->devlock, flags);
  980. return 0;
  981. }
  982. static void hpsa_slave_destroy(struct scsi_device *sdev)
  983. {
  984. /* nothing to do. */
  985. }
  986. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  987. {
  988. int i;
  989. if (!h->cmd_sg_list)
  990. return;
  991. for (i = 0; i < h->nr_cmds; i++) {
  992. kfree(h->cmd_sg_list[i]);
  993. h->cmd_sg_list[i] = NULL;
  994. }
  995. kfree(h->cmd_sg_list);
  996. h->cmd_sg_list = NULL;
  997. }
  998. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  999. {
  1000. int i;
  1001. if (h->chainsize <= 0)
  1002. return 0;
  1003. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  1004. GFP_KERNEL);
  1005. if (!h->cmd_sg_list)
  1006. return -ENOMEM;
  1007. for (i = 0; i < h->nr_cmds; i++) {
  1008. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  1009. h->chainsize, GFP_KERNEL);
  1010. if (!h->cmd_sg_list[i])
  1011. goto clean;
  1012. }
  1013. return 0;
  1014. clean:
  1015. hpsa_free_sg_chain_blocks(h);
  1016. return -ENOMEM;
  1017. }
  1018. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  1019. struct CommandList *c)
  1020. {
  1021. struct SGDescriptor *chain_sg, *chain_block;
  1022. u64 temp64;
  1023. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1024. chain_block = h->cmd_sg_list[c->cmdindex];
  1025. chain_sg->Ext = HPSA_SG_CHAIN;
  1026. chain_sg->Len = sizeof(*chain_sg) *
  1027. (c->Header.SGTotal - h->max_cmd_sg_entries);
  1028. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  1029. PCI_DMA_TODEVICE);
  1030. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  1031. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  1032. }
  1033. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  1034. struct CommandList *c)
  1035. {
  1036. struct SGDescriptor *chain_sg;
  1037. union u64bit temp64;
  1038. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  1039. return;
  1040. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1041. temp64.val32.lower = chain_sg->Addr.lower;
  1042. temp64.val32.upper = chain_sg->Addr.upper;
  1043. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  1044. }
  1045. static void complete_scsi_command(struct CommandList *cp)
  1046. {
  1047. struct scsi_cmnd *cmd;
  1048. struct ctlr_info *h;
  1049. struct ErrorInfo *ei;
  1050. unsigned char sense_key;
  1051. unsigned char asc; /* additional sense code */
  1052. unsigned char ascq; /* additional sense code qualifier */
  1053. unsigned long sense_data_size;
  1054. ei = cp->err_info;
  1055. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1056. h = cp->h;
  1057. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1058. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1059. hpsa_unmap_sg_chain_block(h, cp);
  1060. cmd->result = (DID_OK << 16); /* host byte */
  1061. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1062. cmd->result |= ei->ScsiStatus;
  1063. /* copy the sense data whether we need to or not. */
  1064. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1065. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1066. else
  1067. sense_data_size = sizeof(ei->SenseInfo);
  1068. if (ei->SenseLen < sense_data_size)
  1069. sense_data_size = ei->SenseLen;
  1070. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1071. scsi_set_resid(cmd, ei->ResidualCnt);
  1072. if (ei->CommandStatus == 0) {
  1073. cmd->scsi_done(cmd);
  1074. cmd_free(h, cp);
  1075. return;
  1076. }
  1077. /* an error has occurred */
  1078. switch (ei->CommandStatus) {
  1079. case CMD_TARGET_STATUS:
  1080. if (ei->ScsiStatus) {
  1081. /* Get sense key */
  1082. sense_key = 0xf & ei->SenseInfo[2];
  1083. /* Get additional sense code */
  1084. asc = ei->SenseInfo[12];
  1085. /* Get addition sense code qualifier */
  1086. ascq = ei->SenseInfo[13];
  1087. }
  1088. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1089. if (check_for_unit_attention(h, cp)) {
  1090. cmd->result = DID_SOFT_ERROR << 16;
  1091. break;
  1092. }
  1093. if (sense_key == ILLEGAL_REQUEST) {
  1094. /*
  1095. * SCSI REPORT_LUNS is commonly unsupported on
  1096. * Smart Array. Suppress noisy complaint.
  1097. */
  1098. if (cp->Request.CDB[0] == REPORT_LUNS)
  1099. break;
  1100. /* If ASC/ASCQ indicate Logical Unit
  1101. * Not Supported condition,
  1102. */
  1103. if ((asc == 0x25) && (ascq == 0x0)) {
  1104. dev_warn(&h->pdev->dev, "cp %p "
  1105. "has check condition\n", cp);
  1106. break;
  1107. }
  1108. }
  1109. if (sense_key == NOT_READY) {
  1110. /* If Sense is Not Ready, Logical Unit
  1111. * Not ready, Manual Intervention
  1112. * required
  1113. */
  1114. if ((asc == 0x04) && (ascq == 0x03)) {
  1115. dev_warn(&h->pdev->dev, "cp %p "
  1116. "has check condition: unit "
  1117. "not ready, manual "
  1118. "intervention required\n", cp);
  1119. break;
  1120. }
  1121. }
  1122. if (sense_key == ABORTED_COMMAND) {
  1123. /* Aborted command is retryable */
  1124. dev_warn(&h->pdev->dev, "cp %p "
  1125. "has check condition: aborted command: "
  1126. "ASC: 0x%x, ASCQ: 0x%x\n",
  1127. cp, asc, ascq);
  1128. cmd->result = DID_SOFT_ERROR << 16;
  1129. break;
  1130. }
  1131. /* Must be some other type of check condition */
  1132. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1133. "unknown type: "
  1134. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1135. "Returning result: 0x%x, "
  1136. "cmd=[%02x %02x %02x %02x %02x "
  1137. "%02x %02x %02x %02x %02x %02x "
  1138. "%02x %02x %02x %02x %02x]\n",
  1139. cp, sense_key, asc, ascq,
  1140. cmd->result,
  1141. cmd->cmnd[0], cmd->cmnd[1],
  1142. cmd->cmnd[2], cmd->cmnd[3],
  1143. cmd->cmnd[4], cmd->cmnd[5],
  1144. cmd->cmnd[6], cmd->cmnd[7],
  1145. cmd->cmnd[8], cmd->cmnd[9],
  1146. cmd->cmnd[10], cmd->cmnd[11],
  1147. cmd->cmnd[12], cmd->cmnd[13],
  1148. cmd->cmnd[14], cmd->cmnd[15]);
  1149. break;
  1150. }
  1151. /* Problem was not a check condition
  1152. * Pass it up to the upper layers...
  1153. */
  1154. if (ei->ScsiStatus) {
  1155. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1156. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1157. "Returning result: 0x%x\n",
  1158. cp, ei->ScsiStatus,
  1159. sense_key, asc, ascq,
  1160. cmd->result);
  1161. } else { /* scsi status is zero??? How??? */
  1162. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1163. "Returning no connection.\n", cp),
  1164. /* Ordinarily, this case should never happen,
  1165. * but there is a bug in some released firmware
  1166. * revisions that allows it to happen if, for
  1167. * example, a 4100 backplane loses power and
  1168. * the tape drive is in it. We assume that
  1169. * it's a fatal error of some kind because we
  1170. * can't show that it wasn't. We will make it
  1171. * look like selection timeout since that is
  1172. * the most common reason for this to occur,
  1173. * and it's severe enough.
  1174. */
  1175. cmd->result = DID_NO_CONNECT << 16;
  1176. }
  1177. break;
  1178. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1179. break;
  1180. case CMD_DATA_OVERRUN:
  1181. dev_warn(&h->pdev->dev, "cp %p has"
  1182. " completed with data overrun "
  1183. "reported\n", cp);
  1184. break;
  1185. case CMD_INVALID: {
  1186. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1187. print_cmd(cp); */
  1188. /* We get CMD_INVALID if you address a non-existent device
  1189. * instead of a selection timeout (no response). You will
  1190. * see this if you yank out a drive, then try to access it.
  1191. * This is kind of a shame because it means that any other
  1192. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1193. * missing target. */
  1194. cmd->result = DID_NO_CONNECT << 16;
  1195. }
  1196. break;
  1197. case CMD_PROTOCOL_ERR:
  1198. dev_warn(&h->pdev->dev, "cp %p has "
  1199. "protocol error \n", cp);
  1200. break;
  1201. case CMD_HARDWARE_ERR:
  1202. cmd->result = DID_ERROR << 16;
  1203. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1204. break;
  1205. case CMD_CONNECTION_LOST:
  1206. cmd->result = DID_ERROR << 16;
  1207. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1208. break;
  1209. case CMD_ABORTED:
  1210. cmd->result = DID_ABORT << 16;
  1211. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1212. cp, ei->ScsiStatus);
  1213. break;
  1214. case CMD_ABORT_FAILED:
  1215. cmd->result = DID_ERROR << 16;
  1216. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1217. break;
  1218. case CMD_UNSOLICITED_ABORT:
  1219. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1220. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1221. "abort\n", cp);
  1222. break;
  1223. case CMD_TIMEOUT:
  1224. cmd->result = DID_TIME_OUT << 16;
  1225. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1226. break;
  1227. case CMD_UNABORTABLE:
  1228. cmd->result = DID_ERROR << 16;
  1229. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1230. break;
  1231. default:
  1232. cmd->result = DID_ERROR << 16;
  1233. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1234. cp, ei->CommandStatus);
  1235. }
  1236. cmd->scsi_done(cmd);
  1237. cmd_free(h, cp);
  1238. }
  1239. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1240. struct CommandList *c, int sg_used, int data_direction)
  1241. {
  1242. int i;
  1243. union u64bit addr64;
  1244. for (i = 0; i < sg_used; i++) {
  1245. addr64.val32.lower = c->SG[i].Addr.lower;
  1246. addr64.val32.upper = c->SG[i].Addr.upper;
  1247. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1248. data_direction);
  1249. }
  1250. }
  1251. static void hpsa_map_one(struct pci_dev *pdev,
  1252. struct CommandList *cp,
  1253. unsigned char *buf,
  1254. size_t buflen,
  1255. int data_direction)
  1256. {
  1257. u64 addr64;
  1258. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1259. cp->Header.SGList = 0;
  1260. cp->Header.SGTotal = 0;
  1261. return;
  1262. }
  1263. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1264. cp->SG[0].Addr.lower =
  1265. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1266. cp->SG[0].Addr.upper =
  1267. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1268. cp->SG[0].Len = buflen;
  1269. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1270. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1271. }
  1272. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1273. struct CommandList *c)
  1274. {
  1275. DECLARE_COMPLETION_ONSTACK(wait);
  1276. c->waiting = &wait;
  1277. enqueue_cmd_and_start_io(h, c);
  1278. wait_for_completion(&wait);
  1279. }
  1280. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1281. struct CommandList *c)
  1282. {
  1283. unsigned long flags;
  1284. /* If controller lockup detected, fake a hardware error. */
  1285. spin_lock_irqsave(&h->lock, flags);
  1286. if (unlikely(h->lockup_detected)) {
  1287. spin_unlock_irqrestore(&h->lock, flags);
  1288. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1289. } else {
  1290. spin_unlock_irqrestore(&h->lock, flags);
  1291. hpsa_scsi_do_simple_cmd_core(h, c);
  1292. }
  1293. }
  1294. #define MAX_DRIVER_CMD_RETRIES 25
  1295. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1296. struct CommandList *c, int data_direction)
  1297. {
  1298. int backoff_time = 10, retry_count = 0;
  1299. do {
  1300. memset(c->err_info, 0, sizeof(*c->err_info));
  1301. hpsa_scsi_do_simple_cmd_core(h, c);
  1302. retry_count++;
  1303. if (retry_count > 3) {
  1304. msleep(backoff_time);
  1305. if (backoff_time < 1000)
  1306. backoff_time *= 2;
  1307. }
  1308. } while ((check_for_unit_attention(h, c) ||
  1309. check_for_busy(h, c)) &&
  1310. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1311. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1312. }
  1313. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1314. {
  1315. struct ErrorInfo *ei;
  1316. struct device *d = &cp->h->pdev->dev;
  1317. ei = cp->err_info;
  1318. switch (ei->CommandStatus) {
  1319. case CMD_TARGET_STATUS:
  1320. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1321. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1322. ei->ScsiStatus);
  1323. if (ei->ScsiStatus == 0)
  1324. dev_warn(d, "SCSI status is abnormally zero. "
  1325. "(probably indicates selection timeout "
  1326. "reported incorrectly due to a known "
  1327. "firmware bug, circa July, 2001.)\n");
  1328. break;
  1329. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1330. dev_info(d, "UNDERRUN\n");
  1331. break;
  1332. case CMD_DATA_OVERRUN:
  1333. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1334. break;
  1335. case CMD_INVALID: {
  1336. /* controller unfortunately reports SCSI passthru's
  1337. * to non-existent targets as invalid commands.
  1338. */
  1339. dev_warn(d, "cp %p is reported invalid (probably means "
  1340. "target device no longer present)\n", cp);
  1341. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1342. print_cmd(cp); */
  1343. }
  1344. break;
  1345. case CMD_PROTOCOL_ERR:
  1346. dev_warn(d, "cp %p has protocol error \n", cp);
  1347. break;
  1348. case CMD_HARDWARE_ERR:
  1349. /* cmd->result = DID_ERROR << 16; */
  1350. dev_warn(d, "cp %p had hardware error\n", cp);
  1351. break;
  1352. case CMD_CONNECTION_LOST:
  1353. dev_warn(d, "cp %p had connection lost\n", cp);
  1354. break;
  1355. case CMD_ABORTED:
  1356. dev_warn(d, "cp %p was aborted\n", cp);
  1357. break;
  1358. case CMD_ABORT_FAILED:
  1359. dev_warn(d, "cp %p reports abort failed\n", cp);
  1360. break;
  1361. case CMD_UNSOLICITED_ABORT:
  1362. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1363. break;
  1364. case CMD_TIMEOUT:
  1365. dev_warn(d, "cp %p timed out\n", cp);
  1366. break;
  1367. case CMD_UNABORTABLE:
  1368. dev_warn(d, "Command unabortable\n");
  1369. break;
  1370. default:
  1371. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1372. ei->CommandStatus);
  1373. }
  1374. }
  1375. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1376. unsigned char page, unsigned char *buf,
  1377. unsigned char bufsize)
  1378. {
  1379. int rc = IO_OK;
  1380. struct CommandList *c;
  1381. struct ErrorInfo *ei;
  1382. c = cmd_special_alloc(h);
  1383. if (c == NULL) { /* trouble... */
  1384. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1385. return -ENOMEM;
  1386. }
  1387. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1388. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1389. ei = c->err_info;
  1390. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1391. hpsa_scsi_interpret_error(c);
  1392. rc = -1;
  1393. }
  1394. cmd_special_free(h, c);
  1395. return rc;
  1396. }
  1397. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1398. {
  1399. int rc = IO_OK;
  1400. struct CommandList *c;
  1401. struct ErrorInfo *ei;
  1402. c = cmd_special_alloc(h);
  1403. if (c == NULL) { /* trouble... */
  1404. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1405. return -ENOMEM;
  1406. }
  1407. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1408. hpsa_scsi_do_simple_cmd_core(h, c);
  1409. /* no unmap needed here because no data xfer. */
  1410. ei = c->err_info;
  1411. if (ei->CommandStatus != 0) {
  1412. hpsa_scsi_interpret_error(c);
  1413. rc = -1;
  1414. }
  1415. cmd_special_free(h, c);
  1416. return rc;
  1417. }
  1418. static void hpsa_get_raid_level(struct ctlr_info *h,
  1419. unsigned char *scsi3addr, unsigned char *raid_level)
  1420. {
  1421. int rc;
  1422. unsigned char *buf;
  1423. *raid_level = RAID_UNKNOWN;
  1424. buf = kzalloc(64, GFP_KERNEL);
  1425. if (!buf)
  1426. return;
  1427. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1428. if (rc == 0)
  1429. *raid_level = buf[8];
  1430. if (*raid_level > RAID_UNKNOWN)
  1431. *raid_level = RAID_UNKNOWN;
  1432. kfree(buf);
  1433. return;
  1434. }
  1435. /* Get the device id from inquiry page 0x83 */
  1436. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1437. unsigned char *device_id, int buflen)
  1438. {
  1439. int rc;
  1440. unsigned char *buf;
  1441. if (buflen > 16)
  1442. buflen = 16;
  1443. buf = kzalloc(64, GFP_KERNEL);
  1444. if (!buf)
  1445. return -1;
  1446. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1447. if (rc == 0)
  1448. memcpy(device_id, &buf[8], buflen);
  1449. kfree(buf);
  1450. return rc != 0;
  1451. }
  1452. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1453. struct ReportLUNdata *buf, int bufsize,
  1454. int extended_response)
  1455. {
  1456. int rc = IO_OK;
  1457. struct CommandList *c;
  1458. unsigned char scsi3addr[8];
  1459. struct ErrorInfo *ei;
  1460. c = cmd_special_alloc(h);
  1461. if (c == NULL) { /* trouble... */
  1462. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1463. return -1;
  1464. }
  1465. /* address the controller */
  1466. memset(scsi3addr, 0, sizeof(scsi3addr));
  1467. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1468. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1469. if (extended_response)
  1470. c->Request.CDB[1] = extended_response;
  1471. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1472. ei = c->err_info;
  1473. if (ei->CommandStatus != 0 &&
  1474. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1475. hpsa_scsi_interpret_error(c);
  1476. rc = -1;
  1477. }
  1478. cmd_special_free(h, c);
  1479. return rc;
  1480. }
  1481. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1482. struct ReportLUNdata *buf,
  1483. int bufsize, int extended_response)
  1484. {
  1485. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1486. }
  1487. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1488. struct ReportLUNdata *buf, int bufsize)
  1489. {
  1490. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1491. }
  1492. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1493. int bus, int target, int lun)
  1494. {
  1495. device->bus = bus;
  1496. device->target = target;
  1497. device->lun = lun;
  1498. }
  1499. static int hpsa_update_device_info(struct ctlr_info *h,
  1500. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1501. unsigned char *is_OBDR_device)
  1502. {
  1503. #define OBDR_SIG_OFFSET 43
  1504. #define OBDR_TAPE_SIG "$DR-10"
  1505. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1506. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1507. unsigned char *inq_buff;
  1508. unsigned char *obdr_sig;
  1509. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1510. if (!inq_buff)
  1511. goto bail_out;
  1512. /* Do an inquiry to the device to see what it is. */
  1513. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1514. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1515. /* Inquiry failed (msg printed already) */
  1516. dev_err(&h->pdev->dev,
  1517. "hpsa_update_device_info: inquiry failed\n");
  1518. goto bail_out;
  1519. }
  1520. this_device->devtype = (inq_buff[0] & 0x1f);
  1521. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1522. memcpy(this_device->vendor, &inq_buff[8],
  1523. sizeof(this_device->vendor));
  1524. memcpy(this_device->model, &inq_buff[16],
  1525. sizeof(this_device->model));
  1526. memset(this_device->device_id, 0,
  1527. sizeof(this_device->device_id));
  1528. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1529. sizeof(this_device->device_id));
  1530. if (this_device->devtype == TYPE_DISK &&
  1531. is_logical_dev_addr_mode(scsi3addr))
  1532. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1533. else
  1534. this_device->raid_level = RAID_UNKNOWN;
  1535. if (is_OBDR_device) {
  1536. /* See if this is a One-Button-Disaster-Recovery device
  1537. * by looking for "$DR-10" at offset 43 in inquiry data.
  1538. */
  1539. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1540. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1541. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1542. OBDR_SIG_LEN) == 0);
  1543. }
  1544. kfree(inq_buff);
  1545. return 0;
  1546. bail_out:
  1547. kfree(inq_buff);
  1548. return 1;
  1549. }
  1550. static unsigned char *ext_target_model[] = {
  1551. "MSA2012",
  1552. "MSA2024",
  1553. "MSA2312",
  1554. "MSA2324",
  1555. "P2000 G3 SAS",
  1556. NULL,
  1557. };
  1558. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1559. {
  1560. int i;
  1561. for (i = 0; ext_target_model[i]; i++)
  1562. if (strncmp(device->model, ext_target_model[i],
  1563. strlen(ext_target_model[i])) == 0)
  1564. return 1;
  1565. return 0;
  1566. }
  1567. /* Helper function to assign bus, target, lun mapping of devices.
  1568. * Puts non-external target logical volumes on bus 0, external target logical
  1569. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1570. * Logical drive target and lun are assigned at this time, but
  1571. * physical device lun and target assignment are deferred (assigned
  1572. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1573. */
  1574. static void figure_bus_target_lun(struct ctlr_info *h,
  1575. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1576. {
  1577. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1578. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1579. /* physical device, target and lun filled in later */
  1580. if (is_hba_lunid(lunaddrbytes))
  1581. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1582. else
  1583. /* defer target, lun assignment for physical devices */
  1584. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1585. return;
  1586. }
  1587. /* It's a logical device */
  1588. if (is_ext_target(h, device)) {
  1589. /* external target way, put logicals on bus 1
  1590. * and match target/lun numbers box
  1591. * reports, other smart array, bus 0, target 0, match lunid
  1592. */
  1593. hpsa_set_bus_target_lun(device,
  1594. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1595. return;
  1596. }
  1597. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1598. }
  1599. /*
  1600. * If there is no lun 0 on a target, linux won't find any devices.
  1601. * For the external targets (arrays), we have to manually detect the enclosure
  1602. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1603. * it for some reason. *tmpdevice is the target we're adding,
  1604. * this_device is a pointer into the current element of currentsd[]
  1605. * that we're building up in update_scsi_devices(), below.
  1606. * lunzerobits is a bitmap that tracks which targets already have a
  1607. * lun 0 assigned.
  1608. * Returns 1 if an enclosure was added, 0 if not.
  1609. */
  1610. static int add_ext_target_dev(struct ctlr_info *h,
  1611. struct hpsa_scsi_dev_t *tmpdevice,
  1612. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1613. unsigned long lunzerobits[], int *n_ext_target_devs)
  1614. {
  1615. unsigned char scsi3addr[8];
  1616. if (test_bit(tmpdevice->target, lunzerobits))
  1617. return 0; /* There is already a lun 0 on this target. */
  1618. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1619. return 0; /* It's the logical targets that may lack lun 0. */
  1620. if (!is_ext_target(h, tmpdevice))
  1621. return 0; /* Only external target devices have this problem. */
  1622. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1623. return 0;
  1624. memset(scsi3addr, 0, 8);
  1625. scsi3addr[3] = tmpdevice->target;
  1626. if (is_hba_lunid(scsi3addr))
  1627. return 0; /* Don't add the RAID controller here. */
  1628. if (is_scsi_rev_5(h))
  1629. return 0; /* p1210m doesn't need to do this. */
  1630. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1631. dev_warn(&h->pdev->dev, "Maximum number of external "
  1632. "target devices exceeded. Check your hardware "
  1633. "configuration.");
  1634. return 0;
  1635. }
  1636. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1637. return 0;
  1638. (*n_ext_target_devs)++;
  1639. hpsa_set_bus_target_lun(this_device,
  1640. tmpdevice->bus, tmpdevice->target, 0);
  1641. set_bit(tmpdevice->target, lunzerobits);
  1642. return 1;
  1643. }
  1644. /*
  1645. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1646. * logdev. The number of luns in physdev and logdev are returned in
  1647. * *nphysicals and *nlogicals, respectively.
  1648. * Returns 0 on success, -1 otherwise.
  1649. */
  1650. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1651. int reportlunsize,
  1652. struct ReportLUNdata *physdev, u32 *nphysicals,
  1653. struct ReportLUNdata *logdev, u32 *nlogicals)
  1654. {
  1655. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1656. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1657. return -1;
  1658. }
  1659. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1660. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1661. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1662. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1663. *nphysicals - HPSA_MAX_PHYS_LUN);
  1664. *nphysicals = HPSA_MAX_PHYS_LUN;
  1665. }
  1666. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1667. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1668. return -1;
  1669. }
  1670. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1671. /* Reject Logicals in excess of our max capability. */
  1672. if (*nlogicals > HPSA_MAX_LUN) {
  1673. dev_warn(&h->pdev->dev,
  1674. "maximum logical LUNs (%d) exceeded. "
  1675. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1676. *nlogicals - HPSA_MAX_LUN);
  1677. *nlogicals = HPSA_MAX_LUN;
  1678. }
  1679. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1680. dev_warn(&h->pdev->dev,
  1681. "maximum logical + physical LUNs (%d) exceeded. "
  1682. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1683. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1684. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1685. }
  1686. return 0;
  1687. }
  1688. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1689. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1690. struct ReportLUNdata *logdev_list)
  1691. {
  1692. /* Helper function, figure out where the LUN ID info is coming from
  1693. * given index i, lists of physical and logical devices, where in
  1694. * the list the raid controller is supposed to appear (first or last)
  1695. */
  1696. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1697. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1698. if (i == raid_ctlr_position)
  1699. return RAID_CTLR_LUNID;
  1700. if (i < logicals_start)
  1701. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1702. if (i < last_device)
  1703. return &logdev_list->LUN[i - nphysicals -
  1704. (raid_ctlr_position == 0)][0];
  1705. BUG();
  1706. return NULL;
  1707. }
  1708. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1709. {
  1710. /* the idea here is we could get notified
  1711. * that some devices have changed, so we do a report
  1712. * physical luns and report logical luns cmd, and adjust
  1713. * our list of devices accordingly.
  1714. *
  1715. * The scsi3addr's of devices won't change so long as the
  1716. * adapter is not reset. That means we can rescan and
  1717. * tell which devices we already know about, vs. new
  1718. * devices, vs. disappearing devices.
  1719. */
  1720. struct ReportLUNdata *physdev_list = NULL;
  1721. struct ReportLUNdata *logdev_list = NULL;
  1722. u32 nphysicals = 0;
  1723. u32 nlogicals = 0;
  1724. u32 ndev_allocated = 0;
  1725. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1726. int ncurrent = 0;
  1727. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1728. int i, n_ext_target_devs, ndevs_to_allocate;
  1729. int raid_ctlr_position;
  1730. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1731. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1732. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1733. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1734. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1735. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1736. dev_err(&h->pdev->dev, "out of memory\n");
  1737. goto out;
  1738. }
  1739. memset(lunzerobits, 0, sizeof(lunzerobits));
  1740. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1741. logdev_list, &nlogicals))
  1742. goto out;
  1743. /* We might see up to the maximum number of logical and physical disks
  1744. * plus external target devices, and a device for the local RAID
  1745. * controller.
  1746. */
  1747. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1748. /* Allocate the per device structures */
  1749. for (i = 0; i < ndevs_to_allocate; i++) {
  1750. if (i >= HPSA_MAX_DEVICES) {
  1751. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1752. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1753. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1754. break;
  1755. }
  1756. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1757. if (!currentsd[i]) {
  1758. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1759. __FILE__, __LINE__);
  1760. goto out;
  1761. }
  1762. ndev_allocated++;
  1763. }
  1764. if (unlikely(is_scsi_rev_5(h)))
  1765. raid_ctlr_position = 0;
  1766. else
  1767. raid_ctlr_position = nphysicals + nlogicals;
  1768. /* adjust our table of devices */
  1769. n_ext_target_devs = 0;
  1770. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1771. u8 *lunaddrbytes, is_OBDR = 0;
  1772. /* Figure out where the LUN ID info is coming from */
  1773. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1774. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1775. /* skip masked physical devices. */
  1776. if (lunaddrbytes[3] & 0xC0 &&
  1777. i < nphysicals + (raid_ctlr_position == 0))
  1778. continue;
  1779. /* Get device type, vendor, model, device id */
  1780. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1781. &is_OBDR))
  1782. continue; /* skip it if we can't talk to it. */
  1783. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1784. this_device = currentsd[ncurrent];
  1785. /*
  1786. * For external target devices, we have to insert a LUN 0 which
  1787. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1788. * is nonetheless an enclosure device there. We have to
  1789. * present that otherwise linux won't find anything if
  1790. * there is no lun 0.
  1791. */
  1792. if (add_ext_target_dev(h, tmpdevice, this_device,
  1793. lunaddrbytes, lunzerobits,
  1794. &n_ext_target_devs)) {
  1795. ncurrent++;
  1796. this_device = currentsd[ncurrent];
  1797. }
  1798. *this_device = *tmpdevice;
  1799. switch (this_device->devtype) {
  1800. case TYPE_ROM:
  1801. /* We don't *really* support actual CD-ROM devices,
  1802. * just "One Button Disaster Recovery" tape drive
  1803. * which temporarily pretends to be a CD-ROM drive.
  1804. * So we check that the device is really an OBDR tape
  1805. * device by checking for "$DR-10" in bytes 43-48 of
  1806. * the inquiry data.
  1807. */
  1808. if (is_OBDR)
  1809. ncurrent++;
  1810. break;
  1811. case TYPE_DISK:
  1812. if (i < nphysicals)
  1813. break;
  1814. ncurrent++;
  1815. break;
  1816. case TYPE_TAPE:
  1817. case TYPE_MEDIUM_CHANGER:
  1818. ncurrent++;
  1819. break;
  1820. case TYPE_RAID:
  1821. /* Only present the Smartarray HBA as a RAID controller.
  1822. * If it's a RAID controller other than the HBA itself
  1823. * (an external RAID controller, MSA500 or similar)
  1824. * don't present it.
  1825. */
  1826. if (!is_hba_lunid(lunaddrbytes))
  1827. break;
  1828. ncurrent++;
  1829. break;
  1830. default:
  1831. break;
  1832. }
  1833. if (ncurrent >= HPSA_MAX_DEVICES)
  1834. break;
  1835. }
  1836. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1837. out:
  1838. kfree(tmpdevice);
  1839. for (i = 0; i < ndev_allocated; i++)
  1840. kfree(currentsd[i]);
  1841. kfree(currentsd);
  1842. kfree(physdev_list);
  1843. kfree(logdev_list);
  1844. }
  1845. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1846. * dma mapping and fills in the scatter gather entries of the
  1847. * hpsa command, cp.
  1848. */
  1849. static int hpsa_scatter_gather(struct ctlr_info *h,
  1850. struct CommandList *cp,
  1851. struct scsi_cmnd *cmd)
  1852. {
  1853. unsigned int len;
  1854. struct scatterlist *sg;
  1855. u64 addr64;
  1856. int use_sg, i, sg_index, chained;
  1857. struct SGDescriptor *curr_sg;
  1858. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1859. use_sg = scsi_dma_map(cmd);
  1860. if (use_sg < 0)
  1861. return use_sg;
  1862. if (!use_sg)
  1863. goto sglist_finished;
  1864. curr_sg = cp->SG;
  1865. chained = 0;
  1866. sg_index = 0;
  1867. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1868. if (i == h->max_cmd_sg_entries - 1 &&
  1869. use_sg > h->max_cmd_sg_entries) {
  1870. chained = 1;
  1871. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1872. sg_index = 0;
  1873. }
  1874. addr64 = (u64) sg_dma_address(sg);
  1875. len = sg_dma_len(sg);
  1876. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1877. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1878. curr_sg->Len = len;
  1879. curr_sg->Ext = 0; /* we are not chaining */
  1880. curr_sg++;
  1881. }
  1882. if (use_sg + chained > h->maxSG)
  1883. h->maxSG = use_sg + chained;
  1884. if (chained) {
  1885. cp->Header.SGList = h->max_cmd_sg_entries;
  1886. cp->Header.SGTotal = (u16) (use_sg + 1);
  1887. hpsa_map_sg_chain_block(h, cp);
  1888. return 0;
  1889. }
  1890. sglist_finished:
  1891. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1892. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1893. return 0;
  1894. }
  1895. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1896. void (*done)(struct scsi_cmnd *))
  1897. {
  1898. struct ctlr_info *h;
  1899. struct hpsa_scsi_dev_t *dev;
  1900. unsigned char scsi3addr[8];
  1901. struct CommandList *c;
  1902. unsigned long flags;
  1903. /* Get the ptr to our adapter structure out of cmd->host. */
  1904. h = sdev_to_hba(cmd->device);
  1905. dev = cmd->device->hostdata;
  1906. if (!dev) {
  1907. cmd->result = DID_NO_CONNECT << 16;
  1908. done(cmd);
  1909. return 0;
  1910. }
  1911. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1912. spin_lock_irqsave(&h->lock, flags);
  1913. if (unlikely(h->lockup_detected)) {
  1914. spin_unlock_irqrestore(&h->lock, flags);
  1915. cmd->result = DID_ERROR << 16;
  1916. done(cmd);
  1917. return 0;
  1918. }
  1919. spin_unlock_irqrestore(&h->lock, flags);
  1920. c = cmd_alloc(h);
  1921. if (c == NULL) { /* trouble... */
  1922. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1923. return SCSI_MLQUEUE_HOST_BUSY;
  1924. }
  1925. /* Fill in the command list header */
  1926. cmd->scsi_done = done; /* save this for use by completion code */
  1927. /* save c in case we have to abort it */
  1928. cmd->host_scribble = (unsigned char *) c;
  1929. c->cmd_type = CMD_SCSI;
  1930. c->scsi_cmd = cmd;
  1931. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1932. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1933. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1934. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1935. /* Fill in the request block... */
  1936. c->Request.Timeout = 0;
  1937. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1938. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1939. c->Request.CDBLen = cmd->cmd_len;
  1940. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1941. c->Request.Type.Type = TYPE_CMD;
  1942. c->Request.Type.Attribute = ATTR_SIMPLE;
  1943. switch (cmd->sc_data_direction) {
  1944. case DMA_TO_DEVICE:
  1945. c->Request.Type.Direction = XFER_WRITE;
  1946. break;
  1947. case DMA_FROM_DEVICE:
  1948. c->Request.Type.Direction = XFER_READ;
  1949. break;
  1950. case DMA_NONE:
  1951. c->Request.Type.Direction = XFER_NONE;
  1952. break;
  1953. case DMA_BIDIRECTIONAL:
  1954. /* This can happen if a buggy application does a scsi passthru
  1955. * and sets both inlen and outlen to non-zero. ( see
  1956. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1957. */
  1958. c->Request.Type.Direction = XFER_RSVD;
  1959. /* This is technically wrong, and hpsa controllers should
  1960. * reject it with CMD_INVALID, which is the most correct
  1961. * response, but non-fibre backends appear to let it
  1962. * slide by, and give the same results as if this field
  1963. * were set correctly. Either way is acceptable for
  1964. * our purposes here.
  1965. */
  1966. break;
  1967. default:
  1968. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1969. cmd->sc_data_direction);
  1970. BUG();
  1971. break;
  1972. }
  1973. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1974. cmd_free(h, c);
  1975. return SCSI_MLQUEUE_HOST_BUSY;
  1976. }
  1977. enqueue_cmd_and_start_io(h, c);
  1978. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1979. return 0;
  1980. }
  1981. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1982. static void hpsa_scan_start(struct Scsi_Host *sh)
  1983. {
  1984. struct ctlr_info *h = shost_to_hba(sh);
  1985. unsigned long flags;
  1986. /* wait until any scan already in progress is finished. */
  1987. while (1) {
  1988. spin_lock_irqsave(&h->scan_lock, flags);
  1989. if (h->scan_finished)
  1990. break;
  1991. spin_unlock_irqrestore(&h->scan_lock, flags);
  1992. wait_event(h->scan_wait_queue, h->scan_finished);
  1993. /* Note: We don't need to worry about a race between this
  1994. * thread and driver unload because the midlayer will
  1995. * have incremented the reference count, so unload won't
  1996. * happen if we're in here.
  1997. */
  1998. }
  1999. h->scan_finished = 0; /* mark scan as in progress */
  2000. spin_unlock_irqrestore(&h->scan_lock, flags);
  2001. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  2002. spin_lock_irqsave(&h->scan_lock, flags);
  2003. h->scan_finished = 1; /* mark scan as finished. */
  2004. wake_up_all(&h->scan_wait_queue);
  2005. spin_unlock_irqrestore(&h->scan_lock, flags);
  2006. }
  2007. static int hpsa_scan_finished(struct Scsi_Host *sh,
  2008. unsigned long elapsed_time)
  2009. {
  2010. struct ctlr_info *h = shost_to_hba(sh);
  2011. unsigned long flags;
  2012. int finished;
  2013. spin_lock_irqsave(&h->scan_lock, flags);
  2014. finished = h->scan_finished;
  2015. spin_unlock_irqrestore(&h->scan_lock, flags);
  2016. return finished;
  2017. }
  2018. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  2019. int qdepth, int reason)
  2020. {
  2021. struct ctlr_info *h = sdev_to_hba(sdev);
  2022. if (reason != SCSI_QDEPTH_DEFAULT)
  2023. return -ENOTSUPP;
  2024. if (qdepth < 1)
  2025. qdepth = 1;
  2026. else
  2027. if (qdepth > h->nr_cmds)
  2028. qdepth = h->nr_cmds;
  2029. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  2030. return sdev->queue_depth;
  2031. }
  2032. static void hpsa_unregister_scsi(struct ctlr_info *h)
  2033. {
  2034. /* we are being forcibly unloaded, and may not refuse. */
  2035. scsi_remove_host(h->scsi_host);
  2036. scsi_host_put(h->scsi_host);
  2037. h->scsi_host = NULL;
  2038. }
  2039. static int hpsa_register_scsi(struct ctlr_info *h)
  2040. {
  2041. struct Scsi_Host *sh;
  2042. int error;
  2043. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  2044. if (sh == NULL)
  2045. goto fail;
  2046. sh->io_port = 0;
  2047. sh->n_io_port = 0;
  2048. sh->this_id = -1;
  2049. sh->max_channel = 3;
  2050. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2051. sh->max_lun = HPSA_MAX_LUN;
  2052. sh->max_id = HPSA_MAX_LUN;
  2053. sh->can_queue = h->nr_cmds;
  2054. sh->cmd_per_lun = h->nr_cmds;
  2055. sh->sg_tablesize = h->maxsgentries;
  2056. h->scsi_host = sh;
  2057. sh->hostdata[0] = (unsigned long) h;
  2058. sh->irq = h->intr[h->intr_mode];
  2059. sh->unique_id = sh->irq;
  2060. error = scsi_add_host(sh, &h->pdev->dev);
  2061. if (error)
  2062. goto fail_host_put;
  2063. scsi_scan_host(sh);
  2064. return 0;
  2065. fail_host_put:
  2066. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2067. " failed for controller %d\n", __func__, h->ctlr);
  2068. scsi_host_put(sh);
  2069. return error;
  2070. fail:
  2071. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2072. " failed for controller %d\n", __func__, h->ctlr);
  2073. return -ENOMEM;
  2074. }
  2075. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2076. unsigned char lunaddr[])
  2077. {
  2078. int rc = 0;
  2079. int count = 0;
  2080. int waittime = 1; /* seconds */
  2081. struct CommandList *c;
  2082. c = cmd_special_alloc(h);
  2083. if (!c) {
  2084. dev_warn(&h->pdev->dev, "out of memory in "
  2085. "wait_for_device_to_become_ready.\n");
  2086. return IO_ERROR;
  2087. }
  2088. /* Send test unit ready until device ready, or give up. */
  2089. while (count < HPSA_TUR_RETRY_LIMIT) {
  2090. /* Wait for a bit. do this first, because if we send
  2091. * the TUR right away, the reset will just abort it.
  2092. */
  2093. msleep(1000 * waittime);
  2094. count++;
  2095. /* Increase wait time with each try, up to a point. */
  2096. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2097. waittime = waittime * 2;
  2098. /* Send the Test Unit Ready */
  2099. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  2100. hpsa_scsi_do_simple_cmd_core(h, c);
  2101. /* no unmap needed here because no data xfer. */
  2102. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2103. break;
  2104. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2105. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2106. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2107. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2108. break;
  2109. dev_warn(&h->pdev->dev, "waiting %d secs "
  2110. "for device to become ready.\n", waittime);
  2111. rc = 1; /* device not ready. */
  2112. }
  2113. if (rc)
  2114. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2115. else
  2116. dev_warn(&h->pdev->dev, "device is ready.\n");
  2117. cmd_special_free(h, c);
  2118. return rc;
  2119. }
  2120. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2121. * complaining. Doing a host- or bus-reset can't do anything good here.
  2122. */
  2123. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2124. {
  2125. int rc;
  2126. struct ctlr_info *h;
  2127. struct hpsa_scsi_dev_t *dev;
  2128. /* find the controller to which the command to be aborted was sent */
  2129. h = sdev_to_hba(scsicmd->device);
  2130. if (h == NULL) /* paranoia */
  2131. return FAILED;
  2132. dev = scsicmd->device->hostdata;
  2133. if (!dev) {
  2134. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2135. "device lookup failed.\n");
  2136. return FAILED;
  2137. }
  2138. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2139. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2140. /* send a reset to the SCSI LUN which the command was sent to */
  2141. rc = hpsa_send_reset(h, dev->scsi3addr);
  2142. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2143. return SUCCESS;
  2144. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2145. return FAILED;
  2146. }
  2147. static void swizzle_abort_tag(u8 *tag)
  2148. {
  2149. u8 original_tag[8];
  2150. memcpy(original_tag, tag, 8);
  2151. tag[0] = original_tag[3];
  2152. tag[1] = original_tag[2];
  2153. tag[2] = original_tag[1];
  2154. tag[3] = original_tag[0];
  2155. tag[4] = original_tag[7];
  2156. tag[5] = original_tag[6];
  2157. tag[6] = original_tag[5];
  2158. tag[7] = original_tag[4];
  2159. }
  2160. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2161. struct CommandList *abort, int swizzle)
  2162. {
  2163. int rc = IO_OK;
  2164. struct CommandList *c;
  2165. struct ErrorInfo *ei;
  2166. c = cmd_special_alloc(h);
  2167. if (c == NULL) { /* trouble... */
  2168. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2169. return -ENOMEM;
  2170. }
  2171. fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
  2172. if (swizzle)
  2173. swizzle_abort_tag(&c->Request.CDB[4]);
  2174. hpsa_scsi_do_simple_cmd_core(h, c);
  2175. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2176. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2177. /* no unmap needed here because no data xfer. */
  2178. ei = c->err_info;
  2179. switch (ei->CommandStatus) {
  2180. case CMD_SUCCESS:
  2181. break;
  2182. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2183. rc = -1;
  2184. break;
  2185. default:
  2186. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2187. __func__, abort->Header.Tag.upper,
  2188. abort->Header.Tag.lower);
  2189. hpsa_scsi_interpret_error(c);
  2190. rc = -1;
  2191. break;
  2192. }
  2193. cmd_special_free(h, c);
  2194. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2195. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2196. return rc;
  2197. }
  2198. /*
  2199. * hpsa_find_cmd_in_queue
  2200. *
  2201. * Used to determine whether a command (find) is still present
  2202. * in queue_head. Optionally excludes the last element of queue_head.
  2203. *
  2204. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2205. * not yet been submitted, and so can be aborted by the driver without
  2206. * sending an abort to the hardware.
  2207. *
  2208. * Returns pointer to command if found in queue, NULL otherwise.
  2209. */
  2210. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2211. struct scsi_cmnd *find, struct list_head *queue_head)
  2212. {
  2213. unsigned long flags;
  2214. struct CommandList *c = NULL; /* ptr into cmpQ */
  2215. if (!find)
  2216. return 0;
  2217. spin_lock_irqsave(&h->lock, flags);
  2218. list_for_each_entry(c, queue_head, list) {
  2219. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2220. continue;
  2221. if (c->scsi_cmd == find) {
  2222. spin_unlock_irqrestore(&h->lock, flags);
  2223. return c;
  2224. }
  2225. }
  2226. spin_unlock_irqrestore(&h->lock, flags);
  2227. return NULL;
  2228. }
  2229. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2230. u8 *tag, struct list_head *queue_head)
  2231. {
  2232. unsigned long flags;
  2233. struct CommandList *c;
  2234. spin_lock_irqsave(&h->lock, flags);
  2235. list_for_each_entry(c, queue_head, list) {
  2236. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2237. continue;
  2238. spin_unlock_irqrestore(&h->lock, flags);
  2239. return c;
  2240. }
  2241. spin_unlock_irqrestore(&h->lock, flags);
  2242. return NULL;
  2243. }
  2244. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2245. * tell which kind we're dealing with, so we send the abort both ways. There
  2246. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2247. * way we construct our tags but we check anyway in case the assumptions which
  2248. * make this true someday become false.
  2249. */
  2250. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2251. unsigned char *scsi3addr, struct CommandList *abort)
  2252. {
  2253. u8 swizzled_tag[8];
  2254. struct CommandList *c;
  2255. int rc = 0, rc2 = 0;
  2256. /* we do not expect to find the swizzled tag in our queue, but
  2257. * check anyway just to be sure the assumptions which make this
  2258. * the case haven't become wrong.
  2259. */
  2260. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2261. swizzle_abort_tag(swizzled_tag);
  2262. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2263. if (c != NULL) {
  2264. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2265. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2266. }
  2267. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2268. /* if the command is still in our queue, we can't conclude that it was
  2269. * aborted (it might have just completed normally) but in any case
  2270. * we don't need to try to abort it another way.
  2271. */
  2272. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2273. if (c)
  2274. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2275. return rc && rc2;
  2276. }
  2277. /* Send an abort for the specified command.
  2278. * If the device and controller support it,
  2279. * send a task abort request.
  2280. */
  2281. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2282. {
  2283. int i, rc;
  2284. struct ctlr_info *h;
  2285. struct hpsa_scsi_dev_t *dev;
  2286. struct CommandList *abort; /* pointer to command to be aborted */
  2287. struct CommandList *found;
  2288. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2289. char msg[256]; /* For debug messaging. */
  2290. int ml = 0;
  2291. /* Find the controller of the command to be aborted */
  2292. h = sdev_to_hba(sc->device);
  2293. if (WARN(h == NULL,
  2294. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2295. return FAILED;
  2296. /* Check that controller supports some kind of task abort */
  2297. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2298. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2299. return FAILED;
  2300. memset(msg, 0, sizeof(msg));
  2301. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2302. h->scsi_host->host_no, sc->device->channel,
  2303. sc->device->id, sc->device->lun);
  2304. /* Find the device of the command to be aborted */
  2305. dev = sc->device->hostdata;
  2306. if (!dev) {
  2307. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2308. msg);
  2309. return FAILED;
  2310. }
  2311. /* Get SCSI command to be aborted */
  2312. abort = (struct CommandList *) sc->host_scribble;
  2313. if (abort == NULL) {
  2314. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2315. msg);
  2316. return FAILED;
  2317. }
  2318. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2319. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2320. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2321. if (as != NULL)
  2322. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2323. as->cmnd[0], as->serial_number);
  2324. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2325. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2326. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2327. /* Search reqQ to See if command is queued but not submitted,
  2328. * if so, complete the command with aborted status and remove
  2329. * it from the reqQ.
  2330. */
  2331. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2332. if (found) {
  2333. found->err_info->CommandStatus = CMD_ABORTED;
  2334. finish_cmd(found);
  2335. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2336. msg);
  2337. return SUCCESS;
  2338. }
  2339. /* not in reqQ, if also not in cmpQ, must have already completed */
  2340. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2341. if (!found) {
  2342. dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
  2343. msg);
  2344. return SUCCESS;
  2345. }
  2346. /*
  2347. * Command is in flight, or possibly already completed
  2348. * by the firmware (but not to the scsi mid layer) but we can't
  2349. * distinguish which. Send the abort down.
  2350. */
  2351. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2352. if (rc != 0) {
  2353. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2354. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2355. h->scsi_host->host_no,
  2356. dev->bus, dev->target, dev->lun);
  2357. return FAILED;
  2358. }
  2359. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2360. /* If the abort(s) above completed and actually aborted the
  2361. * command, then the command to be aborted should already be
  2362. * completed. If not, wait around a bit more to see if they
  2363. * manage to complete normally.
  2364. */
  2365. #define ABORT_COMPLETE_WAIT_SECS 30
  2366. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2367. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2368. if (!found)
  2369. return SUCCESS;
  2370. msleep(100);
  2371. }
  2372. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2373. msg, ABORT_COMPLETE_WAIT_SECS);
  2374. return FAILED;
  2375. }
  2376. /*
  2377. * For operations that cannot sleep, a command block is allocated at init,
  2378. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2379. * which ones are free or in use. Lock must be held when calling this.
  2380. * cmd_free() is the complement.
  2381. */
  2382. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2383. {
  2384. struct CommandList *c;
  2385. int i;
  2386. union u64bit temp64;
  2387. dma_addr_t cmd_dma_handle, err_dma_handle;
  2388. unsigned long flags;
  2389. spin_lock_irqsave(&h->lock, flags);
  2390. do {
  2391. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2392. if (i == h->nr_cmds) {
  2393. spin_unlock_irqrestore(&h->lock, flags);
  2394. return NULL;
  2395. }
  2396. } while (test_and_set_bit
  2397. (i & (BITS_PER_LONG - 1),
  2398. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2399. h->nr_allocs++;
  2400. spin_unlock_irqrestore(&h->lock, flags);
  2401. c = h->cmd_pool + i;
  2402. memset(c, 0, sizeof(*c));
  2403. cmd_dma_handle = h->cmd_pool_dhandle
  2404. + i * sizeof(*c);
  2405. c->err_info = h->errinfo_pool + i;
  2406. memset(c->err_info, 0, sizeof(*c->err_info));
  2407. err_dma_handle = h->errinfo_pool_dhandle
  2408. + i * sizeof(*c->err_info);
  2409. c->cmdindex = i;
  2410. INIT_LIST_HEAD(&c->list);
  2411. c->busaddr = (u32) cmd_dma_handle;
  2412. temp64.val = (u64) err_dma_handle;
  2413. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2414. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2415. c->ErrDesc.Len = sizeof(*c->err_info);
  2416. c->h = h;
  2417. return c;
  2418. }
  2419. /* For operations that can wait for kmalloc to possibly sleep,
  2420. * this routine can be called. Lock need not be held to call
  2421. * cmd_special_alloc. cmd_special_free() is the complement.
  2422. */
  2423. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2424. {
  2425. struct CommandList *c;
  2426. union u64bit temp64;
  2427. dma_addr_t cmd_dma_handle, err_dma_handle;
  2428. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2429. if (c == NULL)
  2430. return NULL;
  2431. memset(c, 0, sizeof(*c));
  2432. c->cmdindex = -1;
  2433. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2434. &err_dma_handle);
  2435. if (c->err_info == NULL) {
  2436. pci_free_consistent(h->pdev,
  2437. sizeof(*c), c, cmd_dma_handle);
  2438. return NULL;
  2439. }
  2440. memset(c->err_info, 0, sizeof(*c->err_info));
  2441. INIT_LIST_HEAD(&c->list);
  2442. c->busaddr = (u32) cmd_dma_handle;
  2443. temp64.val = (u64) err_dma_handle;
  2444. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2445. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2446. c->ErrDesc.Len = sizeof(*c->err_info);
  2447. c->h = h;
  2448. return c;
  2449. }
  2450. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2451. {
  2452. int i;
  2453. unsigned long flags;
  2454. i = c - h->cmd_pool;
  2455. spin_lock_irqsave(&h->lock, flags);
  2456. clear_bit(i & (BITS_PER_LONG - 1),
  2457. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2458. h->nr_frees++;
  2459. spin_unlock_irqrestore(&h->lock, flags);
  2460. }
  2461. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2462. {
  2463. union u64bit temp64;
  2464. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2465. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2466. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2467. c->err_info, (dma_addr_t) temp64.val);
  2468. pci_free_consistent(h->pdev, sizeof(*c),
  2469. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2470. }
  2471. #ifdef CONFIG_COMPAT
  2472. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2473. {
  2474. IOCTL32_Command_struct __user *arg32 =
  2475. (IOCTL32_Command_struct __user *) arg;
  2476. IOCTL_Command_struct arg64;
  2477. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2478. int err;
  2479. u32 cp;
  2480. memset(&arg64, 0, sizeof(arg64));
  2481. err = 0;
  2482. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2483. sizeof(arg64.LUN_info));
  2484. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2485. sizeof(arg64.Request));
  2486. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2487. sizeof(arg64.error_info));
  2488. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2489. err |= get_user(cp, &arg32->buf);
  2490. arg64.buf = compat_ptr(cp);
  2491. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2492. if (err)
  2493. return -EFAULT;
  2494. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2495. if (err)
  2496. return err;
  2497. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2498. sizeof(arg32->error_info));
  2499. if (err)
  2500. return -EFAULT;
  2501. return err;
  2502. }
  2503. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2504. int cmd, void *arg)
  2505. {
  2506. BIG_IOCTL32_Command_struct __user *arg32 =
  2507. (BIG_IOCTL32_Command_struct __user *) arg;
  2508. BIG_IOCTL_Command_struct arg64;
  2509. BIG_IOCTL_Command_struct __user *p =
  2510. compat_alloc_user_space(sizeof(arg64));
  2511. int err;
  2512. u32 cp;
  2513. memset(&arg64, 0, sizeof(arg64));
  2514. err = 0;
  2515. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2516. sizeof(arg64.LUN_info));
  2517. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2518. sizeof(arg64.Request));
  2519. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2520. sizeof(arg64.error_info));
  2521. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2522. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2523. err |= get_user(cp, &arg32->buf);
  2524. arg64.buf = compat_ptr(cp);
  2525. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2526. if (err)
  2527. return -EFAULT;
  2528. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2529. if (err)
  2530. return err;
  2531. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2532. sizeof(arg32->error_info));
  2533. if (err)
  2534. return -EFAULT;
  2535. return err;
  2536. }
  2537. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2538. {
  2539. switch (cmd) {
  2540. case CCISS_GETPCIINFO:
  2541. case CCISS_GETINTINFO:
  2542. case CCISS_SETINTINFO:
  2543. case CCISS_GETNODENAME:
  2544. case CCISS_SETNODENAME:
  2545. case CCISS_GETHEARTBEAT:
  2546. case CCISS_GETBUSTYPES:
  2547. case CCISS_GETFIRMVER:
  2548. case CCISS_GETDRIVVER:
  2549. case CCISS_REVALIDVOLS:
  2550. case CCISS_DEREGDISK:
  2551. case CCISS_REGNEWDISK:
  2552. case CCISS_REGNEWD:
  2553. case CCISS_RESCANDISK:
  2554. case CCISS_GETLUNINFO:
  2555. return hpsa_ioctl(dev, cmd, arg);
  2556. case CCISS_PASSTHRU32:
  2557. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2558. case CCISS_BIG_PASSTHRU32:
  2559. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2560. default:
  2561. return -ENOIOCTLCMD;
  2562. }
  2563. }
  2564. #endif
  2565. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2566. {
  2567. struct hpsa_pci_info pciinfo;
  2568. if (!argp)
  2569. return -EINVAL;
  2570. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2571. pciinfo.bus = h->pdev->bus->number;
  2572. pciinfo.dev_fn = h->pdev->devfn;
  2573. pciinfo.board_id = h->board_id;
  2574. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2575. return -EFAULT;
  2576. return 0;
  2577. }
  2578. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2579. {
  2580. DriverVer_type DriverVer;
  2581. unsigned char vmaj, vmin, vsubmin;
  2582. int rc;
  2583. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2584. &vmaj, &vmin, &vsubmin);
  2585. if (rc != 3) {
  2586. dev_info(&h->pdev->dev, "driver version string '%s' "
  2587. "unrecognized.", HPSA_DRIVER_VERSION);
  2588. vmaj = 0;
  2589. vmin = 0;
  2590. vsubmin = 0;
  2591. }
  2592. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2593. if (!argp)
  2594. return -EINVAL;
  2595. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2596. return -EFAULT;
  2597. return 0;
  2598. }
  2599. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2600. {
  2601. IOCTL_Command_struct iocommand;
  2602. struct CommandList *c;
  2603. char *buff = NULL;
  2604. union u64bit temp64;
  2605. if (!argp)
  2606. return -EINVAL;
  2607. if (!capable(CAP_SYS_RAWIO))
  2608. return -EPERM;
  2609. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2610. return -EFAULT;
  2611. if ((iocommand.buf_size < 1) &&
  2612. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2613. return -EINVAL;
  2614. }
  2615. if (iocommand.buf_size > 0) {
  2616. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2617. if (buff == NULL)
  2618. return -EFAULT;
  2619. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2620. /* Copy the data into the buffer we created */
  2621. if (copy_from_user(buff, iocommand.buf,
  2622. iocommand.buf_size)) {
  2623. kfree(buff);
  2624. return -EFAULT;
  2625. }
  2626. } else {
  2627. memset(buff, 0, iocommand.buf_size);
  2628. }
  2629. }
  2630. c = cmd_special_alloc(h);
  2631. if (c == NULL) {
  2632. kfree(buff);
  2633. return -ENOMEM;
  2634. }
  2635. /* Fill in the command type */
  2636. c->cmd_type = CMD_IOCTL_PEND;
  2637. /* Fill in Command Header */
  2638. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2639. if (iocommand.buf_size > 0) { /* buffer to fill */
  2640. c->Header.SGList = 1;
  2641. c->Header.SGTotal = 1;
  2642. } else { /* no buffers to fill */
  2643. c->Header.SGList = 0;
  2644. c->Header.SGTotal = 0;
  2645. }
  2646. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2647. /* use the kernel address the cmd block for tag */
  2648. c->Header.Tag.lower = c->busaddr;
  2649. /* Fill in Request block */
  2650. memcpy(&c->Request, &iocommand.Request,
  2651. sizeof(c->Request));
  2652. /* Fill in the scatter gather information */
  2653. if (iocommand.buf_size > 0) {
  2654. temp64.val = pci_map_single(h->pdev, buff,
  2655. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2656. c->SG[0].Addr.lower = temp64.val32.lower;
  2657. c->SG[0].Addr.upper = temp64.val32.upper;
  2658. c->SG[0].Len = iocommand.buf_size;
  2659. c->SG[0].Ext = 0; /* we are not chaining*/
  2660. }
  2661. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2662. if (iocommand.buf_size > 0)
  2663. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2664. check_ioctl_unit_attention(h, c);
  2665. /* Copy the error information out */
  2666. memcpy(&iocommand.error_info, c->err_info,
  2667. sizeof(iocommand.error_info));
  2668. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2669. kfree(buff);
  2670. cmd_special_free(h, c);
  2671. return -EFAULT;
  2672. }
  2673. if (iocommand.Request.Type.Direction == XFER_READ &&
  2674. iocommand.buf_size > 0) {
  2675. /* Copy the data out of the buffer we created */
  2676. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2677. kfree(buff);
  2678. cmd_special_free(h, c);
  2679. return -EFAULT;
  2680. }
  2681. }
  2682. kfree(buff);
  2683. cmd_special_free(h, c);
  2684. return 0;
  2685. }
  2686. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2687. {
  2688. BIG_IOCTL_Command_struct *ioc;
  2689. struct CommandList *c;
  2690. unsigned char **buff = NULL;
  2691. int *buff_size = NULL;
  2692. union u64bit temp64;
  2693. BYTE sg_used = 0;
  2694. int status = 0;
  2695. int i;
  2696. u32 left;
  2697. u32 sz;
  2698. BYTE __user *data_ptr;
  2699. if (!argp)
  2700. return -EINVAL;
  2701. if (!capable(CAP_SYS_RAWIO))
  2702. return -EPERM;
  2703. ioc = (BIG_IOCTL_Command_struct *)
  2704. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2705. if (!ioc) {
  2706. status = -ENOMEM;
  2707. goto cleanup1;
  2708. }
  2709. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2710. status = -EFAULT;
  2711. goto cleanup1;
  2712. }
  2713. if ((ioc->buf_size < 1) &&
  2714. (ioc->Request.Type.Direction != XFER_NONE)) {
  2715. status = -EINVAL;
  2716. goto cleanup1;
  2717. }
  2718. /* Check kmalloc limits using all SGs */
  2719. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2720. status = -EINVAL;
  2721. goto cleanup1;
  2722. }
  2723. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2724. status = -EINVAL;
  2725. goto cleanup1;
  2726. }
  2727. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2728. if (!buff) {
  2729. status = -ENOMEM;
  2730. goto cleanup1;
  2731. }
  2732. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2733. if (!buff_size) {
  2734. status = -ENOMEM;
  2735. goto cleanup1;
  2736. }
  2737. left = ioc->buf_size;
  2738. data_ptr = ioc->buf;
  2739. while (left) {
  2740. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2741. buff_size[sg_used] = sz;
  2742. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2743. if (buff[sg_used] == NULL) {
  2744. status = -ENOMEM;
  2745. goto cleanup1;
  2746. }
  2747. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2748. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2749. status = -ENOMEM;
  2750. goto cleanup1;
  2751. }
  2752. } else
  2753. memset(buff[sg_used], 0, sz);
  2754. left -= sz;
  2755. data_ptr += sz;
  2756. sg_used++;
  2757. }
  2758. c = cmd_special_alloc(h);
  2759. if (c == NULL) {
  2760. status = -ENOMEM;
  2761. goto cleanup1;
  2762. }
  2763. c->cmd_type = CMD_IOCTL_PEND;
  2764. c->Header.ReplyQueue = 0;
  2765. c->Header.SGList = c->Header.SGTotal = sg_used;
  2766. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2767. c->Header.Tag.lower = c->busaddr;
  2768. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2769. if (ioc->buf_size > 0) {
  2770. int i;
  2771. for (i = 0; i < sg_used; i++) {
  2772. temp64.val = pci_map_single(h->pdev, buff[i],
  2773. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2774. c->SG[i].Addr.lower = temp64.val32.lower;
  2775. c->SG[i].Addr.upper = temp64.val32.upper;
  2776. c->SG[i].Len = buff_size[i];
  2777. /* we are not chaining */
  2778. c->SG[i].Ext = 0;
  2779. }
  2780. }
  2781. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2782. if (sg_used)
  2783. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2784. check_ioctl_unit_attention(h, c);
  2785. /* Copy the error information out */
  2786. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2787. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2788. cmd_special_free(h, c);
  2789. status = -EFAULT;
  2790. goto cleanup1;
  2791. }
  2792. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2793. /* Copy the data out of the buffer we created */
  2794. BYTE __user *ptr = ioc->buf;
  2795. for (i = 0; i < sg_used; i++) {
  2796. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2797. cmd_special_free(h, c);
  2798. status = -EFAULT;
  2799. goto cleanup1;
  2800. }
  2801. ptr += buff_size[i];
  2802. }
  2803. }
  2804. cmd_special_free(h, c);
  2805. status = 0;
  2806. cleanup1:
  2807. if (buff) {
  2808. for (i = 0; i < sg_used; i++)
  2809. kfree(buff[i]);
  2810. kfree(buff);
  2811. }
  2812. kfree(buff_size);
  2813. kfree(ioc);
  2814. return status;
  2815. }
  2816. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2817. struct CommandList *c)
  2818. {
  2819. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2820. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2821. (void) check_for_unit_attention(h, c);
  2822. }
  2823. /*
  2824. * ioctl
  2825. */
  2826. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2827. {
  2828. struct ctlr_info *h;
  2829. void __user *argp = (void __user *)arg;
  2830. h = sdev_to_hba(dev);
  2831. switch (cmd) {
  2832. case CCISS_DEREGDISK:
  2833. case CCISS_REGNEWDISK:
  2834. case CCISS_REGNEWD:
  2835. hpsa_scan_start(h->scsi_host);
  2836. return 0;
  2837. case CCISS_GETPCIINFO:
  2838. return hpsa_getpciinfo_ioctl(h, argp);
  2839. case CCISS_GETDRIVVER:
  2840. return hpsa_getdrivver_ioctl(h, argp);
  2841. case CCISS_PASSTHRU:
  2842. return hpsa_passthru_ioctl(h, argp);
  2843. case CCISS_BIG_PASSTHRU:
  2844. return hpsa_big_passthru_ioctl(h, argp);
  2845. default:
  2846. return -ENOTTY;
  2847. }
  2848. }
  2849. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2850. unsigned char *scsi3addr, u8 reset_type)
  2851. {
  2852. struct CommandList *c;
  2853. c = cmd_alloc(h);
  2854. if (!c)
  2855. return -ENOMEM;
  2856. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2857. RAID_CTLR_LUNID, TYPE_MSG);
  2858. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2859. c->waiting = NULL;
  2860. enqueue_cmd_and_start_io(h, c);
  2861. /* Don't wait for completion, the reset won't complete. Don't free
  2862. * the command either. This is the last command we will send before
  2863. * re-initializing everything, so it doesn't matter and won't leak.
  2864. */
  2865. return 0;
  2866. }
  2867. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2868. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2869. int cmd_type)
  2870. {
  2871. int pci_dir = XFER_NONE;
  2872. struct CommandList *a; /* for commands to be aborted */
  2873. c->cmd_type = CMD_IOCTL_PEND;
  2874. c->Header.ReplyQueue = 0;
  2875. if (buff != NULL && size > 0) {
  2876. c->Header.SGList = 1;
  2877. c->Header.SGTotal = 1;
  2878. } else {
  2879. c->Header.SGList = 0;
  2880. c->Header.SGTotal = 0;
  2881. }
  2882. c->Header.Tag.lower = c->busaddr;
  2883. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2884. c->Request.Type.Type = cmd_type;
  2885. if (cmd_type == TYPE_CMD) {
  2886. switch (cmd) {
  2887. case HPSA_INQUIRY:
  2888. /* are we trying to read a vital product page */
  2889. if (page_code != 0) {
  2890. c->Request.CDB[1] = 0x01;
  2891. c->Request.CDB[2] = page_code;
  2892. }
  2893. c->Request.CDBLen = 6;
  2894. c->Request.Type.Attribute = ATTR_SIMPLE;
  2895. c->Request.Type.Direction = XFER_READ;
  2896. c->Request.Timeout = 0;
  2897. c->Request.CDB[0] = HPSA_INQUIRY;
  2898. c->Request.CDB[4] = size & 0xFF;
  2899. break;
  2900. case HPSA_REPORT_LOG:
  2901. case HPSA_REPORT_PHYS:
  2902. /* Talking to controller so It's a physical command
  2903. mode = 00 target = 0. Nothing to write.
  2904. */
  2905. c->Request.CDBLen = 12;
  2906. c->Request.Type.Attribute = ATTR_SIMPLE;
  2907. c->Request.Type.Direction = XFER_READ;
  2908. c->Request.Timeout = 0;
  2909. c->Request.CDB[0] = cmd;
  2910. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2911. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2912. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2913. c->Request.CDB[9] = size & 0xFF;
  2914. break;
  2915. case HPSA_CACHE_FLUSH:
  2916. c->Request.CDBLen = 12;
  2917. c->Request.Type.Attribute = ATTR_SIMPLE;
  2918. c->Request.Type.Direction = XFER_WRITE;
  2919. c->Request.Timeout = 0;
  2920. c->Request.CDB[0] = BMIC_WRITE;
  2921. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2922. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2923. c->Request.CDB[8] = size & 0xFF;
  2924. break;
  2925. case TEST_UNIT_READY:
  2926. c->Request.CDBLen = 6;
  2927. c->Request.Type.Attribute = ATTR_SIMPLE;
  2928. c->Request.Type.Direction = XFER_NONE;
  2929. c->Request.Timeout = 0;
  2930. break;
  2931. default:
  2932. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2933. BUG();
  2934. return;
  2935. }
  2936. } else if (cmd_type == TYPE_MSG) {
  2937. switch (cmd) {
  2938. case HPSA_DEVICE_RESET_MSG:
  2939. c->Request.CDBLen = 16;
  2940. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2941. c->Request.Type.Attribute = ATTR_SIMPLE;
  2942. c->Request.Type.Direction = XFER_NONE;
  2943. c->Request.Timeout = 0; /* Don't time out */
  2944. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2945. c->Request.CDB[0] = cmd;
  2946. c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
  2947. /* If bytes 4-7 are zero, it means reset the */
  2948. /* LunID device */
  2949. c->Request.CDB[4] = 0x00;
  2950. c->Request.CDB[5] = 0x00;
  2951. c->Request.CDB[6] = 0x00;
  2952. c->Request.CDB[7] = 0x00;
  2953. break;
  2954. case HPSA_ABORT_MSG:
  2955. a = buff; /* point to command to be aborted */
  2956. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  2957. a->Header.Tag.upper, a->Header.Tag.lower,
  2958. c->Header.Tag.upper, c->Header.Tag.lower);
  2959. c->Request.CDBLen = 16;
  2960. c->Request.Type.Type = TYPE_MSG;
  2961. c->Request.Type.Attribute = ATTR_SIMPLE;
  2962. c->Request.Type.Direction = XFER_WRITE;
  2963. c->Request.Timeout = 0; /* Don't time out */
  2964. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  2965. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  2966. c->Request.CDB[2] = 0x00; /* reserved */
  2967. c->Request.CDB[3] = 0x00; /* reserved */
  2968. /* Tag to abort goes in CDB[4]-CDB[11] */
  2969. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  2970. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  2971. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  2972. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  2973. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  2974. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  2975. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  2976. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  2977. c->Request.CDB[12] = 0x00; /* reserved */
  2978. c->Request.CDB[13] = 0x00; /* reserved */
  2979. c->Request.CDB[14] = 0x00; /* reserved */
  2980. c->Request.CDB[15] = 0x00; /* reserved */
  2981. break;
  2982. default:
  2983. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2984. cmd);
  2985. BUG();
  2986. }
  2987. } else {
  2988. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2989. BUG();
  2990. }
  2991. switch (c->Request.Type.Direction) {
  2992. case XFER_READ:
  2993. pci_dir = PCI_DMA_FROMDEVICE;
  2994. break;
  2995. case XFER_WRITE:
  2996. pci_dir = PCI_DMA_TODEVICE;
  2997. break;
  2998. case XFER_NONE:
  2999. pci_dir = PCI_DMA_NONE;
  3000. break;
  3001. default:
  3002. pci_dir = PCI_DMA_BIDIRECTIONAL;
  3003. }
  3004. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  3005. return;
  3006. }
  3007. /*
  3008. * Map (physical) PCI mem into (virtual) kernel space
  3009. */
  3010. static void __iomem *remap_pci_mem(ulong base, ulong size)
  3011. {
  3012. ulong page_base = ((ulong) base) & PAGE_MASK;
  3013. ulong page_offs = ((ulong) base) - page_base;
  3014. void __iomem *page_remapped = ioremap_nocache(page_base,
  3015. page_offs + size);
  3016. return page_remapped ? (page_remapped + page_offs) : NULL;
  3017. }
  3018. /* Takes cmds off the submission queue and sends them to the hardware,
  3019. * then puts them on the queue of cmds waiting for completion.
  3020. */
  3021. static void start_io(struct ctlr_info *h)
  3022. {
  3023. struct CommandList *c;
  3024. unsigned long flags;
  3025. spin_lock_irqsave(&h->lock, flags);
  3026. while (!list_empty(&h->reqQ)) {
  3027. c = list_entry(h->reqQ.next, struct CommandList, list);
  3028. /* can't do anything if fifo is full */
  3029. if ((h->access.fifo_full(h))) {
  3030. dev_warn(&h->pdev->dev, "fifo full\n");
  3031. break;
  3032. }
  3033. /* Get the first entry from the Request Q */
  3034. removeQ(c);
  3035. h->Qdepth--;
  3036. /* Put job onto the completed Q */
  3037. addQ(&h->cmpQ, c);
  3038. /* Must increment commands_outstanding before unlocking
  3039. * and submitting to avoid race checking for fifo full
  3040. * condition.
  3041. */
  3042. h->commands_outstanding++;
  3043. if (h->commands_outstanding > h->max_outstanding)
  3044. h->max_outstanding = h->commands_outstanding;
  3045. /* Tell the controller execute command */
  3046. spin_unlock_irqrestore(&h->lock, flags);
  3047. h->access.submit_command(h, c);
  3048. spin_lock_irqsave(&h->lock, flags);
  3049. }
  3050. spin_unlock_irqrestore(&h->lock, flags);
  3051. }
  3052. static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
  3053. {
  3054. return h->access.command_completed(h, q);
  3055. }
  3056. static inline bool interrupt_pending(struct ctlr_info *h)
  3057. {
  3058. return h->access.intr_pending(h);
  3059. }
  3060. static inline long interrupt_not_for_us(struct ctlr_info *h)
  3061. {
  3062. return (h->access.intr_pending(h) == 0) ||
  3063. (h->interrupts_enabled == 0);
  3064. }
  3065. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  3066. u32 raw_tag)
  3067. {
  3068. if (unlikely(tag_index >= h->nr_cmds)) {
  3069. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3070. return 1;
  3071. }
  3072. return 0;
  3073. }
  3074. static inline void finish_cmd(struct CommandList *c)
  3075. {
  3076. unsigned long flags;
  3077. spin_lock_irqsave(&c->h->lock, flags);
  3078. removeQ(c);
  3079. spin_unlock_irqrestore(&c->h->lock, flags);
  3080. dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
  3081. if (likely(c->cmd_type == CMD_SCSI))
  3082. complete_scsi_command(c);
  3083. else if (c->cmd_type == CMD_IOCTL_PEND)
  3084. complete(c->waiting);
  3085. }
  3086. static inline u32 hpsa_tag_contains_index(u32 tag)
  3087. {
  3088. return tag & DIRECT_LOOKUP_BIT;
  3089. }
  3090. static inline u32 hpsa_tag_to_index(u32 tag)
  3091. {
  3092. return tag >> DIRECT_LOOKUP_SHIFT;
  3093. }
  3094. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3095. {
  3096. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3097. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3098. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3099. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3100. return tag & ~HPSA_PERF_ERROR_BITS;
  3101. }
  3102. /* process completion of an indexed ("direct lookup") command */
  3103. static inline void process_indexed_cmd(struct ctlr_info *h,
  3104. u32 raw_tag)
  3105. {
  3106. u32 tag_index;
  3107. struct CommandList *c;
  3108. tag_index = hpsa_tag_to_index(raw_tag);
  3109. if (!bad_tag(h, tag_index, raw_tag)) {
  3110. c = h->cmd_pool + tag_index;
  3111. finish_cmd(c);
  3112. }
  3113. }
  3114. /* process completion of a non-indexed command */
  3115. static inline void process_nonindexed_cmd(struct ctlr_info *h,
  3116. u32 raw_tag)
  3117. {
  3118. u32 tag;
  3119. struct CommandList *c = NULL;
  3120. unsigned long flags;
  3121. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3122. spin_lock_irqsave(&h->lock, flags);
  3123. list_for_each_entry(c, &h->cmpQ, list) {
  3124. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3125. spin_unlock_irqrestore(&h->lock, flags);
  3126. finish_cmd(c);
  3127. return;
  3128. }
  3129. }
  3130. spin_unlock_irqrestore(&h->lock, flags);
  3131. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3132. }
  3133. /* Some controllers, like p400, will give us one interrupt
  3134. * after a soft reset, even if we turned interrupts off.
  3135. * Only need to check for this in the hpsa_xxx_discard_completions
  3136. * functions.
  3137. */
  3138. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3139. {
  3140. if (likely(!reset_devices))
  3141. return 0;
  3142. if (likely(h->interrupts_enabled))
  3143. return 0;
  3144. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3145. "(known firmware bug.) Ignoring.\n");
  3146. return 1;
  3147. }
  3148. /*
  3149. * Convert &h->q[x] (passed to interrupt handlers) back to h.
  3150. * Relies on (h-q[x] == x) being true for x such that
  3151. * 0 <= x < MAX_REPLY_QUEUES.
  3152. */
  3153. static struct ctlr_info *queue_to_hba(u8 *queue)
  3154. {
  3155. return container_of((queue - *queue), struct ctlr_info, q[0]);
  3156. }
  3157. static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
  3158. {
  3159. struct ctlr_info *h = queue_to_hba(queue);
  3160. u8 q = *(u8 *) queue;
  3161. u32 raw_tag;
  3162. if (ignore_bogus_interrupt(h))
  3163. return IRQ_NONE;
  3164. if (interrupt_not_for_us(h))
  3165. return IRQ_NONE;
  3166. h->last_intr_timestamp = get_jiffies_64();
  3167. while (interrupt_pending(h)) {
  3168. raw_tag = get_next_completion(h, q);
  3169. while (raw_tag != FIFO_EMPTY)
  3170. raw_tag = next_command(h, q);
  3171. }
  3172. return IRQ_HANDLED;
  3173. }
  3174. static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
  3175. {
  3176. struct ctlr_info *h = queue_to_hba(queue);
  3177. u32 raw_tag;
  3178. u8 q = *(u8 *) queue;
  3179. if (ignore_bogus_interrupt(h))
  3180. return IRQ_NONE;
  3181. h->last_intr_timestamp = get_jiffies_64();
  3182. raw_tag = get_next_completion(h, q);
  3183. while (raw_tag != FIFO_EMPTY)
  3184. raw_tag = next_command(h, q);
  3185. return IRQ_HANDLED;
  3186. }
  3187. static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
  3188. {
  3189. struct ctlr_info *h = queue_to_hba((u8 *) queue);
  3190. u32 raw_tag;
  3191. u8 q = *(u8 *) queue;
  3192. if (interrupt_not_for_us(h))
  3193. return IRQ_NONE;
  3194. h->last_intr_timestamp = get_jiffies_64();
  3195. while (interrupt_pending(h)) {
  3196. raw_tag = get_next_completion(h, q);
  3197. while (raw_tag != FIFO_EMPTY) {
  3198. if (likely(hpsa_tag_contains_index(raw_tag)))
  3199. process_indexed_cmd(h, raw_tag);
  3200. else
  3201. process_nonindexed_cmd(h, raw_tag);
  3202. raw_tag = next_command(h, q);
  3203. }
  3204. }
  3205. return IRQ_HANDLED;
  3206. }
  3207. static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
  3208. {
  3209. struct ctlr_info *h = queue_to_hba(queue);
  3210. u32 raw_tag;
  3211. u8 q = *(u8 *) queue;
  3212. h->last_intr_timestamp = get_jiffies_64();
  3213. raw_tag = get_next_completion(h, q);
  3214. while (raw_tag != FIFO_EMPTY) {
  3215. if (likely(hpsa_tag_contains_index(raw_tag)))
  3216. process_indexed_cmd(h, raw_tag);
  3217. else
  3218. process_nonindexed_cmd(h, raw_tag);
  3219. raw_tag = next_command(h, q);
  3220. }
  3221. return IRQ_HANDLED;
  3222. }
  3223. /* Send a message CDB to the firmware. Careful, this only works
  3224. * in simple mode, not performant mode due to the tag lookup.
  3225. * We only ever use this immediately after a controller reset.
  3226. */
  3227. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3228. unsigned char type)
  3229. {
  3230. struct Command {
  3231. struct CommandListHeader CommandHeader;
  3232. struct RequestBlock Request;
  3233. struct ErrDescriptor ErrorDescriptor;
  3234. };
  3235. struct Command *cmd;
  3236. static const size_t cmd_sz = sizeof(*cmd) +
  3237. sizeof(cmd->ErrorDescriptor);
  3238. dma_addr_t paddr64;
  3239. uint32_t paddr32, tag;
  3240. void __iomem *vaddr;
  3241. int i, err;
  3242. vaddr = pci_ioremap_bar(pdev, 0);
  3243. if (vaddr == NULL)
  3244. return -ENOMEM;
  3245. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3246. * CCISS commands, so they must be allocated from the lower 4GiB of
  3247. * memory.
  3248. */
  3249. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3250. if (err) {
  3251. iounmap(vaddr);
  3252. return -ENOMEM;
  3253. }
  3254. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3255. if (cmd == NULL) {
  3256. iounmap(vaddr);
  3257. return -ENOMEM;
  3258. }
  3259. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3260. * although there's no guarantee, we assume that the address is at
  3261. * least 4-byte aligned (most likely, it's page-aligned).
  3262. */
  3263. paddr32 = paddr64;
  3264. cmd->CommandHeader.ReplyQueue = 0;
  3265. cmd->CommandHeader.SGList = 0;
  3266. cmd->CommandHeader.SGTotal = 0;
  3267. cmd->CommandHeader.Tag.lower = paddr32;
  3268. cmd->CommandHeader.Tag.upper = 0;
  3269. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3270. cmd->Request.CDBLen = 16;
  3271. cmd->Request.Type.Type = TYPE_MSG;
  3272. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3273. cmd->Request.Type.Direction = XFER_NONE;
  3274. cmd->Request.Timeout = 0; /* Don't time out */
  3275. cmd->Request.CDB[0] = opcode;
  3276. cmd->Request.CDB[1] = type;
  3277. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3278. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3279. cmd->ErrorDescriptor.Addr.upper = 0;
  3280. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3281. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3282. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3283. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3284. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3285. break;
  3286. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3287. }
  3288. iounmap(vaddr);
  3289. /* we leak the DMA buffer here ... no choice since the controller could
  3290. * still complete the command.
  3291. */
  3292. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3293. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3294. opcode, type);
  3295. return -ETIMEDOUT;
  3296. }
  3297. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3298. if (tag & HPSA_ERROR_BIT) {
  3299. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3300. opcode, type);
  3301. return -EIO;
  3302. }
  3303. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3304. opcode, type);
  3305. return 0;
  3306. }
  3307. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3308. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3309. void * __iomem vaddr, u32 use_doorbell)
  3310. {
  3311. u16 pmcsr;
  3312. int pos;
  3313. if (use_doorbell) {
  3314. /* For everything after the P600, the PCI power state method
  3315. * of resetting the controller doesn't work, so we have this
  3316. * other way using the doorbell register.
  3317. */
  3318. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3319. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3320. } else { /* Try to do it the PCI power state way */
  3321. /* Quoting from the Open CISS Specification: "The Power
  3322. * Management Control/Status Register (CSR) controls the power
  3323. * state of the device. The normal operating state is D0,
  3324. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3325. * the controller, place the interface device in D3 then to D0,
  3326. * this causes a secondary PCI reset which will reset the
  3327. * controller." */
  3328. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3329. if (pos == 0) {
  3330. dev_err(&pdev->dev,
  3331. "hpsa_reset_controller: "
  3332. "PCI PM not supported\n");
  3333. return -ENODEV;
  3334. }
  3335. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3336. /* enter the D3hot power management state */
  3337. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3338. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3339. pmcsr |= PCI_D3hot;
  3340. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3341. msleep(500);
  3342. /* enter the D0 power management state */
  3343. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3344. pmcsr |= PCI_D0;
  3345. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3346. /*
  3347. * The P600 requires a small delay when changing states.
  3348. * Otherwise we may think the board did not reset and we bail.
  3349. * This for kdump only and is particular to the P600.
  3350. */
  3351. msleep(500);
  3352. }
  3353. return 0;
  3354. }
  3355. static __devinit void init_driver_version(char *driver_version, int len)
  3356. {
  3357. memset(driver_version, 0, len);
  3358. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3359. }
  3360. static __devinit int write_driver_ver_to_cfgtable(
  3361. struct CfgTable __iomem *cfgtable)
  3362. {
  3363. char *driver_version;
  3364. int i, size = sizeof(cfgtable->driver_version);
  3365. driver_version = kmalloc(size, GFP_KERNEL);
  3366. if (!driver_version)
  3367. return -ENOMEM;
  3368. init_driver_version(driver_version, size);
  3369. for (i = 0; i < size; i++)
  3370. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3371. kfree(driver_version);
  3372. return 0;
  3373. }
  3374. static __devinit void read_driver_ver_from_cfgtable(
  3375. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  3376. {
  3377. int i;
  3378. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3379. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3380. }
  3381. static __devinit int controller_reset_failed(
  3382. struct CfgTable __iomem *cfgtable)
  3383. {
  3384. char *driver_ver, *old_driver_ver;
  3385. int rc, size = sizeof(cfgtable->driver_version);
  3386. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3387. if (!old_driver_ver)
  3388. return -ENOMEM;
  3389. driver_ver = old_driver_ver + size;
  3390. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3391. * should have been changed, otherwise we know the reset failed.
  3392. */
  3393. init_driver_version(old_driver_ver, size);
  3394. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3395. rc = !memcmp(driver_ver, old_driver_ver, size);
  3396. kfree(old_driver_ver);
  3397. return rc;
  3398. }
  3399. /* This does a hard reset of the controller using PCI power management
  3400. * states or the using the doorbell register.
  3401. */
  3402. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3403. {
  3404. u64 cfg_offset;
  3405. u32 cfg_base_addr;
  3406. u64 cfg_base_addr_index;
  3407. void __iomem *vaddr;
  3408. unsigned long paddr;
  3409. u32 misc_fw_support;
  3410. int rc;
  3411. struct CfgTable __iomem *cfgtable;
  3412. u32 use_doorbell;
  3413. u32 board_id;
  3414. u16 command_register;
  3415. /* For controllers as old as the P600, this is very nearly
  3416. * the same thing as
  3417. *
  3418. * pci_save_state(pci_dev);
  3419. * pci_set_power_state(pci_dev, PCI_D3hot);
  3420. * pci_set_power_state(pci_dev, PCI_D0);
  3421. * pci_restore_state(pci_dev);
  3422. *
  3423. * For controllers newer than the P600, the pci power state
  3424. * method of resetting doesn't work so we have another way
  3425. * using the doorbell register.
  3426. */
  3427. rc = hpsa_lookup_board_id(pdev, &board_id);
  3428. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3429. dev_warn(&pdev->dev, "Not resetting device.\n");
  3430. return -ENODEV;
  3431. }
  3432. /* if controller is soft- but not hard resettable... */
  3433. if (!ctlr_is_hard_resettable(board_id))
  3434. return -ENOTSUPP; /* try soft reset later. */
  3435. /* Save the PCI command register */
  3436. pci_read_config_word(pdev, 4, &command_register);
  3437. /* Turn the board off. This is so that later pci_restore_state()
  3438. * won't turn the board on before the rest of config space is ready.
  3439. */
  3440. pci_disable_device(pdev);
  3441. pci_save_state(pdev);
  3442. /* find the first memory BAR, so we can find the cfg table */
  3443. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3444. if (rc)
  3445. return rc;
  3446. vaddr = remap_pci_mem(paddr, 0x250);
  3447. if (!vaddr)
  3448. return -ENOMEM;
  3449. /* find cfgtable in order to check if reset via doorbell is supported */
  3450. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3451. &cfg_base_addr_index, &cfg_offset);
  3452. if (rc)
  3453. goto unmap_vaddr;
  3454. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3455. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3456. if (!cfgtable) {
  3457. rc = -ENOMEM;
  3458. goto unmap_vaddr;
  3459. }
  3460. rc = write_driver_ver_to_cfgtable(cfgtable);
  3461. if (rc)
  3462. goto unmap_vaddr;
  3463. /* If reset via doorbell register is supported, use that.
  3464. * There are two such methods. Favor the newest method.
  3465. */
  3466. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3467. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3468. if (use_doorbell) {
  3469. use_doorbell = DOORBELL_CTLR_RESET2;
  3470. } else {
  3471. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3472. if (use_doorbell) {
  3473. dev_warn(&pdev->dev, "Soft reset not supported. "
  3474. "Firmware update is required.\n");
  3475. rc = -ENOTSUPP; /* try soft reset */
  3476. goto unmap_cfgtable;
  3477. }
  3478. }
  3479. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3480. if (rc)
  3481. goto unmap_cfgtable;
  3482. pci_restore_state(pdev);
  3483. rc = pci_enable_device(pdev);
  3484. if (rc) {
  3485. dev_warn(&pdev->dev, "failed to enable device.\n");
  3486. goto unmap_cfgtable;
  3487. }
  3488. pci_write_config_word(pdev, 4, command_register);
  3489. /* Some devices (notably the HP Smart Array 5i Controller)
  3490. need a little pause here */
  3491. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3492. /* Wait for board to become not ready, then ready. */
  3493. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3494. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3495. if (rc) {
  3496. dev_warn(&pdev->dev,
  3497. "failed waiting for board to reset."
  3498. " Will try soft reset.\n");
  3499. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3500. goto unmap_cfgtable;
  3501. }
  3502. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3503. if (rc) {
  3504. dev_warn(&pdev->dev,
  3505. "failed waiting for board to become ready "
  3506. "after hard reset\n");
  3507. goto unmap_cfgtable;
  3508. }
  3509. rc = controller_reset_failed(vaddr);
  3510. if (rc < 0)
  3511. goto unmap_cfgtable;
  3512. if (rc) {
  3513. dev_warn(&pdev->dev, "Unable to successfully reset "
  3514. "controller. Will try soft reset.\n");
  3515. rc = -ENOTSUPP;
  3516. } else {
  3517. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3518. }
  3519. unmap_cfgtable:
  3520. iounmap(cfgtable);
  3521. unmap_vaddr:
  3522. iounmap(vaddr);
  3523. return rc;
  3524. }
  3525. /*
  3526. * We cannot read the structure directly, for portability we must use
  3527. * the io functions.
  3528. * This is for debug only.
  3529. */
  3530. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3531. {
  3532. #ifdef HPSA_DEBUG
  3533. int i;
  3534. char temp_name[17];
  3535. dev_info(dev, "Controller Configuration information\n");
  3536. dev_info(dev, "------------------------------------\n");
  3537. for (i = 0; i < 4; i++)
  3538. temp_name[i] = readb(&(tb->Signature[i]));
  3539. temp_name[4] = '\0';
  3540. dev_info(dev, " Signature = %s\n", temp_name);
  3541. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3542. dev_info(dev, " Transport methods supported = 0x%x\n",
  3543. readl(&(tb->TransportSupport)));
  3544. dev_info(dev, " Transport methods active = 0x%x\n",
  3545. readl(&(tb->TransportActive)));
  3546. dev_info(dev, " Requested transport Method = 0x%x\n",
  3547. readl(&(tb->HostWrite.TransportRequest)));
  3548. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3549. readl(&(tb->HostWrite.CoalIntDelay)));
  3550. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3551. readl(&(tb->HostWrite.CoalIntCount)));
  3552. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3553. readl(&(tb->CmdsOutMax)));
  3554. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3555. for (i = 0; i < 16; i++)
  3556. temp_name[i] = readb(&(tb->ServerName[i]));
  3557. temp_name[16] = '\0';
  3558. dev_info(dev, " Server Name = %s\n", temp_name);
  3559. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3560. readl(&(tb->HeartBeat)));
  3561. #endif /* HPSA_DEBUG */
  3562. }
  3563. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3564. {
  3565. int i, offset, mem_type, bar_type;
  3566. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3567. return 0;
  3568. offset = 0;
  3569. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3570. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3571. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3572. offset += 4;
  3573. else {
  3574. mem_type = pci_resource_flags(pdev, i) &
  3575. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3576. switch (mem_type) {
  3577. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3578. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3579. offset += 4; /* 32 bit */
  3580. break;
  3581. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3582. offset += 8;
  3583. break;
  3584. default: /* reserved in PCI 2.2 */
  3585. dev_warn(&pdev->dev,
  3586. "base address is invalid\n");
  3587. return -1;
  3588. break;
  3589. }
  3590. }
  3591. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3592. return i + 1;
  3593. }
  3594. return -1;
  3595. }
  3596. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3597. * controllers that are capable. If not, we use IO-APIC mode.
  3598. */
  3599. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3600. {
  3601. #ifdef CONFIG_PCI_MSI
  3602. int err, i;
  3603. struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
  3604. for (i = 0; i < MAX_REPLY_QUEUES; i++) {
  3605. hpsa_msix_entries[i].vector = 0;
  3606. hpsa_msix_entries[i].entry = i;
  3607. }
  3608. /* Some boards advertise MSI but don't really support it */
  3609. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3610. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3611. goto default_int_mode;
  3612. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3613. dev_info(&h->pdev->dev, "MSIX\n");
  3614. err = pci_enable_msix(h->pdev, hpsa_msix_entries,
  3615. MAX_REPLY_QUEUES);
  3616. if (!err) {
  3617. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3618. h->intr[i] = hpsa_msix_entries[i].vector;
  3619. h->msix_vector = 1;
  3620. return;
  3621. }
  3622. if (err > 0) {
  3623. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3624. "available\n", err);
  3625. goto default_int_mode;
  3626. } else {
  3627. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3628. err);
  3629. goto default_int_mode;
  3630. }
  3631. }
  3632. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3633. dev_info(&h->pdev->dev, "MSI\n");
  3634. if (!pci_enable_msi(h->pdev))
  3635. h->msi_vector = 1;
  3636. else
  3637. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3638. }
  3639. default_int_mode:
  3640. #endif /* CONFIG_PCI_MSI */
  3641. /* if we get here we're going to use the default interrupt mode */
  3642. h->intr[h->intr_mode] = h->pdev->irq;
  3643. }
  3644. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3645. {
  3646. int i;
  3647. u32 subsystem_vendor_id, subsystem_device_id;
  3648. subsystem_vendor_id = pdev->subsystem_vendor;
  3649. subsystem_device_id = pdev->subsystem_device;
  3650. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3651. subsystem_vendor_id;
  3652. for (i = 0; i < ARRAY_SIZE(products); i++)
  3653. if (*board_id == products[i].board_id)
  3654. return i;
  3655. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3656. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3657. !hpsa_allow_any) {
  3658. dev_warn(&pdev->dev, "unrecognized board ID: "
  3659. "0x%08x, ignoring.\n", *board_id);
  3660. return -ENODEV;
  3661. }
  3662. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3663. }
  3664. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3665. unsigned long *memory_bar)
  3666. {
  3667. int i;
  3668. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3669. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3670. /* addressing mode bits already removed */
  3671. *memory_bar = pci_resource_start(pdev, i);
  3672. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3673. *memory_bar);
  3674. return 0;
  3675. }
  3676. dev_warn(&pdev->dev, "no memory BAR found\n");
  3677. return -ENODEV;
  3678. }
  3679. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3680. void __iomem *vaddr, int wait_for_ready)
  3681. {
  3682. int i, iterations;
  3683. u32 scratchpad;
  3684. if (wait_for_ready)
  3685. iterations = HPSA_BOARD_READY_ITERATIONS;
  3686. else
  3687. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3688. for (i = 0; i < iterations; i++) {
  3689. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3690. if (wait_for_ready) {
  3691. if (scratchpad == HPSA_FIRMWARE_READY)
  3692. return 0;
  3693. } else {
  3694. if (scratchpad != HPSA_FIRMWARE_READY)
  3695. return 0;
  3696. }
  3697. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3698. }
  3699. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3700. return -ENODEV;
  3701. }
  3702. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3703. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3704. u64 *cfg_offset)
  3705. {
  3706. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3707. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3708. *cfg_base_addr &= (u32) 0x0000ffff;
  3709. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3710. if (*cfg_base_addr_index == -1) {
  3711. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3712. return -ENODEV;
  3713. }
  3714. return 0;
  3715. }
  3716. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3717. {
  3718. u64 cfg_offset;
  3719. u32 cfg_base_addr;
  3720. u64 cfg_base_addr_index;
  3721. u32 trans_offset;
  3722. int rc;
  3723. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3724. &cfg_base_addr_index, &cfg_offset);
  3725. if (rc)
  3726. return rc;
  3727. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3728. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3729. if (!h->cfgtable)
  3730. return -ENOMEM;
  3731. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3732. if (rc)
  3733. return rc;
  3734. /* Find performant mode table. */
  3735. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3736. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3737. cfg_base_addr_index)+cfg_offset+trans_offset,
  3738. sizeof(*h->transtable));
  3739. if (!h->transtable)
  3740. return -ENOMEM;
  3741. return 0;
  3742. }
  3743. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3744. {
  3745. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3746. /* Limit commands in memory limited kdump scenario. */
  3747. if (reset_devices && h->max_commands > 32)
  3748. h->max_commands = 32;
  3749. if (h->max_commands < 16) {
  3750. dev_warn(&h->pdev->dev, "Controller reports "
  3751. "max supported commands of %d, an obvious lie. "
  3752. "Using 16. Ensure that firmware is up to date.\n",
  3753. h->max_commands);
  3754. h->max_commands = 16;
  3755. }
  3756. }
  3757. /* Interrogate the hardware for some limits:
  3758. * max commands, max SG elements without chaining, and with chaining,
  3759. * SG chain block size, etc.
  3760. */
  3761. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3762. {
  3763. hpsa_get_max_perf_mode_cmds(h);
  3764. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3765. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3766. /*
  3767. * Limit in-command s/g elements to 32 save dma'able memory.
  3768. * Howvever spec says if 0, use 31
  3769. */
  3770. h->max_cmd_sg_entries = 31;
  3771. if (h->maxsgentries > 512) {
  3772. h->max_cmd_sg_entries = 32;
  3773. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3774. h->maxsgentries--; /* save one for chain pointer */
  3775. } else {
  3776. h->maxsgentries = 31; /* default to traditional values */
  3777. h->chainsize = 0;
  3778. }
  3779. /* Find out what task management functions are supported and cache */
  3780. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3781. }
  3782. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3783. {
  3784. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3785. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3786. return false;
  3787. }
  3788. return true;
  3789. }
  3790. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3791. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3792. {
  3793. #ifdef CONFIG_X86
  3794. u32 prefetch;
  3795. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3796. prefetch |= 0x100;
  3797. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3798. #endif
  3799. }
  3800. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3801. * in a prefetch beyond physical memory.
  3802. */
  3803. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3804. {
  3805. u32 dma_prefetch;
  3806. if (h->board_id != 0x3225103C)
  3807. return;
  3808. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3809. dma_prefetch |= 0x8000;
  3810. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3811. }
  3812. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3813. {
  3814. int i;
  3815. u32 doorbell_value;
  3816. unsigned long flags;
  3817. /* under certain very rare conditions, this can take awhile.
  3818. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3819. * as we enter this code.)
  3820. */
  3821. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3822. spin_lock_irqsave(&h->lock, flags);
  3823. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3824. spin_unlock_irqrestore(&h->lock, flags);
  3825. if (!(doorbell_value & CFGTBL_ChangeReq))
  3826. break;
  3827. /* delay and try again */
  3828. usleep_range(10000, 20000);
  3829. }
  3830. }
  3831. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3832. {
  3833. u32 trans_support;
  3834. trans_support = readl(&(h->cfgtable->TransportSupport));
  3835. if (!(trans_support & SIMPLE_MODE))
  3836. return -ENOTSUPP;
  3837. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3838. /* Update the field, and then ring the doorbell */
  3839. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3840. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3841. hpsa_wait_for_mode_change_ack(h);
  3842. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3843. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3844. dev_warn(&h->pdev->dev,
  3845. "unable to get board into simple mode\n");
  3846. return -ENODEV;
  3847. }
  3848. h->transMethod = CFGTBL_Trans_Simple;
  3849. return 0;
  3850. }
  3851. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3852. {
  3853. int prod_index, err;
  3854. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3855. if (prod_index < 0)
  3856. return -ENODEV;
  3857. h->product_name = products[prod_index].product_name;
  3858. h->access = *(products[prod_index].access);
  3859. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3860. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3861. err = pci_enable_device(h->pdev);
  3862. if (err) {
  3863. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3864. return err;
  3865. }
  3866. /* Enable bus mastering (pci_disable_device may disable this) */
  3867. pci_set_master(h->pdev);
  3868. err = pci_request_regions(h->pdev, HPSA);
  3869. if (err) {
  3870. dev_err(&h->pdev->dev,
  3871. "cannot obtain PCI resources, aborting\n");
  3872. return err;
  3873. }
  3874. hpsa_interrupt_mode(h);
  3875. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3876. if (err)
  3877. goto err_out_free_res;
  3878. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3879. if (!h->vaddr) {
  3880. err = -ENOMEM;
  3881. goto err_out_free_res;
  3882. }
  3883. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3884. if (err)
  3885. goto err_out_free_res;
  3886. err = hpsa_find_cfgtables(h);
  3887. if (err)
  3888. goto err_out_free_res;
  3889. hpsa_find_board_params(h);
  3890. if (!hpsa_CISS_signature_present(h)) {
  3891. err = -ENODEV;
  3892. goto err_out_free_res;
  3893. }
  3894. hpsa_enable_scsi_prefetch(h);
  3895. hpsa_p600_dma_prefetch_quirk(h);
  3896. err = hpsa_enter_simple_mode(h);
  3897. if (err)
  3898. goto err_out_free_res;
  3899. return 0;
  3900. err_out_free_res:
  3901. if (h->transtable)
  3902. iounmap(h->transtable);
  3903. if (h->cfgtable)
  3904. iounmap(h->cfgtable);
  3905. if (h->vaddr)
  3906. iounmap(h->vaddr);
  3907. pci_disable_device(h->pdev);
  3908. pci_release_regions(h->pdev);
  3909. return err;
  3910. }
  3911. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3912. {
  3913. int rc;
  3914. #define HBA_INQUIRY_BYTE_COUNT 64
  3915. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3916. if (!h->hba_inquiry_data)
  3917. return;
  3918. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3919. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3920. if (rc != 0) {
  3921. kfree(h->hba_inquiry_data);
  3922. h->hba_inquiry_data = NULL;
  3923. }
  3924. }
  3925. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3926. {
  3927. int rc, i;
  3928. if (!reset_devices)
  3929. return 0;
  3930. /* Reset the controller with a PCI power-cycle or via doorbell */
  3931. rc = hpsa_kdump_hard_reset_controller(pdev);
  3932. /* -ENOTSUPP here means we cannot reset the controller
  3933. * but it's already (and still) up and running in
  3934. * "performant mode". Or, it might be 640x, which can't reset
  3935. * due to concerns about shared bbwc between 6402/6404 pair.
  3936. */
  3937. if (rc == -ENOTSUPP)
  3938. return rc; /* just try to do the kdump anyhow. */
  3939. if (rc)
  3940. return -ENODEV;
  3941. /* Now try to get the controller to respond to a no-op */
  3942. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3943. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3944. if (hpsa_noop(pdev) == 0)
  3945. break;
  3946. else
  3947. dev_warn(&pdev->dev, "no-op failed%s\n",
  3948. (i < 11 ? "; re-trying" : ""));
  3949. }
  3950. return 0;
  3951. }
  3952. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3953. {
  3954. h->cmd_pool_bits = kzalloc(
  3955. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3956. sizeof(unsigned long), GFP_KERNEL);
  3957. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3958. h->nr_cmds * sizeof(*h->cmd_pool),
  3959. &(h->cmd_pool_dhandle));
  3960. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3961. h->nr_cmds * sizeof(*h->errinfo_pool),
  3962. &(h->errinfo_pool_dhandle));
  3963. if ((h->cmd_pool_bits == NULL)
  3964. || (h->cmd_pool == NULL)
  3965. || (h->errinfo_pool == NULL)) {
  3966. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3967. return -ENOMEM;
  3968. }
  3969. return 0;
  3970. }
  3971. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3972. {
  3973. kfree(h->cmd_pool_bits);
  3974. if (h->cmd_pool)
  3975. pci_free_consistent(h->pdev,
  3976. h->nr_cmds * sizeof(struct CommandList),
  3977. h->cmd_pool, h->cmd_pool_dhandle);
  3978. if (h->errinfo_pool)
  3979. pci_free_consistent(h->pdev,
  3980. h->nr_cmds * sizeof(struct ErrorInfo),
  3981. h->errinfo_pool,
  3982. h->errinfo_pool_dhandle);
  3983. }
  3984. static int hpsa_request_irq(struct ctlr_info *h,
  3985. irqreturn_t (*msixhandler)(int, void *),
  3986. irqreturn_t (*intxhandler)(int, void *))
  3987. {
  3988. int rc, i;
  3989. /*
  3990. * initialize h->q[x] = x so that interrupt handlers know which
  3991. * queue to process.
  3992. */
  3993. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3994. h->q[i] = (u8) i;
  3995. if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
  3996. /* If performant mode and MSI-X, use multiple reply queues */
  3997. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3998. rc = request_irq(h->intr[i], msixhandler,
  3999. 0, h->devname,
  4000. &h->q[i]);
  4001. } else {
  4002. /* Use single reply pool */
  4003. if (h->msix_vector || h->msi_vector) {
  4004. rc = request_irq(h->intr[h->intr_mode],
  4005. msixhandler, 0, h->devname,
  4006. &h->q[h->intr_mode]);
  4007. } else {
  4008. rc = request_irq(h->intr[h->intr_mode],
  4009. intxhandler, IRQF_SHARED, h->devname,
  4010. &h->q[h->intr_mode]);
  4011. }
  4012. }
  4013. if (rc) {
  4014. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  4015. h->intr[h->intr_mode], h->devname);
  4016. return -ENODEV;
  4017. }
  4018. return 0;
  4019. }
  4020. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  4021. {
  4022. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  4023. HPSA_RESET_TYPE_CONTROLLER)) {
  4024. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  4025. return -EIO;
  4026. }
  4027. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  4028. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  4029. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  4030. return -1;
  4031. }
  4032. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  4033. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  4034. dev_warn(&h->pdev->dev, "Board failed to become ready "
  4035. "after soft reset.\n");
  4036. return -1;
  4037. }
  4038. return 0;
  4039. }
  4040. static void free_irqs(struct ctlr_info *h)
  4041. {
  4042. int i;
  4043. if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
  4044. /* Single reply queue, only one irq to free */
  4045. i = h->intr_mode;
  4046. free_irq(h->intr[i], &h->q[i]);
  4047. return;
  4048. }
  4049. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4050. free_irq(h->intr[i], &h->q[i]);
  4051. }
  4052. static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
  4053. {
  4054. free_irqs(h);
  4055. #ifdef CONFIG_PCI_MSI
  4056. if (h->msix_vector) {
  4057. if (h->pdev->msix_enabled)
  4058. pci_disable_msix(h->pdev);
  4059. } else if (h->msi_vector) {
  4060. if (h->pdev->msi_enabled)
  4061. pci_disable_msi(h->pdev);
  4062. }
  4063. #endif /* CONFIG_PCI_MSI */
  4064. }
  4065. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  4066. {
  4067. hpsa_free_irqs_and_disable_msix(h);
  4068. hpsa_free_sg_chain_blocks(h);
  4069. hpsa_free_cmd_pool(h);
  4070. kfree(h->blockFetchTable);
  4071. pci_free_consistent(h->pdev, h->reply_pool_size,
  4072. h->reply_pool, h->reply_pool_dhandle);
  4073. if (h->vaddr)
  4074. iounmap(h->vaddr);
  4075. if (h->transtable)
  4076. iounmap(h->transtable);
  4077. if (h->cfgtable)
  4078. iounmap(h->cfgtable);
  4079. pci_release_regions(h->pdev);
  4080. kfree(h);
  4081. }
  4082. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  4083. {
  4084. assert_spin_locked(&lockup_detector_lock);
  4085. if (!hpsa_lockup_detector)
  4086. return;
  4087. if (h->lockup_detected)
  4088. return; /* already stopped the lockup detector */
  4089. list_del(&h->lockup_list);
  4090. }
  4091. /* Called when controller lockup detected. */
  4092. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  4093. {
  4094. struct CommandList *c = NULL;
  4095. assert_spin_locked(&h->lock);
  4096. /* Mark all outstanding commands as failed and complete them. */
  4097. while (!list_empty(list)) {
  4098. c = list_entry(list->next, struct CommandList, list);
  4099. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  4100. finish_cmd(c);
  4101. }
  4102. }
  4103. static void controller_lockup_detected(struct ctlr_info *h)
  4104. {
  4105. unsigned long flags;
  4106. assert_spin_locked(&lockup_detector_lock);
  4107. remove_ctlr_from_lockup_detector_list(h);
  4108. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4109. spin_lock_irqsave(&h->lock, flags);
  4110. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  4111. spin_unlock_irqrestore(&h->lock, flags);
  4112. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  4113. h->lockup_detected);
  4114. pci_disable_device(h->pdev);
  4115. spin_lock_irqsave(&h->lock, flags);
  4116. fail_all_cmds_on_list(h, &h->cmpQ);
  4117. fail_all_cmds_on_list(h, &h->reqQ);
  4118. spin_unlock_irqrestore(&h->lock, flags);
  4119. }
  4120. static void detect_controller_lockup(struct ctlr_info *h)
  4121. {
  4122. u64 now;
  4123. u32 heartbeat;
  4124. unsigned long flags;
  4125. assert_spin_locked(&lockup_detector_lock);
  4126. now = get_jiffies_64();
  4127. /* If we've received an interrupt recently, we're ok. */
  4128. if (time_after64(h->last_intr_timestamp +
  4129. (h->heartbeat_sample_interval), now))
  4130. return;
  4131. /*
  4132. * If we've already checked the heartbeat recently, we're ok.
  4133. * This could happen if someone sends us a signal. We
  4134. * otherwise don't care about signals in this thread.
  4135. */
  4136. if (time_after64(h->last_heartbeat_timestamp +
  4137. (h->heartbeat_sample_interval), now))
  4138. return;
  4139. /* If heartbeat has not changed since we last looked, we're not ok. */
  4140. spin_lock_irqsave(&h->lock, flags);
  4141. heartbeat = readl(&h->cfgtable->HeartBeat);
  4142. spin_unlock_irqrestore(&h->lock, flags);
  4143. if (h->last_heartbeat == heartbeat) {
  4144. controller_lockup_detected(h);
  4145. return;
  4146. }
  4147. /* We're ok. */
  4148. h->last_heartbeat = heartbeat;
  4149. h->last_heartbeat_timestamp = now;
  4150. }
  4151. static int detect_controller_lockup_thread(void *notused)
  4152. {
  4153. struct ctlr_info *h;
  4154. unsigned long flags;
  4155. while (1) {
  4156. struct list_head *this, *tmp;
  4157. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4158. if (kthread_should_stop())
  4159. break;
  4160. spin_lock_irqsave(&lockup_detector_lock, flags);
  4161. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4162. h = list_entry(this, struct ctlr_info, lockup_list);
  4163. detect_controller_lockup(h);
  4164. }
  4165. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4166. }
  4167. return 0;
  4168. }
  4169. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4170. {
  4171. unsigned long flags;
  4172. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  4173. spin_lock_irqsave(&lockup_detector_lock, flags);
  4174. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4175. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4176. }
  4177. static void start_controller_lockup_detector(struct ctlr_info *h)
  4178. {
  4179. /* Start the lockup detector thread if not already started */
  4180. if (!hpsa_lockup_detector) {
  4181. spin_lock_init(&lockup_detector_lock);
  4182. hpsa_lockup_detector =
  4183. kthread_run(detect_controller_lockup_thread,
  4184. NULL, HPSA);
  4185. }
  4186. if (!hpsa_lockup_detector) {
  4187. dev_warn(&h->pdev->dev,
  4188. "Could not start lockup detector thread\n");
  4189. return;
  4190. }
  4191. add_ctlr_to_lockup_detector_list(h);
  4192. }
  4193. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4194. {
  4195. unsigned long flags;
  4196. spin_lock_irqsave(&lockup_detector_lock, flags);
  4197. remove_ctlr_from_lockup_detector_list(h);
  4198. /* If the list of ctlr's to monitor is empty, stop the thread */
  4199. if (list_empty(&hpsa_ctlr_list)) {
  4200. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4201. kthread_stop(hpsa_lockup_detector);
  4202. spin_lock_irqsave(&lockup_detector_lock, flags);
  4203. hpsa_lockup_detector = NULL;
  4204. }
  4205. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4206. }
  4207. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  4208. const struct pci_device_id *ent)
  4209. {
  4210. int dac, rc;
  4211. struct ctlr_info *h;
  4212. int try_soft_reset = 0;
  4213. unsigned long flags;
  4214. if (number_of_controllers == 0)
  4215. printk(KERN_INFO DRIVER_NAME "\n");
  4216. rc = hpsa_init_reset_devices(pdev);
  4217. if (rc) {
  4218. if (rc != -ENOTSUPP)
  4219. return rc;
  4220. /* If the reset fails in a particular way (it has no way to do
  4221. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4222. * a soft reset once we get the controller configured up to the
  4223. * point that it can accept a command.
  4224. */
  4225. try_soft_reset = 1;
  4226. rc = 0;
  4227. }
  4228. reinit_after_soft_reset:
  4229. /* Command structures must be aligned on a 32-byte boundary because
  4230. * the 5 lower bits of the address are used by the hardware. and by
  4231. * the driver. See comments in hpsa.h for more info.
  4232. */
  4233. #define COMMANDLIST_ALIGNMENT 32
  4234. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4235. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4236. if (!h)
  4237. return -ENOMEM;
  4238. h->pdev = pdev;
  4239. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4240. INIT_LIST_HEAD(&h->cmpQ);
  4241. INIT_LIST_HEAD(&h->reqQ);
  4242. spin_lock_init(&h->lock);
  4243. spin_lock_init(&h->scan_lock);
  4244. rc = hpsa_pci_init(h);
  4245. if (rc != 0)
  4246. goto clean1;
  4247. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4248. h->ctlr = number_of_controllers;
  4249. number_of_controllers++;
  4250. /* configure PCI DMA stuff */
  4251. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4252. if (rc == 0) {
  4253. dac = 1;
  4254. } else {
  4255. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4256. if (rc == 0) {
  4257. dac = 0;
  4258. } else {
  4259. dev_err(&pdev->dev, "no suitable DMA available\n");
  4260. goto clean1;
  4261. }
  4262. }
  4263. /* make sure the board interrupts are off */
  4264. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4265. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4266. goto clean2;
  4267. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4268. h->devname, pdev->device,
  4269. h->intr[h->intr_mode], dac ? "" : " not");
  4270. if (hpsa_allocate_cmd_pool(h))
  4271. goto clean4;
  4272. if (hpsa_allocate_sg_chain_blocks(h))
  4273. goto clean4;
  4274. init_waitqueue_head(&h->scan_wait_queue);
  4275. h->scan_finished = 1; /* no scan currently in progress */
  4276. pci_set_drvdata(pdev, h);
  4277. h->ndevices = 0;
  4278. h->scsi_host = NULL;
  4279. spin_lock_init(&h->devlock);
  4280. hpsa_put_ctlr_into_performant_mode(h);
  4281. /* At this point, the controller is ready to take commands.
  4282. * Now, if reset_devices and the hard reset didn't work, try
  4283. * the soft reset and see if that works.
  4284. */
  4285. if (try_soft_reset) {
  4286. /* This is kind of gross. We may or may not get a completion
  4287. * from the soft reset command, and if we do, then the value
  4288. * from the fifo may or may not be valid. So, we wait 10 secs
  4289. * after the reset throwing away any completions we get during
  4290. * that time. Unregister the interrupt handler and register
  4291. * fake ones to scoop up any residual completions.
  4292. */
  4293. spin_lock_irqsave(&h->lock, flags);
  4294. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4295. spin_unlock_irqrestore(&h->lock, flags);
  4296. free_irqs(h);
  4297. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4298. hpsa_intx_discard_completions);
  4299. if (rc) {
  4300. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4301. "soft reset.\n");
  4302. goto clean4;
  4303. }
  4304. rc = hpsa_kdump_soft_reset(h);
  4305. if (rc)
  4306. /* Neither hard nor soft reset worked, we're hosed. */
  4307. goto clean4;
  4308. dev_info(&h->pdev->dev, "Board READY.\n");
  4309. dev_info(&h->pdev->dev,
  4310. "Waiting for stale completions to drain.\n");
  4311. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4312. msleep(10000);
  4313. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4314. rc = controller_reset_failed(h->cfgtable);
  4315. if (rc)
  4316. dev_info(&h->pdev->dev,
  4317. "Soft reset appears to have failed.\n");
  4318. /* since the controller's reset, we have to go back and re-init
  4319. * everything. Easiest to just forget what we've done and do it
  4320. * all over again.
  4321. */
  4322. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4323. try_soft_reset = 0;
  4324. if (rc)
  4325. /* don't go to clean4, we already unallocated */
  4326. return -ENODEV;
  4327. goto reinit_after_soft_reset;
  4328. }
  4329. /* Turn the interrupts on so we can service requests */
  4330. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4331. hpsa_hba_inquiry(h);
  4332. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4333. start_controller_lockup_detector(h);
  4334. return 1;
  4335. clean4:
  4336. hpsa_free_sg_chain_blocks(h);
  4337. hpsa_free_cmd_pool(h);
  4338. free_irqs(h);
  4339. clean2:
  4340. clean1:
  4341. kfree(h);
  4342. return rc;
  4343. }
  4344. static void hpsa_flush_cache(struct ctlr_info *h)
  4345. {
  4346. char *flush_buf;
  4347. struct CommandList *c;
  4348. flush_buf = kzalloc(4, GFP_KERNEL);
  4349. if (!flush_buf)
  4350. return;
  4351. c = cmd_special_alloc(h);
  4352. if (!c) {
  4353. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4354. goto out_of_memory;
  4355. }
  4356. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4357. RAID_CTLR_LUNID, TYPE_CMD);
  4358. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4359. if (c->err_info->CommandStatus != 0)
  4360. dev_warn(&h->pdev->dev,
  4361. "error flushing cache on controller\n");
  4362. cmd_special_free(h, c);
  4363. out_of_memory:
  4364. kfree(flush_buf);
  4365. }
  4366. static void hpsa_shutdown(struct pci_dev *pdev)
  4367. {
  4368. struct ctlr_info *h;
  4369. h = pci_get_drvdata(pdev);
  4370. /* Turn board interrupts off and send the flush cache command
  4371. * sendcmd will turn off interrupt, and send the flush...
  4372. * To write all data in the battery backed cache to disks
  4373. */
  4374. hpsa_flush_cache(h);
  4375. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4376. hpsa_free_irqs_and_disable_msix(h);
  4377. }
  4378. static void __devexit hpsa_free_device_info(struct ctlr_info *h)
  4379. {
  4380. int i;
  4381. for (i = 0; i < h->ndevices; i++)
  4382. kfree(h->dev[i]);
  4383. }
  4384. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  4385. {
  4386. struct ctlr_info *h;
  4387. if (pci_get_drvdata(pdev) == NULL) {
  4388. dev_err(&pdev->dev, "unable to remove device\n");
  4389. return;
  4390. }
  4391. h = pci_get_drvdata(pdev);
  4392. stop_controller_lockup_detector(h);
  4393. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4394. hpsa_shutdown(pdev);
  4395. iounmap(h->vaddr);
  4396. iounmap(h->transtable);
  4397. iounmap(h->cfgtable);
  4398. hpsa_free_device_info(h);
  4399. hpsa_free_sg_chain_blocks(h);
  4400. pci_free_consistent(h->pdev,
  4401. h->nr_cmds * sizeof(struct CommandList),
  4402. h->cmd_pool, h->cmd_pool_dhandle);
  4403. pci_free_consistent(h->pdev,
  4404. h->nr_cmds * sizeof(struct ErrorInfo),
  4405. h->errinfo_pool, h->errinfo_pool_dhandle);
  4406. pci_free_consistent(h->pdev, h->reply_pool_size,
  4407. h->reply_pool, h->reply_pool_dhandle);
  4408. kfree(h->cmd_pool_bits);
  4409. kfree(h->blockFetchTable);
  4410. kfree(h->hba_inquiry_data);
  4411. pci_disable_device(pdev);
  4412. pci_release_regions(pdev);
  4413. pci_set_drvdata(pdev, NULL);
  4414. kfree(h);
  4415. }
  4416. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4417. __attribute__((unused)) pm_message_t state)
  4418. {
  4419. return -ENOSYS;
  4420. }
  4421. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4422. {
  4423. return -ENOSYS;
  4424. }
  4425. static struct pci_driver hpsa_pci_driver = {
  4426. .name = HPSA,
  4427. .probe = hpsa_init_one,
  4428. .remove = __devexit_p(hpsa_remove_one),
  4429. .id_table = hpsa_pci_device_id, /* id_table */
  4430. .shutdown = hpsa_shutdown,
  4431. .suspend = hpsa_suspend,
  4432. .resume = hpsa_resume,
  4433. };
  4434. /* Fill in bucket_map[], given nsgs (the max number of
  4435. * scatter gather elements supported) and bucket[],
  4436. * which is an array of 8 integers. The bucket[] array
  4437. * contains 8 different DMA transfer sizes (in 16
  4438. * byte increments) which the controller uses to fetch
  4439. * commands. This function fills in bucket_map[], which
  4440. * maps a given number of scatter gather elements to one of
  4441. * the 8 DMA transfer sizes. The point of it is to allow the
  4442. * controller to only do as much DMA as needed to fetch the
  4443. * command, with the DMA transfer size encoded in the lower
  4444. * bits of the command address.
  4445. */
  4446. static void calc_bucket_map(int bucket[], int num_buckets,
  4447. int nsgs, int *bucket_map)
  4448. {
  4449. int i, j, b, size;
  4450. /* even a command with 0 SGs requires 4 blocks */
  4451. #define MINIMUM_TRANSFER_BLOCKS 4
  4452. #define NUM_BUCKETS 8
  4453. /* Note, bucket_map must have nsgs+1 entries. */
  4454. for (i = 0; i <= nsgs; i++) {
  4455. /* Compute size of a command with i SG entries */
  4456. size = i + MINIMUM_TRANSFER_BLOCKS;
  4457. b = num_buckets; /* Assume the biggest bucket */
  4458. /* Find the bucket that is just big enough */
  4459. for (j = 0; j < 8; j++) {
  4460. if (bucket[j] >= size) {
  4461. b = j;
  4462. break;
  4463. }
  4464. }
  4465. /* for a command with i SG entries, use bucket b. */
  4466. bucket_map[i] = b;
  4467. }
  4468. }
  4469. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  4470. u32 use_short_tags)
  4471. {
  4472. int i;
  4473. unsigned long register_value;
  4474. /* This is a bit complicated. There are 8 registers on
  4475. * the controller which we write to to tell it 8 different
  4476. * sizes of commands which there may be. It's a way of
  4477. * reducing the DMA done to fetch each command. Encoded into
  4478. * each command's tag are 3 bits which communicate to the controller
  4479. * which of the eight sizes that command fits within. The size of
  4480. * each command depends on how many scatter gather entries there are.
  4481. * Each SG entry requires 16 bytes. The eight registers are programmed
  4482. * with the number of 16-byte blocks a command of that size requires.
  4483. * The smallest command possible requires 5 such 16 byte blocks.
  4484. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4485. * blocks. Note, this only extends to the SG entries contained
  4486. * within the command block, and does not extend to chained blocks
  4487. * of SG elements. bft[] contains the eight values we write to
  4488. * the registers. They are not evenly distributed, but have more
  4489. * sizes for small commands, and fewer sizes for larger commands.
  4490. */
  4491. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4492. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4493. /* 5 = 1 s/g entry or 4k
  4494. * 6 = 2 s/g entry or 8k
  4495. * 8 = 4 s/g entry or 16k
  4496. * 10 = 6 s/g entry or 24k
  4497. */
  4498. /* Controller spec: zero out this buffer. */
  4499. memset(h->reply_pool, 0, h->reply_pool_size);
  4500. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4501. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4502. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4503. for (i = 0; i < 8; i++)
  4504. writel(bft[i], &h->transtable->BlockFetch[i]);
  4505. /* size of controller ring buffer */
  4506. writel(h->max_commands, &h->transtable->RepQSize);
  4507. writel(h->nreply_queues, &h->transtable->RepQCount);
  4508. writel(0, &h->transtable->RepQCtrAddrLow32);
  4509. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4510. for (i = 0; i < h->nreply_queues; i++) {
  4511. writel(0, &h->transtable->RepQAddr[i].upper);
  4512. writel(h->reply_pool_dhandle +
  4513. (h->max_commands * sizeof(u64) * i),
  4514. &h->transtable->RepQAddr[i].lower);
  4515. }
  4516. writel(CFGTBL_Trans_Performant | use_short_tags |
  4517. CFGTBL_Trans_enable_directed_msix,
  4518. &(h->cfgtable->HostWrite.TransportRequest));
  4519. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4520. hpsa_wait_for_mode_change_ack(h);
  4521. register_value = readl(&(h->cfgtable->TransportActive));
  4522. if (!(register_value & CFGTBL_Trans_Performant)) {
  4523. dev_warn(&h->pdev->dev, "unable to get board into"
  4524. " performant mode\n");
  4525. return;
  4526. }
  4527. /* Change the access methods to the performant access methods */
  4528. h->access = SA5_performant_access;
  4529. h->transMethod = CFGTBL_Trans_Performant;
  4530. }
  4531. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4532. {
  4533. u32 trans_support;
  4534. int i;
  4535. if (hpsa_simple_mode)
  4536. return;
  4537. trans_support = readl(&(h->cfgtable->TransportSupport));
  4538. if (!(trans_support & PERFORMANT_MODE))
  4539. return;
  4540. h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
  4541. hpsa_get_max_perf_mode_cmds(h);
  4542. /* Performant mode ring buffer and supporting data structures */
  4543. h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
  4544. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4545. &(h->reply_pool_dhandle));
  4546. for (i = 0; i < h->nreply_queues; i++) {
  4547. h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
  4548. h->reply_queue[i].size = h->max_commands;
  4549. h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
  4550. h->reply_queue[i].current_entry = 0;
  4551. }
  4552. /* Need a block fetch table for performant mode */
  4553. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4554. sizeof(u32)), GFP_KERNEL);
  4555. if ((h->reply_pool == NULL)
  4556. || (h->blockFetchTable == NULL))
  4557. goto clean_up;
  4558. hpsa_enter_performant_mode(h,
  4559. trans_support & CFGTBL_Trans_use_short_tags);
  4560. return;
  4561. clean_up:
  4562. if (h->reply_pool)
  4563. pci_free_consistent(h->pdev, h->reply_pool_size,
  4564. h->reply_pool, h->reply_pool_dhandle);
  4565. kfree(h->blockFetchTable);
  4566. }
  4567. /*
  4568. * This is it. Register the PCI driver information for the cards we control
  4569. * the OS will call our registered routines when it finds one of our cards.
  4570. */
  4571. static int __init hpsa_init(void)
  4572. {
  4573. return pci_register_driver(&hpsa_pci_driver);
  4574. }
  4575. static void __exit hpsa_cleanup(void)
  4576. {
  4577. pci_unregister_driver(&hpsa_pci_driver);
  4578. }
  4579. module_init(hpsa_init);
  4580. module_exit(hpsa_cleanup);