44x_tlb.c 10 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2007
  16. *
  17. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  18. */
  19. #include <linux/types.h>
  20. #include <linux/string.h>
  21. #include <linux/kvm.h>
  22. #include <linux/kvm_host.h>
  23. #include <linux/highmem.h>
  24. #include <asm/mmu-44x.h>
  25. #include <asm/kvm_ppc.h>
  26. #include <asm/kvm_44x.h>
  27. #include "44x_tlb.h"
  28. #define PPC44x_TLB_UATTR_MASK \
  29. (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
  30. #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
  31. #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
  32. static unsigned int kvmppc_tlb_44x_pos;
  33. #ifdef DEBUG
  34. void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
  35. {
  36. struct kvmppc_44x_tlbe *tlbe;
  37. int i;
  38. printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
  39. printk("| %2s | %3s | %8s | %8s | %8s |\n",
  40. "nr", "tid", "word0", "word1", "word2");
  41. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  42. tlbe = &vcpu_44x->guest_tlb[i];
  43. if (tlbe->word0 & PPC44x_TLB_VALID)
  44. printk(" G%2d | %02X | %08X | %08X | %08X |\n",
  45. i, tlbe->tid, tlbe->word0, tlbe->word1,
  46. tlbe->word2);
  47. }
  48. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  49. tlbe = &vcpu_44x->shadow_tlb[i];
  50. if (tlbe->word0 & PPC44x_TLB_VALID)
  51. printk(" S%2d | %02X | %08X | %08X | %08X |\n",
  52. i, tlbe->tid, tlbe->word0, tlbe->word1,
  53. tlbe->word2);
  54. }
  55. }
  56. #endif
  57. static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
  58. {
  59. /* We only care about the guest's permission and user bits. */
  60. attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
  61. if (!usermode) {
  62. /* Guest is in supervisor mode, so we need to translate guest
  63. * supervisor permissions into user permissions. */
  64. attrib &= ~PPC44x_TLB_USER_PERM_MASK;
  65. attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
  66. }
  67. /* Make sure host can always access this memory. */
  68. attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
  69. /* WIMGE = 0b00100 */
  70. attrib |= PPC44x_TLB_M;
  71. return attrib;
  72. }
  73. /* Search the guest TLB for a matching entry. */
  74. int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
  75. unsigned int as)
  76. {
  77. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  78. int i;
  79. /* XXX Replace loop with fancy data structures. */
  80. for (i = 0; i < PPC44x_TLB_SIZE; i++) {
  81. struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
  82. unsigned int tid;
  83. if (eaddr < get_tlb_eaddr(tlbe))
  84. continue;
  85. if (eaddr > get_tlb_end(tlbe))
  86. continue;
  87. tid = get_tlb_tid(tlbe);
  88. if (tid && (tid != pid))
  89. continue;
  90. if (!get_tlb_v(tlbe))
  91. continue;
  92. if (get_tlb_ts(tlbe) != as)
  93. continue;
  94. return i;
  95. }
  96. return -1;
  97. }
  98. struct kvmppc_44x_tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu,
  99. gva_t eaddr)
  100. {
  101. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  102. unsigned int as = !!(vcpu->arch.msr & MSR_IS);
  103. unsigned int index;
  104. index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
  105. if (index == -1)
  106. return NULL;
  107. return &vcpu_44x->guest_tlb[index];
  108. }
  109. struct kvmppc_44x_tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu,
  110. gva_t eaddr)
  111. {
  112. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  113. unsigned int as = !!(vcpu->arch.msr & MSR_DS);
  114. unsigned int index;
  115. index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
  116. if (index == -1)
  117. return NULL;
  118. return &vcpu_44x->guest_tlb[index];
  119. }
  120. static int kvmppc_44x_tlbe_is_writable(struct kvmppc_44x_tlbe *tlbe)
  121. {
  122. return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
  123. }
  124. static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
  125. unsigned int index)
  126. {
  127. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  128. struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[index];
  129. struct page *page = vcpu_44x->shadow_pages[index];
  130. if (get_tlb_v(stlbe)) {
  131. if (kvmppc_44x_tlbe_is_writable(stlbe))
  132. kvm_release_page_dirty(page);
  133. else
  134. kvm_release_page_clean(page);
  135. }
  136. }
  137. void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
  138. {
  139. int i;
  140. for (i = 0; i <= tlb_44x_hwater; i++)
  141. kvmppc_44x_shadow_release(vcpu, i);
  142. }
  143. void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
  144. {
  145. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  146. vcpu_44x->shadow_tlb_mod[i] = 1;
  147. }
  148. /* Caller must ensure that the specified guest TLB entry is safe to insert into
  149. * the shadow TLB. */
  150. void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
  151. u32 flags)
  152. {
  153. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  154. struct page *new_page;
  155. struct kvmppc_44x_tlbe *stlbe;
  156. hpa_t hpaddr;
  157. unsigned int victim;
  158. /* Future optimization: don't overwrite the TLB entry containing the
  159. * current PC (or stack?). */
  160. victim = kvmppc_tlb_44x_pos++;
  161. if (kvmppc_tlb_44x_pos > tlb_44x_hwater)
  162. kvmppc_tlb_44x_pos = 0;
  163. stlbe = &vcpu_44x->shadow_tlb[victim];
  164. /* Get reference to new page. */
  165. new_page = gfn_to_page(vcpu->kvm, gfn);
  166. if (is_error_page(new_page)) {
  167. printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
  168. kvm_release_page_clean(new_page);
  169. return;
  170. }
  171. hpaddr = page_to_phys(new_page);
  172. /* Drop reference to old page. */
  173. kvmppc_44x_shadow_release(vcpu, victim);
  174. vcpu_44x->shadow_pages[victim] = new_page;
  175. /* XXX Make sure (va, size) doesn't overlap any other
  176. * entries. 440x6 user manual says the result would be
  177. * "undefined." */
  178. /* XXX what about AS? */
  179. stlbe->tid = !(asid & 0xff);
  180. /* Force TS=1 for all guest mappings. */
  181. /* For now we hardcode 4KB mappings, but it will be important to
  182. * use host large pages in the future. */
  183. stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
  184. | PPC44x_TLB_4K;
  185. stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
  186. stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
  187. vcpu->arch.msr & MSR_PR);
  188. kvmppc_tlbe_set_modified(vcpu, victim);
  189. KVMTRACE_5D(STLB_WRITE, vcpu, victim,
  190. stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
  191. handler);
  192. }
  193. static void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
  194. gva_t eend, u32 asid)
  195. {
  196. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  197. unsigned int pid = !(asid & 0xff);
  198. int i;
  199. /* XXX Replace loop with fancy data structures. */
  200. for (i = 0; i <= tlb_44x_hwater; i++) {
  201. struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
  202. unsigned int tid;
  203. if (!get_tlb_v(stlbe))
  204. continue;
  205. if (eend < get_tlb_eaddr(stlbe))
  206. continue;
  207. if (eaddr > get_tlb_end(stlbe))
  208. continue;
  209. tid = get_tlb_tid(stlbe);
  210. if (tid && (tid != pid))
  211. continue;
  212. kvmppc_44x_shadow_release(vcpu, i);
  213. stlbe->word0 = 0;
  214. kvmppc_tlbe_set_modified(vcpu, i);
  215. KVMTRACE_5D(STLB_INVAL, vcpu, i,
  216. stlbe->tid, stlbe->word0, stlbe->word1,
  217. stlbe->word2, handler);
  218. }
  219. }
  220. void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
  221. {
  222. vcpu->arch.shadow_pid = !usermode;
  223. }
  224. void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
  225. {
  226. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  227. int i;
  228. if (unlikely(vcpu->arch.pid == new_pid))
  229. return;
  230. vcpu->arch.pid = new_pid;
  231. /* Guest userspace runs with TID=0 mappings and PID=0, to make sure it
  232. * can't access guest kernel mappings (TID=1). When we switch to a new
  233. * guest PID, which will also use host PID=0, we must discard the old guest
  234. * userspace mappings. */
  235. for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_tlb); i++) {
  236. struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
  237. if (get_tlb_tid(stlbe) == 0) {
  238. kvmppc_44x_shadow_release(vcpu, i);
  239. stlbe->word0 = 0;
  240. kvmppc_tlbe_set_modified(vcpu, i);
  241. }
  242. }
  243. }
  244. static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
  245. const struct kvmppc_44x_tlbe *tlbe)
  246. {
  247. gpa_t gpa;
  248. if (!get_tlb_v(tlbe))
  249. return 0;
  250. /* Does it match current guest AS? */
  251. /* XXX what about IS != DS? */
  252. if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
  253. return 0;
  254. gpa = get_tlb_raddr(tlbe);
  255. if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
  256. /* Mapping is not for RAM. */
  257. return 0;
  258. return 1;
  259. }
  260. int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
  261. {
  262. struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
  263. u64 eaddr;
  264. u64 raddr;
  265. u64 asid;
  266. u32 flags;
  267. struct kvmppc_44x_tlbe *tlbe;
  268. unsigned int index;
  269. index = vcpu->arch.gpr[ra];
  270. if (index > PPC44x_TLB_SIZE) {
  271. printk("%s: index %d\n", __func__, index);
  272. kvmppc_dump_vcpu(vcpu);
  273. return EMULATE_FAIL;
  274. }
  275. tlbe = &vcpu_44x->guest_tlb[index];
  276. /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
  277. if (tlbe->word0 & PPC44x_TLB_VALID) {
  278. eaddr = get_tlb_eaddr(tlbe);
  279. asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
  280. kvmppc_mmu_invalidate(vcpu, eaddr, get_tlb_end(tlbe), asid);
  281. }
  282. switch (ws) {
  283. case PPC44x_TLB_PAGEID:
  284. tlbe->tid = get_mmucr_stid(vcpu);
  285. tlbe->word0 = vcpu->arch.gpr[rs];
  286. break;
  287. case PPC44x_TLB_XLAT:
  288. tlbe->word1 = vcpu->arch.gpr[rs];
  289. break;
  290. case PPC44x_TLB_ATTRIB:
  291. tlbe->word2 = vcpu->arch.gpr[rs];
  292. break;
  293. default:
  294. return EMULATE_FAIL;
  295. }
  296. if (tlbe_is_host_safe(vcpu, tlbe)) {
  297. eaddr = get_tlb_eaddr(tlbe);
  298. raddr = get_tlb_raddr(tlbe);
  299. asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
  300. flags = tlbe->word2 & 0xffff;
  301. /* Create a 4KB mapping on the host. If the guest wanted a
  302. * large page, only the first 4KB is mapped here and the rest
  303. * are mapped on the fly. */
  304. kvmppc_mmu_map(vcpu, eaddr, raddr >> PAGE_SHIFT, asid, flags);
  305. }
  306. KVMTRACE_5D(GTLB_WRITE, vcpu, index,
  307. tlbe->tid, tlbe->word0, tlbe->word1, tlbe->word2,
  308. handler);
  309. return EMULATE_DONE;
  310. }
  311. int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
  312. {
  313. u32 ea;
  314. int index;
  315. unsigned int as = get_mmucr_sts(vcpu);
  316. unsigned int pid = get_mmucr_stid(vcpu);
  317. ea = vcpu->arch.gpr[rb];
  318. if (ra)
  319. ea += vcpu->arch.gpr[ra];
  320. index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
  321. if (rc) {
  322. if (index < 0)
  323. vcpu->arch.cr &= ~0x20000000;
  324. else
  325. vcpu->arch.cr |= 0x20000000;
  326. }
  327. vcpu->arch.gpr[rt] = index;
  328. return EMULATE_DONE;
  329. }