qeth_core_main.c 157 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <asm/ebcdic.h>
  22. #include <asm/io.h>
  23. #include <asm/sysinfo.h>
  24. #include <asm/compat.h>
  25. #include "qeth_core.h"
  26. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  27. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  28. /* N P A M L V H */
  29. [QETH_DBF_SETUP] = {"qeth_setup",
  30. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  31. [QETH_DBF_MSG] = {"qeth_msg",
  32. 8, 1, 128, 3, &debug_sprintf_view, NULL},
  33. [QETH_DBF_CTRL] = {"qeth_control",
  34. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  35. };
  36. EXPORT_SYMBOL_GPL(qeth_dbf);
  37. struct qeth_card_list_struct qeth_core_card_list;
  38. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  39. struct kmem_cache *qeth_core_header_cache;
  40. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  41. static struct kmem_cache *qeth_qdio_outbuf_cache;
  42. static struct device *qeth_core_root_dev;
  43. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  44. static struct lock_class_key qdio_out_skb_queue_key;
  45. static struct mutex qeth_mod_mutex;
  46. static void qeth_send_control_data_cb(struct qeth_channel *,
  47. struct qeth_cmd_buffer *);
  48. static int qeth_issue_next_read(struct qeth_card *);
  49. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  50. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  51. static void qeth_free_buffer_pool(struct qeth_card *);
  52. static int qeth_qdio_establish(struct qeth_card *);
  53. static void qeth_free_qdio_buffers(struct qeth_card *);
  54. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  55. struct qeth_qdio_out_buffer *buf,
  56. enum iucv_tx_notify notification);
  57. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  58. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  59. struct qeth_qdio_out_buffer *buf,
  60. enum qeth_qdio_buffer_states newbufstate);
  61. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  62. static struct workqueue_struct *qeth_wq;
  63. static void qeth_close_dev_handler(struct work_struct *work)
  64. {
  65. struct qeth_card *card;
  66. card = container_of(work, struct qeth_card, close_dev_work);
  67. QETH_CARD_TEXT(card, 2, "cldevhdl");
  68. rtnl_lock();
  69. dev_close(card->dev);
  70. rtnl_unlock();
  71. ccwgroup_set_offline(card->gdev);
  72. }
  73. void qeth_close_dev(struct qeth_card *card)
  74. {
  75. QETH_CARD_TEXT(card, 2, "cldevsubm");
  76. queue_work(qeth_wq, &card->close_dev_work);
  77. }
  78. EXPORT_SYMBOL_GPL(qeth_close_dev);
  79. static inline const char *qeth_get_cardname(struct qeth_card *card)
  80. {
  81. if (card->info.guestlan) {
  82. switch (card->info.type) {
  83. case QETH_CARD_TYPE_OSD:
  84. return " Virtual NIC QDIO";
  85. case QETH_CARD_TYPE_IQD:
  86. return " Virtual NIC Hiper";
  87. case QETH_CARD_TYPE_OSM:
  88. return " Virtual NIC QDIO - OSM";
  89. case QETH_CARD_TYPE_OSX:
  90. return " Virtual NIC QDIO - OSX";
  91. default:
  92. return " unknown";
  93. }
  94. } else {
  95. switch (card->info.type) {
  96. case QETH_CARD_TYPE_OSD:
  97. return " OSD Express";
  98. case QETH_CARD_TYPE_IQD:
  99. return " HiperSockets";
  100. case QETH_CARD_TYPE_OSN:
  101. return " OSN QDIO";
  102. case QETH_CARD_TYPE_OSM:
  103. return " OSM QDIO";
  104. case QETH_CARD_TYPE_OSX:
  105. return " OSX QDIO";
  106. default:
  107. return " unknown";
  108. }
  109. }
  110. return " n/a";
  111. }
  112. /* max length to be returned: 14 */
  113. const char *qeth_get_cardname_short(struct qeth_card *card)
  114. {
  115. if (card->info.guestlan) {
  116. switch (card->info.type) {
  117. case QETH_CARD_TYPE_OSD:
  118. return "Virt.NIC QDIO";
  119. case QETH_CARD_TYPE_IQD:
  120. return "Virt.NIC Hiper";
  121. case QETH_CARD_TYPE_OSM:
  122. return "Virt.NIC OSM";
  123. case QETH_CARD_TYPE_OSX:
  124. return "Virt.NIC OSX";
  125. default:
  126. return "unknown";
  127. }
  128. } else {
  129. switch (card->info.type) {
  130. case QETH_CARD_TYPE_OSD:
  131. switch (card->info.link_type) {
  132. case QETH_LINK_TYPE_FAST_ETH:
  133. return "OSD_100";
  134. case QETH_LINK_TYPE_HSTR:
  135. return "HSTR";
  136. case QETH_LINK_TYPE_GBIT_ETH:
  137. return "OSD_1000";
  138. case QETH_LINK_TYPE_10GBIT_ETH:
  139. return "OSD_10GIG";
  140. case QETH_LINK_TYPE_LANE_ETH100:
  141. return "OSD_FE_LANE";
  142. case QETH_LINK_TYPE_LANE_TR:
  143. return "OSD_TR_LANE";
  144. case QETH_LINK_TYPE_LANE_ETH1000:
  145. return "OSD_GbE_LANE";
  146. case QETH_LINK_TYPE_LANE:
  147. return "OSD_ATM_LANE";
  148. default:
  149. return "OSD_Express";
  150. }
  151. case QETH_CARD_TYPE_IQD:
  152. return "HiperSockets";
  153. case QETH_CARD_TYPE_OSN:
  154. return "OSN";
  155. case QETH_CARD_TYPE_OSM:
  156. return "OSM_1000";
  157. case QETH_CARD_TYPE_OSX:
  158. return "OSX_10GIG";
  159. default:
  160. return "unknown";
  161. }
  162. }
  163. return "n/a";
  164. }
  165. void qeth_set_recovery_task(struct qeth_card *card)
  166. {
  167. card->recovery_task = current;
  168. }
  169. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  170. void qeth_clear_recovery_task(struct qeth_card *card)
  171. {
  172. card->recovery_task = NULL;
  173. }
  174. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  175. static bool qeth_is_recovery_task(const struct qeth_card *card)
  176. {
  177. return card->recovery_task == current;
  178. }
  179. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  180. int clear_start_mask)
  181. {
  182. unsigned long flags;
  183. spin_lock_irqsave(&card->thread_mask_lock, flags);
  184. card->thread_allowed_mask = threads;
  185. if (clear_start_mask)
  186. card->thread_start_mask &= threads;
  187. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  188. wake_up(&card->wait_q);
  189. }
  190. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  191. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  192. {
  193. unsigned long flags;
  194. int rc = 0;
  195. spin_lock_irqsave(&card->thread_mask_lock, flags);
  196. rc = (card->thread_running_mask & threads);
  197. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  198. return rc;
  199. }
  200. EXPORT_SYMBOL_GPL(qeth_threads_running);
  201. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  202. {
  203. if (qeth_is_recovery_task(card))
  204. return 0;
  205. return wait_event_interruptible(card->wait_q,
  206. qeth_threads_running(card, threads) == 0);
  207. }
  208. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  209. void qeth_clear_working_pool_list(struct qeth_card *card)
  210. {
  211. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  212. QETH_CARD_TEXT(card, 5, "clwrklst");
  213. list_for_each_entry_safe(pool_entry, tmp,
  214. &card->qdio.in_buf_pool.entry_list, list){
  215. list_del(&pool_entry->list);
  216. }
  217. }
  218. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  219. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  220. {
  221. struct qeth_buffer_pool_entry *pool_entry;
  222. void *ptr;
  223. int i, j;
  224. QETH_CARD_TEXT(card, 5, "alocpool");
  225. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  226. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  227. if (!pool_entry) {
  228. qeth_free_buffer_pool(card);
  229. return -ENOMEM;
  230. }
  231. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  232. ptr = (void *) __get_free_page(GFP_KERNEL);
  233. if (!ptr) {
  234. while (j > 0)
  235. free_page((unsigned long)
  236. pool_entry->elements[--j]);
  237. kfree(pool_entry);
  238. qeth_free_buffer_pool(card);
  239. return -ENOMEM;
  240. }
  241. pool_entry->elements[j] = ptr;
  242. }
  243. list_add(&pool_entry->init_list,
  244. &card->qdio.init_pool.entry_list);
  245. }
  246. return 0;
  247. }
  248. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  249. {
  250. QETH_CARD_TEXT(card, 2, "realcbp");
  251. if ((card->state != CARD_STATE_DOWN) &&
  252. (card->state != CARD_STATE_RECOVER))
  253. return -EPERM;
  254. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  255. qeth_clear_working_pool_list(card);
  256. qeth_free_buffer_pool(card);
  257. card->qdio.in_buf_pool.buf_count = bufcnt;
  258. card->qdio.init_pool.buf_count = bufcnt;
  259. return qeth_alloc_buffer_pool(card);
  260. }
  261. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  262. static inline int qeth_cq_init(struct qeth_card *card)
  263. {
  264. int rc;
  265. if (card->options.cq == QETH_CQ_ENABLED) {
  266. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  267. memset(card->qdio.c_q->qdio_bufs, 0,
  268. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  269. card->qdio.c_q->next_buf_to_init = 127;
  270. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  271. card->qdio.no_in_queues - 1, 0,
  272. 127);
  273. if (rc) {
  274. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  275. goto out;
  276. }
  277. }
  278. rc = 0;
  279. out:
  280. return rc;
  281. }
  282. static inline int qeth_alloc_cq(struct qeth_card *card)
  283. {
  284. int rc;
  285. if (card->options.cq == QETH_CQ_ENABLED) {
  286. int i;
  287. struct qdio_outbuf_state *outbuf_states;
  288. QETH_DBF_TEXT(SETUP, 2, "cqon");
  289. card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
  290. GFP_KERNEL);
  291. if (!card->qdio.c_q) {
  292. rc = -1;
  293. goto kmsg_out;
  294. }
  295. QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
  296. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  297. card->qdio.c_q->bufs[i].buffer =
  298. &card->qdio.c_q->qdio_bufs[i];
  299. }
  300. card->qdio.no_in_queues = 2;
  301. card->qdio.out_bufstates =
  302. kzalloc(card->qdio.no_out_queues *
  303. QDIO_MAX_BUFFERS_PER_Q *
  304. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  305. outbuf_states = card->qdio.out_bufstates;
  306. if (outbuf_states == NULL) {
  307. rc = -1;
  308. goto free_cq_out;
  309. }
  310. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  311. card->qdio.out_qs[i]->bufstates = outbuf_states;
  312. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  313. }
  314. } else {
  315. QETH_DBF_TEXT(SETUP, 2, "nocq");
  316. card->qdio.c_q = NULL;
  317. card->qdio.no_in_queues = 1;
  318. }
  319. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  320. rc = 0;
  321. out:
  322. return rc;
  323. free_cq_out:
  324. kfree(card->qdio.c_q);
  325. card->qdio.c_q = NULL;
  326. kmsg_out:
  327. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  328. goto out;
  329. }
  330. static inline void qeth_free_cq(struct qeth_card *card)
  331. {
  332. if (card->qdio.c_q) {
  333. --card->qdio.no_in_queues;
  334. kfree(card->qdio.c_q);
  335. card->qdio.c_q = NULL;
  336. }
  337. kfree(card->qdio.out_bufstates);
  338. card->qdio.out_bufstates = NULL;
  339. }
  340. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  341. int delayed) {
  342. enum iucv_tx_notify n;
  343. switch (sbalf15) {
  344. case 0:
  345. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  346. break;
  347. case 4:
  348. case 16:
  349. case 17:
  350. case 18:
  351. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  352. TX_NOTIFY_UNREACHABLE;
  353. break;
  354. default:
  355. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  356. TX_NOTIFY_GENERALERROR;
  357. break;
  358. }
  359. return n;
  360. }
  361. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  362. int bidx, int forced_cleanup)
  363. {
  364. if (q->card->options.cq != QETH_CQ_ENABLED)
  365. return;
  366. if (q->bufs[bidx]->next_pending != NULL) {
  367. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  368. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  369. while (c) {
  370. if (forced_cleanup ||
  371. atomic_read(&c->state) ==
  372. QETH_QDIO_BUF_HANDLED_DELAYED) {
  373. struct qeth_qdio_out_buffer *f = c;
  374. QETH_CARD_TEXT(f->q->card, 5, "fp");
  375. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  376. /* release here to avoid interleaving between
  377. outbound tasklet and inbound tasklet
  378. regarding notifications and lifecycle */
  379. qeth_release_skbs(c);
  380. c = f->next_pending;
  381. WARN_ON_ONCE(head->next_pending != f);
  382. head->next_pending = c;
  383. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  384. } else {
  385. head = c;
  386. c = c->next_pending;
  387. }
  388. }
  389. }
  390. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  391. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  392. /* for recovery situations */
  393. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  394. qeth_init_qdio_out_buf(q, bidx);
  395. QETH_CARD_TEXT(q->card, 2, "clprecov");
  396. }
  397. }
  398. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  399. unsigned long phys_aob_addr) {
  400. struct qaob *aob;
  401. struct qeth_qdio_out_buffer *buffer;
  402. enum iucv_tx_notify notification;
  403. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  404. QETH_CARD_TEXT(card, 5, "haob");
  405. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  406. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  407. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  408. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  409. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  410. notification = TX_NOTIFY_OK;
  411. } else {
  412. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  413. QETH_QDIO_BUF_PENDING);
  414. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  415. notification = TX_NOTIFY_DELAYED_OK;
  416. }
  417. if (aob->aorc != 0) {
  418. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  419. notification = qeth_compute_cq_notification(aob->aorc, 1);
  420. }
  421. qeth_notify_skbs(buffer->q, buffer, notification);
  422. buffer->aob = NULL;
  423. qeth_clear_output_buffer(buffer->q, buffer,
  424. QETH_QDIO_BUF_HANDLED_DELAYED);
  425. /* from here on: do not touch buffer anymore */
  426. qdio_release_aob(aob);
  427. }
  428. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  429. {
  430. return card->options.cq == QETH_CQ_ENABLED &&
  431. card->qdio.c_q != NULL &&
  432. queue != 0 &&
  433. queue == card->qdio.no_in_queues - 1;
  434. }
  435. static int qeth_issue_next_read(struct qeth_card *card)
  436. {
  437. int rc;
  438. struct qeth_cmd_buffer *iob;
  439. QETH_CARD_TEXT(card, 5, "issnxrd");
  440. if (card->read.state != CH_STATE_UP)
  441. return -EIO;
  442. iob = qeth_get_buffer(&card->read);
  443. if (!iob) {
  444. dev_warn(&card->gdev->dev, "The qeth device driver "
  445. "failed to recover an error on the device\n");
  446. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  447. "available\n", dev_name(&card->gdev->dev));
  448. return -ENOMEM;
  449. }
  450. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  451. QETH_CARD_TEXT(card, 6, "noirqpnd");
  452. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  453. (addr_t) iob, 0, 0);
  454. if (rc) {
  455. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  456. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  457. atomic_set(&card->read.irq_pending, 0);
  458. card->read_or_write_problem = 1;
  459. qeth_schedule_recovery(card);
  460. wake_up(&card->wait_q);
  461. }
  462. return rc;
  463. }
  464. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  465. {
  466. struct qeth_reply *reply;
  467. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  468. if (reply) {
  469. atomic_set(&reply->refcnt, 1);
  470. atomic_set(&reply->received, 0);
  471. reply->card = card;
  472. }
  473. return reply;
  474. }
  475. static void qeth_get_reply(struct qeth_reply *reply)
  476. {
  477. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  478. atomic_inc(&reply->refcnt);
  479. }
  480. static void qeth_put_reply(struct qeth_reply *reply)
  481. {
  482. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  483. if (atomic_dec_and_test(&reply->refcnt))
  484. kfree(reply);
  485. }
  486. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  487. struct qeth_card *card)
  488. {
  489. char *ipa_name;
  490. int com = cmd->hdr.command;
  491. ipa_name = qeth_get_ipa_cmd_name(com);
  492. if (rc)
  493. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  494. "x%X \"%s\"\n",
  495. ipa_name, com, dev_name(&card->gdev->dev),
  496. QETH_CARD_IFNAME(card), rc,
  497. qeth_get_ipa_msg(rc));
  498. else
  499. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  500. ipa_name, com, dev_name(&card->gdev->dev),
  501. QETH_CARD_IFNAME(card));
  502. }
  503. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  504. struct qeth_cmd_buffer *iob)
  505. {
  506. struct qeth_ipa_cmd *cmd = NULL;
  507. QETH_CARD_TEXT(card, 5, "chkipad");
  508. if (IS_IPA(iob->data)) {
  509. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  510. if (IS_IPA_REPLY(cmd)) {
  511. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  512. cmd->hdr.command != IPA_CMD_DELCCID &&
  513. cmd->hdr.command != IPA_CMD_MODCCID &&
  514. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  515. qeth_issue_ipa_msg(cmd,
  516. cmd->hdr.return_code, card);
  517. return cmd;
  518. } else {
  519. switch (cmd->hdr.command) {
  520. case IPA_CMD_STOPLAN:
  521. if (cmd->hdr.return_code ==
  522. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  523. dev_err(&card->gdev->dev,
  524. "Interface %s is down because the "
  525. "adjacent port is no longer in "
  526. "reflective relay mode\n",
  527. QETH_CARD_IFNAME(card));
  528. qeth_close_dev(card);
  529. } else {
  530. dev_warn(&card->gdev->dev,
  531. "The link for interface %s on CHPID"
  532. " 0x%X failed\n",
  533. QETH_CARD_IFNAME(card),
  534. card->info.chpid);
  535. qeth_issue_ipa_msg(cmd,
  536. cmd->hdr.return_code, card);
  537. }
  538. card->lan_online = 0;
  539. if (card->dev && netif_carrier_ok(card->dev))
  540. netif_carrier_off(card->dev);
  541. return NULL;
  542. case IPA_CMD_STARTLAN:
  543. dev_info(&card->gdev->dev,
  544. "The link for %s on CHPID 0x%X has"
  545. " been restored\n",
  546. QETH_CARD_IFNAME(card),
  547. card->info.chpid);
  548. netif_carrier_on(card->dev);
  549. card->lan_online = 1;
  550. if (card->info.hwtrap)
  551. card->info.hwtrap = 2;
  552. qeth_schedule_recovery(card);
  553. return NULL;
  554. case IPA_CMD_MODCCID:
  555. return cmd;
  556. case IPA_CMD_REGISTER_LOCAL_ADDR:
  557. QETH_CARD_TEXT(card, 3, "irla");
  558. break;
  559. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  560. QETH_CARD_TEXT(card, 3, "urla");
  561. break;
  562. default:
  563. QETH_DBF_MESSAGE(2, "Received data is IPA "
  564. "but not a reply!\n");
  565. break;
  566. }
  567. }
  568. }
  569. return cmd;
  570. }
  571. void qeth_clear_ipacmd_list(struct qeth_card *card)
  572. {
  573. struct qeth_reply *reply, *r;
  574. unsigned long flags;
  575. QETH_CARD_TEXT(card, 4, "clipalst");
  576. spin_lock_irqsave(&card->lock, flags);
  577. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  578. qeth_get_reply(reply);
  579. reply->rc = -EIO;
  580. atomic_inc(&reply->received);
  581. list_del_init(&reply->list);
  582. wake_up(&reply->wait_q);
  583. qeth_put_reply(reply);
  584. }
  585. spin_unlock_irqrestore(&card->lock, flags);
  586. atomic_set(&card->write.irq_pending, 0);
  587. }
  588. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  589. static int qeth_check_idx_response(struct qeth_card *card,
  590. unsigned char *buffer)
  591. {
  592. if (!buffer)
  593. return 0;
  594. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  595. if ((buffer[2] & 0xc0) == 0xc0) {
  596. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  597. "with cause code 0x%02x%s\n",
  598. buffer[4],
  599. ((buffer[4] == 0x22) ?
  600. " -- try another portname" : ""));
  601. QETH_CARD_TEXT(card, 2, "ckidxres");
  602. QETH_CARD_TEXT(card, 2, " idxterm");
  603. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  604. if (buffer[4] == 0xf6) {
  605. dev_err(&card->gdev->dev,
  606. "The qeth device is not configured "
  607. "for the OSI layer required by z/VM\n");
  608. return -EPERM;
  609. }
  610. return -EIO;
  611. }
  612. return 0;
  613. }
  614. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  615. __u32 len)
  616. {
  617. struct qeth_card *card;
  618. card = CARD_FROM_CDEV(channel->ccwdev);
  619. QETH_CARD_TEXT(card, 4, "setupccw");
  620. if (channel == &card->read)
  621. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  622. else
  623. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  624. channel->ccw.count = len;
  625. channel->ccw.cda = (__u32) __pa(iob);
  626. }
  627. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  628. {
  629. __u8 index;
  630. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  631. index = channel->io_buf_no;
  632. do {
  633. if (channel->iob[index].state == BUF_STATE_FREE) {
  634. channel->iob[index].state = BUF_STATE_LOCKED;
  635. channel->io_buf_no = (channel->io_buf_no + 1) %
  636. QETH_CMD_BUFFER_NO;
  637. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  638. return channel->iob + index;
  639. }
  640. index = (index + 1) % QETH_CMD_BUFFER_NO;
  641. } while (index != channel->io_buf_no);
  642. return NULL;
  643. }
  644. void qeth_release_buffer(struct qeth_channel *channel,
  645. struct qeth_cmd_buffer *iob)
  646. {
  647. unsigned long flags;
  648. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  649. spin_lock_irqsave(&channel->iob_lock, flags);
  650. memset(iob->data, 0, QETH_BUFSIZE);
  651. iob->state = BUF_STATE_FREE;
  652. iob->callback = qeth_send_control_data_cb;
  653. iob->rc = 0;
  654. spin_unlock_irqrestore(&channel->iob_lock, flags);
  655. wake_up(&channel->wait_q);
  656. }
  657. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  658. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  659. {
  660. struct qeth_cmd_buffer *buffer = NULL;
  661. unsigned long flags;
  662. spin_lock_irqsave(&channel->iob_lock, flags);
  663. buffer = __qeth_get_buffer(channel);
  664. spin_unlock_irqrestore(&channel->iob_lock, flags);
  665. return buffer;
  666. }
  667. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  668. {
  669. struct qeth_cmd_buffer *buffer;
  670. wait_event(channel->wait_q,
  671. ((buffer = qeth_get_buffer(channel)) != NULL));
  672. return buffer;
  673. }
  674. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  675. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  676. {
  677. int cnt;
  678. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  679. qeth_release_buffer(channel, &channel->iob[cnt]);
  680. channel->buf_no = 0;
  681. channel->io_buf_no = 0;
  682. }
  683. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  684. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  685. struct qeth_cmd_buffer *iob)
  686. {
  687. struct qeth_card *card;
  688. struct qeth_reply *reply, *r;
  689. struct qeth_ipa_cmd *cmd;
  690. unsigned long flags;
  691. int keep_reply;
  692. int rc = 0;
  693. card = CARD_FROM_CDEV(channel->ccwdev);
  694. QETH_CARD_TEXT(card, 4, "sndctlcb");
  695. rc = qeth_check_idx_response(card, iob->data);
  696. switch (rc) {
  697. case 0:
  698. break;
  699. case -EIO:
  700. qeth_clear_ipacmd_list(card);
  701. qeth_schedule_recovery(card);
  702. /* fall through */
  703. default:
  704. goto out;
  705. }
  706. cmd = qeth_check_ipa_data(card, iob);
  707. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  708. goto out;
  709. /*in case of OSN : check if cmd is set */
  710. if (card->info.type == QETH_CARD_TYPE_OSN &&
  711. cmd &&
  712. cmd->hdr.command != IPA_CMD_STARTLAN &&
  713. card->osn_info.assist_cb != NULL) {
  714. card->osn_info.assist_cb(card->dev, cmd);
  715. goto out;
  716. }
  717. spin_lock_irqsave(&card->lock, flags);
  718. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  719. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  720. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  721. qeth_get_reply(reply);
  722. list_del_init(&reply->list);
  723. spin_unlock_irqrestore(&card->lock, flags);
  724. keep_reply = 0;
  725. if (reply->callback != NULL) {
  726. if (cmd) {
  727. reply->offset = (__u16)((char *)cmd -
  728. (char *)iob->data);
  729. keep_reply = reply->callback(card,
  730. reply,
  731. (unsigned long)cmd);
  732. } else
  733. keep_reply = reply->callback(card,
  734. reply,
  735. (unsigned long)iob);
  736. }
  737. if (cmd)
  738. reply->rc = (u16) cmd->hdr.return_code;
  739. else if (iob->rc)
  740. reply->rc = iob->rc;
  741. if (keep_reply) {
  742. spin_lock_irqsave(&card->lock, flags);
  743. list_add_tail(&reply->list,
  744. &card->cmd_waiter_list);
  745. spin_unlock_irqrestore(&card->lock, flags);
  746. } else {
  747. atomic_inc(&reply->received);
  748. wake_up(&reply->wait_q);
  749. }
  750. qeth_put_reply(reply);
  751. goto out;
  752. }
  753. }
  754. spin_unlock_irqrestore(&card->lock, flags);
  755. out:
  756. memcpy(&card->seqno.pdu_hdr_ack,
  757. QETH_PDU_HEADER_SEQ_NO(iob->data),
  758. QETH_SEQ_NO_LENGTH);
  759. qeth_release_buffer(channel, iob);
  760. }
  761. static int qeth_setup_channel(struct qeth_channel *channel)
  762. {
  763. int cnt;
  764. QETH_DBF_TEXT(SETUP, 2, "setupch");
  765. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  766. channel->iob[cnt].data =
  767. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  768. if (channel->iob[cnt].data == NULL)
  769. break;
  770. channel->iob[cnt].state = BUF_STATE_FREE;
  771. channel->iob[cnt].channel = channel;
  772. channel->iob[cnt].callback = qeth_send_control_data_cb;
  773. channel->iob[cnt].rc = 0;
  774. }
  775. if (cnt < QETH_CMD_BUFFER_NO) {
  776. while (cnt-- > 0)
  777. kfree(channel->iob[cnt].data);
  778. return -ENOMEM;
  779. }
  780. channel->buf_no = 0;
  781. channel->io_buf_no = 0;
  782. atomic_set(&channel->irq_pending, 0);
  783. spin_lock_init(&channel->iob_lock);
  784. init_waitqueue_head(&channel->wait_q);
  785. return 0;
  786. }
  787. static int qeth_set_thread_start_bit(struct qeth_card *card,
  788. unsigned long thread)
  789. {
  790. unsigned long flags;
  791. spin_lock_irqsave(&card->thread_mask_lock, flags);
  792. if (!(card->thread_allowed_mask & thread) ||
  793. (card->thread_start_mask & thread)) {
  794. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  795. return -EPERM;
  796. }
  797. card->thread_start_mask |= thread;
  798. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  799. return 0;
  800. }
  801. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  802. {
  803. unsigned long flags;
  804. spin_lock_irqsave(&card->thread_mask_lock, flags);
  805. card->thread_start_mask &= ~thread;
  806. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  807. wake_up(&card->wait_q);
  808. }
  809. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  810. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  811. {
  812. unsigned long flags;
  813. spin_lock_irqsave(&card->thread_mask_lock, flags);
  814. card->thread_running_mask &= ~thread;
  815. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  816. wake_up(&card->wait_q);
  817. }
  818. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  819. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  820. {
  821. unsigned long flags;
  822. int rc = 0;
  823. spin_lock_irqsave(&card->thread_mask_lock, flags);
  824. if (card->thread_start_mask & thread) {
  825. if ((card->thread_allowed_mask & thread) &&
  826. !(card->thread_running_mask & thread)) {
  827. rc = 1;
  828. card->thread_start_mask &= ~thread;
  829. card->thread_running_mask |= thread;
  830. } else
  831. rc = -EPERM;
  832. }
  833. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  834. return rc;
  835. }
  836. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  837. {
  838. int rc = 0;
  839. wait_event(card->wait_q,
  840. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  841. return rc;
  842. }
  843. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  844. void qeth_schedule_recovery(struct qeth_card *card)
  845. {
  846. QETH_CARD_TEXT(card, 2, "startrec");
  847. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  848. schedule_work(&card->kernel_thread_starter);
  849. }
  850. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  851. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  852. {
  853. int dstat, cstat;
  854. char *sense;
  855. struct qeth_card *card;
  856. sense = (char *) irb->ecw;
  857. cstat = irb->scsw.cmd.cstat;
  858. dstat = irb->scsw.cmd.dstat;
  859. card = CARD_FROM_CDEV(cdev);
  860. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  861. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  862. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  863. QETH_CARD_TEXT(card, 2, "CGENCHK");
  864. dev_warn(&cdev->dev, "The qeth device driver "
  865. "failed to recover an error on the device\n");
  866. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  867. dev_name(&cdev->dev), dstat, cstat);
  868. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  869. 16, 1, irb, 64, 1);
  870. return 1;
  871. }
  872. if (dstat & DEV_STAT_UNIT_CHECK) {
  873. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  874. SENSE_RESETTING_EVENT_FLAG) {
  875. QETH_CARD_TEXT(card, 2, "REVIND");
  876. return 1;
  877. }
  878. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  879. SENSE_COMMAND_REJECT_FLAG) {
  880. QETH_CARD_TEXT(card, 2, "CMDREJi");
  881. return 1;
  882. }
  883. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  884. QETH_CARD_TEXT(card, 2, "AFFE");
  885. return 1;
  886. }
  887. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  888. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  889. return 0;
  890. }
  891. QETH_CARD_TEXT(card, 2, "DGENCHK");
  892. return 1;
  893. }
  894. return 0;
  895. }
  896. static long __qeth_check_irb_error(struct ccw_device *cdev,
  897. unsigned long intparm, struct irb *irb)
  898. {
  899. struct qeth_card *card;
  900. card = CARD_FROM_CDEV(cdev);
  901. if (!IS_ERR(irb))
  902. return 0;
  903. switch (PTR_ERR(irb)) {
  904. case -EIO:
  905. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  906. dev_name(&cdev->dev));
  907. QETH_CARD_TEXT(card, 2, "ckirberr");
  908. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  909. break;
  910. case -ETIMEDOUT:
  911. dev_warn(&cdev->dev, "A hardware operation timed out"
  912. " on the device\n");
  913. QETH_CARD_TEXT(card, 2, "ckirberr");
  914. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  915. if (intparm == QETH_RCD_PARM) {
  916. if (card && (card->data.ccwdev == cdev)) {
  917. card->data.state = CH_STATE_DOWN;
  918. wake_up(&card->wait_q);
  919. }
  920. }
  921. break;
  922. default:
  923. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  924. dev_name(&cdev->dev), PTR_ERR(irb));
  925. QETH_CARD_TEXT(card, 2, "ckirberr");
  926. QETH_CARD_TEXT(card, 2, " rc???");
  927. }
  928. return PTR_ERR(irb);
  929. }
  930. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  931. struct irb *irb)
  932. {
  933. int rc;
  934. int cstat, dstat;
  935. struct qeth_cmd_buffer *buffer;
  936. struct qeth_channel *channel;
  937. struct qeth_card *card;
  938. struct qeth_cmd_buffer *iob;
  939. __u8 index;
  940. if (__qeth_check_irb_error(cdev, intparm, irb))
  941. return;
  942. cstat = irb->scsw.cmd.cstat;
  943. dstat = irb->scsw.cmd.dstat;
  944. card = CARD_FROM_CDEV(cdev);
  945. if (!card)
  946. return;
  947. QETH_CARD_TEXT(card, 5, "irq");
  948. if (card->read.ccwdev == cdev) {
  949. channel = &card->read;
  950. QETH_CARD_TEXT(card, 5, "read");
  951. } else if (card->write.ccwdev == cdev) {
  952. channel = &card->write;
  953. QETH_CARD_TEXT(card, 5, "write");
  954. } else {
  955. channel = &card->data;
  956. QETH_CARD_TEXT(card, 5, "data");
  957. }
  958. atomic_set(&channel->irq_pending, 0);
  959. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  960. channel->state = CH_STATE_STOPPED;
  961. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  962. channel->state = CH_STATE_HALTED;
  963. /*let's wake up immediately on data channel*/
  964. if ((channel == &card->data) && (intparm != 0) &&
  965. (intparm != QETH_RCD_PARM))
  966. goto out;
  967. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  968. QETH_CARD_TEXT(card, 6, "clrchpar");
  969. /* we don't have to handle this further */
  970. intparm = 0;
  971. }
  972. if (intparm == QETH_HALT_CHANNEL_PARM) {
  973. QETH_CARD_TEXT(card, 6, "hltchpar");
  974. /* we don't have to handle this further */
  975. intparm = 0;
  976. }
  977. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  978. (dstat & DEV_STAT_UNIT_CHECK) ||
  979. (cstat)) {
  980. if (irb->esw.esw0.erw.cons) {
  981. dev_warn(&channel->ccwdev->dev,
  982. "The qeth device driver failed to recover "
  983. "an error on the device\n");
  984. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  985. "0x%X dstat 0x%X\n",
  986. dev_name(&channel->ccwdev->dev), cstat, dstat);
  987. print_hex_dump(KERN_WARNING, "qeth: irb ",
  988. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  989. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  990. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  991. }
  992. if (intparm == QETH_RCD_PARM) {
  993. channel->state = CH_STATE_DOWN;
  994. goto out;
  995. }
  996. rc = qeth_get_problem(cdev, irb);
  997. if (rc) {
  998. qeth_clear_ipacmd_list(card);
  999. qeth_schedule_recovery(card);
  1000. goto out;
  1001. }
  1002. }
  1003. if (intparm == QETH_RCD_PARM) {
  1004. channel->state = CH_STATE_RCD_DONE;
  1005. goto out;
  1006. }
  1007. if (intparm) {
  1008. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1009. buffer->state = BUF_STATE_PROCESSED;
  1010. }
  1011. if (channel == &card->data)
  1012. return;
  1013. if (channel == &card->read &&
  1014. channel->state == CH_STATE_UP)
  1015. qeth_issue_next_read(card);
  1016. iob = channel->iob;
  1017. index = channel->buf_no;
  1018. while (iob[index].state == BUF_STATE_PROCESSED) {
  1019. if (iob[index].callback != NULL)
  1020. iob[index].callback(channel, iob + index);
  1021. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1022. }
  1023. channel->buf_no = index;
  1024. out:
  1025. wake_up(&card->wait_q);
  1026. return;
  1027. }
  1028. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1029. struct qeth_qdio_out_buffer *buf,
  1030. enum iucv_tx_notify notification)
  1031. {
  1032. struct sk_buff *skb;
  1033. if (skb_queue_empty(&buf->skb_list))
  1034. goto out;
  1035. skb = skb_peek(&buf->skb_list);
  1036. while (skb) {
  1037. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1038. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1039. if (skb->protocol == ETH_P_AF_IUCV) {
  1040. if (skb->sk) {
  1041. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1042. iucv->sk_txnotify(skb, notification);
  1043. }
  1044. }
  1045. if (skb_queue_is_last(&buf->skb_list, skb))
  1046. skb = NULL;
  1047. else
  1048. skb = skb_queue_next(&buf->skb_list, skb);
  1049. }
  1050. out:
  1051. return;
  1052. }
  1053. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1054. {
  1055. struct sk_buff *skb;
  1056. struct iucv_sock *iucv;
  1057. int notify_general_error = 0;
  1058. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1059. notify_general_error = 1;
  1060. /* release may never happen from within CQ tasklet scope */
  1061. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1062. skb = skb_dequeue(&buf->skb_list);
  1063. while (skb) {
  1064. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1065. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1066. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1067. if (skb->sk) {
  1068. iucv = iucv_sk(skb->sk);
  1069. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1070. }
  1071. }
  1072. atomic_dec(&skb->users);
  1073. dev_kfree_skb_any(skb);
  1074. skb = skb_dequeue(&buf->skb_list);
  1075. }
  1076. }
  1077. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1078. struct qeth_qdio_out_buffer *buf,
  1079. enum qeth_qdio_buffer_states newbufstate)
  1080. {
  1081. int i;
  1082. /* is PCI flag set on buffer? */
  1083. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1084. atomic_dec(&queue->set_pci_flags_count);
  1085. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1086. qeth_release_skbs(buf);
  1087. }
  1088. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1089. if (buf->buffer->element[i].addr && buf->is_header[i])
  1090. kmem_cache_free(qeth_core_header_cache,
  1091. buf->buffer->element[i].addr);
  1092. buf->is_header[i] = 0;
  1093. buf->buffer->element[i].length = 0;
  1094. buf->buffer->element[i].addr = NULL;
  1095. buf->buffer->element[i].eflags = 0;
  1096. buf->buffer->element[i].sflags = 0;
  1097. }
  1098. buf->buffer->element[15].eflags = 0;
  1099. buf->buffer->element[15].sflags = 0;
  1100. buf->next_element_to_fill = 0;
  1101. atomic_set(&buf->state, newbufstate);
  1102. }
  1103. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1104. {
  1105. int j;
  1106. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1107. if (!q->bufs[j])
  1108. continue;
  1109. qeth_cleanup_handled_pending(q, j, 1);
  1110. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1111. if (free) {
  1112. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1113. q->bufs[j] = NULL;
  1114. }
  1115. }
  1116. }
  1117. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1118. {
  1119. int i;
  1120. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1121. /* clear outbound buffers to free skbs */
  1122. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1123. if (card->qdio.out_qs[i]) {
  1124. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1125. }
  1126. }
  1127. }
  1128. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1129. static void qeth_free_buffer_pool(struct qeth_card *card)
  1130. {
  1131. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1132. int i = 0;
  1133. list_for_each_entry_safe(pool_entry, tmp,
  1134. &card->qdio.init_pool.entry_list, init_list){
  1135. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1136. free_page((unsigned long)pool_entry->elements[i]);
  1137. list_del(&pool_entry->init_list);
  1138. kfree(pool_entry);
  1139. }
  1140. }
  1141. static void qeth_free_qdio_buffers(struct qeth_card *card)
  1142. {
  1143. int i, j;
  1144. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  1145. QETH_QDIO_UNINITIALIZED)
  1146. return;
  1147. qeth_free_cq(card);
  1148. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  1149. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
  1150. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  1151. kfree(card->qdio.in_q);
  1152. card->qdio.in_q = NULL;
  1153. /* inbound buffer pool */
  1154. qeth_free_buffer_pool(card);
  1155. /* free outbound qdio_qs */
  1156. if (card->qdio.out_qs) {
  1157. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1158. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  1159. kfree(card->qdio.out_qs[i]);
  1160. }
  1161. kfree(card->qdio.out_qs);
  1162. card->qdio.out_qs = NULL;
  1163. }
  1164. }
  1165. static void qeth_clean_channel(struct qeth_channel *channel)
  1166. {
  1167. int cnt;
  1168. QETH_DBF_TEXT(SETUP, 2, "freech");
  1169. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1170. kfree(channel->iob[cnt].data);
  1171. }
  1172. static void qeth_set_single_write_queues(struct qeth_card *card)
  1173. {
  1174. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1175. (card->qdio.no_out_queues == 4))
  1176. qeth_free_qdio_buffers(card);
  1177. card->qdio.no_out_queues = 1;
  1178. if (card->qdio.default_out_queue != 0)
  1179. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1180. card->qdio.default_out_queue = 0;
  1181. }
  1182. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1183. {
  1184. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1185. (card->qdio.no_out_queues == 1)) {
  1186. qeth_free_qdio_buffers(card);
  1187. card->qdio.default_out_queue = 2;
  1188. }
  1189. card->qdio.no_out_queues = 4;
  1190. }
  1191. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1192. {
  1193. struct ccw_device *ccwdev;
  1194. struct channelPath_dsc {
  1195. u8 flags;
  1196. u8 lsn;
  1197. u8 desc;
  1198. u8 chpid;
  1199. u8 swla;
  1200. u8 zeroes;
  1201. u8 chla;
  1202. u8 chpp;
  1203. } *chp_dsc;
  1204. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1205. ccwdev = card->data.ccwdev;
  1206. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1207. if (!chp_dsc)
  1208. goto out;
  1209. card->info.func_level = 0x4100 + chp_dsc->desc;
  1210. if (card->info.type == QETH_CARD_TYPE_IQD)
  1211. goto out;
  1212. /* CHPP field bit 6 == 1 -> single queue */
  1213. if ((chp_dsc->chpp & 0x02) == 0x02)
  1214. qeth_set_single_write_queues(card);
  1215. else
  1216. qeth_set_multiple_write_queues(card);
  1217. out:
  1218. kfree(chp_dsc);
  1219. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1220. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1221. }
  1222. static void qeth_init_qdio_info(struct qeth_card *card)
  1223. {
  1224. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1225. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1226. /* inbound */
  1227. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1228. if (card->info.type == QETH_CARD_TYPE_IQD)
  1229. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1230. else
  1231. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1232. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1233. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1234. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1235. }
  1236. static void qeth_set_intial_options(struct qeth_card *card)
  1237. {
  1238. card->options.route4.type = NO_ROUTER;
  1239. card->options.route6.type = NO_ROUTER;
  1240. card->options.fake_broadcast = 0;
  1241. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1242. card->options.performance_stats = 0;
  1243. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1244. card->options.isolation = ISOLATION_MODE_NONE;
  1245. card->options.cq = QETH_CQ_DISABLED;
  1246. }
  1247. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1248. {
  1249. unsigned long flags;
  1250. int rc = 0;
  1251. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1252. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1253. (u8) card->thread_start_mask,
  1254. (u8) card->thread_allowed_mask,
  1255. (u8) card->thread_running_mask);
  1256. rc = (card->thread_start_mask & thread);
  1257. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1258. return rc;
  1259. }
  1260. static void qeth_start_kernel_thread(struct work_struct *work)
  1261. {
  1262. struct task_struct *ts;
  1263. struct qeth_card *card = container_of(work, struct qeth_card,
  1264. kernel_thread_starter);
  1265. QETH_CARD_TEXT(card , 2, "strthrd");
  1266. if (card->read.state != CH_STATE_UP &&
  1267. card->write.state != CH_STATE_UP)
  1268. return;
  1269. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1270. ts = kthread_run(card->discipline->recover, (void *)card,
  1271. "qeth_recover");
  1272. if (IS_ERR(ts)) {
  1273. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1274. qeth_clear_thread_running_bit(card,
  1275. QETH_RECOVER_THREAD);
  1276. }
  1277. }
  1278. }
  1279. static int qeth_setup_card(struct qeth_card *card)
  1280. {
  1281. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1282. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1283. card->read.state = CH_STATE_DOWN;
  1284. card->write.state = CH_STATE_DOWN;
  1285. card->data.state = CH_STATE_DOWN;
  1286. card->state = CARD_STATE_DOWN;
  1287. card->lan_online = 0;
  1288. card->read_or_write_problem = 0;
  1289. card->dev = NULL;
  1290. spin_lock_init(&card->vlanlock);
  1291. spin_lock_init(&card->mclock);
  1292. spin_lock_init(&card->lock);
  1293. spin_lock_init(&card->ip_lock);
  1294. spin_lock_init(&card->thread_mask_lock);
  1295. mutex_init(&card->conf_mutex);
  1296. mutex_init(&card->discipline_mutex);
  1297. card->thread_start_mask = 0;
  1298. card->thread_allowed_mask = 0;
  1299. card->thread_running_mask = 0;
  1300. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1301. INIT_LIST_HEAD(&card->ip_list);
  1302. INIT_LIST_HEAD(card->ip_tbd_list);
  1303. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1304. init_waitqueue_head(&card->wait_q);
  1305. /* initial options */
  1306. qeth_set_intial_options(card);
  1307. /* IP address takeover */
  1308. INIT_LIST_HEAD(&card->ipato.entries);
  1309. card->ipato.enabled = 0;
  1310. card->ipato.invert4 = 0;
  1311. card->ipato.invert6 = 0;
  1312. /* init QDIO stuff */
  1313. qeth_init_qdio_info(card);
  1314. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1315. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1316. return 0;
  1317. }
  1318. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1319. {
  1320. struct qeth_card *card = container_of(slr, struct qeth_card,
  1321. qeth_service_level);
  1322. if (card->info.mcl_level[0])
  1323. seq_printf(m, "qeth: %s firmware level %s\n",
  1324. CARD_BUS_ID(card), card->info.mcl_level);
  1325. }
  1326. static struct qeth_card *qeth_alloc_card(void)
  1327. {
  1328. struct qeth_card *card;
  1329. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1330. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1331. if (!card)
  1332. goto out;
  1333. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1334. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1335. if (!card->ip_tbd_list) {
  1336. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1337. goto out_card;
  1338. }
  1339. if (qeth_setup_channel(&card->read))
  1340. goto out_ip;
  1341. if (qeth_setup_channel(&card->write))
  1342. goto out_channel;
  1343. card->options.layer2 = -1;
  1344. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1345. register_service_level(&card->qeth_service_level);
  1346. return card;
  1347. out_channel:
  1348. qeth_clean_channel(&card->read);
  1349. out_ip:
  1350. kfree(card->ip_tbd_list);
  1351. out_card:
  1352. kfree(card);
  1353. out:
  1354. return NULL;
  1355. }
  1356. static int qeth_determine_card_type(struct qeth_card *card)
  1357. {
  1358. int i = 0;
  1359. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1360. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1361. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1362. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1363. if ((CARD_RDEV(card)->id.dev_type ==
  1364. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1365. (CARD_RDEV(card)->id.dev_model ==
  1366. known_devices[i][QETH_DEV_MODEL_IND])) {
  1367. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1368. card->qdio.no_out_queues =
  1369. known_devices[i][QETH_QUEUE_NO_IND];
  1370. card->qdio.no_in_queues = 1;
  1371. card->info.is_multicast_different =
  1372. known_devices[i][QETH_MULTICAST_IND];
  1373. qeth_update_from_chp_desc(card);
  1374. return 0;
  1375. }
  1376. i++;
  1377. }
  1378. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1379. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1380. "unknown type\n");
  1381. return -ENOENT;
  1382. }
  1383. static int qeth_clear_channel(struct qeth_channel *channel)
  1384. {
  1385. unsigned long flags;
  1386. struct qeth_card *card;
  1387. int rc;
  1388. card = CARD_FROM_CDEV(channel->ccwdev);
  1389. QETH_CARD_TEXT(card, 3, "clearch");
  1390. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1391. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1392. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1393. if (rc)
  1394. return rc;
  1395. rc = wait_event_interruptible_timeout(card->wait_q,
  1396. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1397. if (rc == -ERESTARTSYS)
  1398. return rc;
  1399. if (channel->state != CH_STATE_STOPPED)
  1400. return -ETIME;
  1401. channel->state = CH_STATE_DOWN;
  1402. return 0;
  1403. }
  1404. static int qeth_halt_channel(struct qeth_channel *channel)
  1405. {
  1406. unsigned long flags;
  1407. struct qeth_card *card;
  1408. int rc;
  1409. card = CARD_FROM_CDEV(channel->ccwdev);
  1410. QETH_CARD_TEXT(card, 3, "haltch");
  1411. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1412. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1413. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1414. if (rc)
  1415. return rc;
  1416. rc = wait_event_interruptible_timeout(card->wait_q,
  1417. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1418. if (rc == -ERESTARTSYS)
  1419. return rc;
  1420. if (channel->state != CH_STATE_HALTED)
  1421. return -ETIME;
  1422. return 0;
  1423. }
  1424. static int qeth_halt_channels(struct qeth_card *card)
  1425. {
  1426. int rc1 = 0, rc2 = 0, rc3 = 0;
  1427. QETH_CARD_TEXT(card, 3, "haltchs");
  1428. rc1 = qeth_halt_channel(&card->read);
  1429. rc2 = qeth_halt_channel(&card->write);
  1430. rc3 = qeth_halt_channel(&card->data);
  1431. if (rc1)
  1432. return rc1;
  1433. if (rc2)
  1434. return rc2;
  1435. return rc3;
  1436. }
  1437. static int qeth_clear_channels(struct qeth_card *card)
  1438. {
  1439. int rc1 = 0, rc2 = 0, rc3 = 0;
  1440. QETH_CARD_TEXT(card, 3, "clearchs");
  1441. rc1 = qeth_clear_channel(&card->read);
  1442. rc2 = qeth_clear_channel(&card->write);
  1443. rc3 = qeth_clear_channel(&card->data);
  1444. if (rc1)
  1445. return rc1;
  1446. if (rc2)
  1447. return rc2;
  1448. return rc3;
  1449. }
  1450. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1451. {
  1452. int rc = 0;
  1453. QETH_CARD_TEXT(card, 3, "clhacrd");
  1454. if (halt)
  1455. rc = qeth_halt_channels(card);
  1456. if (rc)
  1457. return rc;
  1458. return qeth_clear_channels(card);
  1459. }
  1460. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1461. {
  1462. int rc = 0;
  1463. QETH_CARD_TEXT(card, 3, "qdioclr");
  1464. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1465. QETH_QDIO_CLEANING)) {
  1466. case QETH_QDIO_ESTABLISHED:
  1467. if (card->info.type == QETH_CARD_TYPE_IQD)
  1468. rc = qdio_shutdown(CARD_DDEV(card),
  1469. QDIO_FLAG_CLEANUP_USING_HALT);
  1470. else
  1471. rc = qdio_shutdown(CARD_DDEV(card),
  1472. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1473. if (rc)
  1474. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1475. qdio_free(CARD_DDEV(card));
  1476. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1477. break;
  1478. case QETH_QDIO_CLEANING:
  1479. return rc;
  1480. default:
  1481. break;
  1482. }
  1483. rc = qeth_clear_halt_card(card, use_halt);
  1484. if (rc)
  1485. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1486. card->state = CARD_STATE_DOWN;
  1487. return rc;
  1488. }
  1489. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1490. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1491. int *length)
  1492. {
  1493. struct ciw *ciw;
  1494. char *rcd_buf;
  1495. int ret;
  1496. struct qeth_channel *channel = &card->data;
  1497. unsigned long flags;
  1498. /*
  1499. * scan for RCD command in extended SenseID data
  1500. */
  1501. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1502. if (!ciw || ciw->cmd == 0)
  1503. return -EOPNOTSUPP;
  1504. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1505. if (!rcd_buf)
  1506. return -ENOMEM;
  1507. channel->ccw.cmd_code = ciw->cmd;
  1508. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1509. channel->ccw.count = ciw->count;
  1510. channel->ccw.flags = CCW_FLAG_SLI;
  1511. channel->state = CH_STATE_RCD;
  1512. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1513. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1514. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1515. QETH_RCD_TIMEOUT);
  1516. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1517. if (!ret)
  1518. wait_event(card->wait_q,
  1519. (channel->state == CH_STATE_RCD_DONE ||
  1520. channel->state == CH_STATE_DOWN));
  1521. if (channel->state == CH_STATE_DOWN)
  1522. ret = -EIO;
  1523. else
  1524. channel->state = CH_STATE_DOWN;
  1525. if (ret) {
  1526. kfree(rcd_buf);
  1527. *buffer = NULL;
  1528. *length = 0;
  1529. } else {
  1530. *length = ciw->count;
  1531. *buffer = rcd_buf;
  1532. }
  1533. return ret;
  1534. }
  1535. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1536. {
  1537. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1538. card->info.chpid = prcd[30];
  1539. card->info.unit_addr2 = prcd[31];
  1540. card->info.cula = prcd[63];
  1541. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1542. (prcd[0x11] == _ascebc['M']));
  1543. }
  1544. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1545. {
  1546. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1547. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1548. (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
  1549. card->info.blkt.time_total = 250;
  1550. card->info.blkt.inter_packet = 5;
  1551. card->info.blkt.inter_packet_jumbo = 15;
  1552. } else {
  1553. card->info.blkt.time_total = 0;
  1554. card->info.blkt.inter_packet = 0;
  1555. card->info.blkt.inter_packet_jumbo = 0;
  1556. }
  1557. }
  1558. static void qeth_init_tokens(struct qeth_card *card)
  1559. {
  1560. card->token.issuer_rm_w = 0x00010103UL;
  1561. card->token.cm_filter_w = 0x00010108UL;
  1562. card->token.cm_connection_w = 0x0001010aUL;
  1563. card->token.ulp_filter_w = 0x0001010bUL;
  1564. card->token.ulp_connection_w = 0x0001010dUL;
  1565. }
  1566. static void qeth_init_func_level(struct qeth_card *card)
  1567. {
  1568. switch (card->info.type) {
  1569. case QETH_CARD_TYPE_IQD:
  1570. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1571. break;
  1572. case QETH_CARD_TYPE_OSD:
  1573. case QETH_CARD_TYPE_OSN:
  1574. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1575. break;
  1576. default:
  1577. break;
  1578. }
  1579. }
  1580. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1581. void (*idx_reply_cb)(struct qeth_channel *,
  1582. struct qeth_cmd_buffer *))
  1583. {
  1584. struct qeth_cmd_buffer *iob;
  1585. unsigned long flags;
  1586. int rc;
  1587. struct qeth_card *card;
  1588. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1589. card = CARD_FROM_CDEV(channel->ccwdev);
  1590. iob = qeth_get_buffer(channel);
  1591. iob->callback = idx_reply_cb;
  1592. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1593. channel->ccw.count = QETH_BUFSIZE;
  1594. channel->ccw.cda = (__u32) __pa(iob->data);
  1595. wait_event(card->wait_q,
  1596. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1597. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1598. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1599. rc = ccw_device_start(channel->ccwdev,
  1600. &channel->ccw, (addr_t) iob, 0, 0);
  1601. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1602. if (rc) {
  1603. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1604. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1605. atomic_set(&channel->irq_pending, 0);
  1606. wake_up(&card->wait_q);
  1607. return rc;
  1608. }
  1609. rc = wait_event_interruptible_timeout(card->wait_q,
  1610. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1611. if (rc == -ERESTARTSYS)
  1612. return rc;
  1613. if (channel->state != CH_STATE_UP) {
  1614. rc = -ETIME;
  1615. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1616. qeth_clear_cmd_buffers(channel);
  1617. } else
  1618. rc = 0;
  1619. return rc;
  1620. }
  1621. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1622. void (*idx_reply_cb)(struct qeth_channel *,
  1623. struct qeth_cmd_buffer *))
  1624. {
  1625. struct qeth_card *card;
  1626. struct qeth_cmd_buffer *iob;
  1627. unsigned long flags;
  1628. __u16 temp;
  1629. __u8 tmp;
  1630. int rc;
  1631. struct ccw_dev_id temp_devid;
  1632. card = CARD_FROM_CDEV(channel->ccwdev);
  1633. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1634. iob = qeth_get_buffer(channel);
  1635. iob->callback = idx_reply_cb;
  1636. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1637. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1638. channel->ccw.cda = (__u32) __pa(iob->data);
  1639. if (channel == &card->write) {
  1640. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1641. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1642. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1643. card->seqno.trans_hdr++;
  1644. } else {
  1645. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1646. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1647. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1648. }
  1649. tmp = ((__u8)card->info.portno) | 0x80;
  1650. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1651. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1652. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1653. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1654. &card->info.func_level, sizeof(__u16));
  1655. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1656. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1657. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1658. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1659. wait_event(card->wait_q,
  1660. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1661. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1662. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1663. rc = ccw_device_start(channel->ccwdev,
  1664. &channel->ccw, (addr_t) iob, 0, 0);
  1665. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1666. if (rc) {
  1667. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1668. rc);
  1669. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1670. atomic_set(&channel->irq_pending, 0);
  1671. wake_up(&card->wait_q);
  1672. return rc;
  1673. }
  1674. rc = wait_event_interruptible_timeout(card->wait_q,
  1675. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1676. if (rc == -ERESTARTSYS)
  1677. return rc;
  1678. if (channel->state != CH_STATE_ACTIVATING) {
  1679. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1680. " failed to recover an error on the device\n");
  1681. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1682. dev_name(&channel->ccwdev->dev));
  1683. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1684. qeth_clear_cmd_buffers(channel);
  1685. return -ETIME;
  1686. }
  1687. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1688. }
  1689. static int qeth_peer_func_level(int level)
  1690. {
  1691. if ((level & 0xff) == 8)
  1692. return (level & 0xff) + 0x400;
  1693. if (((level >> 8) & 3) == 1)
  1694. return (level & 0xff) + 0x200;
  1695. return level;
  1696. }
  1697. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1698. struct qeth_cmd_buffer *iob)
  1699. {
  1700. struct qeth_card *card;
  1701. __u16 temp;
  1702. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1703. if (channel->state == CH_STATE_DOWN) {
  1704. channel->state = CH_STATE_ACTIVATING;
  1705. goto out;
  1706. }
  1707. card = CARD_FROM_CDEV(channel->ccwdev);
  1708. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1709. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1710. dev_err(&card->write.ccwdev->dev,
  1711. "The adapter is used exclusively by another "
  1712. "host\n");
  1713. else
  1714. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1715. " negative reply\n",
  1716. dev_name(&card->write.ccwdev->dev));
  1717. goto out;
  1718. }
  1719. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1720. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1721. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1722. "function level mismatch (sent: 0x%x, received: "
  1723. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1724. card->info.func_level, temp);
  1725. goto out;
  1726. }
  1727. channel->state = CH_STATE_UP;
  1728. out:
  1729. qeth_release_buffer(channel, iob);
  1730. }
  1731. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1732. struct qeth_cmd_buffer *iob)
  1733. {
  1734. struct qeth_card *card;
  1735. __u16 temp;
  1736. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1737. if (channel->state == CH_STATE_DOWN) {
  1738. channel->state = CH_STATE_ACTIVATING;
  1739. goto out;
  1740. }
  1741. card = CARD_FROM_CDEV(channel->ccwdev);
  1742. if (qeth_check_idx_response(card, iob->data))
  1743. goto out;
  1744. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1745. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1746. case QETH_IDX_ACT_ERR_EXCL:
  1747. dev_err(&card->write.ccwdev->dev,
  1748. "The adapter is used exclusively by another "
  1749. "host\n");
  1750. break;
  1751. case QETH_IDX_ACT_ERR_AUTH:
  1752. case QETH_IDX_ACT_ERR_AUTH_USER:
  1753. dev_err(&card->read.ccwdev->dev,
  1754. "Setting the device online failed because of "
  1755. "insufficient authorization\n");
  1756. break;
  1757. default:
  1758. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1759. " negative reply\n",
  1760. dev_name(&card->read.ccwdev->dev));
  1761. }
  1762. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1763. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1764. goto out;
  1765. }
  1766. /**
  1767. * * temporary fix for microcode bug
  1768. * * to revert it,replace OR by AND
  1769. * */
  1770. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1771. (card->info.type == QETH_CARD_TYPE_OSD))
  1772. card->info.portname_required = 1;
  1773. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1774. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1775. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1776. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1777. dev_name(&card->read.ccwdev->dev),
  1778. card->info.func_level, temp);
  1779. goto out;
  1780. }
  1781. memcpy(&card->token.issuer_rm_r,
  1782. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1783. QETH_MPC_TOKEN_LENGTH);
  1784. memcpy(&card->info.mcl_level[0],
  1785. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1786. channel->state = CH_STATE_UP;
  1787. out:
  1788. qeth_release_buffer(channel, iob);
  1789. }
  1790. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1791. struct qeth_cmd_buffer *iob)
  1792. {
  1793. qeth_setup_ccw(&card->write, iob->data, len);
  1794. iob->callback = qeth_release_buffer;
  1795. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1796. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1797. card->seqno.trans_hdr++;
  1798. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1799. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1800. card->seqno.pdu_hdr++;
  1801. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1802. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1803. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1804. }
  1805. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1806. int qeth_send_control_data(struct qeth_card *card, int len,
  1807. struct qeth_cmd_buffer *iob,
  1808. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  1809. unsigned long),
  1810. void *reply_param)
  1811. {
  1812. int rc;
  1813. unsigned long flags;
  1814. struct qeth_reply *reply = NULL;
  1815. unsigned long timeout, event_timeout;
  1816. struct qeth_ipa_cmd *cmd;
  1817. QETH_CARD_TEXT(card, 2, "sendctl");
  1818. if (card->read_or_write_problem) {
  1819. qeth_release_buffer(iob->channel, iob);
  1820. return -EIO;
  1821. }
  1822. reply = qeth_alloc_reply(card);
  1823. if (!reply) {
  1824. return -ENOMEM;
  1825. }
  1826. reply->callback = reply_cb;
  1827. reply->param = reply_param;
  1828. if (card->state == CARD_STATE_DOWN)
  1829. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1830. else
  1831. reply->seqno = card->seqno.ipa++;
  1832. init_waitqueue_head(&reply->wait_q);
  1833. spin_lock_irqsave(&card->lock, flags);
  1834. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1835. spin_unlock_irqrestore(&card->lock, flags);
  1836. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1837. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1838. qeth_prepare_control_data(card, len, iob);
  1839. if (IS_IPA(iob->data))
  1840. event_timeout = QETH_IPA_TIMEOUT;
  1841. else
  1842. event_timeout = QETH_TIMEOUT;
  1843. timeout = jiffies + event_timeout;
  1844. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1845. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1846. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1847. (addr_t) iob, 0, 0);
  1848. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1849. if (rc) {
  1850. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1851. "ccw_device_start rc = %i\n",
  1852. dev_name(&card->write.ccwdev->dev), rc);
  1853. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1854. spin_lock_irqsave(&card->lock, flags);
  1855. list_del_init(&reply->list);
  1856. qeth_put_reply(reply);
  1857. spin_unlock_irqrestore(&card->lock, flags);
  1858. qeth_release_buffer(iob->channel, iob);
  1859. atomic_set(&card->write.irq_pending, 0);
  1860. wake_up(&card->wait_q);
  1861. return rc;
  1862. }
  1863. /* we have only one long running ipassist, since we can ensure
  1864. process context of this command we can sleep */
  1865. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1866. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1867. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1868. if (!wait_event_timeout(reply->wait_q,
  1869. atomic_read(&reply->received), event_timeout))
  1870. goto time_err;
  1871. } else {
  1872. while (!atomic_read(&reply->received)) {
  1873. if (time_after(jiffies, timeout))
  1874. goto time_err;
  1875. cpu_relax();
  1876. }
  1877. }
  1878. if (reply->rc == -EIO)
  1879. goto error;
  1880. rc = reply->rc;
  1881. qeth_put_reply(reply);
  1882. return rc;
  1883. time_err:
  1884. reply->rc = -ETIME;
  1885. spin_lock_irqsave(&reply->card->lock, flags);
  1886. list_del_init(&reply->list);
  1887. spin_unlock_irqrestore(&reply->card->lock, flags);
  1888. atomic_inc(&reply->received);
  1889. error:
  1890. atomic_set(&card->write.irq_pending, 0);
  1891. qeth_release_buffer(iob->channel, iob);
  1892. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1893. rc = reply->rc;
  1894. qeth_put_reply(reply);
  1895. return rc;
  1896. }
  1897. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1898. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1899. unsigned long data)
  1900. {
  1901. struct qeth_cmd_buffer *iob;
  1902. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1903. iob = (struct qeth_cmd_buffer *) data;
  1904. memcpy(&card->token.cm_filter_r,
  1905. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1906. QETH_MPC_TOKEN_LENGTH);
  1907. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1908. return 0;
  1909. }
  1910. static int qeth_cm_enable(struct qeth_card *card)
  1911. {
  1912. int rc;
  1913. struct qeth_cmd_buffer *iob;
  1914. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1915. iob = qeth_wait_for_buffer(&card->write);
  1916. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1917. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1918. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1919. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1920. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1921. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1922. qeth_cm_enable_cb, NULL);
  1923. return rc;
  1924. }
  1925. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1926. unsigned long data)
  1927. {
  1928. struct qeth_cmd_buffer *iob;
  1929. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1930. iob = (struct qeth_cmd_buffer *) data;
  1931. memcpy(&card->token.cm_connection_r,
  1932. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1933. QETH_MPC_TOKEN_LENGTH);
  1934. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1935. return 0;
  1936. }
  1937. static int qeth_cm_setup(struct qeth_card *card)
  1938. {
  1939. int rc;
  1940. struct qeth_cmd_buffer *iob;
  1941. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1942. iob = qeth_wait_for_buffer(&card->write);
  1943. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1944. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1945. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1946. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1947. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1948. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1949. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1950. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1951. qeth_cm_setup_cb, NULL);
  1952. return rc;
  1953. }
  1954. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1955. {
  1956. switch (card->info.type) {
  1957. case QETH_CARD_TYPE_UNKNOWN:
  1958. return 1500;
  1959. case QETH_CARD_TYPE_IQD:
  1960. return card->info.max_mtu;
  1961. case QETH_CARD_TYPE_OSD:
  1962. switch (card->info.link_type) {
  1963. case QETH_LINK_TYPE_HSTR:
  1964. case QETH_LINK_TYPE_LANE_TR:
  1965. return 2000;
  1966. default:
  1967. return card->options.layer2 ? 1500 : 1492;
  1968. }
  1969. case QETH_CARD_TYPE_OSM:
  1970. case QETH_CARD_TYPE_OSX:
  1971. return card->options.layer2 ? 1500 : 1492;
  1972. default:
  1973. return 1500;
  1974. }
  1975. }
  1976. static inline int qeth_get_mtu_outof_framesize(int framesize)
  1977. {
  1978. switch (framesize) {
  1979. case 0x4000:
  1980. return 8192;
  1981. case 0x6000:
  1982. return 16384;
  1983. case 0xa000:
  1984. return 32768;
  1985. case 0xffff:
  1986. return 57344;
  1987. default:
  1988. return 0;
  1989. }
  1990. }
  1991. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  1992. {
  1993. switch (card->info.type) {
  1994. case QETH_CARD_TYPE_OSD:
  1995. case QETH_CARD_TYPE_OSM:
  1996. case QETH_CARD_TYPE_OSX:
  1997. case QETH_CARD_TYPE_IQD:
  1998. return ((mtu >= 576) &&
  1999. (mtu <= card->info.max_mtu));
  2000. case QETH_CARD_TYPE_OSN:
  2001. case QETH_CARD_TYPE_UNKNOWN:
  2002. default:
  2003. return 1;
  2004. }
  2005. }
  2006. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2007. unsigned long data)
  2008. {
  2009. __u16 mtu, framesize;
  2010. __u16 len;
  2011. __u8 link_type;
  2012. struct qeth_cmd_buffer *iob;
  2013. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2014. iob = (struct qeth_cmd_buffer *) data;
  2015. memcpy(&card->token.ulp_filter_r,
  2016. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2017. QETH_MPC_TOKEN_LENGTH);
  2018. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2019. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2020. mtu = qeth_get_mtu_outof_framesize(framesize);
  2021. if (!mtu) {
  2022. iob->rc = -EINVAL;
  2023. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2024. return 0;
  2025. }
  2026. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2027. /* frame size has changed */
  2028. if (card->dev &&
  2029. ((card->dev->mtu == card->info.initial_mtu) ||
  2030. (card->dev->mtu > mtu)))
  2031. card->dev->mtu = mtu;
  2032. qeth_free_qdio_buffers(card);
  2033. }
  2034. card->info.initial_mtu = mtu;
  2035. card->info.max_mtu = mtu;
  2036. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2037. } else {
  2038. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2039. iob->data);
  2040. card->info.initial_mtu = min(card->info.max_mtu,
  2041. qeth_get_initial_mtu_for_card(card));
  2042. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2043. }
  2044. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2045. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2046. memcpy(&link_type,
  2047. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2048. card->info.link_type = link_type;
  2049. } else
  2050. card->info.link_type = 0;
  2051. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2052. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2053. return 0;
  2054. }
  2055. static int qeth_ulp_enable(struct qeth_card *card)
  2056. {
  2057. int rc;
  2058. char prot_type;
  2059. struct qeth_cmd_buffer *iob;
  2060. /*FIXME: trace view callbacks*/
  2061. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2062. iob = qeth_wait_for_buffer(&card->write);
  2063. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2064. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2065. (__u8) card->info.portno;
  2066. if (card->options.layer2)
  2067. if (card->info.type == QETH_CARD_TYPE_OSN)
  2068. prot_type = QETH_PROT_OSN2;
  2069. else
  2070. prot_type = QETH_PROT_LAYER2;
  2071. else
  2072. prot_type = QETH_PROT_TCPIP;
  2073. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2074. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2075. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2076. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2077. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2078. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2079. card->info.portname, 9);
  2080. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2081. qeth_ulp_enable_cb, NULL);
  2082. return rc;
  2083. }
  2084. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2085. unsigned long data)
  2086. {
  2087. struct qeth_cmd_buffer *iob;
  2088. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2089. iob = (struct qeth_cmd_buffer *) data;
  2090. memcpy(&card->token.ulp_connection_r,
  2091. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2092. QETH_MPC_TOKEN_LENGTH);
  2093. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2094. 3)) {
  2095. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2096. dev_err(&card->gdev->dev, "A connection could not be "
  2097. "established because of an OLM limit\n");
  2098. iob->rc = -EMLINK;
  2099. }
  2100. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2101. return 0;
  2102. }
  2103. static int qeth_ulp_setup(struct qeth_card *card)
  2104. {
  2105. int rc;
  2106. __u16 temp;
  2107. struct qeth_cmd_buffer *iob;
  2108. struct ccw_dev_id dev_id;
  2109. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2110. iob = qeth_wait_for_buffer(&card->write);
  2111. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2112. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2113. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2114. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2115. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2116. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2117. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2118. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2119. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2120. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2121. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2122. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2123. qeth_ulp_setup_cb, NULL);
  2124. return rc;
  2125. }
  2126. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2127. {
  2128. int rc;
  2129. struct qeth_qdio_out_buffer *newbuf;
  2130. rc = 0;
  2131. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2132. if (!newbuf) {
  2133. rc = -ENOMEM;
  2134. goto out;
  2135. }
  2136. newbuf->buffer = &q->qdio_bufs[bidx];
  2137. skb_queue_head_init(&newbuf->skb_list);
  2138. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2139. newbuf->q = q;
  2140. newbuf->aob = NULL;
  2141. newbuf->next_pending = q->bufs[bidx];
  2142. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2143. q->bufs[bidx] = newbuf;
  2144. if (q->bufstates) {
  2145. q->bufstates[bidx].user = newbuf;
  2146. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2147. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2148. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2149. (long) newbuf->next_pending);
  2150. }
  2151. out:
  2152. return rc;
  2153. }
  2154. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2155. {
  2156. int i, j;
  2157. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2158. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2159. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2160. return 0;
  2161. card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
  2162. GFP_KERNEL);
  2163. if (!card->qdio.in_q)
  2164. goto out_nomem;
  2165. QETH_DBF_TEXT(SETUP, 2, "inq");
  2166. QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
  2167. memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
  2168. /* give inbound qeth_qdio_buffers their qdio_buffers */
  2169. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  2170. card->qdio.in_q->bufs[i].buffer =
  2171. &card->qdio.in_q->qdio_bufs[i];
  2172. card->qdio.in_q->bufs[i].rx_skb = NULL;
  2173. }
  2174. /* inbound buffer pool */
  2175. if (qeth_alloc_buffer_pool(card))
  2176. goto out_freeinq;
  2177. /* outbound */
  2178. card->qdio.out_qs =
  2179. kzalloc(card->qdio.no_out_queues *
  2180. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2181. if (!card->qdio.out_qs)
  2182. goto out_freepool;
  2183. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2184. card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
  2185. GFP_KERNEL);
  2186. if (!card->qdio.out_qs[i])
  2187. goto out_freeoutq;
  2188. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2189. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2190. card->qdio.out_qs[i]->queue_no = i;
  2191. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2192. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2193. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2194. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2195. goto out_freeoutqbufs;
  2196. }
  2197. }
  2198. /* completion */
  2199. if (qeth_alloc_cq(card))
  2200. goto out_freeoutq;
  2201. return 0;
  2202. out_freeoutqbufs:
  2203. while (j > 0) {
  2204. --j;
  2205. kmem_cache_free(qeth_qdio_outbuf_cache,
  2206. card->qdio.out_qs[i]->bufs[j]);
  2207. card->qdio.out_qs[i]->bufs[j] = NULL;
  2208. }
  2209. out_freeoutq:
  2210. while (i > 0) {
  2211. kfree(card->qdio.out_qs[--i]);
  2212. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2213. }
  2214. kfree(card->qdio.out_qs);
  2215. card->qdio.out_qs = NULL;
  2216. out_freepool:
  2217. qeth_free_buffer_pool(card);
  2218. out_freeinq:
  2219. kfree(card->qdio.in_q);
  2220. card->qdio.in_q = NULL;
  2221. out_nomem:
  2222. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2223. return -ENOMEM;
  2224. }
  2225. static void qeth_create_qib_param_field(struct qeth_card *card,
  2226. char *param_field)
  2227. {
  2228. param_field[0] = _ascebc['P'];
  2229. param_field[1] = _ascebc['C'];
  2230. param_field[2] = _ascebc['I'];
  2231. param_field[3] = _ascebc['T'];
  2232. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2233. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2234. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2235. }
  2236. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2237. char *param_field)
  2238. {
  2239. param_field[16] = _ascebc['B'];
  2240. param_field[17] = _ascebc['L'];
  2241. param_field[18] = _ascebc['K'];
  2242. param_field[19] = _ascebc['T'];
  2243. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2244. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2245. *((unsigned int *) (&param_field[28])) =
  2246. card->info.blkt.inter_packet_jumbo;
  2247. }
  2248. static int qeth_qdio_activate(struct qeth_card *card)
  2249. {
  2250. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2251. return qdio_activate(CARD_DDEV(card));
  2252. }
  2253. static int qeth_dm_act(struct qeth_card *card)
  2254. {
  2255. int rc;
  2256. struct qeth_cmd_buffer *iob;
  2257. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2258. iob = qeth_wait_for_buffer(&card->write);
  2259. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2260. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2261. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2262. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2263. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2264. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2265. return rc;
  2266. }
  2267. static int qeth_mpc_initialize(struct qeth_card *card)
  2268. {
  2269. int rc;
  2270. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2271. rc = qeth_issue_next_read(card);
  2272. if (rc) {
  2273. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2274. return rc;
  2275. }
  2276. rc = qeth_cm_enable(card);
  2277. if (rc) {
  2278. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2279. goto out_qdio;
  2280. }
  2281. rc = qeth_cm_setup(card);
  2282. if (rc) {
  2283. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2284. goto out_qdio;
  2285. }
  2286. rc = qeth_ulp_enable(card);
  2287. if (rc) {
  2288. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2289. goto out_qdio;
  2290. }
  2291. rc = qeth_ulp_setup(card);
  2292. if (rc) {
  2293. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2294. goto out_qdio;
  2295. }
  2296. rc = qeth_alloc_qdio_buffers(card);
  2297. if (rc) {
  2298. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2299. goto out_qdio;
  2300. }
  2301. rc = qeth_qdio_establish(card);
  2302. if (rc) {
  2303. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2304. qeth_free_qdio_buffers(card);
  2305. goto out_qdio;
  2306. }
  2307. rc = qeth_qdio_activate(card);
  2308. if (rc) {
  2309. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2310. goto out_qdio;
  2311. }
  2312. rc = qeth_dm_act(card);
  2313. if (rc) {
  2314. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2315. goto out_qdio;
  2316. }
  2317. return 0;
  2318. out_qdio:
  2319. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2320. return rc;
  2321. }
  2322. static void qeth_print_status_with_portname(struct qeth_card *card)
  2323. {
  2324. char dbf_text[15];
  2325. int i;
  2326. sprintf(dbf_text, "%s", card->info.portname + 1);
  2327. for (i = 0; i < 8; i++)
  2328. dbf_text[i] =
  2329. (char) _ebcasc[(__u8) dbf_text[i]];
  2330. dbf_text[8] = 0;
  2331. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2332. "with link type %s (portname: %s)\n",
  2333. qeth_get_cardname(card),
  2334. (card->info.mcl_level[0]) ? " (level: " : "",
  2335. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2336. (card->info.mcl_level[0]) ? ")" : "",
  2337. qeth_get_cardname_short(card),
  2338. dbf_text);
  2339. }
  2340. static void qeth_print_status_no_portname(struct qeth_card *card)
  2341. {
  2342. if (card->info.portname[0])
  2343. dev_info(&card->gdev->dev, "Device is a%s "
  2344. "card%s%s%s\nwith link type %s "
  2345. "(no portname needed by interface).\n",
  2346. qeth_get_cardname(card),
  2347. (card->info.mcl_level[0]) ? " (level: " : "",
  2348. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2349. (card->info.mcl_level[0]) ? ")" : "",
  2350. qeth_get_cardname_short(card));
  2351. else
  2352. dev_info(&card->gdev->dev, "Device is a%s "
  2353. "card%s%s%s\nwith link type %s.\n",
  2354. qeth_get_cardname(card),
  2355. (card->info.mcl_level[0]) ? " (level: " : "",
  2356. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2357. (card->info.mcl_level[0]) ? ")" : "",
  2358. qeth_get_cardname_short(card));
  2359. }
  2360. void qeth_print_status_message(struct qeth_card *card)
  2361. {
  2362. switch (card->info.type) {
  2363. case QETH_CARD_TYPE_OSD:
  2364. case QETH_CARD_TYPE_OSM:
  2365. case QETH_CARD_TYPE_OSX:
  2366. /* VM will use a non-zero first character
  2367. * to indicate a HiperSockets like reporting
  2368. * of the level OSA sets the first character to zero
  2369. * */
  2370. if (!card->info.mcl_level[0]) {
  2371. sprintf(card->info.mcl_level, "%02x%02x",
  2372. card->info.mcl_level[2],
  2373. card->info.mcl_level[3]);
  2374. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2375. break;
  2376. }
  2377. /* fallthrough */
  2378. case QETH_CARD_TYPE_IQD:
  2379. if ((card->info.guestlan) ||
  2380. (card->info.mcl_level[0] & 0x80)) {
  2381. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2382. card->info.mcl_level[0]];
  2383. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2384. card->info.mcl_level[1]];
  2385. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2386. card->info.mcl_level[2]];
  2387. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2388. card->info.mcl_level[3]];
  2389. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2390. }
  2391. break;
  2392. default:
  2393. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2394. }
  2395. if (card->info.portname_required)
  2396. qeth_print_status_with_portname(card);
  2397. else
  2398. qeth_print_status_no_portname(card);
  2399. }
  2400. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2401. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2402. {
  2403. struct qeth_buffer_pool_entry *entry;
  2404. QETH_CARD_TEXT(card, 5, "inwrklst");
  2405. list_for_each_entry(entry,
  2406. &card->qdio.init_pool.entry_list, init_list) {
  2407. qeth_put_buffer_pool_entry(card, entry);
  2408. }
  2409. }
  2410. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2411. struct qeth_card *card)
  2412. {
  2413. struct list_head *plh;
  2414. struct qeth_buffer_pool_entry *entry;
  2415. int i, free;
  2416. struct page *page;
  2417. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2418. return NULL;
  2419. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2420. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2421. free = 1;
  2422. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2423. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2424. free = 0;
  2425. break;
  2426. }
  2427. }
  2428. if (free) {
  2429. list_del_init(&entry->list);
  2430. return entry;
  2431. }
  2432. }
  2433. /* no free buffer in pool so take first one and swap pages */
  2434. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2435. struct qeth_buffer_pool_entry, list);
  2436. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2437. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2438. page = alloc_page(GFP_ATOMIC);
  2439. if (!page) {
  2440. return NULL;
  2441. } else {
  2442. free_page((unsigned long)entry->elements[i]);
  2443. entry->elements[i] = page_address(page);
  2444. if (card->options.performance_stats)
  2445. card->perf_stats.sg_alloc_page_rx++;
  2446. }
  2447. }
  2448. }
  2449. list_del_init(&entry->list);
  2450. return entry;
  2451. }
  2452. static int qeth_init_input_buffer(struct qeth_card *card,
  2453. struct qeth_qdio_buffer *buf)
  2454. {
  2455. struct qeth_buffer_pool_entry *pool_entry;
  2456. int i;
  2457. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2458. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2459. if (!buf->rx_skb)
  2460. return 1;
  2461. }
  2462. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2463. if (!pool_entry)
  2464. return 1;
  2465. /*
  2466. * since the buffer is accessed only from the input_tasklet
  2467. * there shouldn't be a need to synchronize; also, since we use
  2468. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2469. * buffers
  2470. */
  2471. buf->pool_entry = pool_entry;
  2472. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2473. buf->buffer->element[i].length = PAGE_SIZE;
  2474. buf->buffer->element[i].addr = pool_entry->elements[i];
  2475. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2476. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2477. else
  2478. buf->buffer->element[i].eflags = 0;
  2479. buf->buffer->element[i].sflags = 0;
  2480. }
  2481. return 0;
  2482. }
  2483. int qeth_init_qdio_queues(struct qeth_card *card)
  2484. {
  2485. int i, j;
  2486. int rc;
  2487. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2488. /* inbound queue */
  2489. memset(card->qdio.in_q->qdio_bufs, 0,
  2490. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  2491. qeth_initialize_working_pool_list(card);
  2492. /*give only as many buffers to hardware as we have buffer pool entries*/
  2493. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2494. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2495. card->qdio.in_q->next_buf_to_init =
  2496. card->qdio.in_buf_pool.buf_count - 1;
  2497. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2498. card->qdio.in_buf_pool.buf_count - 1);
  2499. if (rc) {
  2500. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2501. return rc;
  2502. }
  2503. /* completion */
  2504. rc = qeth_cq_init(card);
  2505. if (rc) {
  2506. return rc;
  2507. }
  2508. /* outbound queue */
  2509. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2510. memset(card->qdio.out_qs[i]->qdio_bufs, 0,
  2511. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  2512. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2513. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2514. card->qdio.out_qs[i]->bufs[j],
  2515. QETH_QDIO_BUF_EMPTY);
  2516. }
  2517. card->qdio.out_qs[i]->card = card;
  2518. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2519. card->qdio.out_qs[i]->do_pack = 0;
  2520. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2521. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2522. atomic_set(&card->qdio.out_qs[i]->state,
  2523. QETH_OUT_Q_UNLOCKED);
  2524. }
  2525. return 0;
  2526. }
  2527. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2528. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2529. {
  2530. switch (link_type) {
  2531. case QETH_LINK_TYPE_HSTR:
  2532. return 2;
  2533. default:
  2534. return 1;
  2535. }
  2536. }
  2537. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2538. struct qeth_ipa_cmd *cmd, __u8 command,
  2539. enum qeth_prot_versions prot)
  2540. {
  2541. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2542. cmd->hdr.command = command;
  2543. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2544. cmd->hdr.seqno = card->seqno.ipa;
  2545. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2546. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2547. if (card->options.layer2)
  2548. cmd->hdr.prim_version_no = 2;
  2549. else
  2550. cmd->hdr.prim_version_no = 1;
  2551. cmd->hdr.param_count = 1;
  2552. cmd->hdr.prot_version = prot;
  2553. cmd->hdr.ipa_supported = 0;
  2554. cmd->hdr.ipa_enabled = 0;
  2555. }
  2556. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2557. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2558. {
  2559. struct qeth_cmd_buffer *iob;
  2560. struct qeth_ipa_cmd *cmd;
  2561. iob = qeth_wait_for_buffer(&card->write);
  2562. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2563. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2564. return iob;
  2565. }
  2566. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2567. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2568. char prot_type)
  2569. {
  2570. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2571. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2572. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2573. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2574. }
  2575. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2576. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2577. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2578. unsigned long),
  2579. void *reply_param)
  2580. {
  2581. int rc;
  2582. char prot_type;
  2583. QETH_CARD_TEXT(card, 4, "sendipa");
  2584. if (card->options.layer2)
  2585. if (card->info.type == QETH_CARD_TYPE_OSN)
  2586. prot_type = QETH_PROT_OSN2;
  2587. else
  2588. prot_type = QETH_PROT_LAYER2;
  2589. else
  2590. prot_type = QETH_PROT_TCPIP;
  2591. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2592. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2593. iob, reply_cb, reply_param);
  2594. if (rc == -ETIME) {
  2595. qeth_clear_ipacmd_list(card);
  2596. qeth_schedule_recovery(card);
  2597. }
  2598. return rc;
  2599. }
  2600. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2601. int qeth_send_startlan(struct qeth_card *card)
  2602. {
  2603. int rc;
  2604. struct qeth_cmd_buffer *iob;
  2605. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2606. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2607. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2608. return rc;
  2609. }
  2610. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2611. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2612. struct qeth_reply *reply, unsigned long data)
  2613. {
  2614. struct qeth_ipa_cmd *cmd;
  2615. QETH_CARD_TEXT(card, 4, "defadpcb");
  2616. cmd = (struct qeth_ipa_cmd *) data;
  2617. if (cmd->hdr.return_code == 0)
  2618. cmd->hdr.return_code =
  2619. cmd->data.setadapterparms.hdr.return_code;
  2620. return 0;
  2621. }
  2622. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2623. struct qeth_reply *reply, unsigned long data)
  2624. {
  2625. struct qeth_ipa_cmd *cmd;
  2626. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2627. cmd = (struct qeth_ipa_cmd *) data;
  2628. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2629. card->info.link_type =
  2630. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2631. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2632. }
  2633. card->options.adp.supported_funcs =
  2634. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2635. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2636. }
  2637. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2638. __u32 command, __u32 cmdlen)
  2639. {
  2640. struct qeth_cmd_buffer *iob;
  2641. struct qeth_ipa_cmd *cmd;
  2642. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2643. QETH_PROT_IPV4);
  2644. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2645. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2646. cmd->data.setadapterparms.hdr.command_code = command;
  2647. cmd->data.setadapterparms.hdr.used_total = 1;
  2648. cmd->data.setadapterparms.hdr.seq_no = 1;
  2649. return iob;
  2650. }
  2651. int qeth_query_setadapterparms(struct qeth_card *card)
  2652. {
  2653. int rc;
  2654. struct qeth_cmd_buffer *iob;
  2655. QETH_CARD_TEXT(card, 3, "queryadp");
  2656. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2657. sizeof(struct qeth_ipacmd_setadpparms));
  2658. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2659. return rc;
  2660. }
  2661. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2662. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2663. struct qeth_reply *reply, unsigned long data)
  2664. {
  2665. struct qeth_ipa_cmd *cmd;
  2666. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2667. cmd = (struct qeth_ipa_cmd *) data;
  2668. switch (cmd->hdr.return_code) {
  2669. case IPA_RC_NOTSUPP:
  2670. case IPA_RC_L2_UNSUPPORTED_CMD:
  2671. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2672. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2673. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2674. return -0;
  2675. default:
  2676. if (cmd->hdr.return_code) {
  2677. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2678. "rc=%d\n",
  2679. dev_name(&card->gdev->dev),
  2680. cmd->hdr.return_code);
  2681. return 0;
  2682. }
  2683. }
  2684. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2685. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2686. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2687. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2688. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2689. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2690. } else
  2691. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2692. "\n", dev_name(&card->gdev->dev));
  2693. return 0;
  2694. }
  2695. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2696. {
  2697. int rc;
  2698. struct qeth_cmd_buffer *iob;
  2699. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2700. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2701. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2702. return rc;
  2703. }
  2704. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2705. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2706. struct qeth_reply *reply, unsigned long data)
  2707. {
  2708. struct qeth_ipa_cmd *cmd;
  2709. __u16 rc;
  2710. cmd = (struct qeth_ipa_cmd *)data;
  2711. rc = cmd->hdr.return_code;
  2712. if (rc)
  2713. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2714. else
  2715. card->info.diagass_support = cmd->data.diagass.ext;
  2716. return 0;
  2717. }
  2718. static int qeth_query_setdiagass(struct qeth_card *card)
  2719. {
  2720. struct qeth_cmd_buffer *iob;
  2721. struct qeth_ipa_cmd *cmd;
  2722. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2723. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2724. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2725. cmd->data.diagass.subcmd_len = 16;
  2726. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2727. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2728. }
  2729. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2730. {
  2731. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2732. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2733. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2734. struct ccw_dev_id ccwid;
  2735. int level;
  2736. tid->chpid = card->info.chpid;
  2737. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2738. tid->ssid = ccwid.ssid;
  2739. tid->devno = ccwid.devno;
  2740. if (!info)
  2741. return;
  2742. level = stsi(NULL, 0, 0, 0);
  2743. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2744. tid->lparnr = info222->lpar_number;
  2745. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2746. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2747. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2748. }
  2749. free_page(info);
  2750. return;
  2751. }
  2752. static int qeth_hw_trap_cb(struct qeth_card *card,
  2753. struct qeth_reply *reply, unsigned long data)
  2754. {
  2755. struct qeth_ipa_cmd *cmd;
  2756. __u16 rc;
  2757. cmd = (struct qeth_ipa_cmd *)data;
  2758. rc = cmd->hdr.return_code;
  2759. if (rc)
  2760. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2761. return 0;
  2762. }
  2763. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2764. {
  2765. struct qeth_cmd_buffer *iob;
  2766. struct qeth_ipa_cmd *cmd;
  2767. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2768. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2769. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2770. cmd->data.diagass.subcmd_len = 80;
  2771. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2772. cmd->data.diagass.type = 1;
  2773. cmd->data.diagass.action = action;
  2774. switch (action) {
  2775. case QETH_DIAGS_TRAP_ARM:
  2776. cmd->data.diagass.options = 0x0003;
  2777. cmd->data.diagass.ext = 0x00010000 +
  2778. sizeof(struct qeth_trap_id);
  2779. qeth_get_trap_id(card,
  2780. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2781. break;
  2782. case QETH_DIAGS_TRAP_DISARM:
  2783. cmd->data.diagass.options = 0x0001;
  2784. break;
  2785. case QETH_DIAGS_TRAP_CAPTURE:
  2786. break;
  2787. }
  2788. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2789. }
  2790. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2791. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2792. unsigned int qdio_error, const char *dbftext)
  2793. {
  2794. if (qdio_error) {
  2795. QETH_CARD_TEXT(card, 2, dbftext);
  2796. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2797. buf->element[15].sflags);
  2798. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2799. buf->element[14].sflags);
  2800. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2801. if ((buf->element[15].sflags) == 0x12) {
  2802. card->stats.rx_dropped++;
  2803. return 0;
  2804. } else
  2805. return 1;
  2806. }
  2807. return 0;
  2808. }
  2809. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2810. void qeth_buffer_reclaim_work(struct work_struct *work)
  2811. {
  2812. struct qeth_card *card = container_of(work, struct qeth_card,
  2813. buffer_reclaim_work.work);
  2814. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2815. qeth_queue_input_buffer(card, card->reclaim_index);
  2816. }
  2817. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2818. {
  2819. struct qeth_qdio_q *queue = card->qdio.in_q;
  2820. struct list_head *lh;
  2821. int count;
  2822. int i;
  2823. int rc;
  2824. int newcount = 0;
  2825. count = (index < queue->next_buf_to_init)?
  2826. card->qdio.in_buf_pool.buf_count -
  2827. (queue->next_buf_to_init - index) :
  2828. card->qdio.in_buf_pool.buf_count -
  2829. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2830. /* only requeue at a certain threshold to avoid SIGAs */
  2831. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2832. for (i = queue->next_buf_to_init;
  2833. i < queue->next_buf_to_init + count; ++i) {
  2834. if (qeth_init_input_buffer(card,
  2835. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2836. break;
  2837. } else {
  2838. newcount++;
  2839. }
  2840. }
  2841. if (newcount < count) {
  2842. /* we are in memory shortage so we switch back to
  2843. traditional skb allocation and drop packages */
  2844. atomic_set(&card->force_alloc_skb, 3);
  2845. count = newcount;
  2846. } else {
  2847. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2848. }
  2849. if (!count) {
  2850. i = 0;
  2851. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2852. i++;
  2853. if (i == card->qdio.in_buf_pool.buf_count) {
  2854. QETH_CARD_TEXT(card, 2, "qsarbw");
  2855. card->reclaim_index = index;
  2856. schedule_delayed_work(
  2857. &card->buffer_reclaim_work,
  2858. QETH_RECLAIM_WORK_TIME);
  2859. }
  2860. return;
  2861. }
  2862. /*
  2863. * according to old code it should be avoided to requeue all
  2864. * 128 buffers in order to benefit from PCI avoidance.
  2865. * this function keeps at least one buffer (the buffer at
  2866. * 'index') un-requeued -> this buffer is the first buffer that
  2867. * will be requeued the next time
  2868. */
  2869. if (card->options.performance_stats) {
  2870. card->perf_stats.inbound_do_qdio_cnt++;
  2871. card->perf_stats.inbound_do_qdio_start_time =
  2872. qeth_get_micros();
  2873. }
  2874. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2875. queue->next_buf_to_init, count);
  2876. if (card->options.performance_stats)
  2877. card->perf_stats.inbound_do_qdio_time +=
  2878. qeth_get_micros() -
  2879. card->perf_stats.inbound_do_qdio_start_time;
  2880. if (rc) {
  2881. QETH_CARD_TEXT(card, 2, "qinberr");
  2882. }
  2883. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2884. QDIO_MAX_BUFFERS_PER_Q;
  2885. }
  2886. }
  2887. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  2888. static int qeth_handle_send_error(struct qeth_card *card,
  2889. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2890. {
  2891. int sbalf15 = buffer->buffer->element[15].sflags;
  2892. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2893. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2894. if (sbalf15 == 0) {
  2895. qdio_err = 0;
  2896. } else {
  2897. qdio_err = 1;
  2898. }
  2899. }
  2900. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2901. if (!qdio_err)
  2902. return QETH_SEND_ERROR_NONE;
  2903. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2904. return QETH_SEND_ERROR_RETRY;
  2905. QETH_CARD_TEXT(card, 1, "lnkfail");
  2906. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2907. (u16)qdio_err, (u8)sbalf15);
  2908. return QETH_SEND_ERROR_LINK_FAILURE;
  2909. }
  2910. /*
  2911. * Switched to packing state if the number of used buffers on a queue
  2912. * reaches a certain limit.
  2913. */
  2914. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2915. {
  2916. if (!queue->do_pack) {
  2917. if (atomic_read(&queue->used_buffers)
  2918. >= QETH_HIGH_WATERMARK_PACK){
  2919. /* switch non-PACKING -> PACKING */
  2920. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2921. if (queue->card->options.performance_stats)
  2922. queue->card->perf_stats.sc_dp_p++;
  2923. queue->do_pack = 1;
  2924. }
  2925. }
  2926. }
  2927. /*
  2928. * Switches from packing to non-packing mode. If there is a packing
  2929. * buffer on the queue this buffer will be prepared to be flushed.
  2930. * In that case 1 is returned to inform the caller. If no buffer
  2931. * has to be flushed, zero is returned.
  2932. */
  2933. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  2934. {
  2935. struct qeth_qdio_out_buffer *buffer;
  2936. int flush_count = 0;
  2937. if (queue->do_pack) {
  2938. if (atomic_read(&queue->used_buffers)
  2939. <= QETH_LOW_WATERMARK_PACK) {
  2940. /* switch PACKING -> non-PACKING */
  2941. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  2942. if (queue->card->options.performance_stats)
  2943. queue->card->perf_stats.sc_p_dp++;
  2944. queue->do_pack = 0;
  2945. /* flush packing buffers */
  2946. buffer = queue->bufs[queue->next_buf_to_fill];
  2947. if ((atomic_read(&buffer->state) ==
  2948. QETH_QDIO_BUF_EMPTY) &&
  2949. (buffer->next_element_to_fill > 0)) {
  2950. atomic_set(&buffer->state,
  2951. QETH_QDIO_BUF_PRIMED);
  2952. flush_count++;
  2953. queue->next_buf_to_fill =
  2954. (queue->next_buf_to_fill + 1) %
  2955. QDIO_MAX_BUFFERS_PER_Q;
  2956. }
  2957. }
  2958. }
  2959. return flush_count;
  2960. }
  2961. /*
  2962. * Called to flush a packing buffer if no more pci flags are on the queue.
  2963. * Checks if there is a packing buffer and prepares it to be flushed.
  2964. * In that case returns 1, otherwise zero.
  2965. */
  2966. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  2967. {
  2968. struct qeth_qdio_out_buffer *buffer;
  2969. buffer = queue->bufs[queue->next_buf_to_fill];
  2970. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  2971. (buffer->next_element_to_fill > 0)) {
  2972. /* it's a packing buffer */
  2973. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  2974. queue->next_buf_to_fill =
  2975. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  2976. return 1;
  2977. }
  2978. return 0;
  2979. }
  2980. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  2981. int count)
  2982. {
  2983. struct qeth_qdio_out_buffer *buf;
  2984. int rc;
  2985. int i;
  2986. unsigned int qdio_flags;
  2987. for (i = index; i < index + count; ++i) {
  2988. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  2989. buf = queue->bufs[bidx];
  2990. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  2991. SBAL_EFLAGS_LAST_ENTRY;
  2992. if (queue->bufstates)
  2993. queue->bufstates[bidx].user = buf;
  2994. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  2995. continue;
  2996. if (!queue->do_pack) {
  2997. if ((atomic_read(&queue->used_buffers) >=
  2998. (QETH_HIGH_WATERMARK_PACK -
  2999. QETH_WATERMARK_PACK_FUZZ)) &&
  3000. !atomic_read(&queue->set_pci_flags_count)) {
  3001. /* it's likely that we'll go to packing
  3002. * mode soon */
  3003. atomic_inc(&queue->set_pci_flags_count);
  3004. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3005. }
  3006. } else {
  3007. if (!atomic_read(&queue->set_pci_flags_count)) {
  3008. /*
  3009. * there's no outstanding PCI any more, so we
  3010. * have to request a PCI to be sure the the PCI
  3011. * will wake at some time in the future then we
  3012. * can flush packed buffers that might still be
  3013. * hanging around, which can happen if no
  3014. * further send was requested by the stack
  3015. */
  3016. atomic_inc(&queue->set_pci_flags_count);
  3017. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3018. }
  3019. }
  3020. }
  3021. queue->card->dev->trans_start = jiffies;
  3022. if (queue->card->options.performance_stats) {
  3023. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3024. queue->card->perf_stats.outbound_do_qdio_start_time =
  3025. qeth_get_micros();
  3026. }
  3027. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3028. if (atomic_read(&queue->set_pci_flags_count))
  3029. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3030. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3031. queue->queue_no, index, count);
  3032. if (queue->card->options.performance_stats)
  3033. queue->card->perf_stats.outbound_do_qdio_time +=
  3034. qeth_get_micros() -
  3035. queue->card->perf_stats.outbound_do_qdio_start_time;
  3036. atomic_add(count, &queue->used_buffers);
  3037. if (rc) {
  3038. queue->card->stats.tx_errors += count;
  3039. /* ignore temporary SIGA errors without busy condition */
  3040. if (rc == -ENOBUFS)
  3041. return;
  3042. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3043. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3044. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3045. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3046. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3047. /* this must not happen under normal circumstances. if it
  3048. * happens something is really wrong -> recover */
  3049. qeth_schedule_recovery(queue->card);
  3050. return;
  3051. }
  3052. if (queue->card->options.performance_stats)
  3053. queue->card->perf_stats.bufs_sent += count;
  3054. }
  3055. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3056. {
  3057. int index;
  3058. int flush_cnt = 0;
  3059. int q_was_packing = 0;
  3060. /*
  3061. * check if weed have to switch to non-packing mode or if
  3062. * we have to get a pci flag out on the queue
  3063. */
  3064. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3065. !atomic_read(&queue->set_pci_flags_count)) {
  3066. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3067. QETH_OUT_Q_UNLOCKED) {
  3068. /*
  3069. * If we get in here, there was no action in
  3070. * do_send_packet. So, we check if there is a
  3071. * packing buffer to be flushed here.
  3072. */
  3073. netif_stop_queue(queue->card->dev);
  3074. index = queue->next_buf_to_fill;
  3075. q_was_packing = queue->do_pack;
  3076. /* queue->do_pack may change */
  3077. barrier();
  3078. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3079. if (!flush_cnt &&
  3080. !atomic_read(&queue->set_pci_flags_count))
  3081. flush_cnt +=
  3082. qeth_flush_buffers_on_no_pci(queue);
  3083. if (queue->card->options.performance_stats &&
  3084. q_was_packing)
  3085. queue->card->perf_stats.bufs_sent_pack +=
  3086. flush_cnt;
  3087. if (flush_cnt)
  3088. qeth_flush_buffers(queue, index, flush_cnt);
  3089. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3090. }
  3091. }
  3092. }
  3093. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3094. unsigned long card_ptr)
  3095. {
  3096. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3097. if (card->dev && (card->dev->flags & IFF_UP))
  3098. napi_schedule(&card->napi);
  3099. }
  3100. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3101. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3102. {
  3103. int rc;
  3104. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3105. rc = -1;
  3106. goto out;
  3107. } else {
  3108. if (card->options.cq == cq) {
  3109. rc = 0;
  3110. goto out;
  3111. }
  3112. if (card->state != CARD_STATE_DOWN &&
  3113. card->state != CARD_STATE_RECOVER) {
  3114. rc = -1;
  3115. goto out;
  3116. }
  3117. qeth_free_qdio_buffers(card);
  3118. card->options.cq = cq;
  3119. rc = 0;
  3120. }
  3121. out:
  3122. return rc;
  3123. }
  3124. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3125. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3126. unsigned int qdio_err,
  3127. unsigned int queue, int first_element, int count) {
  3128. struct qeth_qdio_q *cq = card->qdio.c_q;
  3129. int i;
  3130. int rc;
  3131. if (!qeth_is_cq(card, queue))
  3132. goto out;
  3133. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3134. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3135. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3136. if (qdio_err) {
  3137. netif_stop_queue(card->dev);
  3138. qeth_schedule_recovery(card);
  3139. goto out;
  3140. }
  3141. if (card->options.performance_stats) {
  3142. card->perf_stats.cq_cnt++;
  3143. card->perf_stats.cq_start_time = qeth_get_micros();
  3144. }
  3145. for (i = first_element; i < first_element + count; ++i) {
  3146. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3147. struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
  3148. int e;
  3149. e = 0;
  3150. while (buffer->element[e].addr) {
  3151. unsigned long phys_aob_addr;
  3152. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3153. qeth_qdio_handle_aob(card, phys_aob_addr);
  3154. buffer->element[e].addr = NULL;
  3155. buffer->element[e].eflags = 0;
  3156. buffer->element[e].sflags = 0;
  3157. buffer->element[e].length = 0;
  3158. ++e;
  3159. }
  3160. buffer->element[15].eflags = 0;
  3161. buffer->element[15].sflags = 0;
  3162. }
  3163. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3164. card->qdio.c_q->next_buf_to_init,
  3165. count);
  3166. if (rc) {
  3167. dev_warn(&card->gdev->dev,
  3168. "QDIO reported an error, rc=%i\n", rc);
  3169. QETH_CARD_TEXT(card, 2, "qcqherr");
  3170. }
  3171. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3172. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3173. netif_wake_queue(card->dev);
  3174. if (card->options.performance_stats) {
  3175. int delta_t = qeth_get_micros();
  3176. delta_t -= card->perf_stats.cq_start_time;
  3177. card->perf_stats.cq_time += delta_t;
  3178. }
  3179. out:
  3180. return;
  3181. }
  3182. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3183. unsigned int queue, int first_elem, int count,
  3184. unsigned long card_ptr)
  3185. {
  3186. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3187. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3188. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3189. if (qeth_is_cq(card, queue))
  3190. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3191. else if (qdio_err)
  3192. qeth_schedule_recovery(card);
  3193. }
  3194. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3195. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3196. unsigned int qdio_error, int __queue, int first_element,
  3197. int count, unsigned long card_ptr)
  3198. {
  3199. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3200. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3201. struct qeth_qdio_out_buffer *buffer;
  3202. int i;
  3203. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3204. if (qdio_error & QDIO_ERROR_FATAL) {
  3205. QETH_CARD_TEXT(card, 2, "achkcond");
  3206. netif_stop_queue(card->dev);
  3207. qeth_schedule_recovery(card);
  3208. return;
  3209. }
  3210. if (card->options.performance_stats) {
  3211. card->perf_stats.outbound_handler_cnt++;
  3212. card->perf_stats.outbound_handler_start_time =
  3213. qeth_get_micros();
  3214. }
  3215. for (i = first_element; i < (first_element + count); ++i) {
  3216. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3217. buffer = queue->bufs[bidx];
  3218. qeth_handle_send_error(card, buffer, qdio_error);
  3219. if (queue->bufstates &&
  3220. (queue->bufstates[bidx].flags &
  3221. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3222. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3223. if (atomic_cmpxchg(&buffer->state,
  3224. QETH_QDIO_BUF_PRIMED,
  3225. QETH_QDIO_BUF_PENDING) ==
  3226. QETH_QDIO_BUF_PRIMED) {
  3227. qeth_notify_skbs(queue, buffer,
  3228. TX_NOTIFY_PENDING);
  3229. }
  3230. buffer->aob = queue->bufstates[bidx].aob;
  3231. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3232. QETH_CARD_TEXT(queue->card, 5, "aob");
  3233. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3234. virt_to_phys(buffer->aob));
  3235. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3236. QETH_CARD_TEXT(card, 2, "outofbuf");
  3237. qeth_schedule_recovery(card);
  3238. }
  3239. } else {
  3240. if (card->options.cq == QETH_CQ_ENABLED) {
  3241. enum iucv_tx_notify n;
  3242. n = qeth_compute_cq_notification(
  3243. buffer->buffer->element[15].sflags, 0);
  3244. qeth_notify_skbs(queue, buffer, n);
  3245. }
  3246. qeth_clear_output_buffer(queue, buffer,
  3247. QETH_QDIO_BUF_EMPTY);
  3248. }
  3249. qeth_cleanup_handled_pending(queue, bidx, 0);
  3250. }
  3251. atomic_sub(count, &queue->used_buffers);
  3252. /* check if we need to do something on this outbound queue */
  3253. if (card->info.type != QETH_CARD_TYPE_IQD)
  3254. qeth_check_outbound_queue(queue);
  3255. netif_wake_queue(queue->card->dev);
  3256. if (card->options.performance_stats)
  3257. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3258. card->perf_stats.outbound_handler_start_time;
  3259. }
  3260. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3261. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3262. int ipv, int cast_type)
  3263. {
  3264. if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
  3265. card->info.type == QETH_CARD_TYPE_OSX))
  3266. return card->qdio.default_out_queue;
  3267. switch (card->qdio.no_out_queues) {
  3268. case 4:
  3269. if (cast_type && card->info.is_multicast_different)
  3270. return card->info.is_multicast_different &
  3271. (card->qdio.no_out_queues - 1);
  3272. if (card->qdio.do_prio_queueing && (ipv == 4)) {
  3273. const u8 tos = ip_hdr(skb)->tos;
  3274. if (card->qdio.do_prio_queueing ==
  3275. QETH_PRIO_Q_ING_TOS) {
  3276. if (tos & IP_TOS_NOTIMPORTANT)
  3277. return 3;
  3278. if (tos & IP_TOS_HIGHRELIABILITY)
  3279. return 2;
  3280. if (tos & IP_TOS_HIGHTHROUGHPUT)
  3281. return 1;
  3282. if (tos & IP_TOS_LOWDELAY)
  3283. return 0;
  3284. }
  3285. if (card->qdio.do_prio_queueing ==
  3286. QETH_PRIO_Q_ING_PREC)
  3287. return 3 - (tos >> 6);
  3288. } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
  3289. /* TODO: IPv6!!! */
  3290. }
  3291. return card->qdio.default_out_queue;
  3292. case 1: /* fallthrough for single-out-queue 1920-device */
  3293. default:
  3294. return card->qdio.default_out_queue;
  3295. }
  3296. }
  3297. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3298. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3299. {
  3300. int cnt, length, e, elements = 0;
  3301. struct skb_frag_struct *frag;
  3302. char *data;
  3303. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3304. frag = &skb_shinfo(skb)->frags[cnt];
  3305. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3306. frag->page_offset;
  3307. length = frag->size;
  3308. e = PFN_UP((unsigned long)data + length - 1) -
  3309. PFN_DOWN((unsigned long)data);
  3310. elements += e;
  3311. }
  3312. return elements;
  3313. }
  3314. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3315. int qeth_get_elements_no(struct qeth_card *card,
  3316. struct sk_buff *skb, int elems)
  3317. {
  3318. int dlen = skb->len - skb->data_len;
  3319. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3320. PFN_DOWN((unsigned long)skb->data);
  3321. elements_needed += qeth_get_elements_for_frags(skb);
  3322. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3323. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3324. "(Number=%d / Length=%d). Discarded.\n",
  3325. (elements_needed+elems), skb->len);
  3326. return 0;
  3327. }
  3328. return elements_needed;
  3329. }
  3330. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3331. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3332. {
  3333. int hroom, inpage, rest;
  3334. if (((unsigned long)skb->data & PAGE_MASK) !=
  3335. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3336. hroom = skb_headroom(skb);
  3337. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3338. rest = len - inpage;
  3339. if (rest > hroom)
  3340. return 1;
  3341. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3342. skb->data -= rest;
  3343. skb->tail -= rest;
  3344. *hdr = (struct qeth_hdr *)skb->data;
  3345. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3346. }
  3347. return 0;
  3348. }
  3349. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3350. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3351. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3352. int offset)
  3353. {
  3354. int length = skb->len - skb->data_len;
  3355. int length_here;
  3356. int element;
  3357. char *data;
  3358. int first_lap, cnt;
  3359. struct skb_frag_struct *frag;
  3360. element = *next_element_to_fill;
  3361. data = skb->data;
  3362. first_lap = (is_tso == 0 ? 1 : 0);
  3363. if (offset >= 0) {
  3364. data = skb->data + offset;
  3365. length -= offset;
  3366. first_lap = 0;
  3367. }
  3368. while (length > 0) {
  3369. /* length_here is the remaining amount of data in this page */
  3370. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3371. if (length < length_here)
  3372. length_here = length;
  3373. buffer->element[element].addr = data;
  3374. buffer->element[element].length = length_here;
  3375. length -= length_here;
  3376. if (!length) {
  3377. if (first_lap)
  3378. if (skb_shinfo(skb)->nr_frags)
  3379. buffer->element[element].eflags =
  3380. SBAL_EFLAGS_FIRST_FRAG;
  3381. else
  3382. buffer->element[element].eflags = 0;
  3383. else
  3384. buffer->element[element].eflags =
  3385. SBAL_EFLAGS_MIDDLE_FRAG;
  3386. } else {
  3387. if (first_lap)
  3388. buffer->element[element].eflags =
  3389. SBAL_EFLAGS_FIRST_FRAG;
  3390. else
  3391. buffer->element[element].eflags =
  3392. SBAL_EFLAGS_MIDDLE_FRAG;
  3393. }
  3394. data += length_here;
  3395. element++;
  3396. first_lap = 0;
  3397. }
  3398. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3399. frag = &skb_shinfo(skb)->frags[cnt];
  3400. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3401. frag->page_offset;
  3402. length = frag->size;
  3403. while (length > 0) {
  3404. length_here = PAGE_SIZE -
  3405. ((unsigned long) data % PAGE_SIZE);
  3406. if (length < length_here)
  3407. length_here = length;
  3408. buffer->element[element].addr = data;
  3409. buffer->element[element].length = length_here;
  3410. buffer->element[element].eflags =
  3411. SBAL_EFLAGS_MIDDLE_FRAG;
  3412. length -= length_here;
  3413. data += length_here;
  3414. element++;
  3415. }
  3416. }
  3417. if (buffer->element[element - 1].eflags)
  3418. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3419. *next_element_to_fill = element;
  3420. }
  3421. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3422. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3423. struct qeth_hdr *hdr, int offset, int hd_len)
  3424. {
  3425. struct qdio_buffer *buffer;
  3426. int flush_cnt = 0, hdr_len, large_send = 0;
  3427. buffer = buf->buffer;
  3428. atomic_inc(&skb->users);
  3429. skb_queue_tail(&buf->skb_list, skb);
  3430. /*check first on TSO ....*/
  3431. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3432. int element = buf->next_element_to_fill;
  3433. hdr_len = sizeof(struct qeth_hdr_tso) +
  3434. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3435. /*fill first buffer entry only with header information */
  3436. buffer->element[element].addr = skb->data;
  3437. buffer->element[element].length = hdr_len;
  3438. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3439. buf->next_element_to_fill++;
  3440. skb->data += hdr_len;
  3441. skb->len -= hdr_len;
  3442. large_send = 1;
  3443. }
  3444. if (offset >= 0) {
  3445. int element = buf->next_element_to_fill;
  3446. buffer->element[element].addr = hdr;
  3447. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3448. hd_len;
  3449. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3450. buf->is_header[element] = 1;
  3451. buf->next_element_to_fill++;
  3452. }
  3453. __qeth_fill_buffer(skb, buffer, large_send,
  3454. (int *)&buf->next_element_to_fill, offset);
  3455. if (!queue->do_pack) {
  3456. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3457. /* set state to PRIMED -> will be flushed */
  3458. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3459. flush_cnt = 1;
  3460. } else {
  3461. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3462. if (queue->card->options.performance_stats)
  3463. queue->card->perf_stats.skbs_sent_pack++;
  3464. if (buf->next_element_to_fill >=
  3465. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3466. /*
  3467. * packed buffer if full -> set state PRIMED
  3468. * -> will be flushed
  3469. */
  3470. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3471. flush_cnt = 1;
  3472. }
  3473. }
  3474. return flush_cnt;
  3475. }
  3476. int qeth_do_send_packet_fast(struct qeth_card *card,
  3477. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3478. struct qeth_hdr *hdr, int elements_needed,
  3479. int offset, int hd_len)
  3480. {
  3481. struct qeth_qdio_out_buffer *buffer;
  3482. int index;
  3483. /* spin until we get the queue ... */
  3484. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3485. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3486. /* ... now we've got the queue */
  3487. index = queue->next_buf_to_fill;
  3488. buffer = queue->bufs[queue->next_buf_to_fill];
  3489. /*
  3490. * check if buffer is empty to make sure that we do not 'overtake'
  3491. * ourselves and try to fill a buffer that is already primed
  3492. */
  3493. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3494. goto out;
  3495. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3496. QDIO_MAX_BUFFERS_PER_Q;
  3497. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3498. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3499. qeth_flush_buffers(queue, index, 1);
  3500. return 0;
  3501. out:
  3502. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3503. return -EBUSY;
  3504. }
  3505. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3506. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3507. struct sk_buff *skb, struct qeth_hdr *hdr,
  3508. int elements_needed)
  3509. {
  3510. struct qeth_qdio_out_buffer *buffer;
  3511. int start_index;
  3512. int flush_count = 0;
  3513. int do_pack = 0;
  3514. int tmp;
  3515. int rc = 0;
  3516. /* spin until we get the queue ... */
  3517. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3518. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3519. start_index = queue->next_buf_to_fill;
  3520. buffer = queue->bufs[queue->next_buf_to_fill];
  3521. /*
  3522. * check if buffer is empty to make sure that we do not 'overtake'
  3523. * ourselves and try to fill a buffer that is already primed
  3524. */
  3525. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3526. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3527. return -EBUSY;
  3528. }
  3529. /* check if we need to switch packing state of this queue */
  3530. qeth_switch_to_packing_if_needed(queue);
  3531. if (queue->do_pack) {
  3532. do_pack = 1;
  3533. /* does packet fit in current buffer? */
  3534. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3535. buffer->next_element_to_fill) < elements_needed) {
  3536. /* ... no -> set state PRIMED */
  3537. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3538. flush_count++;
  3539. queue->next_buf_to_fill =
  3540. (queue->next_buf_to_fill + 1) %
  3541. QDIO_MAX_BUFFERS_PER_Q;
  3542. buffer = queue->bufs[queue->next_buf_to_fill];
  3543. /* we did a step forward, so check buffer state
  3544. * again */
  3545. if (atomic_read(&buffer->state) !=
  3546. QETH_QDIO_BUF_EMPTY) {
  3547. qeth_flush_buffers(queue, start_index,
  3548. flush_count);
  3549. atomic_set(&queue->state,
  3550. QETH_OUT_Q_UNLOCKED);
  3551. return -EBUSY;
  3552. }
  3553. }
  3554. }
  3555. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3556. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3557. QDIO_MAX_BUFFERS_PER_Q;
  3558. flush_count += tmp;
  3559. if (flush_count)
  3560. qeth_flush_buffers(queue, start_index, flush_count);
  3561. else if (!atomic_read(&queue->set_pci_flags_count))
  3562. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3563. /*
  3564. * queue->state will go from LOCKED -> UNLOCKED or from
  3565. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3566. * (switch packing state or flush buffer to get another pci flag out).
  3567. * In that case we will enter this loop
  3568. */
  3569. while (atomic_dec_return(&queue->state)) {
  3570. flush_count = 0;
  3571. start_index = queue->next_buf_to_fill;
  3572. /* check if we can go back to non-packing state */
  3573. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3574. /*
  3575. * check if we need to flush a packing buffer to get a pci
  3576. * flag out on the queue
  3577. */
  3578. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3579. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3580. if (flush_count)
  3581. qeth_flush_buffers(queue, start_index, flush_count);
  3582. }
  3583. /* at this point the queue is UNLOCKED again */
  3584. if (queue->card->options.performance_stats && do_pack)
  3585. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3586. return rc;
  3587. }
  3588. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3589. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3590. struct qeth_reply *reply, unsigned long data)
  3591. {
  3592. struct qeth_ipa_cmd *cmd;
  3593. struct qeth_ipacmd_setadpparms *setparms;
  3594. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3595. cmd = (struct qeth_ipa_cmd *) data;
  3596. setparms = &(cmd->data.setadapterparms);
  3597. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3598. if (cmd->hdr.return_code) {
  3599. QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
  3600. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3601. }
  3602. card->info.promisc_mode = setparms->data.mode;
  3603. return 0;
  3604. }
  3605. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3606. {
  3607. enum qeth_ipa_promisc_modes mode;
  3608. struct net_device *dev = card->dev;
  3609. struct qeth_cmd_buffer *iob;
  3610. struct qeth_ipa_cmd *cmd;
  3611. QETH_CARD_TEXT(card, 4, "setprom");
  3612. if (((dev->flags & IFF_PROMISC) &&
  3613. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3614. (!(dev->flags & IFF_PROMISC) &&
  3615. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3616. return;
  3617. mode = SET_PROMISC_MODE_OFF;
  3618. if (dev->flags & IFF_PROMISC)
  3619. mode = SET_PROMISC_MODE_ON;
  3620. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3621. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3622. sizeof(struct qeth_ipacmd_setadpparms));
  3623. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3624. cmd->data.setadapterparms.data.mode = mode;
  3625. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3626. }
  3627. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3628. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3629. {
  3630. struct qeth_card *card;
  3631. char dbf_text[15];
  3632. card = dev->ml_priv;
  3633. QETH_CARD_TEXT(card, 4, "chgmtu");
  3634. sprintf(dbf_text, "%8x", new_mtu);
  3635. QETH_CARD_TEXT(card, 4, dbf_text);
  3636. if (new_mtu < 64)
  3637. return -EINVAL;
  3638. if (new_mtu > 65535)
  3639. return -EINVAL;
  3640. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3641. (!qeth_mtu_is_valid(card, new_mtu)))
  3642. return -EINVAL;
  3643. dev->mtu = new_mtu;
  3644. return 0;
  3645. }
  3646. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3647. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3648. {
  3649. struct qeth_card *card;
  3650. card = dev->ml_priv;
  3651. QETH_CARD_TEXT(card, 5, "getstat");
  3652. return &card->stats;
  3653. }
  3654. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3655. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3656. struct qeth_reply *reply, unsigned long data)
  3657. {
  3658. struct qeth_ipa_cmd *cmd;
  3659. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3660. cmd = (struct qeth_ipa_cmd *) data;
  3661. if (!card->options.layer2 ||
  3662. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3663. memcpy(card->dev->dev_addr,
  3664. &cmd->data.setadapterparms.data.change_addr.addr,
  3665. OSA_ADDR_LEN);
  3666. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3667. }
  3668. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3669. return 0;
  3670. }
  3671. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3672. {
  3673. int rc;
  3674. struct qeth_cmd_buffer *iob;
  3675. struct qeth_ipa_cmd *cmd;
  3676. QETH_CARD_TEXT(card, 4, "chgmac");
  3677. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3678. sizeof(struct qeth_ipacmd_setadpparms));
  3679. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3680. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3681. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3682. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3683. card->dev->dev_addr, OSA_ADDR_LEN);
  3684. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3685. NULL);
  3686. return rc;
  3687. }
  3688. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3689. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3690. struct qeth_reply *reply, unsigned long data)
  3691. {
  3692. struct qeth_ipa_cmd *cmd;
  3693. struct qeth_set_access_ctrl *access_ctrl_req;
  3694. int fallback = *(int *)reply->param;
  3695. QETH_CARD_TEXT(card, 4, "setaccb");
  3696. cmd = (struct qeth_ipa_cmd *) data;
  3697. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3698. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3699. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3700. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3701. cmd->data.setadapterparms.hdr.return_code);
  3702. if (cmd->data.setadapterparms.hdr.return_code !=
  3703. SET_ACCESS_CTRL_RC_SUCCESS)
  3704. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3705. card->gdev->dev.kobj.name,
  3706. access_ctrl_req->subcmd_code,
  3707. cmd->data.setadapterparms.hdr.return_code);
  3708. switch (cmd->data.setadapterparms.hdr.return_code) {
  3709. case SET_ACCESS_CTRL_RC_SUCCESS:
  3710. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3711. dev_info(&card->gdev->dev,
  3712. "QDIO data connection isolation is deactivated\n");
  3713. } else {
  3714. dev_info(&card->gdev->dev,
  3715. "QDIO data connection isolation is activated\n");
  3716. }
  3717. break;
  3718. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3719. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3720. "deactivated\n", dev_name(&card->gdev->dev));
  3721. if (fallback)
  3722. card->options.isolation = card->options.prev_isolation;
  3723. break;
  3724. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3725. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3726. " activated\n", dev_name(&card->gdev->dev));
  3727. if (fallback)
  3728. card->options.isolation = card->options.prev_isolation;
  3729. break;
  3730. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3731. dev_err(&card->gdev->dev, "Adapter does not "
  3732. "support QDIO data connection isolation\n");
  3733. break;
  3734. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3735. dev_err(&card->gdev->dev,
  3736. "Adapter is dedicated. "
  3737. "QDIO data connection isolation not supported\n");
  3738. if (fallback)
  3739. card->options.isolation = card->options.prev_isolation;
  3740. break;
  3741. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3742. dev_err(&card->gdev->dev,
  3743. "TSO does not permit QDIO data connection isolation\n");
  3744. if (fallback)
  3745. card->options.isolation = card->options.prev_isolation;
  3746. break;
  3747. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3748. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3749. "support reflective relay mode\n");
  3750. if (fallback)
  3751. card->options.isolation = card->options.prev_isolation;
  3752. break;
  3753. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3754. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3755. "enabled at the adjacent switch port");
  3756. if (fallback)
  3757. card->options.isolation = card->options.prev_isolation;
  3758. break;
  3759. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3760. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3761. "at the adjacent switch failed\n");
  3762. break;
  3763. default:
  3764. /* this should never happen */
  3765. if (fallback)
  3766. card->options.isolation = card->options.prev_isolation;
  3767. break;
  3768. }
  3769. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3770. return 0;
  3771. }
  3772. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3773. enum qeth_ipa_isolation_modes isolation, int fallback)
  3774. {
  3775. int rc;
  3776. struct qeth_cmd_buffer *iob;
  3777. struct qeth_ipa_cmd *cmd;
  3778. struct qeth_set_access_ctrl *access_ctrl_req;
  3779. QETH_CARD_TEXT(card, 4, "setacctl");
  3780. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3781. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3782. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3783. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3784. sizeof(struct qeth_set_access_ctrl));
  3785. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3786. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3787. access_ctrl_req->subcmd_code = isolation;
  3788. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3789. &fallback);
  3790. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3791. return rc;
  3792. }
  3793. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3794. {
  3795. int rc = 0;
  3796. QETH_CARD_TEXT(card, 4, "setactlo");
  3797. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3798. card->info.type == QETH_CARD_TYPE_OSX) &&
  3799. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3800. rc = qeth_setadpparms_set_access_ctrl(card,
  3801. card->options.isolation, fallback);
  3802. if (rc) {
  3803. QETH_DBF_MESSAGE(3,
  3804. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3805. card->gdev->dev.kobj.name,
  3806. rc);
  3807. rc = -EOPNOTSUPP;
  3808. }
  3809. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3810. card->options.isolation = ISOLATION_MODE_NONE;
  3811. dev_err(&card->gdev->dev, "Adapter does not "
  3812. "support QDIO data connection isolation\n");
  3813. rc = -EOPNOTSUPP;
  3814. }
  3815. return rc;
  3816. }
  3817. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3818. void qeth_tx_timeout(struct net_device *dev)
  3819. {
  3820. struct qeth_card *card;
  3821. card = dev->ml_priv;
  3822. QETH_CARD_TEXT(card, 4, "txtimeo");
  3823. card->stats.tx_errors++;
  3824. qeth_schedule_recovery(card);
  3825. }
  3826. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3827. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3828. {
  3829. struct qeth_card *card = dev->ml_priv;
  3830. int rc = 0;
  3831. switch (regnum) {
  3832. case MII_BMCR: /* Basic mode control register */
  3833. rc = BMCR_FULLDPLX;
  3834. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3835. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3836. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3837. rc |= BMCR_SPEED100;
  3838. break;
  3839. case MII_BMSR: /* Basic mode status register */
  3840. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3841. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3842. BMSR_100BASE4;
  3843. break;
  3844. case MII_PHYSID1: /* PHYS ID 1 */
  3845. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3846. dev->dev_addr[2];
  3847. rc = (rc >> 5) & 0xFFFF;
  3848. break;
  3849. case MII_PHYSID2: /* PHYS ID 2 */
  3850. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3851. break;
  3852. case MII_ADVERTISE: /* Advertisement control reg */
  3853. rc = ADVERTISE_ALL;
  3854. break;
  3855. case MII_LPA: /* Link partner ability reg */
  3856. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3857. LPA_100BASE4 | LPA_LPACK;
  3858. break;
  3859. case MII_EXPANSION: /* Expansion register */
  3860. break;
  3861. case MII_DCOUNTER: /* disconnect counter */
  3862. break;
  3863. case MII_FCSCOUNTER: /* false carrier counter */
  3864. break;
  3865. case MII_NWAYTEST: /* N-way auto-neg test register */
  3866. break;
  3867. case MII_RERRCOUNTER: /* rx error counter */
  3868. rc = card->stats.rx_errors;
  3869. break;
  3870. case MII_SREVISION: /* silicon revision */
  3871. break;
  3872. case MII_RESV1: /* reserved 1 */
  3873. break;
  3874. case MII_LBRERROR: /* loopback, rx, bypass error */
  3875. break;
  3876. case MII_PHYADDR: /* physical address */
  3877. break;
  3878. case MII_RESV2: /* reserved 2 */
  3879. break;
  3880. case MII_TPISTATUS: /* TPI status for 10mbps */
  3881. break;
  3882. case MII_NCONFIG: /* network interface config */
  3883. break;
  3884. default:
  3885. break;
  3886. }
  3887. return rc;
  3888. }
  3889. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  3890. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  3891. struct qeth_cmd_buffer *iob, int len,
  3892. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  3893. unsigned long),
  3894. void *reply_param)
  3895. {
  3896. u16 s1, s2;
  3897. QETH_CARD_TEXT(card, 4, "sendsnmp");
  3898. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  3899. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  3900. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3901. /* adjust PDU length fields in IPA_PDU_HEADER */
  3902. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  3903. s2 = (u32) len;
  3904. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  3905. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  3906. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  3907. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  3908. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  3909. reply_cb, reply_param);
  3910. }
  3911. static int qeth_snmp_command_cb(struct qeth_card *card,
  3912. struct qeth_reply *reply, unsigned long sdata)
  3913. {
  3914. struct qeth_ipa_cmd *cmd;
  3915. struct qeth_arp_query_info *qinfo;
  3916. struct qeth_snmp_cmd *snmp;
  3917. unsigned char *data;
  3918. __u16 data_len;
  3919. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  3920. cmd = (struct qeth_ipa_cmd *) sdata;
  3921. data = (unsigned char *)((char *)cmd - reply->offset);
  3922. qinfo = (struct qeth_arp_query_info *) reply->param;
  3923. snmp = &cmd->data.setadapterparms.data.snmp;
  3924. if (cmd->hdr.return_code) {
  3925. QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
  3926. return 0;
  3927. }
  3928. if (cmd->data.setadapterparms.hdr.return_code) {
  3929. cmd->hdr.return_code =
  3930. cmd->data.setadapterparms.hdr.return_code;
  3931. QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
  3932. return 0;
  3933. }
  3934. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  3935. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  3936. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  3937. else
  3938. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  3939. /* check if there is enough room in userspace */
  3940. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  3941. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  3942. cmd->hdr.return_code = IPA_RC_ENOMEM;
  3943. return 0;
  3944. }
  3945. QETH_CARD_TEXT_(card, 4, "snore%i",
  3946. cmd->data.setadapterparms.hdr.used_total);
  3947. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  3948. cmd->data.setadapterparms.hdr.seq_no);
  3949. /*copy entries to user buffer*/
  3950. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  3951. memcpy(qinfo->udata + qinfo->udata_offset,
  3952. (char *)snmp,
  3953. data_len + offsetof(struct qeth_snmp_cmd, data));
  3954. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  3955. } else {
  3956. memcpy(qinfo->udata + qinfo->udata_offset,
  3957. (char *)&snmp->request, data_len);
  3958. }
  3959. qinfo->udata_offset += data_len;
  3960. /* check if all replies received ... */
  3961. QETH_CARD_TEXT_(card, 4, "srtot%i",
  3962. cmd->data.setadapterparms.hdr.used_total);
  3963. QETH_CARD_TEXT_(card, 4, "srseq%i",
  3964. cmd->data.setadapterparms.hdr.seq_no);
  3965. if (cmd->data.setadapterparms.hdr.seq_no <
  3966. cmd->data.setadapterparms.hdr.used_total)
  3967. return 1;
  3968. return 0;
  3969. }
  3970. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  3971. {
  3972. struct qeth_cmd_buffer *iob;
  3973. struct qeth_ipa_cmd *cmd;
  3974. struct qeth_snmp_ureq *ureq;
  3975. int req_len;
  3976. struct qeth_arp_query_info qinfo = {0, };
  3977. int rc = 0;
  3978. QETH_CARD_TEXT(card, 3, "snmpcmd");
  3979. if (card->info.guestlan)
  3980. return -EOPNOTSUPP;
  3981. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  3982. (!card->options.layer2)) {
  3983. return -EOPNOTSUPP;
  3984. }
  3985. /* skip 4 bytes (data_len struct member) to get req_len */
  3986. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  3987. return -EFAULT;
  3988. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  3989. if (IS_ERR(ureq)) {
  3990. QETH_CARD_TEXT(card, 2, "snmpnome");
  3991. return PTR_ERR(ureq);
  3992. }
  3993. qinfo.udata_len = ureq->hdr.data_len;
  3994. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  3995. if (!qinfo.udata) {
  3996. kfree(ureq);
  3997. return -ENOMEM;
  3998. }
  3999. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4000. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4001. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4002. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4003. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4004. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4005. qeth_snmp_command_cb, (void *)&qinfo);
  4006. if (rc)
  4007. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4008. QETH_CARD_IFNAME(card), rc);
  4009. else {
  4010. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4011. rc = -EFAULT;
  4012. }
  4013. kfree(ureq);
  4014. kfree(qinfo.udata);
  4015. return rc;
  4016. }
  4017. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4018. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4019. struct qeth_reply *reply, unsigned long data)
  4020. {
  4021. struct qeth_ipa_cmd *cmd;
  4022. struct qeth_qoat_priv *priv;
  4023. char *resdata;
  4024. int resdatalen;
  4025. QETH_CARD_TEXT(card, 3, "qoatcb");
  4026. cmd = (struct qeth_ipa_cmd *)data;
  4027. priv = (struct qeth_qoat_priv *)reply->param;
  4028. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4029. resdata = (char *)data + 28;
  4030. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4031. cmd->hdr.return_code = IPA_RC_FFFF;
  4032. return 0;
  4033. }
  4034. memcpy((priv->buffer + priv->response_len), resdata,
  4035. resdatalen);
  4036. priv->response_len += resdatalen;
  4037. if (cmd->data.setadapterparms.hdr.seq_no <
  4038. cmd->data.setadapterparms.hdr.used_total)
  4039. return 1;
  4040. return 0;
  4041. }
  4042. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4043. {
  4044. int rc = 0;
  4045. struct qeth_cmd_buffer *iob;
  4046. struct qeth_ipa_cmd *cmd;
  4047. struct qeth_query_oat *oat_req;
  4048. struct qeth_query_oat_data oat_data;
  4049. struct qeth_qoat_priv priv;
  4050. void __user *tmp;
  4051. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4052. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4053. rc = -EOPNOTSUPP;
  4054. goto out;
  4055. }
  4056. if (copy_from_user(&oat_data, udata,
  4057. sizeof(struct qeth_query_oat_data))) {
  4058. rc = -EFAULT;
  4059. goto out;
  4060. }
  4061. priv.buffer_len = oat_data.buffer_len;
  4062. priv.response_len = 0;
  4063. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4064. if (!priv.buffer) {
  4065. rc = -ENOMEM;
  4066. goto out;
  4067. }
  4068. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4069. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4070. sizeof(struct qeth_query_oat));
  4071. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4072. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4073. oat_req->subcmd_code = oat_data.command;
  4074. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4075. &priv);
  4076. if (!rc) {
  4077. if (is_compat_task())
  4078. tmp = compat_ptr(oat_data.ptr);
  4079. else
  4080. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4081. if (copy_to_user(tmp, priv.buffer,
  4082. priv.response_len)) {
  4083. rc = -EFAULT;
  4084. goto out_free;
  4085. }
  4086. oat_data.response_len = priv.response_len;
  4087. if (copy_to_user(udata, &oat_data,
  4088. sizeof(struct qeth_query_oat_data)))
  4089. rc = -EFAULT;
  4090. } else
  4091. if (rc == IPA_RC_FFFF)
  4092. rc = -EFAULT;
  4093. out_free:
  4094. kfree(priv.buffer);
  4095. out:
  4096. return rc;
  4097. }
  4098. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4099. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4100. {
  4101. switch (card->info.type) {
  4102. case QETH_CARD_TYPE_IQD:
  4103. return 2;
  4104. default:
  4105. return 0;
  4106. }
  4107. }
  4108. static void qeth_determine_capabilities(struct qeth_card *card)
  4109. {
  4110. int rc;
  4111. int length;
  4112. char *prcd;
  4113. struct ccw_device *ddev;
  4114. int ddev_offline = 0;
  4115. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4116. ddev = CARD_DDEV(card);
  4117. if (!ddev->online) {
  4118. ddev_offline = 1;
  4119. rc = ccw_device_set_online(ddev);
  4120. if (rc) {
  4121. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4122. goto out;
  4123. }
  4124. }
  4125. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4126. if (rc) {
  4127. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4128. dev_name(&card->gdev->dev), rc);
  4129. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4130. goto out_offline;
  4131. }
  4132. qeth_configure_unitaddr(card, prcd);
  4133. if (ddev_offline)
  4134. qeth_configure_blkt_default(card, prcd);
  4135. kfree(prcd);
  4136. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4137. if (rc)
  4138. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4139. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4140. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4141. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4142. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4143. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4144. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4145. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4146. dev_info(&card->gdev->dev,
  4147. "Completion Queueing supported\n");
  4148. } else {
  4149. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4150. }
  4151. out_offline:
  4152. if (ddev_offline == 1)
  4153. ccw_device_set_offline(ddev);
  4154. out:
  4155. return;
  4156. }
  4157. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4158. struct qdio_buffer **in_sbal_ptrs,
  4159. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4160. int i;
  4161. if (card->options.cq == QETH_CQ_ENABLED) {
  4162. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4163. (card->qdio.no_in_queues - 1);
  4164. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4165. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4166. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4167. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4168. }
  4169. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4170. }
  4171. }
  4172. static int qeth_qdio_establish(struct qeth_card *card)
  4173. {
  4174. struct qdio_initialize init_data;
  4175. char *qib_param_field;
  4176. struct qdio_buffer **in_sbal_ptrs;
  4177. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4178. struct qdio_buffer **out_sbal_ptrs;
  4179. int i, j, k;
  4180. int rc = 0;
  4181. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4182. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4183. GFP_KERNEL);
  4184. if (!qib_param_field) {
  4185. rc = -ENOMEM;
  4186. goto out_free_nothing;
  4187. }
  4188. qeth_create_qib_param_field(card, qib_param_field);
  4189. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4190. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4191. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4192. GFP_KERNEL);
  4193. if (!in_sbal_ptrs) {
  4194. rc = -ENOMEM;
  4195. goto out_free_qib_param;
  4196. }
  4197. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4198. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4199. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4200. }
  4201. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4202. GFP_KERNEL);
  4203. if (!queue_start_poll) {
  4204. rc = -ENOMEM;
  4205. goto out_free_in_sbals;
  4206. }
  4207. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4208. queue_start_poll[i] = card->discipline->start_poll;
  4209. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4210. out_sbal_ptrs =
  4211. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4212. sizeof(void *), GFP_KERNEL);
  4213. if (!out_sbal_ptrs) {
  4214. rc = -ENOMEM;
  4215. goto out_free_queue_start_poll;
  4216. }
  4217. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4218. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4219. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4220. card->qdio.out_qs[i]->bufs[j]->buffer);
  4221. }
  4222. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4223. init_data.cdev = CARD_DDEV(card);
  4224. init_data.q_format = qeth_get_qdio_q_format(card);
  4225. init_data.qib_param_field_format = 0;
  4226. init_data.qib_param_field = qib_param_field;
  4227. init_data.no_input_qs = card->qdio.no_in_queues;
  4228. init_data.no_output_qs = card->qdio.no_out_queues;
  4229. init_data.input_handler = card->discipline->input_handler;
  4230. init_data.output_handler = card->discipline->output_handler;
  4231. init_data.queue_start_poll_array = queue_start_poll;
  4232. init_data.int_parm = (unsigned long) card;
  4233. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4234. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4235. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4236. init_data.scan_threshold =
  4237. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4238. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4239. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4240. rc = qdio_allocate(&init_data);
  4241. if (rc) {
  4242. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4243. goto out;
  4244. }
  4245. rc = qdio_establish(&init_data);
  4246. if (rc) {
  4247. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4248. qdio_free(CARD_DDEV(card));
  4249. }
  4250. }
  4251. switch (card->options.cq) {
  4252. case QETH_CQ_ENABLED:
  4253. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4254. break;
  4255. case QETH_CQ_DISABLED:
  4256. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4257. break;
  4258. default:
  4259. break;
  4260. }
  4261. out:
  4262. kfree(out_sbal_ptrs);
  4263. out_free_queue_start_poll:
  4264. kfree(queue_start_poll);
  4265. out_free_in_sbals:
  4266. kfree(in_sbal_ptrs);
  4267. out_free_qib_param:
  4268. kfree(qib_param_field);
  4269. out_free_nothing:
  4270. return rc;
  4271. }
  4272. static void qeth_core_free_card(struct qeth_card *card)
  4273. {
  4274. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4275. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4276. qeth_clean_channel(&card->read);
  4277. qeth_clean_channel(&card->write);
  4278. if (card->dev)
  4279. free_netdev(card->dev);
  4280. kfree(card->ip_tbd_list);
  4281. qeth_free_qdio_buffers(card);
  4282. unregister_service_level(&card->qeth_service_level);
  4283. kfree(card);
  4284. }
  4285. void qeth_trace_features(struct qeth_card *card)
  4286. {
  4287. QETH_CARD_TEXT(card, 2, "features");
  4288. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4289. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4290. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4291. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4292. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4293. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4294. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4295. }
  4296. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4297. static struct ccw_device_id qeth_ids[] = {
  4298. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4299. .driver_info = QETH_CARD_TYPE_OSD},
  4300. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4301. .driver_info = QETH_CARD_TYPE_IQD},
  4302. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4303. .driver_info = QETH_CARD_TYPE_OSN},
  4304. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4305. .driver_info = QETH_CARD_TYPE_OSM},
  4306. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4307. .driver_info = QETH_CARD_TYPE_OSX},
  4308. {},
  4309. };
  4310. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4311. static struct ccw_driver qeth_ccw_driver = {
  4312. .driver = {
  4313. .owner = THIS_MODULE,
  4314. .name = "qeth",
  4315. },
  4316. .ids = qeth_ids,
  4317. .probe = ccwgroup_probe_ccwdev,
  4318. .remove = ccwgroup_remove_ccwdev,
  4319. };
  4320. int qeth_core_hardsetup_card(struct qeth_card *card)
  4321. {
  4322. int retries = 3;
  4323. int rc;
  4324. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4325. atomic_set(&card->force_alloc_skb, 0);
  4326. qeth_update_from_chp_desc(card);
  4327. retry:
  4328. if (retries < 3)
  4329. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4330. dev_name(&card->gdev->dev));
  4331. ccw_device_set_offline(CARD_DDEV(card));
  4332. ccw_device_set_offline(CARD_WDEV(card));
  4333. ccw_device_set_offline(CARD_RDEV(card));
  4334. rc = ccw_device_set_online(CARD_RDEV(card));
  4335. if (rc)
  4336. goto retriable;
  4337. rc = ccw_device_set_online(CARD_WDEV(card));
  4338. if (rc)
  4339. goto retriable;
  4340. rc = ccw_device_set_online(CARD_DDEV(card));
  4341. if (rc)
  4342. goto retriable;
  4343. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4344. retriable:
  4345. if (rc == -ERESTARTSYS) {
  4346. QETH_DBF_TEXT(SETUP, 2, "break1");
  4347. return rc;
  4348. } else if (rc) {
  4349. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4350. if (--retries < 0)
  4351. goto out;
  4352. else
  4353. goto retry;
  4354. }
  4355. qeth_determine_capabilities(card);
  4356. qeth_init_tokens(card);
  4357. qeth_init_func_level(card);
  4358. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4359. if (rc == -ERESTARTSYS) {
  4360. QETH_DBF_TEXT(SETUP, 2, "break2");
  4361. return rc;
  4362. } else if (rc) {
  4363. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4364. if (--retries < 0)
  4365. goto out;
  4366. else
  4367. goto retry;
  4368. }
  4369. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4370. if (rc == -ERESTARTSYS) {
  4371. QETH_DBF_TEXT(SETUP, 2, "break3");
  4372. return rc;
  4373. } else if (rc) {
  4374. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4375. if (--retries < 0)
  4376. goto out;
  4377. else
  4378. goto retry;
  4379. }
  4380. card->read_or_write_problem = 0;
  4381. rc = qeth_mpc_initialize(card);
  4382. if (rc) {
  4383. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4384. goto out;
  4385. }
  4386. card->options.ipa4.supported_funcs = 0;
  4387. card->options.adp.supported_funcs = 0;
  4388. card->info.diagass_support = 0;
  4389. qeth_query_ipassists(card, QETH_PROT_IPV4);
  4390. if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
  4391. qeth_query_setadapterparms(card);
  4392. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
  4393. qeth_query_setdiagass(card);
  4394. return 0;
  4395. out:
  4396. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4397. "an error on the device\n");
  4398. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4399. dev_name(&card->gdev->dev), rc);
  4400. return rc;
  4401. }
  4402. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4403. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4404. struct qdio_buffer_element *element,
  4405. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4406. {
  4407. struct page *page = virt_to_page(element->addr);
  4408. if (*pskb == NULL) {
  4409. if (qethbuffer->rx_skb) {
  4410. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4411. *pskb = qethbuffer->rx_skb;
  4412. qethbuffer->rx_skb = NULL;
  4413. } else {
  4414. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4415. if (!(*pskb))
  4416. return -ENOMEM;
  4417. }
  4418. skb_reserve(*pskb, ETH_HLEN);
  4419. if (data_len <= QETH_RX_PULL_LEN) {
  4420. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4421. data_len);
  4422. } else {
  4423. get_page(page);
  4424. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4425. element->addr + offset, QETH_RX_PULL_LEN);
  4426. skb_fill_page_desc(*pskb, *pfrag, page,
  4427. offset + QETH_RX_PULL_LEN,
  4428. data_len - QETH_RX_PULL_LEN);
  4429. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4430. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4431. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4432. (*pfrag)++;
  4433. }
  4434. } else {
  4435. get_page(page);
  4436. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4437. (*pskb)->data_len += data_len;
  4438. (*pskb)->len += data_len;
  4439. (*pskb)->truesize += data_len;
  4440. (*pfrag)++;
  4441. }
  4442. return 0;
  4443. }
  4444. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4445. struct qeth_qdio_buffer *qethbuffer,
  4446. struct qdio_buffer_element **__element, int *__offset,
  4447. struct qeth_hdr **hdr)
  4448. {
  4449. struct qdio_buffer_element *element = *__element;
  4450. struct qdio_buffer *buffer = qethbuffer->buffer;
  4451. int offset = *__offset;
  4452. struct sk_buff *skb = NULL;
  4453. int skb_len = 0;
  4454. void *data_ptr;
  4455. int data_len;
  4456. int headroom = 0;
  4457. int use_rx_sg = 0;
  4458. int frag = 0;
  4459. /* qeth_hdr must not cross element boundaries */
  4460. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4461. if (qeth_is_last_sbale(element))
  4462. return NULL;
  4463. element++;
  4464. offset = 0;
  4465. if (element->length < sizeof(struct qeth_hdr))
  4466. return NULL;
  4467. }
  4468. *hdr = element->addr + offset;
  4469. offset += sizeof(struct qeth_hdr);
  4470. switch ((*hdr)->hdr.l2.id) {
  4471. case QETH_HEADER_TYPE_LAYER2:
  4472. skb_len = (*hdr)->hdr.l2.pkt_length;
  4473. break;
  4474. case QETH_HEADER_TYPE_LAYER3:
  4475. skb_len = (*hdr)->hdr.l3.length;
  4476. headroom = ETH_HLEN;
  4477. break;
  4478. case QETH_HEADER_TYPE_OSN:
  4479. skb_len = (*hdr)->hdr.osn.pdu_length;
  4480. headroom = sizeof(struct qeth_hdr);
  4481. break;
  4482. default:
  4483. break;
  4484. }
  4485. if (!skb_len)
  4486. return NULL;
  4487. if (((skb_len >= card->options.rx_sg_cb) &&
  4488. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4489. (!atomic_read(&card->force_alloc_skb))) ||
  4490. (card->options.cq == QETH_CQ_ENABLED)) {
  4491. use_rx_sg = 1;
  4492. } else {
  4493. skb = dev_alloc_skb(skb_len + headroom);
  4494. if (!skb)
  4495. goto no_mem;
  4496. if (headroom)
  4497. skb_reserve(skb, headroom);
  4498. }
  4499. data_ptr = element->addr + offset;
  4500. while (skb_len) {
  4501. data_len = min(skb_len, (int)(element->length - offset));
  4502. if (data_len) {
  4503. if (use_rx_sg) {
  4504. if (qeth_create_skb_frag(qethbuffer, element,
  4505. &skb, offset, &frag, data_len))
  4506. goto no_mem;
  4507. } else {
  4508. memcpy(skb_put(skb, data_len), data_ptr,
  4509. data_len);
  4510. }
  4511. }
  4512. skb_len -= data_len;
  4513. if (skb_len) {
  4514. if (qeth_is_last_sbale(element)) {
  4515. QETH_CARD_TEXT(card, 4, "unexeob");
  4516. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4517. dev_kfree_skb_any(skb);
  4518. card->stats.rx_errors++;
  4519. return NULL;
  4520. }
  4521. element++;
  4522. offset = 0;
  4523. data_ptr = element->addr;
  4524. } else {
  4525. offset += data_len;
  4526. }
  4527. }
  4528. *__element = element;
  4529. *__offset = offset;
  4530. if (use_rx_sg && card->options.performance_stats) {
  4531. card->perf_stats.sg_skbs_rx++;
  4532. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4533. }
  4534. return skb;
  4535. no_mem:
  4536. if (net_ratelimit()) {
  4537. QETH_CARD_TEXT(card, 2, "noskbmem");
  4538. }
  4539. card->stats.rx_dropped++;
  4540. return NULL;
  4541. }
  4542. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4543. static void qeth_unregister_dbf_views(void)
  4544. {
  4545. int x;
  4546. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4547. debug_unregister(qeth_dbf[x].id);
  4548. qeth_dbf[x].id = NULL;
  4549. }
  4550. }
  4551. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4552. {
  4553. char dbf_txt_buf[32];
  4554. va_list args;
  4555. if (level > id->level)
  4556. return;
  4557. va_start(args, fmt);
  4558. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4559. va_end(args);
  4560. debug_text_event(id, level, dbf_txt_buf);
  4561. }
  4562. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4563. static int qeth_register_dbf_views(void)
  4564. {
  4565. int ret;
  4566. int x;
  4567. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4568. /* register the areas */
  4569. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4570. qeth_dbf[x].pages,
  4571. qeth_dbf[x].areas,
  4572. qeth_dbf[x].len);
  4573. if (qeth_dbf[x].id == NULL) {
  4574. qeth_unregister_dbf_views();
  4575. return -ENOMEM;
  4576. }
  4577. /* register a view */
  4578. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4579. if (ret) {
  4580. qeth_unregister_dbf_views();
  4581. return ret;
  4582. }
  4583. /* set a passing level */
  4584. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4585. }
  4586. return 0;
  4587. }
  4588. int qeth_core_load_discipline(struct qeth_card *card,
  4589. enum qeth_discipline_id discipline)
  4590. {
  4591. int rc = 0;
  4592. mutex_lock(&qeth_mod_mutex);
  4593. switch (discipline) {
  4594. case QETH_DISCIPLINE_LAYER3:
  4595. card->discipline = try_then_request_module(
  4596. symbol_get(qeth_l3_discipline), "qeth_l3");
  4597. break;
  4598. case QETH_DISCIPLINE_LAYER2:
  4599. card->discipline = try_then_request_module(
  4600. symbol_get(qeth_l2_discipline), "qeth_l2");
  4601. break;
  4602. }
  4603. if (!card->discipline) {
  4604. dev_err(&card->gdev->dev, "There is no kernel module to "
  4605. "support discipline %d\n", discipline);
  4606. rc = -EINVAL;
  4607. }
  4608. mutex_unlock(&qeth_mod_mutex);
  4609. return rc;
  4610. }
  4611. void qeth_core_free_discipline(struct qeth_card *card)
  4612. {
  4613. if (card->options.layer2)
  4614. symbol_put(qeth_l2_discipline);
  4615. else
  4616. symbol_put(qeth_l3_discipline);
  4617. card->discipline = NULL;
  4618. }
  4619. static const struct device_type qeth_generic_devtype = {
  4620. .name = "qeth_generic",
  4621. .groups = qeth_generic_attr_groups,
  4622. };
  4623. static const struct device_type qeth_osn_devtype = {
  4624. .name = "qeth_osn",
  4625. .groups = qeth_osn_attr_groups,
  4626. };
  4627. #define DBF_NAME_LEN 20
  4628. struct qeth_dbf_entry {
  4629. char dbf_name[DBF_NAME_LEN];
  4630. debug_info_t *dbf_info;
  4631. struct list_head dbf_list;
  4632. };
  4633. static LIST_HEAD(qeth_dbf_list);
  4634. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4635. static debug_info_t *qeth_get_dbf_entry(char *name)
  4636. {
  4637. struct qeth_dbf_entry *entry;
  4638. debug_info_t *rc = NULL;
  4639. mutex_lock(&qeth_dbf_list_mutex);
  4640. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4641. if (strcmp(entry->dbf_name, name) == 0) {
  4642. rc = entry->dbf_info;
  4643. break;
  4644. }
  4645. }
  4646. mutex_unlock(&qeth_dbf_list_mutex);
  4647. return rc;
  4648. }
  4649. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4650. {
  4651. struct qeth_dbf_entry *new_entry;
  4652. card->debug = debug_register(name, 2, 1, 8);
  4653. if (!card->debug) {
  4654. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4655. goto err;
  4656. }
  4657. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4658. goto err_dbg;
  4659. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4660. if (!new_entry)
  4661. goto err_dbg;
  4662. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4663. new_entry->dbf_info = card->debug;
  4664. mutex_lock(&qeth_dbf_list_mutex);
  4665. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4666. mutex_unlock(&qeth_dbf_list_mutex);
  4667. return 0;
  4668. err_dbg:
  4669. debug_unregister(card->debug);
  4670. err:
  4671. return -ENOMEM;
  4672. }
  4673. static void qeth_clear_dbf_list(void)
  4674. {
  4675. struct qeth_dbf_entry *entry, *tmp;
  4676. mutex_lock(&qeth_dbf_list_mutex);
  4677. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4678. list_del(&entry->dbf_list);
  4679. debug_unregister(entry->dbf_info);
  4680. kfree(entry);
  4681. }
  4682. mutex_unlock(&qeth_dbf_list_mutex);
  4683. }
  4684. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4685. {
  4686. struct qeth_card *card;
  4687. struct device *dev;
  4688. int rc;
  4689. unsigned long flags;
  4690. char dbf_name[DBF_NAME_LEN];
  4691. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4692. dev = &gdev->dev;
  4693. if (!get_device(dev))
  4694. return -ENODEV;
  4695. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4696. card = qeth_alloc_card();
  4697. if (!card) {
  4698. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4699. rc = -ENOMEM;
  4700. goto err_dev;
  4701. }
  4702. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4703. dev_name(&gdev->dev));
  4704. card->debug = qeth_get_dbf_entry(dbf_name);
  4705. if (!card->debug) {
  4706. rc = qeth_add_dbf_entry(card, dbf_name);
  4707. if (rc)
  4708. goto err_card;
  4709. }
  4710. card->read.ccwdev = gdev->cdev[0];
  4711. card->write.ccwdev = gdev->cdev[1];
  4712. card->data.ccwdev = gdev->cdev[2];
  4713. dev_set_drvdata(&gdev->dev, card);
  4714. card->gdev = gdev;
  4715. gdev->cdev[0]->handler = qeth_irq;
  4716. gdev->cdev[1]->handler = qeth_irq;
  4717. gdev->cdev[2]->handler = qeth_irq;
  4718. rc = qeth_determine_card_type(card);
  4719. if (rc) {
  4720. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4721. goto err_card;
  4722. }
  4723. rc = qeth_setup_card(card);
  4724. if (rc) {
  4725. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4726. goto err_card;
  4727. }
  4728. if (card->info.type == QETH_CARD_TYPE_OSN)
  4729. gdev->dev.type = &qeth_osn_devtype;
  4730. else
  4731. gdev->dev.type = &qeth_generic_devtype;
  4732. switch (card->info.type) {
  4733. case QETH_CARD_TYPE_OSN:
  4734. case QETH_CARD_TYPE_OSM:
  4735. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4736. if (rc)
  4737. goto err_card;
  4738. rc = card->discipline->setup(card->gdev);
  4739. if (rc)
  4740. goto err_disc;
  4741. case QETH_CARD_TYPE_OSD:
  4742. case QETH_CARD_TYPE_OSX:
  4743. default:
  4744. break;
  4745. }
  4746. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4747. list_add_tail(&card->list, &qeth_core_card_list.list);
  4748. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4749. qeth_determine_capabilities(card);
  4750. return 0;
  4751. err_disc:
  4752. qeth_core_free_discipline(card);
  4753. err_card:
  4754. qeth_core_free_card(card);
  4755. err_dev:
  4756. put_device(dev);
  4757. return rc;
  4758. }
  4759. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4760. {
  4761. unsigned long flags;
  4762. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4763. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4764. if (card->discipline) {
  4765. card->discipline->remove(gdev);
  4766. qeth_core_free_discipline(card);
  4767. }
  4768. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4769. list_del(&card->list);
  4770. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4771. qeth_core_free_card(card);
  4772. dev_set_drvdata(&gdev->dev, NULL);
  4773. put_device(&gdev->dev);
  4774. return;
  4775. }
  4776. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4777. {
  4778. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4779. int rc = 0;
  4780. int def_discipline;
  4781. if (!card->discipline) {
  4782. if (card->info.type == QETH_CARD_TYPE_IQD)
  4783. def_discipline = QETH_DISCIPLINE_LAYER3;
  4784. else
  4785. def_discipline = QETH_DISCIPLINE_LAYER2;
  4786. rc = qeth_core_load_discipline(card, def_discipline);
  4787. if (rc)
  4788. goto err;
  4789. rc = card->discipline->setup(card->gdev);
  4790. if (rc)
  4791. goto err;
  4792. }
  4793. rc = card->discipline->set_online(gdev);
  4794. err:
  4795. return rc;
  4796. }
  4797. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  4798. {
  4799. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4800. return card->discipline->set_offline(gdev);
  4801. }
  4802. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  4803. {
  4804. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4805. if (card->discipline && card->discipline->shutdown)
  4806. card->discipline->shutdown(gdev);
  4807. }
  4808. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  4809. {
  4810. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4811. if (card->discipline && card->discipline->prepare)
  4812. return card->discipline->prepare(gdev);
  4813. return 0;
  4814. }
  4815. static void qeth_core_complete(struct ccwgroup_device *gdev)
  4816. {
  4817. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4818. if (card->discipline && card->discipline->complete)
  4819. card->discipline->complete(gdev);
  4820. }
  4821. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  4822. {
  4823. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4824. if (card->discipline && card->discipline->freeze)
  4825. return card->discipline->freeze(gdev);
  4826. return 0;
  4827. }
  4828. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  4829. {
  4830. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4831. if (card->discipline && card->discipline->thaw)
  4832. return card->discipline->thaw(gdev);
  4833. return 0;
  4834. }
  4835. static int qeth_core_restore(struct ccwgroup_device *gdev)
  4836. {
  4837. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4838. if (card->discipline && card->discipline->restore)
  4839. return card->discipline->restore(gdev);
  4840. return 0;
  4841. }
  4842. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  4843. .driver = {
  4844. .owner = THIS_MODULE,
  4845. .name = "qeth",
  4846. },
  4847. .setup = qeth_core_probe_device,
  4848. .remove = qeth_core_remove_device,
  4849. .set_online = qeth_core_set_online,
  4850. .set_offline = qeth_core_set_offline,
  4851. .shutdown = qeth_core_shutdown,
  4852. .prepare = qeth_core_prepare,
  4853. .complete = qeth_core_complete,
  4854. .freeze = qeth_core_freeze,
  4855. .thaw = qeth_core_thaw,
  4856. .restore = qeth_core_restore,
  4857. };
  4858. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  4859. const char *buf, size_t count)
  4860. {
  4861. int err;
  4862. err = ccwgroup_create_dev(qeth_core_root_dev,
  4863. &qeth_core_ccwgroup_driver, 3, buf);
  4864. return err ? err : count;
  4865. }
  4866. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  4867. static struct attribute *qeth_drv_attrs[] = {
  4868. &driver_attr_group.attr,
  4869. NULL,
  4870. };
  4871. static struct attribute_group qeth_drv_attr_group = {
  4872. .attrs = qeth_drv_attrs,
  4873. };
  4874. static const struct attribute_group *qeth_drv_attr_groups[] = {
  4875. &qeth_drv_attr_group,
  4876. NULL,
  4877. };
  4878. static struct {
  4879. const char str[ETH_GSTRING_LEN];
  4880. } qeth_ethtool_stats_keys[] = {
  4881. /* 0 */{"rx skbs"},
  4882. {"rx buffers"},
  4883. {"tx skbs"},
  4884. {"tx buffers"},
  4885. {"tx skbs no packing"},
  4886. {"tx buffers no packing"},
  4887. {"tx skbs packing"},
  4888. {"tx buffers packing"},
  4889. {"tx sg skbs"},
  4890. {"tx sg frags"},
  4891. /* 10 */{"rx sg skbs"},
  4892. {"rx sg frags"},
  4893. {"rx sg page allocs"},
  4894. {"tx large kbytes"},
  4895. {"tx large count"},
  4896. {"tx pk state ch n->p"},
  4897. {"tx pk state ch p->n"},
  4898. {"tx pk watermark low"},
  4899. {"tx pk watermark high"},
  4900. {"queue 0 buffer usage"},
  4901. /* 20 */{"queue 1 buffer usage"},
  4902. {"queue 2 buffer usage"},
  4903. {"queue 3 buffer usage"},
  4904. {"rx poll time"},
  4905. {"rx poll count"},
  4906. {"rx do_QDIO time"},
  4907. {"rx do_QDIO count"},
  4908. {"tx handler time"},
  4909. {"tx handler count"},
  4910. {"tx time"},
  4911. /* 30 */{"tx count"},
  4912. {"tx do_QDIO time"},
  4913. {"tx do_QDIO count"},
  4914. {"tx csum"},
  4915. {"tx lin"},
  4916. {"cq handler count"},
  4917. {"cq handler time"}
  4918. };
  4919. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  4920. {
  4921. switch (stringset) {
  4922. case ETH_SS_STATS:
  4923. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  4924. default:
  4925. return -EINVAL;
  4926. }
  4927. }
  4928. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  4929. void qeth_core_get_ethtool_stats(struct net_device *dev,
  4930. struct ethtool_stats *stats, u64 *data)
  4931. {
  4932. struct qeth_card *card = dev->ml_priv;
  4933. data[0] = card->stats.rx_packets -
  4934. card->perf_stats.initial_rx_packets;
  4935. data[1] = card->perf_stats.bufs_rec;
  4936. data[2] = card->stats.tx_packets -
  4937. card->perf_stats.initial_tx_packets;
  4938. data[3] = card->perf_stats.bufs_sent;
  4939. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  4940. - card->perf_stats.skbs_sent_pack;
  4941. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  4942. data[6] = card->perf_stats.skbs_sent_pack;
  4943. data[7] = card->perf_stats.bufs_sent_pack;
  4944. data[8] = card->perf_stats.sg_skbs_sent;
  4945. data[9] = card->perf_stats.sg_frags_sent;
  4946. data[10] = card->perf_stats.sg_skbs_rx;
  4947. data[11] = card->perf_stats.sg_frags_rx;
  4948. data[12] = card->perf_stats.sg_alloc_page_rx;
  4949. data[13] = (card->perf_stats.large_send_bytes >> 10);
  4950. data[14] = card->perf_stats.large_send_cnt;
  4951. data[15] = card->perf_stats.sc_dp_p;
  4952. data[16] = card->perf_stats.sc_p_dp;
  4953. data[17] = QETH_LOW_WATERMARK_PACK;
  4954. data[18] = QETH_HIGH_WATERMARK_PACK;
  4955. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  4956. data[20] = (card->qdio.no_out_queues > 1) ?
  4957. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  4958. data[21] = (card->qdio.no_out_queues > 2) ?
  4959. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  4960. data[22] = (card->qdio.no_out_queues > 3) ?
  4961. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  4962. data[23] = card->perf_stats.inbound_time;
  4963. data[24] = card->perf_stats.inbound_cnt;
  4964. data[25] = card->perf_stats.inbound_do_qdio_time;
  4965. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  4966. data[27] = card->perf_stats.outbound_handler_time;
  4967. data[28] = card->perf_stats.outbound_handler_cnt;
  4968. data[29] = card->perf_stats.outbound_time;
  4969. data[30] = card->perf_stats.outbound_cnt;
  4970. data[31] = card->perf_stats.outbound_do_qdio_time;
  4971. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  4972. data[33] = card->perf_stats.tx_csum;
  4973. data[34] = card->perf_stats.tx_lin;
  4974. data[35] = card->perf_stats.cq_cnt;
  4975. data[36] = card->perf_stats.cq_time;
  4976. }
  4977. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  4978. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  4979. {
  4980. switch (stringset) {
  4981. case ETH_SS_STATS:
  4982. memcpy(data, &qeth_ethtool_stats_keys,
  4983. sizeof(qeth_ethtool_stats_keys));
  4984. break;
  4985. default:
  4986. WARN_ON(1);
  4987. break;
  4988. }
  4989. }
  4990. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  4991. void qeth_core_get_drvinfo(struct net_device *dev,
  4992. struct ethtool_drvinfo *info)
  4993. {
  4994. struct qeth_card *card = dev->ml_priv;
  4995. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  4996. sizeof(info->driver));
  4997. strlcpy(info->version, "1.0", sizeof(info->version));
  4998. strlcpy(info->fw_version, card->info.mcl_level,
  4999. sizeof(info->fw_version));
  5000. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5001. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5002. }
  5003. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5004. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5005. struct ethtool_cmd *ecmd)
  5006. {
  5007. struct qeth_card *card = netdev->ml_priv;
  5008. enum qeth_link_types link_type;
  5009. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5010. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5011. else
  5012. link_type = card->info.link_type;
  5013. ecmd->transceiver = XCVR_INTERNAL;
  5014. ecmd->supported = SUPPORTED_Autoneg;
  5015. ecmd->advertising = ADVERTISED_Autoneg;
  5016. ecmd->duplex = DUPLEX_FULL;
  5017. ecmd->autoneg = AUTONEG_ENABLE;
  5018. switch (link_type) {
  5019. case QETH_LINK_TYPE_FAST_ETH:
  5020. case QETH_LINK_TYPE_LANE_ETH100:
  5021. ecmd->supported |= SUPPORTED_10baseT_Half |
  5022. SUPPORTED_10baseT_Full |
  5023. SUPPORTED_100baseT_Half |
  5024. SUPPORTED_100baseT_Full |
  5025. SUPPORTED_TP;
  5026. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5027. ADVERTISED_10baseT_Full |
  5028. ADVERTISED_100baseT_Half |
  5029. ADVERTISED_100baseT_Full |
  5030. ADVERTISED_TP;
  5031. ecmd->speed = SPEED_100;
  5032. ecmd->port = PORT_TP;
  5033. break;
  5034. case QETH_LINK_TYPE_GBIT_ETH:
  5035. case QETH_LINK_TYPE_LANE_ETH1000:
  5036. ecmd->supported |= SUPPORTED_10baseT_Half |
  5037. SUPPORTED_10baseT_Full |
  5038. SUPPORTED_100baseT_Half |
  5039. SUPPORTED_100baseT_Full |
  5040. SUPPORTED_1000baseT_Half |
  5041. SUPPORTED_1000baseT_Full |
  5042. SUPPORTED_FIBRE;
  5043. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5044. ADVERTISED_10baseT_Full |
  5045. ADVERTISED_100baseT_Half |
  5046. ADVERTISED_100baseT_Full |
  5047. ADVERTISED_1000baseT_Half |
  5048. ADVERTISED_1000baseT_Full |
  5049. ADVERTISED_FIBRE;
  5050. ecmd->speed = SPEED_1000;
  5051. ecmd->port = PORT_FIBRE;
  5052. break;
  5053. case QETH_LINK_TYPE_10GBIT_ETH:
  5054. ecmd->supported |= SUPPORTED_10baseT_Half |
  5055. SUPPORTED_10baseT_Full |
  5056. SUPPORTED_100baseT_Half |
  5057. SUPPORTED_100baseT_Full |
  5058. SUPPORTED_1000baseT_Half |
  5059. SUPPORTED_1000baseT_Full |
  5060. SUPPORTED_10000baseT_Full |
  5061. SUPPORTED_FIBRE;
  5062. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5063. ADVERTISED_10baseT_Full |
  5064. ADVERTISED_100baseT_Half |
  5065. ADVERTISED_100baseT_Full |
  5066. ADVERTISED_1000baseT_Half |
  5067. ADVERTISED_1000baseT_Full |
  5068. ADVERTISED_10000baseT_Full |
  5069. ADVERTISED_FIBRE;
  5070. ecmd->speed = SPEED_10000;
  5071. ecmd->port = PORT_FIBRE;
  5072. break;
  5073. default:
  5074. ecmd->supported |= SUPPORTED_10baseT_Half |
  5075. SUPPORTED_10baseT_Full |
  5076. SUPPORTED_TP;
  5077. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5078. ADVERTISED_10baseT_Full |
  5079. ADVERTISED_TP;
  5080. ecmd->speed = SPEED_10;
  5081. ecmd->port = PORT_TP;
  5082. }
  5083. return 0;
  5084. }
  5085. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5086. static int __init qeth_core_init(void)
  5087. {
  5088. int rc;
  5089. pr_info("loading core functions\n");
  5090. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5091. INIT_LIST_HEAD(&qeth_dbf_list);
  5092. rwlock_init(&qeth_core_card_list.rwlock);
  5093. mutex_init(&qeth_mod_mutex);
  5094. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5095. rc = qeth_register_dbf_views();
  5096. if (rc)
  5097. goto out_err;
  5098. qeth_core_root_dev = root_device_register("qeth");
  5099. rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
  5100. if (rc)
  5101. goto register_err;
  5102. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5103. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5104. if (!qeth_core_header_cache) {
  5105. rc = -ENOMEM;
  5106. goto slab_err;
  5107. }
  5108. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5109. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5110. if (!qeth_qdio_outbuf_cache) {
  5111. rc = -ENOMEM;
  5112. goto cqslab_err;
  5113. }
  5114. rc = ccw_driver_register(&qeth_ccw_driver);
  5115. if (rc)
  5116. goto ccw_err;
  5117. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5118. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5119. if (rc)
  5120. goto ccwgroup_err;
  5121. return 0;
  5122. ccwgroup_err:
  5123. ccw_driver_unregister(&qeth_ccw_driver);
  5124. ccw_err:
  5125. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5126. cqslab_err:
  5127. kmem_cache_destroy(qeth_core_header_cache);
  5128. slab_err:
  5129. root_device_unregister(qeth_core_root_dev);
  5130. register_err:
  5131. qeth_unregister_dbf_views();
  5132. out_err:
  5133. pr_err("Initializing the qeth device driver failed\n");
  5134. return rc;
  5135. }
  5136. static void __exit qeth_core_exit(void)
  5137. {
  5138. qeth_clear_dbf_list();
  5139. destroy_workqueue(qeth_wq);
  5140. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5141. ccw_driver_unregister(&qeth_ccw_driver);
  5142. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5143. kmem_cache_destroy(qeth_core_header_cache);
  5144. root_device_unregister(qeth_core_root_dev);
  5145. qeth_unregister_dbf_views();
  5146. pr_info("core functions removed\n");
  5147. }
  5148. module_init(qeth_core_init);
  5149. module_exit(qeth_core_exit);
  5150. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5151. MODULE_DESCRIPTION("qeth core functions");
  5152. MODULE_LICENSE("GPL");