iwl4965-base.c 265 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.23k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For normal Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  419. int is_ap, u8 flags, void *ht_data)
  420. {
  421. int i;
  422. int index = IWL_INVALID_STATION;
  423. struct iwl4965_station_entry *station;
  424. unsigned long flags_spin;
  425. DECLARE_MAC_BUF(mac);
  426. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  427. if (is_ap)
  428. index = IWL_AP_ID;
  429. else if (is_broadcast_ether_addr(addr))
  430. index = priv->hw_setting.bcast_sta_id;
  431. else
  432. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  433. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  434. addr)) {
  435. index = i;
  436. break;
  437. }
  438. if (!priv->stations[i].used &&
  439. index == IWL_INVALID_STATION)
  440. index = i;
  441. }
  442. /* These two conditions have the same outcome, but keep them separate
  443. since they have different meanings */
  444. if (unlikely(index == IWL_INVALID_STATION)) {
  445. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  446. return index;
  447. }
  448. if (priv->stations[index].used &&
  449. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  450. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  451. return index;
  452. }
  453. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  454. station = &priv->stations[index];
  455. station->used = 1;
  456. priv->num_stations++;
  457. /* Set up the REPLY_ADD_STA command to send to device */
  458. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  459. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  460. station->sta.mode = 0;
  461. station->sta.sta.sta_id = index;
  462. station->sta.station_flags = 0;
  463. #ifdef CONFIG_IWL4965_HT
  464. /* BCAST station and IBSS stations do not work in HT mode */
  465. if (index != priv->hw_setting.bcast_sta_id &&
  466. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  467. iwl4965_set_ht_add_station(priv, index,
  468. (struct ieee80211_ht_info *) ht_data);
  469. #endif /*CONFIG_IWL4965_HT*/
  470. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  471. /* Add station to device's station table */
  472. iwl4965_send_add_station(priv, &station->sta, flags);
  473. return index;
  474. }
  475. /*************** DRIVER STATUS FUNCTIONS *****/
  476. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  477. {
  478. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  479. * set but EXIT_PENDING is not */
  480. return test_bit(STATUS_READY, &priv->status) &&
  481. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  482. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  483. }
  484. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_ALIVE, &priv->status);
  487. }
  488. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_INIT, &priv->status);
  491. }
  492. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  493. {
  494. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  495. test_bit(STATUS_RF_KILL_SW, &priv->status);
  496. }
  497. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  498. {
  499. if (iwl4965_is_rfkill(priv))
  500. return 0;
  501. return iwl4965_is_ready(priv);
  502. }
  503. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  504. #define IWL_CMD(x) case x : return #x
  505. static const char *get_cmd_string(u8 cmd)
  506. {
  507. switch (cmd) {
  508. IWL_CMD(REPLY_ALIVE);
  509. IWL_CMD(REPLY_ERROR);
  510. IWL_CMD(REPLY_RXON);
  511. IWL_CMD(REPLY_RXON_ASSOC);
  512. IWL_CMD(REPLY_QOS_PARAM);
  513. IWL_CMD(REPLY_RXON_TIMING);
  514. IWL_CMD(REPLY_ADD_STA);
  515. IWL_CMD(REPLY_REMOVE_STA);
  516. IWL_CMD(REPLY_REMOVE_ALL_STA);
  517. IWL_CMD(REPLY_TX);
  518. IWL_CMD(REPLY_RATE_SCALE);
  519. IWL_CMD(REPLY_LEDS_CMD);
  520. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  521. IWL_CMD(RADAR_NOTIFICATION);
  522. IWL_CMD(REPLY_QUIET_CMD);
  523. IWL_CMD(REPLY_CHANNEL_SWITCH);
  524. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  525. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  526. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  527. IWL_CMD(POWER_TABLE_CMD);
  528. IWL_CMD(PM_SLEEP_NOTIFICATION);
  529. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  530. IWL_CMD(REPLY_SCAN_CMD);
  531. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  532. IWL_CMD(SCAN_START_NOTIFICATION);
  533. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  534. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  535. IWL_CMD(BEACON_NOTIFICATION);
  536. IWL_CMD(REPLY_TX_BEACON);
  537. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  538. IWL_CMD(QUIET_NOTIFICATION);
  539. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  540. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  541. IWL_CMD(REPLY_BT_CONFIG);
  542. IWL_CMD(REPLY_STATISTICS_CMD);
  543. IWL_CMD(STATISTICS_NOTIFICATION);
  544. IWL_CMD(REPLY_CARD_STATE_CMD);
  545. IWL_CMD(CARD_STATE_NOTIFICATION);
  546. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  547. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  548. IWL_CMD(SENSITIVITY_CMD);
  549. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  550. IWL_CMD(REPLY_RX_PHY_CMD);
  551. IWL_CMD(REPLY_RX_MPDU_CMD);
  552. IWL_CMD(REPLY_4965_RX);
  553. IWL_CMD(REPLY_COMPRESSED_BA);
  554. default:
  555. return "UNKNOWN";
  556. }
  557. }
  558. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  559. /**
  560. * iwl4965_enqueue_hcmd - enqueue a uCode command
  561. * @priv: device private data point
  562. * @cmd: a point to the ucode command structure
  563. *
  564. * The function returns < 0 values to indicate the operation is
  565. * failed. On success, it turns the index (> 0) of command in the
  566. * command queue.
  567. */
  568. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  569. {
  570. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  571. struct iwl4965_queue *q = &txq->q;
  572. struct iwl4965_tfd_frame *tfd;
  573. u32 *control_flags;
  574. struct iwl4965_cmd *out_cmd;
  575. u32 idx;
  576. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  577. dma_addr_t phys_addr;
  578. int ret;
  579. unsigned long flags;
  580. /* If any of the command structures end up being larger than
  581. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  582. * we will need to increase the size of the TFD entries */
  583. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  584. !(cmd->meta.flags & CMD_SIZE_HUGE));
  585. if (iwl4965_is_rfkill(priv)) {
  586. IWL_DEBUG_INFO("Not sending command - RF KILL");
  587. return -EIO;
  588. }
  589. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  590. IWL_ERROR("No space for Tx\n");
  591. return -ENOSPC;
  592. }
  593. spin_lock_irqsave(&priv->hcmd_lock, flags);
  594. tfd = &txq->bd[q->write_ptr];
  595. memset(tfd, 0, sizeof(*tfd));
  596. control_flags = (u32 *) tfd;
  597. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  598. out_cmd = &txq->cmd[idx];
  599. out_cmd->hdr.cmd = cmd->id;
  600. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  601. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  602. /* At this point, the out_cmd now has all of the incoming cmd
  603. * information */
  604. out_cmd->hdr.flags = 0;
  605. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  606. INDEX_TO_SEQ(q->write_ptr));
  607. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  608. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  609. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  610. offsetof(struct iwl4965_cmd, hdr);
  611. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  612. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  613. "%d bytes at %d[%d]:%d\n",
  614. get_cmd_string(out_cmd->hdr.cmd),
  615. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  616. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  617. txq->need_update = 1;
  618. /* Set up entry in queue's byte count circular buffer */
  619. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  620. /* Increment and update queue's write index */
  621. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  622. iwl4965_tx_queue_update_write_ptr(priv, txq);
  623. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  624. return ret ? ret : idx;
  625. }
  626. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  627. {
  628. int ret;
  629. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  630. /* An asynchronous command can not expect an SKB to be set. */
  631. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  632. /* An asynchronous command MUST have a callback. */
  633. BUG_ON(!cmd->meta.u.callback);
  634. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  635. return -EBUSY;
  636. ret = iwl4965_enqueue_hcmd(priv, cmd);
  637. if (ret < 0) {
  638. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  639. get_cmd_string(cmd->id), ret);
  640. return ret;
  641. }
  642. return 0;
  643. }
  644. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  645. {
  646. int cmd_idx;
  647. int ret;
  648. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  649. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  650. /* A synchronous command can not have a callback set. */
  651. BUG_ON(cmd->meta.u.callback != NULL);
  652. if (atomic_xchg(&entry, 1)) {
  653. IWL_ERROR("Error sending %s: Already sending a host command\n",
  654. get_cmd_string(cmd->id));
  655. return -EBUSY;
  656. }
  657. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  658. if (cmd->meta.flags & CMD_WANT_SKB)
  659. cmd->meta.source = &cmd->meta;
  660. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  661. if (cmd_idx < 0) {
  662. ret = cmd_idx;
  663. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  664. get_cmd_string(cmd->id), ret);
  665. goto out;
  666. }
  667. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  668. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  669. HOST_COMPLETE_TIMEOUT);
  670. if (!ret) {
  671. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  672. IWL_ERROR("Error sending %s: time out after %dms.\n",
  673. get_cmd_string(cmd->id),
  674. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  675. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  676. ret = -ETIMEDOUT;
  677. goto cancel;
  678. }
  679. }
  680. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  681. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  682. get_cmd_string(cmd->id));
  683. ret = -ECANCELED;
  684. goto fail;
  685. }
  686. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  687. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  688. get_cmd_string(cmd->id));
  689. ret = -EIO;
  690. goto fail;
  691. }
  692. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  693. IWL_ERROR("Error: Response NULL in '%s'\n",
  694. get_cmd_string(cmd->id));
  695. ret = -EIO;
  696. goto out;
  697. }
  698. ret = 0;
  699. goto out;
  700. cancel:
  701. if (cmd->meta.flags & CMD_WANT_SKB) {
  702. struct iwl4965_cmd *qcmd;
  703. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  704. * TX cmd queue. Otherwise in case the cmd comes
  705. * in later, it will possibly set an invalid
  706. * address (cmd->meta.source). */
  707. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  708. qcmd->meta.flags &= ~CMD_WANT_SKB;
  709. }
  710. fail:
  711. if (cmd->meta.u.skb) {
  712. dev_kfree_skb_any(cmd->meta.u.skb);
  713. cmd->meta.u.skb = NULL;
  714. }
  715. out:
  716. atomic_set(&entry, 0);
  717. return ret;
  718. }
  719. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  720. {
  721. if (cmd->meta.flags & CMD_ASYNC)
  722. return iwl4965_send_cmd_async(priv, cmd);
  723. return iwl4965_send_cmd_sync(priv, cmd);
  724. }
  725. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  726. {
  727. struct iwl4965_host_cmd cmd = {
  728. .id = id,
  729. .len = len,
  730. .data = data,
  731. };
  732. return iwl4965_send_cmd_sync(priv, &cmd);
  733. }
  734. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  735. {
  736. struct iwl4965_host_cmd cmd = {
  737. .id = id,
  738. .len = sizeof(val),
  739. .data = &val,
  740. };
  741. return iwl4965_send_cmd_sync(priv, &cmd);
  742. }
  743. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  744. {
  745. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  746. }
  747. /**
  748. * iwl4965_rxon_add_station - add station into station table.
  749. *
  750. * there is only one AP station with id= IWL_AP_ID
  751. * NOTE: mutex must be held before calling this fnction
  752. */
  753. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  754. const u8 *addr, int is_ap)
  755. {
  756. u8 sta_id;
  757. /* Add station to device's station table */
  758. #ifdef CONFIG_IWL4965_HT
  759. struct ieee80211_conf *conf = &priv->hw->conf;
  760. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  761. if ((is_ap) &&
  762. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  763. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, cur_ht_config);
  766. else
  767. #endif /* CONFIG_IWL4965_HT */
  768. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  769. 0, NULL);
  770. /* Set up default rate scaling table in device's station table */
  771. iwl4965_add_station(priv, addr, is_ap);
  772. return sta_id;
  773. }
  774. /**
  775. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  776. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  777. * @channel: Any channel valid for the requested phymode
  778. * In addition to setting the staging RXON, priv->phymode is also set.
  779. *
  780. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  781. * in the staging RXON flag structure based on the phymode
  782. */
  783. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  784. u16 channel)
  785. {
  786. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  787. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  788. channel, phymode);
  789. return -EINVAL;
  790. }
  791. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  792. (priv->phymode == phymode))
  793. return 0;
  794. priv->staging_rxon.channel = cpu_to_le16(channel);
  795. if (phymode == MODE_IEEE80211A)
  796. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  797. else
  798. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  799. priv->phymode = phymode;
  800. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  801. return 0;
  802. }
  803. /**
  804. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  805. *
  806. * NOTE: This is really only useful during development and can eventually
  807. * be #ifdef'd out once the driver is stable and folks aren't actively
  808. * making changes
  809. */
  810. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  811. {
  812. int error = 0;
  813. int counter = 1;
  814. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  815. error |= le32_to_cpu(rxon->flags &
  816. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  817. RXON_FLG_RADAR_DETECT_MSK));
  818. if (error)
  819. IWL_WARNING("check 24G fields %d | %d\n",
  820. counter++, error);
  821. } else {
  822. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  823. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  824. if (error)
  825. IWL_WARNING("check 52 fields %d | %d\n",
  826. counter++, error);
  827. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  828. if (error)
  829. IWL_WARNING("check 52 CCK %d | %d\n",
  830. counter++, error);
  831. }
  832. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  833. if (error)
  834. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  835. /* make sure basic rates 6Mbps and 1Mbps are supported */
  836. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  837. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  838. if (error)
  839. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  840. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  841. if (error)
  842. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  843. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  844. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  845. if (error)
  846. IWL_WARNING("check CCK and short slot %d | %d\n",
  847. counter++, error);
  848. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  849. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  850. if (error)
  851. IWL_WARNING("check CCK & auto detect %d | %d\n",
  852. counter++, error);
  853. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  854. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  855. if (error)
  856. IWL_WARNING("check TGG and auto detect %d | %d\n",
  857. counter++, error);
  858. if (error)
  859. IWL_WARNING("Tuning to channel %d\n",
  860. le16_to_cpu(rxon->channel));
  861. if (error) {
  862. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  863. return -1;
  864. }
  865. return 0;
  866. }
  867. /**
  868. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  869. * @priv: staging_rxon is compared to active_rxon
  870. *
  871. * If the RXON structure is changing enough to require a new tune,
  872. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  873. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  874. */
  875. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  876. {
  877. /* These items are only settable from the full RXON command */
  878. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  879. compare_ether_addr(priv->staging_rxon.bssid_addr,
  880. priv->active_rxon.bssid_addr) ||
  881. compare_ether_addr(priv->staging_rxon.node_addr,
  882. priv->active_rxon.node_addr) ||
  883. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  884. priv->active_rxon.wlap_bssid_addr) ||
  885. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  886. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  887. (priv->staging_rxon.air_propagation !=
  888. priv->active_rxon.air_propagation) ||
  889. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  890. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  891. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  892. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  893. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  894. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  895. return 1;
  896. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  897. * be updated with the RXON_ASSOC command -- however only some
  898. * flag transitions are allowed using RXON_ASSOC */
  899. /* Check if we are not switching bands */
  900. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  901. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  902. return 1;
  903. /* Check if we are switching association toggle */
  904. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  905. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  906. return 1;
  907. return 0;
  908. }
  909. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  910. {
  911. int rc = 0;
  912. struct iwl4965_rx_packet *res = NULL;
  913. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  914. struct iwl4965_host_cmd cmd = {
  915. .id = REPLY_RXON_ASSOC,
  916. .len = sizeof(rxon_assoc),
  917. .meta.flags = CMD_WANT_SKB,
  918. .data = &rxon_assoc,
  919. };
  920. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  921. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  922. if ((rxon1->flags == rxon2->flags) &&
  923. (rxon1->filter_flags == rxon2->filter_flags) &&
  924. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  925. (rxon1->ofdm_ht_single_stream_basic_rates ==
  926. rxon2->ofdm_ht_single_stream_basic_rates) &&
  927. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  928. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  929. (rxon1->rx_chain == rxon2->rx_chain) &&
  930. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  931. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  932. return 0;
  933. }
  934. rxon_assoc.flags = priv->staging_rxon.flags;
  935. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  936. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  937. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  938. rxon_assoc.reserved = 0;
  939. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  940. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  941. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  942. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  943. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  944. rc = iwl4965_send_cmd_sync(priv, &cmd);
  945. if (rc)
  946. return rc;
  947. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  948. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  949. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  950. rc = -EIO;
  951. }
  952. priv->alloc_rxb_skb--;
  953. dev_kfree_skb_any(cmd.meta.u.skb);
  954. return rc;
  955. }
  956. /**
  957. * iwl4965_commit_rxon - commit staging_rxon to hardware
  958. *
  959. * The RXON command in staging_rxon is committed to the hardware and
  960. * the active_rxon structure is updated with the new data. This
  961. * function correctly transitions out of the RXON_ASSOC_MSK state if
  962. * a HW tune is required based on the RXON structure changes.
  963. */
  964. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  965. {
  966. /* cast away the const for active_rxon in this function */
  967. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  968. DECLARE_MAC_BUF(mac);
  969. int rc = 0;
  970. if (!iwl4965_is_alive(priv))
  971. return -1;
  972. /* always get timestamp with Rx frame */
  973. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  974. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  975. if (rc) {
  976. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  977. return -EINVAL;
  978. }
  979. /* If we don't need to send a full RXON, we can use
  980. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  981. * and other flags for the current radio configuration. */
  982. if (!iwl4965_full_rxon_required(priv)) {
  983. rc = iwl4965_send_rxon_assoc(priv);
  984. if (rc) {
  985. IWL_ERROR("Error setting RXON_ASSOC "
  986. "configuration (%d).\n", rc);
  987. return rc;
  988. }
  989. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  990. return 0;
  991. }
  992. /* station table will be cleared */
  993. priv->assoc_station_added = 0;
  994. #ifdef CONFIG_IWL4965_SENSITIVITY
  995. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  996. if (!priv->error_recovering)
  997. priv->start_calib = 0;
  998. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  999. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1000. /* If we are currently associated and the new config requires
  1001. * an RXON_ASSOC and the new config wants the associated mask enabled,
  1002. * we must clear the associated from the active configuration
  1003. * before we apply the new config */
  1004. if (iwl4965_is_associated(priv) &&
  1005. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1006. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1007. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1008. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1009. sizeof(struct iwl4965_rxon_cmd),
  1010. &priv->active_rxon);
  1011. /* If the mask clearing failed then we set
  1012. * active_rxon back to what it was previously */
  1013. if (rc) {
  1014. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1015. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1016. "configuration (%d).\n", rc);
  1017. return rc;
  1018. }
  1019. }
  1020. IWL_DEBUG_INFO("Sending RXON\n"
  1021. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1022. "* channel = %d\n"
  1023. "* bssid = %s\n",
  1024. ((priv->staging_rxon.filter_flags &
  1025. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1026. le16_to_cpu(priv->staging_rxon.channel),
  1027. print_mac(mac, priv->staging_rxon.bssid_addr));
  1028. /* Apply the new configuration */
  1029. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1030. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1031. if (rc) {
  1032. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1033. return rc;
  1034. }
  1035. iwl4965_clear_stations_table(priv);
  1036. #ifdef CONFIG_IWL4965_SENSITIVITY
  1037. if (!priv->error_recovering)
  1038. priv->start_calib = 0;
  1039. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1040. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1041. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1042. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1043. /* If we issue a new RXON command which required a tune then we must
  1044. * send a new TXPOWER command or we won't be able to Tx any frames */
  1045. rc = iwl4965_hw_reg_send_txpower(priv);
  1046. if (rc) {
  1047. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1048. return rc;
  1049. }
  1050. /* Add the broadcast address so we can send broadcast frames */
  1051. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1052. IWL_INVALID_STATION) {
  1053. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1054. return -EIO;
  1055. }
  1056. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1057. * add the IWL_AP_ID to the station rate table */
  1058. if (iwl4965_is_associated(priv) &&
  1059. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1060. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1061. == IWL_INVALID_STATION) {
  1062. IWL_ERROR("Error adding AP address for transmit.\n");
  1063. return -EIO;
  1064. }
  1065. priv->assoc_station_added = 1;
  1066. }
  1067. return 0;
  1068. }
  1069. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1070. {
  1071. struct iwl4965_bt_cmd bt_cmd = {
  1072. .flags = 3,
  1073. .lead_time = 0xAA,
  1074. .max_kill = 1,
  1075. .kill_ack_mask = 0,
  1076. .kill_cts_mask = 0,
  1077. };
  1078. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1079. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1080. }
  1081. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1082. {
  1083. int rc = 0;
  1084. struct iwl4965_rx_packet *res;
  1085. struct iwl4965_host_cmd cmd = {
  1086. .id = REPLY_SCAN_ABORT_CMD,
  1087. .meta.flags = CMD_WANT_SKB,
  1088. };
  1089. /* If there isn't a scan actively going on in the hardware
  1090. * then we are in between scan bands and not actually
  1091. * actively scanning, so don't send the abort command */
  1092. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1093. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1094. return 0;
  1095. }
  1096. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1097. if (rc) {
  1098. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1099. return rc;
  1100. }
  1101. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1102. if (res->u.status != CAN_ABORT_STATUS) {
  1103. /* The scan abort will return 1 for success or
  1104. * 2 for "failure". A failure condition can be
  1105. * due to simply not being in an active scan which
  1106. * can occur if we send the scan abort before we
  1107. * the microcode has notified us that a scan is
  1108. * completed. */
  1109. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1110. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1111. clear_bit(STATUS_SCAN_HW, &priv->status);
  1112. }
  1113. dev_kfree_skb_any(cmd.meta.u.skb);
  1114. return rc;
  1115. }
  1116. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1117. struct iwl4965_cmd *cmd,
  1118. struct sk_buff *skb)
  1119. {
  1120. return 1;
  1121. }
  1122. /*
  1123. * CARD_STATE_CMD
  1124. *
  1125. * Use: Sets the device's internal card state to enable, disable, or halt
  1126. *
  1127. * When in the 'enable' state the card operates as normal.
  1128. * When in the 'disable' state, the card enters into a low power mode.
  1129. * When in the 'halt' state, the card is shut down and must be fully
  1130. * restarted to come back on.
  1131. */
  1132. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1133. {
  1134. struct iwl4965_host_cmd cmd = {
  1135. .id = REPLY_CARD_STATE_CMD,
  1136. .len = sizeof(u32),
  1137. .data = &flags,
  1138. .meta.flags = meta_flag,
  1139. };
  1140. if (meta_flag & CMD_ASYNC)
  1141. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1142. return iwl4965_send_cmd(priv, &cmd);
  1143. }
  1144. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1145. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1146. {
  1147. struct iwl4965_rx_packet *res = NULL;
  1148. if (!skb) {
  1149. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1150. return 1;
  1151. }
  1152. res = (struct iwl4965_rx_packet *)skb->data;
  1153. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1154. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1155. res->hdr.flags);
  1156. return 1;
  1157. }
  1158. switch (res->u.add_sta.status) {
  1159. case ADD_STA_SUCCESS_MSK:
  1160. break;
  1161. default:
  1162. break;
  1163. }
  1164. /* We didn't cache the SKB; let the caller free it */
  1165. return 1;
  1166. }
  1167. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1168. struct iwl4965_addsta_cmd *sta, u8 flags)
  1169. {
  1170. struct iwl4965_rx_packet *res = NULL;
  1171. int rc = 0;
  1172. struct iwl4965_host_cmd cmd = {
  1173. .id = REPLY_ADD_STA,
  1174. .len = sizeof(struct iwl4965_addsta_cmd),
  1175. .meta.flags = flags,
  1176. .data = sta,
  1177. };
  1178. if (flags & CMD_ASYNC)
  1179. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1180. else
  1181. cmd.meta.flags |= CMD_WANT_SKB;
  1182. rc = iwl4965_send_cmd(priv, &cmd);
  1183. if (rc || (flags & CMD_ASYNC))
  1184. return rc;
  1185. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1186. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1187. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1188. res->hdr.flags);
  1189. rc = -EIO;
  1190. }
  1191. if (rc == 0) {
  1192. switch (res->u.add_sta.status) {
  1193. case ADD_STA_SUCCESS_MSK:
  1194. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1195. break;
  1196. default:
  1197. rc = -EIO;
  1198. IWL_WARNING("REPLY_ADD_STA failed\n");
  1199. break;
  1200. }
  1201. }
  1202. priv->alloc_rxb_skb--;
  1203. dev_kfree_skb_any(cmd.meta.u.skb);
  1204. return rc;
  1205. }
  1206. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1207. struct ieee80211_key_conf *keyconf,
  1208. u8 sta_id)
  1209. {
  1210. unsigned long flags;
  1211. __le16 key_flags = 0;
  1212. switch (keyconf->alg) {
  1213. case ALG_CCMP:
  1214. key_flags |= STA_KEY_FLG_CCMP;
  1215. key_flags |= cpu_to_le16(
  1216. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1217. key_flags &= ~STA_KEY_FLG_INVALID;
  1218. break;
  1219. case ALG_TKIP:
  1220. case ALG_WEP:
  1221. default:
  1222. return -EINVAL;
  1223. }
  1224. spin_lock_irqsave(&priv->sta_lock, flags);
  1225. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1226. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1227. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1228. keyconf->keylen);
  1229. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1230. keyconf->keylen);
  1231. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1232. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1233. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1234. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1235. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1236. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1237. return 0;
  1238. }
  1239. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1240. {
  1241. unsigned long flags;
  1242. spin_lock_irqsave(&priv->sta_lock, flags);
  1243. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1244. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1245. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1246. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1247. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1248. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1249. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1250. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1251. return 0;
  1252. }
  1253. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1254. {
  1255. struct list_head *element;
  1256. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1257. priv->frames_count);
  1258. while (!list_empty(&priv->free_frames)) {
  1259. element = priv->free_frames.next;
  1260. list_del(element);
  1261. kfree(list_entry(element, struct iwl4965_frame, list));
  1262. priv->frames_count--;
  1263. }
  1264. if (priv->frames_count) {
  1265. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1266. priv->frames_count);
  1267. priv->frames_count = 0;
  1268. }
  1269. }
  1270. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1271. {
  1272. struct iwl4965_frame *frame;
  1273. struct list_head *element;
  1274. if (list_empty(&priv->free_frames)) {
  1275. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1276. if (!frame) {
  1277. IWL_ERROR("Could not allocate frame!\n");
  1278. return NULL;
  1279. }
  1280. priv->frames_count++;
  1281. return frame;
  1282. }
  1283. element = priv->free_frames.next;
  1284. list_del(element);
  1285. return list_entry(element, struct iwl4965_frame, list);
  1286. }
  1287. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1288. {
  1289. memset(frame, 0, sizeof(*frame));
  1290. list_add(&frame->list, &priv->free_frames);
  1291. }
  1292. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1293. struct ieee80211_hdr *hdr,
  1294. const u8 *dest, int left)
  1295. {
  1296. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1297. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1298. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1299. return 0;
  1300. if (priv->ibss_beacon->len > left)
  1301. return 0;
  1302. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1303. return priv->ibss_beacon->len;
  1304. }
  1305. int iwl4965_rate_index_from_plcp(int plcp)
  1306. {
  1307. int i = 0;
  1308. /* 4965 HT rate format */
  1309. if (plcp & RATE_MCS_HT_MSK) {
  1310. i = (plcp & 0xff);
  1311. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1312. i = i - IWL_RATE_MIMO_6M_PLCP;
  1313. i += IWL_FIRST_OFDM_RATE;
  1314. /* skip 9M not supported in ht*/
  1315. if (i >= IWL_RATE_9M_INDEX)
  1316. i += 1;
  1317. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1318. (i <= IWL_LAST_OFDM_RATE))
  1319. return i;
  1320. /* 4965 legacy rate format, search for match in table */
  1321. } else {
  1322. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1323. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1324. return i;
  1325. }
  1326. return -1;
  1327. }
  1328. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1329. {
  1330. u8 i;
  1331. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1332. i = iwl4965_rates[i].next_ieee) {
  1333. if (rate_mask & (1 << i))
  1334. return iwl4965_rates[i].plcp;
  1335. }
  1336. return IWL_RATE_INVALID;
  1337. }
  1338. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1339. {
  1340. struct iwl4965_frame *frame;
  1341. unsigned int frame_size;
  1342. int rc;
  1343. u8 rate;
  1344. frame = iwl4965_get_free_frame(priv);
  1345. if (!frame) {
  1346. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1347. "command.\n");
  1348. return -ENOMEM;
  1349. }
  1350. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1351. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1352. 0xFF0);
  1353. if (rate == IWL_INVALID_RATE)
  1354. rate = IWL_RATE_6M_PLCP;
  1355. } else {
  1356. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1357. if (rate == IWL_INVALID_RATE)
  1358. rate = IWL_RATE_1M_PLCP;
  1359. }
  1360. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1361. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1362. &frame->u.cmd[0]);
  1363. iwl4965_free_frame(priv, frame);
  1364. return rc;
  1365. }
  1366. /******************************************************************************
  1367. *
  1368. * EEPROM related functions
  1369. *
  1370. ******************************************************************************/
  1371. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1372. {
  1373. memcpy(mac, priv->eeprom.mac_address, 6);
  1374. }
  1375. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1376. {
  1377. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1378. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1379. }
  1380. /**
  1381. * iwl4965_eeprom_init - read EEPROM contents
  1382. *
  1383. * Load the EEPROM contents from adapter into priv->eeprom
  1384. *
  1385. * NOTE: This routine uses the non-debug IO access functions.
  1386. */
  1387. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1388. {
  1389. u16 *e = (u16 *)&priv->eeprom;
  1390. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1391. u32 r;
  1392. int sz = sizeof(priv->eeprom);
  1393. int rc;
  1394. int i;
  1395. u16 addr;
  1396. /* The EEPROM structure has several padding buffers within it
  1397. * and when adding new EEPROM maps is subject to programmer errors
  1398. * which may be very difficult to identify without explicitly
  1399. * checking the resulting size of the eeprom map. */
  1400. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1401. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1402. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1403. return -ENOENT;
  1404. }
  1405. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1406. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1407. if (rc < 0) {
  1408. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1409. return -ENOENT;
  1410. }
  1411. /* eeprom is an array of 16bit values */
  1412. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1413. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1414. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1415. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1416. i += IWL_EEPROM_ACCESS_DELAY) {
  1417. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1418. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1419. break;
  1420. udelay(IWL_EEPROM_ACCESS_DELAY);
  1421. }
  1422. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1423. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1424. rc = -ETIMEDOUT;
  1425. goto done;
  1426. }
  1427. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1428. }
  1429. rc = 0;
  1430. done:
  1431. iwl4965_eeprom_release_semaphore(priv);
  1432. return rc;
  1433. }
  1434. /******************************************************************************
  1435. *
  1436. * Misc. internal state and helper functions
  1437. *
  1438. ******************************************************************************/
  1439. #ifdef CONFIG_IWL4965_DEBUG
  1440. /**
  1441. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1442. *
  1443. * You may hack this function to show different aspects of received frames,
  1444. * including selective frame dumps.
  1445. * group100 parameter selects whether to show 1 out of 100 good frames.
  1446. *
  1447. * TODO: This was originally written for 3945, need to audit for
  1448. * proper operation with 4965.
  1449. */
  1450. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1451. struct iwl4965_rx_packet *pkt,
  1452. struct ieee80211_hdr *header, int group100)
  1453. {
  1454. u32 to_us;
  1455. u32 print_summary = 0;
  1456. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1457. u32 hundred = 0;
  1458. u32 dataframe = 0;
  1459. u16 fc;
  1460. u16 seq_ctl;
  1461. u16 channel;
  1462. u16 phy_flags;
  1463. int rate_sym;
  1464. u16 length;
  1465. u16 status;
  1466. u16 bcn_tmr;
  1467. u32 tsf_low;
  1468. u64 tsf;
  1469. u8 rssi;
  1470. u8 agc;
  1471. u16 sig_avg;
  1472. u16 noise_diff;
  1473. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1474. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1475. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1476. u8 *data = IWL_RX_DATA(pkt);
  1477. /* MAC header */
  1478. fc = le16_to_cpu(header->frame_control);
  1479. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1480. /* metadata */
  1481. channel = le16_to_cpu(rx_hdr->channel);
  1482. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1483. rate_sym = rx_hdr->rate;
  1484. length = le16_to_cpu(rx_hdr->len);
  1485. /* end-of-frame status and timestamp */
  1486. status = le32_to_cpu(rx_end->status);
  1487. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1488. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1489. tsf = le64_to_cpu(rx_end->timestamp);
  1490. /* signal statistics */
  1491. rssi = rx_stats->rssi;
  1492. agc = rx_stats->agc;
  1493. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1494. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1495. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1496. /* if data frame is to us and all is good,
  1497. * (optionally) print summary for only 1 out of every 100 */
  1498. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1499. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1500. dataframe = 1;
  1501. if (!group100)
  1502. print_summary = 1; /* print each frame */
  1503. else if (priv->framecnt_to_us < 100) {
  1504. priv->framecnt_to_us++;
  1505. print_summary = 0;
  1506. } else {
  1507. priv->framecnt_to_us = 0;
  1508. print_summary = 1;
  1509. hundred = 1;
  1510. }
  1511. } else {
  1512. /* print summary for all other frames */
  1513. print_summary = 1;
  1514. }
  1515. if (print_summary) {
  1516. char *title;
  1517. u32 rate;
  1518. if (hundred)
  1519. title = "100Frames";
  1520. else if (fc & IEEE80211_FCTL_RETRY)
  1521. title = "Retry";
  1522. else if (ieee80211_is_assoc_response(fc))
  1523. title = "AscRsp";
  1524. else if (ieee80211_is_reassoc_response(fc))
  1525. title = "RasRsp";
  1526. else if (ieee80211_is_probe_response(fc)) {
  1527. title = "PrbRsp";
  1528. print_dump = 1; /* dump frame contents */
  1529. } else if (ieee80211_is_beacon(fc)) {
  1530. title = "Beacon";
  1531. print_dump = 1; /* dump frame contents */
  1532. } else if (ieee80211_is_atim(fc))
  1533. title = "ATIM";
  1534. else if (ieee80211_is_auth(fc))
  1535. title = "Auth";
  1536. else if (ieee80211_is_deauth(fc))
  1537. title = "DeAuth";
  1538. else if (ieee80211_is_disassoc(fc))
  1539. title = "DisAssoc";
  1540. else
  1541. title = "Frame";
  1542. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1543. if (rate == -1)
  1544. rate = 0;
  1545. else
  1546. rate = iwl4965_rates[rate].ieee / 2;
  1547. /* print frame summary.
  1548. * MAC addresses show just the last byte (for brevity),
  1549. * but you can hack it to show more, if you'd like to. */
  1550. if (dataframe)
  1551. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1552. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1553. title, fc, header->addr1[5],
  1554. length, rssi, channel, rate);
  1555. else {
  1556. /* src/dst addresses assume managed mode */
  1557. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1558. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1559. "phy=0x%02x, chnl=%d\n",
  1560. title, fc, header->addr1[5],
  1561. header->addr3[5], rssi,
  1562. tsf_low - priv->scan_start_tsf,
  1563. phy_flags, channel);
  1564. }
  1565. }
  1566. if (print_dump)
  1567. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1568. }
  1569. #endif
  1570. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1571. {
  1572. if (priv->hw_setting.shared_virt)
  1573. pci_free_consistent(priv->pci_dev,
  1574. sizeof(struct iwl4965_shared),
  1575. priv->hw_setting.shared_virt,
  1576. priv->hw_setting.shared_phys);
  1577. }
  1578. /**
  1579. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1580. *
  1581. * return : set the bit for each supported rate insert in ie
  1582. */
  1583. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1584. u16 basic_rate, int *left)
  1585. {
  1586. u16 ret_rates = 0, bit;
  1587. int i;
  1588. u8 *cnt = ie;
  1589. u8 *rates = ie + 1;
  1590. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1591. if (bit & supported_rate) {
  1592. ret_rates |= bit;
  1593. rates[*cnt] = iwl4965_rates[i].ieee |
  1594. ((bit & basic_rate) ? 0x80 : 0x00);
  1595. (*cnt)++;
  1596. (*left)--;
  1597. if ((*left <= 0) ||
  1598. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1599. break;
  1600. }
  1601. }
  1602. return ret_rates;
  1603. }
  1604. #ifdef CONFIG_IWL4965_HT
  1605. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1606. struct ieee80211_ht_cap *ht_cap,
  1607. u8 use_current_config);
  1608. #endif
  1609. /**
  1610. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1611. */
  1612. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1613. struct ieee80211_mgmt *frame,
  1614. int left, int is_direct)
  1615. {
  1616. int len = 0;
  1617. u8 *pos = NULL;
  1618. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1619. #ifdef CONFIG_IWL4965_HT
  1620. struct ieee80211_hw_mode *mode;
  1621. #endif /* CONFIG_IWL4965_HT */
  1622. /* Make sure there is enough space for the probe request,
  1623. * two mandatory IEs and the data */
  1624. left -= 24;
  1625. if (left < 0)
  1626. return 0;
  1627. len += 24;
  1628. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1629. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1630. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1631. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1632. frame->seq_ctrl = 0;
  1633. /* fill in our indirect SSID IE */
  1634. /* ...next IE... */
  1635. left -= 2;
  1636. if (left < 0)
  1637. return 0;
  1638. len += 2;
  1639. pos = &(frame->u.probe_req.variable[0]);
  1640. *pos++ = WLAN_EID_SSID;
  1641. *pos++ = 0;
  1642. /* fill in our direct SSID IE... */
  1643. if (is_direct) {
  1644. /* ...next IE... */
  1645. left -= 2 + priv->essid_len;
  1646. if (left < 0)
  1647. return 0;
  1648. /* ... fill it in... */
  1649. *pos++ = WLAN_EID_SSID;
  1650. *pos++ = priv->essid_len;
  1651. memcpy(pos, priv->essid, priv->essid_len);
  1652. pos += priv->essid_len;
  1653. len += 2 + priv->essid_len;
  1654. }
  1655. /* fill in supported rate */
  1656. /* ...next IE... */
  1657. left -= 2;
  1658. if (left < 0)
  1659. return 0;
  1660. /* ... fill it in... */
  1661. *pos++ = WLAN_EID_SUPP_RATES;
  1662. *pos = 0;
  1663. /* exclude 60M rate */
  1664. active_rates = priv->rates_mask;
  1665. active_rates &= ~IWL_RATE_60M_MASK;
  1666. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1667. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1668. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1669. active_rate_basic, &left);
  1670. active_rates &= ~ret_rates;
  1671. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1672. active_rate_basic, &left);
  1673. active_rates &= ~ret_rates;
  1674. len += 2 + *pos;
  1675. pos += (*pos) + 1;
  1676. if (active_rates == 0)
  1677. goto fill_end;
  1678. /* fill in supported extended rate */
  1679. /* ...next IE... */
  1680. left -= 2;
  1681. if (left < 0)
  1682. return 0;
  1683. /* ... fill it in... */
  1684. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1685. *pos = 0;
  1686. iwl4965_supported_rate_to_ie(pos, active_rates,
  1687. active_rate_basic, &left);
  1688. if (*pos > 0)
  1689. len += 2 + *pos;
  1690. #ifdef CONFIG_IWL4965_HT
  1691. mode = priv->hw->conf.mode;
  1692. if (mode->ht_info.ht_supported) {
  1693. pos += (*pos) + 1;
  1694. *pos++ = WLAN_EID_HT_CAPABILITY;
  1695. *pos++ = sizeof(struct ieee80211_ht_cap);
  1696. iwl4965_set_ht_capab(priv->hw,
  1697. (struct ieee80211_ht_cap *)pos, 0);
  1698. len += 2 + sizeof(struct ieee80211_ht_cap);
  1699. }
  1700. #endif /*CONFIG_IWL4965_HT */
  1701. fill_end:
  1702. return (u16)len;
  1703. }
  1704. /*
  1705. * QoS support
  1706. */
  1707. #ifdef CONFIG_IWL4965_QOS
  1708. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1709. struct iwl4965_qosparam_cmd *qos)
  1710. {
  1711. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1712. sizeof(struct iwl4965_qosparam_cmd), qos);
  1713. }
  1714. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1715. {
  1716. u16 cw_min = 15;
  1717. u16 cw_max = 1023;
  1718. u8 aifs = 2;
  1719. u8 is_legacy = 0;
  1720. unsigned long flags;
  1721. int i;
  1722. spin_lock_irqsave(&priv->lock, flags);
  1723. priv->qos_data.qos_active = 0;
  1724. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1725. if (priv->qos_data.qos_enable)
  1726. priv->qos_data.qos_active = 1;
  1727. if (!(priv->active_rate & 0xfff0)) {
  1728. cw_min = 31;
  1729. is_legacy = 1;
  1730. }
  1731. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1732. if (priv->qos_data.qos_enable)
  1733. priv->qos_data.qos_active = 1;
  1734. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1735. cw_min = 31;
  1736. is_legacy = 1;
  1737. }
  1738. if (priv->qos_data.qos_active)
  1739. aifs = 3;
  1740. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1741. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1742. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1743. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1744. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1745. if (priv->qos_data.qos_active) {
  1746. i = 1;
  1747. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1748. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1749. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1751. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1752. i = 2;
  1753. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1754. cpu_to_le16((cw_min + 1) / 2 - 1);
  1755. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1756. cpu_to_le16(cw_max);
  1757. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1758. if (is_legacy)
  1759. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1760. cpu_to_le16(6016);
  1761. else
  1762. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1763. cpu_to_le16(3008);
  1764. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1765. i = 3;
  1766. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1767. cpu_to_le16((cw_min + 1) / 4 - 1);
  1768. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1769. cpu_to_le16((cw_max + 1) / 2 - 1);
  1770. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1771. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1772. if (is_legacy)
  1773. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1774. cpu_to_le16(3264);
  1775. else
  1776. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1777. cpu_to_le16(1504);
  1778. } else {
  1779. for (i = 1; i < 4; i++) {
  1780. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1781. cpu_to_le16(cw_min);
  1782. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1783. cpu_to_le16(cw_max);
  1784. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1785. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1786. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1787. }
  1788. }
  1789. IWL_DEBUG_QOS("set QoS to default \n");
  1790. spin_unlock_irqrestore(&priv->lock, flags);
  1791. }
  1792. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1793. {
  1794. unsigned long flags;
  1795. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1796. return;
  1797. if (!priv->qos_data.qos_enable)
  1798. return;
  1799. spin_lock_irqsave(&priv->lock, flags);
  1800. priv->qos_data.def_qos_parm.qos_flags = 0;
  1801. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1802. !priv->qos_data.qos_cap.q_AP.txop_request)
  1803. priv->qos_data.def_qos_parm.qos_flags |=
  1804. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1805. if (priv->qos_data.qos_active)
  1806. priv->qos_data.def_qos_parm.qos_flags |=
  1807. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1808. #ifdef CONFIG_IWL4965_HT
  1809. if (priv->current_ht_config.is_ht)
  1810. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1811. #endif /* CONFIG_IWL4965_HT */
  1812. spin_unlock_irqrestore(&priv->lock, flags);
  1813. if (force || iwl4965_is_associated(priv)) {
  1814. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1815. priv->qos_data.qos_active,
  1816. priv->qos_data.def_qos_parm.qos_flags);
  1817. iwl4965_send_qos_params_command(priv,
  1818. &(priv->qos_data.def_qos_parm));
  1819. }
  1820. }
  1821. #endif /* CONFIG_IWL4965_QOS */
  1822. /*
  1823. * Power management (not Tx power!) functions
  1824. */
  1825. #define MSEC_TO_USEC 1024
  1826. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1827. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1828. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1829. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1830. __constant_cpu_to_le32(X1), \
  1831. __constant_cpu_to_le32(X2), \
  1832. __constant_cpu_to_le32(X3), \
  1833. __constant_cpu_to_le32(X4)}
  1834. /* default power management (not Tx power) table values */
  1835. /* for tim 0-10 */
  1836. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1837. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1838. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1839. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1840. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1841. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1842. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1843. };
  1844. /* for tim > 10 */
  1845. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1846. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1847. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1848. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1849. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1850. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1851. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1852. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1853. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1854. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1855. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1856. };
  1857. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1858. {
  1859. int rc = 0, i;
  1860. struct iwl4965_power_mgr *pow_data;
  1861. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1862. u16 pci_pm;
  1863. IWL_DEBUG_POWER("Initialize power \n");
  1864. pow_data = &(priv->power_data);
  1865. memset(pow_data, 0, sizeof(*pow_data));
  1866. pow_data->active_index = IWL_POWER_RANGE_0;
  1867. pow_data->dtim_val = 0xffff;
  1868. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1869. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1870. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1871. if (rc != 0)
  1872. return 0;
  1873. else {
  1874. struct iwl4965_powertable_cmd *cmd;
  1875. IWL_DEBUG_POWER("adjust power command flags\n");
  1876. for (i = 0; i < IWL_POWER_AC; i++) {
  1877. cmd = &pow_data->pwr_range_0[i].cmd;
  1878. if (pci_pm & 0x1)
  1879. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1880. else
  1881. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1882. }
  1883. }
  1884. return rc;
  1885. }
  1886. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1887. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1888. {
  1889. int rc = 0, i;
  1890. u8 skip;
  1891. u32 max_sleep = 0;
  1892. struct iwl4965_power_vec_entry *range;
  1893. u8 period = 0;
  1894. struct iwl4965_power_mgr *pow_data;
  1895. if (mode > IWL_POWER_INDEX_5) {
  1896. IWL_DEBUG_POWER("Error invalid power mode \n");
  1897. return -1;
  1898. }
  1899. pow_data = &(priv->power_data);
  1900. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1901. range = &pow_data->pwr_range_0[0];
  1902. else
  1903. range = &pow_data->pwr_range_1[1];
  1904. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1905. #ifdef IWL_MAC80211_DISABLE
  1906. if (priv->assoc_network != NULL) {
  1907. unsigned long flags;
  1908. period = priv->assoc_network->tim.tim_period;
  1909. }
  1910. #endif /*IWL_MAC80211_DISABLE */
  1911. skip = range[mode].no_dtim;
  1912. if (period == 0) {
  1913. period = 1;
  1914. skip = 0;
  1915. }
  1916. if (skip == 0) {
  1917. max_sleep = period;
  1918. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1919. } else {
  1920. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1921. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1922. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1923. }
  1924. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1925. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1926. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1927. }
  1928. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1929. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1930. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1931. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1932. le32_to_cpu(cmd->sleep_interval[0]),
  1933. le32_to_cpu(cmd->sleep_interval[1]),
  1934. le32_to_cpu(cmd->sleep_interval[2]),
  1935. le32_to_cpu(cmd->sleep_interval[3]),
  1936. le32_to_cpu(cmd->sleep_interval[4]));
  1937. return rc;
  1938. }
  1939. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1940. {
  1941. u32 uninitialized_var(final_mode);
  1942. int rc;
  1943. struct iwl4965_powertable_cmd cmd;
  1944. /* If on battery, set to 3,
  1945. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1946. * else user level */
  1947. switch (mode) {
  1948. case IWL_POWER_BATTERY:
  1949. final_mode = IWL_POWER_INDEX_3;
  1950. break;
  1951. case IWL_POWER_AC:
  1952. final_mode = IWL_POWER_MODE_CAM;
  1953. break;
  1954. default:
  1955. final_mode = mode;
  1956. break;
  1957. }
  1958. cmd.keep_alive_beacons = 0;
  1959. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1960. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1961. if (final_mode == IWL_POWER_MODE_CAM)
  1962. clear_bit(STATUS_POWER_PMI, &priv->status);
  1963. else
  1964. set_bit(STATUS_POWER_PMI, &priv->status);
  1965. return rc;
  1966. }
  1967. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1968. {
  1969. /* Filter incoming packets to determine if they are targeted toward
  1970. * this network, discarding packets coming from ourselves */
  1971. switch (priv->iw_mode) {
  1972. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1973. /* packets from our adapter are dropped (echo) */
  1974. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1975. return 0;
  1976. /* {broad,multi}cast packets to our IBSS go through */
  1977. if (is_multicast_ether_addr(header->addr1))
  1978. return !compare_ether_addr(header->addr3, priv->bssid);
  1979. /* packets to our adapter go through */
  1980. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1981. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1982. /* packets from our adapter are dropped (echo) */
  1983. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1984. return 0;
  1985. /* {broad,multi}cast packets to our BSS go through */
  1986. if (is_multicast_ether_addr(header->addr1))
  1987. return !compare_ether_addr(header->addr2, priv->bssid);
  1988. /* packets to our adapter go through */
  1989. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1990. }
  1991. return 1;
  1992. }
  1993. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1994. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1995. {
  1996. switch (status & TX_STATUS_MSK) {
  1997. case TX_STATUS_SUCCESS:
  1998. return "SUCCESS";
  1999. TX_STATUS_ENTRY(SHORT_LIMIT);
  2000. TX_STATUS_ENTRY(LONG_LIMIT);
  2001. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  2002. TX_STATUS_ENTRY(MGMNT_ABORT);
  2003. TX_STATUS_ENTRY(NEXT_FRAG);
  2004. TX_STATUS_ENTRY(LIFE_EXPIRE);
  2005. TX_STATUS_ENTRY(DEST_PS);
  2006. TX_STATUS_ENTRY(ABORTED);
  2007. TX_STATUS_ENTRY(BT_RETRY);
  2008. TX_STATUS_ENTRY(STA_INVALID);
  2009. TX_STATUS_ENTRY(FRAG_DROPPED);
  2010. TX_STATUS_ENTRY(TID_DISABLE);
  2011. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2012. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2013. TX_STATUS_ENTRY(TX_LOCKED);
  2014. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2015. }
  2016. return "UNKNOWN";
  2017. }
  2018. /**
  2019. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2020. *
  2021. * NOTE: priv->mutex is not required before calling this function
  2022. */
  2023. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2024. {
  2025. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2026. clear_bit(STATUS_SCANNING, &priv->status);
  2027. return 0;
  2028. }
  2029. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2030. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2031. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2032. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2033. queue_work(priv->workqueue, &priv->abort_scan);
  2034. } else
  2035. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2036. return test_bit(STATUS_SCANNING, &priv->status);
  2037. }
  2038. return 0;
  2039. }
  2040. /**
  2041. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2042. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2043. *
  2044. * NOTE: priv->mutex must be held before calling this function
  2045. */
  2046. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2047. {
  2048. unsigned long now = jiffies;
  2049. int ret;
  2050. ret = iwl4965_scan_cancel(priv);
  2051. if (ret && ms) {
  2052. mutex_unlock(&priv->mutex);
  2053. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2054. test_bit(STATUS_SCANNING, &priv->status))
  2055. msleep(1);
  2056. mutex_lock(&priv->mutex);
  2057. return test_bit(STATUS_SCANNING, &priv->status);
  2058. }
  2059. return ret;
  2060. }
  2061. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2062. {
  2063. /* Reset ieee stats */
  2064. /* We don't reset the net_device_stats (ieee->stats) on
  2065. * re-association */
  2066. priv->last_seq_num = -1;
  2067. priv->last_frag_num = -1;
  2068. priv->last_packet_time = 0;
  2069. iwl4965_scan_cancel(priv);
  2070. }
  2071. #define MAX_UCODE_BEACON_INTERVAL 4096
  2072. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2073. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2074. {
  2075. u16 new_val = 0;
  2076. u16 beacon_factor = 0;
  2077. beacon_factor =
  2078. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2079. / MAX_UCODE_BEACON_INTERVAL;
  2080. new_val = beacon_val / beacon_factor;
  2081. return cpu_to_le16(new_val);
  2082. }
  2083. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2084. {
  2085. u64 interval_tm_unit;
  2086. u64 tsf, result;
  2087. unsigned long flags;
  2088. struct ieee80211_conf *conf = NULL;
  2089. u16 beacon_int = 0;
  2090. conf = ieee80211_get_hw_conf(priv->hw);
  2091. spin_lock_irqsave(&priv->lock, flags);
  2092. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2093. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2094. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2095. tsf = priv->timestamp1;
  2096. tsf = ((tsf << 32) | priv->timestamp0);
  2097. beacon_int = priv->beacon_int;
  2098. spin_unlock_irqrestore(&priv->lock, flags);
  2099. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2100. if (beacon_int == 0) {
  2101. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2102. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2103. } else {
  2104. priv->rxon_timing.beacon_interval =
  2105. cpu_to_le16(beacon_int);
  2106. priv->rxon_timing.beacon_interval =
  2107. iwl4965_adjust_beacon_interval(
  2108. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2109. }
  2110. priv->rxon_timing.atim_window = 0;
  2111. } else {
  2112. priv->rxon_timing.beacon_interval =
  2113. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2114. /* TODO: we need to get atim_window from upper stack
  2115. * for now we set to 0 */
  2116. priv->rxon_timing.atim_window = 0;
  2117. }
  2118. interval_tm_unit =
  2119. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2120. result = do_div(tsf, interval_tm_unit);
  2121. priv->rxon_timing.beacon_init_val =
  2122. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2123. IWL_DEBUG_ASSOC
  2124. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2125. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2126. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2127. le16_to_cpu(priv->rxon_timing.atim_window));
  2128. }
  2129. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2130. {
  2131. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2132. IWL_ERROR("APs don't scan.\n");
  2133. return 0;
  2134. }
  2135. if (!iwl4965_is_ready_rf(priv)) {
  2136. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2137. return -EIO;
  2138. }
  2139. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2140. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2141. return -EAGAIN;
  2142. }
  2143. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2144. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2145. "Queuing.\n");
  2146. return -EAGAIN;
  2147. }
  2148. IWL_DEBUG_INFO("Starting scan...\n");
  2149. priv->scan_bands = 2;
  2150. set_bit(STATUS_SCANNING, &priv->status);
  2151. priv->scan_start = jiffies;
  2152. priv->scan_pass_start = priv->scan_start;
  2153. queue_work(priv->workqueue, &priv->request_scan);
  2154. return 0;
  2155. }
  2156. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2157. {
  2158. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2159. if (hw_decrypt)
  2160. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2161. else
  2162. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2163. return 0;
  2164. }
  2165. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2166. {
  2167. if (phymode == MODE_IEEE80211A) {
  2168. priv->staging_rxon.flags &=
  2169. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2170. | RXON_FLG_CCK_MSK);
  2171. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2172. } else {
  2173. /* Copied from iwl4965_bg_post_associate() */
  2174. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2175. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2176. else
  2177. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2178. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2179. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2180. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2181. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2182. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2183. }
  2184. }
  2185. /*
  2186. * initialize rxon structure with default values from eeprom
  2187. */
  2188. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2189. {
  2190. const struct iwl4965_channel_info *ch_info;
  2191. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2192. switch (priv->iw_mode) {
  2193. case IEEE80211_IF_TYPE_AP:
  2194. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2195. break;
  2196. case IEEE80211_IF_TYPE_STA:
  2197. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2198. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2199. break;
  2200. case IEEE80211_IF_TYPE_IBSS:
  2201. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2202. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2203. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2204. RXON_FILTER_ACCEPT_GRP_MSK;
  2205. break;
  2206. case IEEE80211_IF_TYPE_MNTR:
  2207. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2208. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2209. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2210. break;
  2211. }
  2212. #if 0
  2213. /* TODO: Figure out when short_preamble would be set and cache from
  2214. * that */
  2215. if (!hw_to_local(priv->hw)->short_preamble)
  2216. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2217. else
  2218. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2219. #endif
  2220. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2221. le16_to_cpu(priv->staging_rxon.channel));
  2222. if (!ch_info)
  2223. ch_info = &priv->channel_info[0];
  2224. /*
  2225. * in some case A channels are all non IBSS
  2226. * in this case force B/G channel
  2227. */
  2228. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2229. !(is_channel_ibss(ch_info)))
  2230. ch_info = &priv->channel_info[0];
  2231. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2232. if (is_channel_a_band(ch_info))
  2233. priv->phymode = MODE_IEEE80211A;
  2234. else
  2235. priv->phymode = MODE_IEEE80211G;
  2236. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2237. priv->staging_rxon.ofdm_basic_rates =
  2238. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2239. priv->staging_rxon.cck_basic_rates =
  2240. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2241. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2242. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2243. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2244. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2245. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2246. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2247. iwl4965_set_rxon_chain(priv);
  2248. }
  2249. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2250. {
  2251. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2252. const struct iwl4965_channel_info *ch_info;
  2253. ch_info = iwl4965_get_channel_info(priv,
  2254. priv->phymode,
  2255. le16_to_cpu(priv->staging_rxon.channel));
  2256. if (!ch_info || !is_channel_ibss(ch_info)) {
  2257. IWL_ERROR("channel %d not IBSS channel\n",
  2258. le16_to_cpu(priv->staging_rxon.channel));
  2259. return -EINVAL;
  2260. }
  2261. }
  2262. priv->iw_mode = mode;
  2263. iwl4965_connection_init_rx_config(priv);
  2264. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2265. iwl4965_clear_stations_table(priv);
  2266. /* dont commit rxon if rf-kill is on*/
  2267. if (!iwl4965_is_ready_rf(priv))
  2268. return -EAGAIN;
  2269. cancel_delayed_work(&priv->scan_check);
  2270. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2271. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2272. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2273. return -EAGAIN;
  2274. }
  2275. iwl4965_commit_rxon(priv);
  2276. return 0;
  2277. }
  2278. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2279. struct ieee80211_tx_control *ctl,
  2280. struct iwl4965_cmd *cmd,
  2281. struct sk_buff *skb_frag,
  2282. int last_frag)
  2283. {
  2284. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2285. switch (keyinfo->alg) {
  2286. case ALG_CCMP:
  2287. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2288. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2289. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2290. break;
  2291. case ALG_TKIP:
  2292. #if 0
  2293. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2294. if (last_frag)
  2295. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2296. 8);
  2297. else
  2298. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2299. #endif
  2300. break;
  2301. case ALG_WEP:
  2302. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2303. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2304. if (keyinfo->keylen == 13)
  2305. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2306. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2307. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2308. "with key %d\n", ctl->key_idx);
  2309. break;
  2310. default:
  2311. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2312. break;
  2313. }
  2314. }
  2315. /*
  2316. * handle build REPLY_TX command notification.
  2317. */
  2318. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2319. struct iwl4965_cmd *cmd,
  2320. struct ieee80211_tx_control *ctrl,
  2321. struct ieee80211_hdr *hdr,
  2322. int is_unicast, u8 std_id)
  2323. {
  2324. __le16 *qc;
  2325. u16 fc = le16_to_cpu(hdr->frame_control);
  2326. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2327. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2328. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2329. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2330. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2331. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2332. if (ieee80211_is_probe_response(fc) &&
  2333. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2334. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2335. } else {
  2336. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2337. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2338. }
  2339. if (ieee80211_is_back_request(fc))
  2340. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2341. cmd->cmd.tx.sta_id = std_id;
  2342. if (ieee80211_get_morefrag(hdr))
  2343. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2344. qc = ieee80211_get_qos_ctrl(hdr);
  2345. if (qc) {
  2346. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2347. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2348. } else
  2349. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2350. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2351. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2352. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2353. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2354. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2355. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2356. }
  2357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2360. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2361. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2362. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2363. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2364. else
  2365. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2366. } else
  2367. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2368. cmd->cmd.tx.driver_txop = 0;
  2369. cmd->cmd.tx.tx_flags = tx_flags;
  2370. cmd->cmd.tx.next_frame_len = 0;
  2371. }
  2372. /**
  2373. * iwl4965_get_sta_id - Find station's index within station table
  2374. *
  2375. * If new IBSS station, create new entry in station table
  2376. */
  2377. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2378. struct ieee80211_hdr *hdr)
  2379. {
  2380. int sta_id;
  2381. u16 fc = le16_to_cpu(hdr->frame_control);
  2382. DECLARE_MAC_BUF(mac);
  2383. /* If this frame is broadcast or management, use broadcast station id */
  2384. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2385. is_multicast_ether_addr(hdr->addr1))
  2386. return priv->hw_setting.bcast_sta_id;
  2387. switch (priv->iw_mode) {
  2388. /* If we are a client station in a BSS network, use the special
  2389. * AP station entry (that's the only station we communicate with) */
  2390. case IEEE80211_IF_TYPE_STA:
  2391. return IWL_AP_ID;
  2392. /* If we are an AP, then find the station, or use BCAST */
  2393. case IEEE80211_IF_TYPE_AP:
  2394. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2395. if (sta_id != IWL_INVALID_STATION)
  2396. return sta_id;
  2397. return priv->hw_setting.bcast_sta_id;
  2398. /* If this frame is going out to an IBSS network, find the station,
  2399. * or create a new station table entry */
  2400. case IEEE80211_IF_TYPE_IBSS:
  2401. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2402. if (sta_id != IWL_INVALID_STATION)
  2403. return sta_id;
  2404. /* Create new station table entry */
  2405. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2406. 0, CMD_ASYNC, NULL);
  2407. if (sta_id != IWL_INVALID_STATION)
  2408. return sta_id;
  2409. IWL_DEBUG_DROP("Station %s not in station map. "
  2410. "Defaulting to broadcast...\n",
  2411. print_mac(mac, hdr->addr1));
  2412. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2413. return priv->hw_setting.bcast_sta_id;
  2414. default:
  2415. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2416. return priv->hw_setting.bcast_sta_id;
  2417. }
  2418. }
  2419. /*
  2420. * start REPLY_TX command process
  2421. */
  2422. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2423. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2424. {
  2425. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2426. struct iwl4965_tfd_frame *tfd;
  2427. u32 *control_flags;
  2428. int txq_id = ctl->queue;
  2429. struct iwl4965_tx_queue *txq = NULL;
  2430. struct iwl4965_queue *q = NULL;
  2431. dma_addr_t phys_addr;
  2432. dma_addr_t txcmd_phys;
  2433. dma_addr_t scratch_phys;
  2434. struct iwl4965_cmd *out_cmd = NULL;
  2435. u16 len, idx, len_org;
  2436. u8 id, hdr_len, unicast;
  2437. u8 sta_id;
  2438. u16 seq_number = 0;
  2439. u16 fc;
  2440. __le16 *qc;
  2441. u8 wait_write_ptr = 0;
  2442. unsigned long flags;
  2443. int rc;
  2444. spin_lock_irqsave(&priv->lock, flags);
  2445. if (iwl4965_is_rfkill(priv)) {
  2446. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2447. goto drop_unlock;
  2448. }
  2449. if (!priv->vif) {
  2450. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2451. goto drop_unlock;
  2452. }
  2453. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2454. IWL_ERROR("ERROR: No TX rate available.\n");
  2455. goto drop_unlock;
  2456. }
  2457. unicast = !is_multicast_ether_addr(hdr->addr1);
  2458. id = 0;
  2459. fc = le16_to_cpu(hdr->frame_control);
  2460. #ifdef CONFIG_IWL4965_DEBUG
  2461. if (ieee80211_is_auth(fc))
  2462. IWL_DEBUG_TX("Sending AUTH frame\n");
  2463. else if (ieee80211_is_assoc_request(fc))
  2464. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2465. else if (ieee80211_is_reassoc_request(fc))
  2466. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2467. #endif
  2468. /* drop all data frame if we are not associated */
  2469. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2470. (!iwl4965_is_associated(priv) ||
  2471. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2472. !priv->assoc_station_added)) {
  2473. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2474. goto drop_unlock;
  2475. }
  2476. spin_unlock_irqrestore(&priv->lock, flags);
  2477. hdr_len = ieee80211_get_hdrlen(fc);
  2478. /* Find (or create) index into station table for destination station */
  2479. sta_id = iwl4965_get_sta_id(priv, hdr);
  2480. if (sta_id == IWL_INVALID_STATION) {
  2481. DECLARE_MAC_BUF(mac);
  2482. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2483. print_mac(mac, hdr->addr1));
  2484. goto drop;
  2485. }
  2486. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2487. qc = ieee80211_get_qos_ctrl(hdr);
  2488. if (qc) {
  2489. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2490. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2491. IEEE80211_SCTL_SEQ;
  2492. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2493. (hdr->seq_ctrl &
  2494. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2495. seq_number += 0x10;
  2496. #ifdef CONFIG_IWL4965_HT
  2497. /* aggregation is on for this <sta,tid> */
  2498. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2499. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2500. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2501. #endif /* CONFIG_IWL4965_HT */
  2502. }
  2503. /* Descriptor for chosen Tx queue */
  2504. txq = &priv->txq[txq_id];
  2505. q = &txq->q;
  2506. spin_lock_irqsave(&priv->lock, flags);
  2507. /* Set up first empty TFD within this queue's circular TFD buffer */
  2508. tfd = &txq->bd[q->write_ptr];
  2509. memset(tfd, 0, sizeof(*tfd));
  2510. control_flags = (u32 *) tfd;
  2511. idx = get_cmd_index(q, q->write_ptr, 0);
  2512. /* Set up driver data for this TFD */
  2513. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2514. txq->txb[q->write_ptr].skb[0] = skb;
  2515. memcpy(&(txq->txb[q->write_ptr].status.control),
  2516. ctl, sizeof(struct ieee80211_tx_control));
  2517. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2518. out_cmd = &txq->cmd[idx];
  2519. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2520. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2521. /*
  2522. * Set up the Tx-command (not MAC!) header.
  2523. * Store the chosen Tx queue and TFD index within the sequence field;
  2524. * after Tx, uCode's Tx response will return this value so driver can
  2525. * locate the frame within the tx queue and do post-tx processing.
  2526. */
  2527. out_cmd->hdr.cmd = REPLY_TX;
  2528. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2529. INDEX_TO_SEQ(q->write_ptr)));
  2530. /* Copy MAC header from skb into command buffer */
  2531. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2532. /*
  2533. * Use the first empty entry in this queue's command buffer array
  2534. * to contain the Tx command and MAC header concatenated together
  2535. * (payload data will be in another buffer).
  2536. * Size of this varies, due to varying MAC header length.
  2537. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2538. * of the MAC header (device reads on dword boundaries).
  2539. * We'll tell device about this padding later.
  2540. */
  2541. len = priv->hw_setting.tx_cmd_len +
  2542. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2543. len_org = len;
  2544. len = (len + 3) & ~3;
  2545. if (len_org != len)
  2546. len_org = 1;
  2547. else
  2548. len_org = 0;
  2549. /* Physical address of this Tx command's header (not MAC header!),
  2550. * within command buffer array. */
  2551. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2552. offsetof(struct iwl4965_cmd, hdr);
  2553. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2554. * first entry */
  2555. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2556. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2557. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2558. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2559. * if any (802.11 null frames have no payload). */
  2560. len = skb->len - hdr_len;
  2561. if (len) {
  2562. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2563. len, PCI_DMA_TODEVICE);
  2564. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2565. }
  2566. /* Tell 4965 about any 2-byte padding after MAC header */
  2567. if (len_org)
  2568. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2569. /* Total # bytes to be transmitted */
  2570. len = (u16)skb->len;
  2571. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2572. /* TODO need this for burst mode later on */
  2573. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2574. /* set is_hcca to 0; it probably will never be implemented */
  2575. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2576. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2577. offsetof(struct iwl4965_tx_cmd, scratch);
  2578. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2579. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2580. #ifdef CONFIG_IWL4965_HT_AGG
  2581. #ifdef CONFIG_IWL4965_HT
  2582. /* TODO: move this functionality to rate scaling */
  2583. iwl4965_tl_get_stats(priv, hdr);
  2584. #endif /* CONFIG_IWL4965_HT_AGG */
  2585. #endif /*CONFIG_IWL4965_HT */
  2586. if (!ieee80211_get_morefrag(hdr)) {
  2587. txq->need_update = 1;
  2588. if (qc) {
  2589. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2590. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2591. }
  2592. } else {
  2593. wait_write_ptr = 1;
  2594. txq->need_update = 0;
  2595. }
  2596. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2597. sizeof(out_cmd->cmd.tx));
  2598. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2599. ieee80211_get_hdrlen(fc));
  2600. /* Set up entry for this TFD in Tx byte-count array */
  2601. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2602. /* Tell device the write index *just past* this latest filled TFD */
  2603. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2604. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2605. spin_unlock_irqrestore(&priv->lock, flags);
  2606. if (rc)
  2607. return rc;
  2608. if ((iwl4965_queue_space(q) < q->high_mark)
  2609. && priv->mac80211_registered) {
  2610. if (wait_write_ptr) {
  2611. spin_lock_irqsave(&priv->lock, flags);
  2612. txq->need_update = 1;
  2613. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2614. spin_unlock_irqrestore(&priv->lock, flags);
  2615. }
  2616. ieee80211_stop_queue(priv->hw, ctl->queue);
  2617. }
  2618. return 0;
  2619. drop_unlock:
  2620. spin_unlock_irqrestore(&priv->lock, flags);
  2621. drop:
  2622. return -1;
  2623. }
  2624. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2625. {
  2626. const struct ieee80211_hw_mode *hw = NULL;
  2627. struct ieee80211_rate *rate;
  2628. int i;
  2629. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2630. if (!hw) {
  2631. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2632. return;
  2633. }
  2634. priv->active_rate = 0;
  2635. priv->active_rate_basic = 0;
  2636. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2637. hw->mode == MODE_IEEE80211A ?
  2638. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2639. for (i = 0; i < hw->num_rates; i++) {
  2640. rate = &(hw->rates[i]);
  2641. if ((rate->val < IWL_RATE_COUNT) &&
  2642. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2643. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2644. rate->val, iwl4965_rates[rate->val].plcp,
  2645. (rate->flags & IEEE80211_RATE_BASIC) ?
  2646. "*" : "");
  2647. priv->active_rate |= (1 << rate->val);
  2648. if (rate->flags & IEEE80211_RATE_BASIC)
  2649. priv->active_rate_basic |= (1 << rate->val);
  2650. } else
  2651. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2652. rate->val, iwl4965_rates[rate->val].plcp);
  2653. }
  2654. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2655. priv->active_rate, priv->active_rate_basic);
  2656. /*
  2657. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2658. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2659. * OFDM
  2660. */
  2661. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2662. priv->staging_rxon.cck_basic_rates =
  2663. ((priv->active_rate_basic &
  2664. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2665. else
  2666. priv->staging_rxon.cck_basic_rates =
  2667. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2668. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2669. priv->staging_rxon.ofdm_basic_rates =
  2670. ((priv->active_rate_basic &
  2671. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2672. IWL_FIRST_OFDM_RATE) & 0xFF;
  2673. else
  2674. priv->staging_rxon.ofdm_basic_rates =
  2675. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2676. }
  2677. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2678. {
  2679. unsigned long flags;
  2680. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2681. return;
  2682. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2683. disable_radio ? "OFF" : "ON");
  2684. if (disable_radio) {
  2685. iwl4965_scan_cancel(priv);
  2686. /* FIXME: This is a workaround for AP */
  2687. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2688. spin_lock_irqsave(&priv->lock, flags);
  2689. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2690. CSR_UCODE_SW_BIT_RFKILL);
  2691. spin_unlock_irqrestore(&priv->lock, flags);
  2692. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2693. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2694. }
  2695. return;
  2696. }
  2697. spin_lock_irqsave(&priv->lock, flags);
  2698. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2699. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2700. spin_unlock_irqrestore(&priv->lock, flags);
  2701. /* wake up ucode */
  2702. msleep(10);
  2703. spin_lock_irqsave(&priv->lock, flags);
  2704. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2705. if (!iwl4965_grab_nic_access(priv))
  2706. iwl4965_release_nic_access(priv);
  2707. spin_unlock_irqrestore(&priv->lock, flags);
  2708. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2709. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2710. "disabled by HW switch\n");
  2711. return;
  2712. }
  2713. queue_work(priv->workqueue, &priv->restart);
  2714. return;
  2715. }
  2716. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2717. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2718. {
  2719. u16 fc =
  2720. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2721. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2722. return;
  2723. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2724. return;
  2725. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2726. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2727. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2728. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2729. RX_RES_STATUS_BAD_ICV_MIC)
  2730. stats->flag |= RX_FLAG_MMIC_ERROR;
  2731. case RX_RES_STATUS_SEC_TYPE_WEP:
  2732. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2733. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2734. RX_RES_STATUS_DECRYPT_OK) {
  2735. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2736. stats->flag |= RX_FLAG_DECRYPTED;
  2737. }
  2738. break;
  2739. default:
  2740. break;
  2741. }
  2742. }
  2743. #define IWL_PACKET_RETRY_TIME HZ
  2744. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2745. {
  2746. u16 sc = le16_to_cpu(header->seq_ctrl);
  2747. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2748. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2749. u16 *last_seq, *last_frag;
  2750. unsigned long *last_time;
  2751. switch (priv->iw_mode) {
  2752. case IEEE80211_IF_TYPE_IBSS:{
  2753. struct list_head *p;
  2754. struct iwl4965_ibss_seq *entry = NULL;
  2755. u8 *mac = header->addr2;
  2756. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2757. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2758. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2759. if (!compare_ether_addr(entry->mac, mac))
  2760. break;
  2761. }
  2762. if (p == &priv->ibss_mac_hash[index]) {
  2763. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2764. if (!entry) {
  2765. IWL_ERROR("Cannot malloc new mac entry\n");
  2766. return 0;
  2767. }
  2768. memcpy(entry->mac, mac, ETH_ALEN);
  2769. entry->seq_num = seq;
  2770. entry->frag_num = frag;
  2771. entry->packet_time = jiffies;
  2772. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2773. return 0;
  2774. }
  2775. last_seq = &entry->seq_num;
  2776. last_frag = &entry->frag_num;
  2777. last_time = &entry->packet_time;
  2778. break;
  2779. }
  2780. case IEEE80211_IF_TYPE_STA:
  2781. last_seq = &priv->last_seq_num;
  2782. last_frag = &priv->last_frag_num;
  2783. last_time = &priv->last_packet_time;
  2784. break;
  2785. default:
  2786. return 0;
  2787. }
  2788. if ((*last_seq == seq) &&
  2789. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2790. if (*last_frag == frag)
  2791. goto drop;
  2792. if (*last_frag + 1 != frag)
  2793. /* out-of-order fragment */
  2794. goto drop;
  2795. } else
  2796. *last_seq = seq;
  2797. *last_frag = frag;
  2798. *last_time = jiffies;
  2799. return 0;
  2800. drop:
  2801. return 1;
  2802. }
  2803. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2804. #include "iwl-spectrum.h"
  2805. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2806. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2807. #define TIME_UNIT 1024
  2808. /*
  2809. * extended beacon time format
  2810. * time in usec will be changed into a 32-bit value in 8:24 format
  2811. * the high 1 byte is the beacon counts
  2812. * the lower 3 bytes is the time in usec within one beacon interval
  2813. */
  2814. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2815. {
  2816. u32 quot;
  2817. u32 rem;
  2818. u32 interval = beacon_interval * 1024;
  2819. if (!interval || !usec)
  2820. return 0;
  2821. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2822. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2823. return (quot << 24) + rem;
  2824. }
  2825. /* base is usually what we get from ucode with each received frame,
  2826. * the same as HW timer counter counting down
  2827. */
  2828. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2829. {
  2830. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2831. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2832. u32 interval = beacon_interval * TIME_UNIT;
  2833. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2834. (addon & BEACON_TIME_MASK_HIGH);
  2835. if (base_low > addon_low)
  2836. res += base_low - addon_low;
  2837. else if (base_low < addon_low) {
  2838. res += interval + base_low - addon_low;
  2839. res += (1 << 24);
  2840. } else
  2841. res += (1 << 24);
  2842. return cpu_to_le32(res);
  2843. }
  2844. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2845. struct ieee80211_measurement_params *params,
  2846. u8 type)
  2847. {
  2848. struct iwl4965_spectrum_cmd spectrum;
  2849. struct iwl4965_rx_packet *res;
  2850. struct iwl4965_host_cmd cmd = {
  2851. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2852. .data = (void *)&spectrum,
  2853. .meta.flags = CMD_WANT_SKB,
  2854. };
  2855. u32 add_time = le64_to_cpu(params->start_time);
  2856. int rc;
  2857. int spectrum_resp_status;
  2858. int duration = le16_to_cpu(params->duration);
  2859. if (iwl4965_is_associated(priv))
  2860. add_time =
  2861. iwl4965_usecs_to_beacons(
  2862. le64_to_cpu(params->start_time) - priv->last_tsf,
  2863. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2864. memset(&spectrum, 0, sizeof(spectrum));
  2865. spectrum.channel_count = cpu_to_le16(1);
  2866. spectrum.flags =
  2867. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2868. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2869. cmd.len = sizeof(spectrum);
  2870. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2871. if (iwl4965_is_associated(priv))
  2872. spectrum.start_time =
  2873. iwl4965_add_beacon_time(priv->last_beacon_time,
  2874. add_time,
  2875. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2876. else
  2877. spectrum.start_time = 0;
  2878. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2879. spectrum.channels[0].channel = params->channel;
  2880. spectrum.channels[0].type = type;
  2881. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2882. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2883. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2884. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2885. if (rc)
  2886. return rc;
  2887. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2888. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2889. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2890. rc = -EIO;
  2891. }
  2892. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2893. switch (spectrum_resp_status) {
  2894. case 0: /* Command will be handled */
  2895. if (res->u.spectrum.id != 0xff) {
  2896. IWL_DEBUG_INFO
  2897. ("Replaced existing measurement: %d\n",
  2898. res->u.spectrum.id);
  2899. priv->measurement_status &= ~MEASUREMENT_READY;
  2900. }
  2901. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2902. rc = 0;
  2903. break;
  2904. case 1: /* Command will not be handled */
  2905. rc = -EAGAIN;
  2906. break;
  2907. }
  2908. dev_kfree_skb_any(cmd.meta.u.skb);
  2909. return rc;
  2910. }
  2911. #endif
  2912. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2913. struct iwl4965_tx_info *tx_sta)
  2914. {
  2915. tx_sta->status.ack_signal = 0;
  2916. tx_sta->status.excessive_retries = 0;
  2917. tx_sta->status.queue_length = 0;
  2918. tx_sta->status.queue_number = 0;
  2919. if (in_interrupt())
  2920. ieee80211_tx_status_irqsafe(priv->hw,
  2921. tx_sta->skb[0], &(tx_sta->status));
  2922. else
  2923. ieee80211_tx_status(priv->hw,
  2924. tx_sta->skb[0], &(tx_sta->status));
  2925. tx_sta->skb[0] = NULL;
  2926. }
  2927. /**
  2928. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2929. *
  2930. * When FW advances 'R' index, all entries between old and new 'R' index
  2931. * need to be reclaimed. As result, some free space forms. If there is
  2932. * enough free space (> low mark), wake the stack that feeds us.
  2933. */
  2934. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2935. {
  2936. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2937. struct iwl4965_queue *q = &txq->q;
  2938. int nfreed = 0;
  2939. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2940. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2941. "is out of range [0-%d] %d %d.\n", txq_id,
  2942. index, q->n_bd, q->write_ptr, q->read_ptr);
  2943. return 0;
  2944. }
  2945. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2946. q->read_ptr != index;
  2947. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2948. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2949. iwl4965_txstatus_to_ieee(priv,
  2950. &(txq->txb[txq->q.read_ptr]));
  2951. iwl4965_hw_txq_free_tfd(priv, txq);
  2952. } else if (nfreed > 1) {
  2953. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2954. q->write_ptr, q->read_ptr);
  2955. queue_work(priv->workqueue, &priv->restart);
  2956. }
  2957. nfreed++;
  2958. }
  2959. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2960. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2961. priv->mac80211_registered)
  2962. ieee80211_wake_queue(priv->hw, txq_id); */
  2963. return nfreed;
  2964. }
  2965. static int iwl4965_is_tx_success(u32 status)
  2966. {
  2967. status &= TX_STATUS_MSK;
  2968. return (status == TX_STATUS_SUCCESS)
  2969. || (status == TX_STATUS_DIRECT_DONE);
  2970. }
  2971. /******************************************************************************
  2972. *
  2973. * Generic RX handler implementations
  2974. *
  2975. ******************************************************************************/
  2976. #ifdef CONFIG_IWL4965_HT
  2977. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2978. struct ieee80211_hdr *hdr)
  2979. {
  2980. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2981. return IWL_AP_ID;
  2982. else {
  2983. u8 *da = ieee80211_get_DA(hdr);
  2984. return iwl4965_hw_find_station(priv, da);
  2985. }
  2986. }
  2987. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2988. struct iwl4965_priv *priv, int txq_id, int idx)
  2989. {
  2990. if (priv->txq[txq_id].txb[idx].skb[0])
  2991. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2992. txb[idx].skb[0]->data;
  2993. return NULL;
  2994. }
  2995. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2996. {
  2997. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2998. tx_resp->frame_count);
  2999. return le32_to_cpu(*scd_ssn) & MAX_SN;
  3000. }
  3001. /**
  3002. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  3003. */
  3004. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  3005. struct iwl4965_ht_agg *agg,
  3006. struct iwl4965_tx_resp_agg *tx_resp,
  3007. u16 start_idx)
  3008. {
  3009. u16 status;
  3010. struct agg_tx_status *frame_status = &tx_resp->status;
  3011. struct ieee80211_tx_status *tx_status = NULL;
  3012. struct ieee80211_hdr *hdr = NULL;
  3013. int i, sh;
  3014. int txq_id, idx;
  3015. u16 seq;
  3016. if (agg->wait_for_ba)
  3017. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3018. agg->frame_count = tx_resp->frame_count;
  3019. agg->start_idx = start_idx;
  3020. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3021. agg->bitmap = 0;
  3022. /* # frames attempted by Tx command */
  3023. if (agg->frame_count == 1) {
  3024. /* Only one frame was attempted; no block-ack will arrive */
  3025. status = le16_to_cpu(frame_status[0].status);
  3026. seq = le16_to_cpu(frame_status[0].sequence);
  3027. idx = SEQ_TO_INDEX(seq);
  3028. txq_id = SEQ_TO_QUEUE(seq);
  3029. /* FIXME: code repetition */
  3030. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  3031. agg->frame_count, agg->start_idx, idx);
  3032. tx_status = &(priv->txq[txq_id].txb[idx].status);
  3033. tx_status->retry_count = tx_resp->failure_frame;
  3034. tx_status->queue_number = status & 0xff;
  3035. tx_status->queue_length = tx_resp->failure_rts;
  3036. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  3037. tx_status->flags = iwl4965_is_tx_success(status)?
  3038. IEEE80211_TX_STATUS_ACK : 0;
  3039. tx_status->control.tx_rate =
  3040. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3041. /* FIXME: code repetition end */
  3042. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3043. status & 0xff, tx_resp->failure_frame);
  3044. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3045. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3046. agg->wait_for_ba = 0;
  3047. } else {
  3048. /* Two or more frames were attempted; expect block-ack */
  3049. u64 bitmap = 0;
  3050. int start = agg->start_idx;
  3051. /* Construct bit-map of pending frames within Tx window */
  3052. for (i = 0; i < agg->frame_count; i++) {
  3053. u16 sc;
  3054. status = le16_to_cpu(frame_status[i].status);
  3055. seq = le16_to_cpu(frame_status[i].sequence);
  3056. idx = SEQ_TO_INDEX(seq);
  3057. txq_id = SEQ_TO_QUEUE(seq);
  3058. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3059. AGG_TX_STATE_ABORT_MSK))
  3060. continue;
  3061. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3062. agg->frame_count, txq_id, idx);
  3063. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3064. sc = le16_to_cpu(hdr->seq_ctrl);
  3065. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3066. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3067. " idx=%d, seq_idx=%d, seq=%d\n",
  3068. idx, SEQ_TO_SN(sc),
  3069. hdr->seq_ctrl);
  3070. return -1;
  3071. }
  3072. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3073. i, idx, SEQ_TO_SN(sc));
  3074. sh = idx - start;
  3075. if (sh > 64) {
  3076. sh = (start - idx) + 0xff;
  3077. bitmap = bitmap << sh;
  3078. sh = 0;
  3079. start = idx;
  3080. } else if (sh < -64)
  3081. sh = 0xff - (start - idx);
  3082. else if (sh < 0) {
  3083. sh = start - idx;
  3084. start = idx;
  3085. bitmap = bitmap << sh;
  3086. sh = 0;
  3087. }
  3088. bitmap |= (1 << sh);
  3089. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3090. start, (u32)(bitmap & 0xFFFFFFFF));
  3091. }
  3092. agg->bitmap = bitmap;
  3093. agg->start_idx = start;
  3094. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3095. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  3096. agg->frame_count, agg->start_idx,
  3097. agg->bitmap);
  3098. if (bitmap)
  3099. agg->wait_for_ba = 1;
  3100. }
  3101. return 0;
  3102. }
  3103. #endif
  3104. /**
  3105. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3106. */
  3107. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3108. struct iwl4965_rx_mem_buffer *rxb)
  3109. {
  3110. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3111. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3112. int txq_id = SEQ_TO_QUEUE(sequence);
  3113. int index = SEQ_TO_INDEX(sequence);
  3114. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3115. struct ieee80211_tx_status *tx_status;
  3116. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3117. u32 status = le32_to_cpu(tx_resp->status);
  3118. #ifdef CONFIG_IWL4965_HT
  3119. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  3120. struct ieee80211_hdr *hdr;
  3121. __le16 *qc;
  3122. #endif
  3123. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3124. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3125. "is out of range [0-%d] %d %d\n", txq_id,
  3126. index, txq->q.n_bd, txq->q.write_ptr,
  3127. txq->q.read_ptr);
  3128. return;
  3129. }
  3130. #ifdef CONFIG_IWL4965_HT
  3131. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3132. qc = ieee80211_get_qos_ctrl(hdr);
  3133. if (qc)
  3134. tid = le16_to_cpu(*qc) & 0xf;
  3135. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3136. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  3137. IWL_ERROR("Station not known\n");
  3138. return;
  3139. }
  3140. if (txq->sched_retry) {
  3141. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3142. struct iwl4965_ht_agg *agg = NULL;
  3143. if (!qc)
  3144. return;
  3145. agg = &priv->stations[sta_id].tid[tid].agg;
  3146. iwl4965_tx_status_reply_tx(priv, agg,
  3147. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  3148. if ((tx_resp->frame_count == 1) &&
  3149. !iwl4965_is_tx_success(status)) {
  3150. /* TODO: send BAR */
  3151. }
  3152. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  3153. int freed;
  3154. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3155. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3156. "%d index %d\n", scd_ssn , index);
  3157. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3158. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3159. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3160. txq_id >= 0 && priv->mac80211_registered &&
  3161. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3162. ieee80211_wake_queue(priv->hw, txq_id);
  3163. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3164. }
  3165. } else {
  3166. #endif /* CONFIG_IWL4965_HT */
  3167. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3168. tx_status->retry_count = tx_resp->failure_frame;
  3169. tx_status->queue_number = status;
  3170. tx_status->queue_length = tx_resp->bt_kill_count;
  3171. tx_status->queue_length |= tx_resp->failure_rts;
  3172. tx_status->flags =
  3173. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3174. tx_status->control.tx_rate =
  3175. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3176. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3177. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3178. status, le32_to_cpu(tx_resp->rate_n_flags),
  3179. tx_resp->failure_frame);
  3180. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3181. if (index != -1) {
  3182. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3183. #ifdef CONFIG_IWL4965_HT
  3184. if (tid != MAX_TID_COUNT)
  3185. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3186. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3187. (txq_id >= 0) &&
  3188. priv->mac80211_registered)
  3189. ieee80211_wake_queue(priv->hw, txq_id);
  3190. if (tid != MAX_TID_COUNT)
  3191. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3192. #endif
  3193. }
  3194. #ifdef CONFIG_IWL4965_HT
  3195. }
  3196. #endif /* CONFIG_IWL4965_HT */
  3197. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3198. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3199. }
  3200. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3201. struct iwl4965_rx_mem_buffer *rxb)
  3202. {
  3203. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3204. struct iwl4965_alive_resp *palive;
  3205. struct delayed_work *pwork;
  3206. palive = &pkt->u.alive_frame;
  3207. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3208. "0x%01X 0x%01X\n",
  3209. palive->is_valid, palive->ver_type,
  3210. palive->ver_subtype);
  3211. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3212. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3213. memcpy(&priv->card_alive_init,
  3214. &pkt->u.alive_frame,
  3215. sizeof(struct iwl4965_init_alive_resp));
  3216. pwork = &priv->init_alive_start;
  3217. } else {
  3218. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3219. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3220. sizeof(struct iwl4965_alive_resp));
  3221. pwork = &priv->alive_start;
  3222. }
  3223. /* We delay the ALIVE response by 5ms to
  3224. * give the HW RF Kill time to activate... */
  3225. if (palive->is_valid == UCODE_VALID_OK)
  3226. queue_delayed_work(priv->workqueue, pwork,
  3227. msecs_to_jiffies(5));
  3228. else
  3229. IWL_WARNING("uCode did not respond OK.\n");
  3230. }
  3231. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3232. struct iwl4965_rx_mem_buffer *rxb)
  3233. {
  3234. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3235. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3236. return;
  3237. }
  3238. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3239. struct iwl4965_rx_mem_buffer *rxb)
  3240. {
  3241. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3242. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3243. "seq 0x%04X ser 0x%08X\n",
  3244. le32_to_cpu(pkt->u.err_resp.error_type),
  3245. get_cmd_string(pkt->u.err_resp.cmd_id),
  3246. pkt->u.err_resp.cmd_id,
  3247. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3248. le32_to_cpu(pkt->u.err_resp.error_info));
  3249. }
  3250. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3251. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3252. {
  3253. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3254. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3255. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3256. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3257. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3258. rxon->channel = csa->channel;
  3259. priv->staging_rxon.channel = csa->channel;
  3260. }
  3261. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3262. struct iwl4965_rx_mem_buffer *rxb)
  3263. {
  3264. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3265. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3266. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3267. if (!report->state) {
  3268. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3269. "Spectrum Measure Notification: Start\n");
  3270. return;
  3271. }
  3272. memcpy(&priv->measure_report, report, sizeof(*report));
  3273. priv->measurement_status |= MEASUREMENT_READY;
  3274. #endif
  3275. }
  3276. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3277. struct iwl4965_rx_mem_buffer *rxb)
  3278. {
  3279. #ifdef CONFIG_IWL4965_DEBUG
  3280. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3281. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3282. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3283. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3284. #endif
  3285. }
  3286. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3287. struct iwl4965_rx_mem_buffer *rxb)
  3288. {
  3289. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3290. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3291. "notification for %s:\n",
  3292. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3293. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3294. }
  3295. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3296. {
  3297. struct iwl4965_priv *priv =
  3298. container_of(work, struct iwl4965_priv, beacon_update);
  3299. struct sk_buff *beacon;
  3300. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3301. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3302. if (!beacon) {
  3303. IWL_ERROR("update beacon failed\n");
  3304. return;
  3305. }
  3306. mutex_lock(&priv->mutex);
  3307. /* new beacon skb is allocated every time; dispose previous.*/
  3308. if (priv->ibss_beacon)
  3309. dev_kfree_skb(priv->ibss_beacon);
  3310. priv->ibss_beacon = beacon;
  3311. mutex_unlock(&priv->mutex);
  3312. iwl4965_send_beacon_cmd(priv);
  3313. }
  3314. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3315. struct iwl4965_rx_mem_buffer *rxb)
  3316. {
  3317. #ifdef CONFIG_IWL4965_DEBUG
  3318. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3319. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3320. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3321. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3322. "tsf %d %d rate %d\n",
  3323. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3324. beacon->beacon_notify_hdr.failure_frame,
  3325. le32_to_cpu(beacon->ibss_mgr_status),
  3326. le32_to_cpu(beacon->high_tsf),
  3327. le32_to_cpu(beacon->low_tsf), rate);
  3328. #endif
  3329. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3330. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3331. queue_work(priv->workqueue, &priv->beacon_update);
  3332. }
  3333. /* Service response to REPLY_SCAN_CMD (0x80) */
  3334. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3335. struct iwl4965_rx_mem_buffer *rxb)
  3336. {
  3337. #ifdef CONFIG_IWL4965_DEBUG
  3338. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3339. struct iwl4965_scanreq_notification *notif =
  3340. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3341. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3342. #endif
  3343. }
  3344. /* Service SCAN_START_NOTIFICATION (0x82) */
  3345. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3346. struct iwl4965_rx_mem_buffer *rxb)
  3347. {
  3348. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3349. struct iwl4965_scanstart_notification *notif =
  3350. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3351. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3352. IWL_DEBUG_SCAN("Scan start: "
  3353. "%d [802.11%s] "
  3354. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3355. notif->channel,
  3356. notif->band ? "bg" : "a",
  3357. notif->tsf_high,
  3358. notif->tsf_low, notif->status, notif->beacon_timer);
  3359. }
  3360. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3361. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3362. struct iwl4965_rx_mem_buffer *rxb)
  3363. {
  3364. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3365. struct iwl4965_scanresults_notification *notif =
  3366. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3367. IWL_DEBUG_SCAN("Scan ch.res: "
  3368. "%d [802.11%s] "
  3369. "(TSF: 0x%08X:%08X) - %d "
  3370. "elapsed=%lu usec (%dms since last)\n",
  3371. notif->channel,
  3372. notif->band ? "bg" : "a",
  3373. le32_to_cpu(notif->tsf_high),
  3374. le32_to_cpu(notif->tsf_low),
  3375. le32_to_cpu(notif->statistics[0]),
  3376. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3377. jiffies_to_msecs(elapsed_jiffies
  3378. (priv->last_scan_jiffies, jiffies)));
  3379. priv->last_scan_jiffies = jiffies;
  3380. priv->next_scan_jiffies = 0;
  3381. }
  3382. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3383. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3384. struct iwl4965_rx_mem_buffer *rxb)
  3385. {
  3386. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3387. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3388. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3389. scan_notif->scanned_channels,
  3390. scan_notif->tsf_low,
  3391. scan_notif->tsf_high, scan_notif->status);
  3392. /* The HW is no longer scanning */
  3393. clear_bit(STATUS_SCAN_HW, &priv->status);
  3394. /* The scan completion notification came in, so kill that timer... */
  3395. cancel_delayed_work(&priv->scan_check);
  3396. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3397. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3398. jiffies_to_msecs(elapsed_jiffies
  3399. (priv->scan_pass_start, jiffies)));
  3400. /* Remove this scanned band from the list
  3401. * of pending bands to scan */
  3402. priv->scan_bands--;
  3403. /* If a request to abort was given, or the scan did not succeed
  3404. * then we reset the scan state machine and terminate,
  3405. * re-queuing another scan if one has been requested */
  3406. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3407. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3408. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3409. } else {
  3410. /* If there are more bands on this scan pass reschedule */
  3411. if (priv->scan_bands > 0)
  3412. goto reschedule;
  3413. }
  3414. priv->last_scan_jiffies = jiffies;
  3415. priv->next_scan_jiffies = 0;
  3416. IWL_DEBUG_INFO("Setting scan to off\n");
  3417. clear_bit(STATUS_SCANNING, &priv->status);
  3418. IWL_DEBUG_INFO("Scan took %dms\n",
  3419. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3420. queue_work(priv->workqueue, &priv->scan_completed);
  3421. return;
  3422. reschedule:
  3423. priv->scan_pass_start = jiffies;
  3424. queue_work(priv->workqueue, &priv->request_scan);
  3425. }
  3426. /* Handle notification from uCode that card's power state is changing
  3427. * due to software, hardware, or critical temperature RFKILL */
  3428. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3429. struct iwl4965_rx_mem_buffer *rxb)
  3430. {
  3431. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3432. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3433. unsigned long status = priv->status;
  3434. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3435. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3436. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3437. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3438. RF_CARD_DISABLED)) {
  3439. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3440. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3441. if (!iwl4965_grab_nic_access(priv)) {
  3442. iwl4965_write_direct32(
  3443. priv, HBUS_TARG_MBX_C,
  3444. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3445. iwl4965_release_nic_access(priv);
  3446. }
  3447. if (!(flags & RXON_CARD_DISABLED)) {
  3448. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3449. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3450. if (!iwl4965_grab_nic_access(priv)) {
  3451. iwl4965_write_direct32(
  3452. priv, HBUS_TARG_MBX_C,
  3453. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3454. iwl4965_release_nic_access(priv);
  3455. }
  3456. }
  3457. if (flags & RF_CARD_DISABLED) {
  3458. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3459. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3460. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3461. if (!iwl4965_grab_nic_access(priv))
  3462. iwl4965_release_nic_access(priv);
  3463. }
  3464. }
  3465. if (flags & HW_CARD_DISABLED)
  3466. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3467. else
  3468. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3469. if (flags & SW_CARD_DISABLED)
  3470. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3471. else
  3472. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3473. if (!(flags & RXON_CARD_DISABLED))
  3474. iwl4965_scan_cancel(priv);
  3475. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3476. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3477. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3478. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3479. queue_work(priv->workqueue, &priv->rf_kill);
  3480. else
  3481. wake_up_interruptible(&priv->wait_command_queue);
  3482. }
  3483. /**
  3484. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3485. *
  3486. * Setup the RX handlers for each of the reply types sent from the uCode
  3487. * to the host.
  3488. *
  3489. * This function chains into the hardware specific files for them to setup
  3490. * any hardware specific handlers as well.
  3491. */
  3492. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3493. {
  3494. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3495. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3496. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3497. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3498. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3499. iwl4965_rx_spectrum_measure_notif;
  3500. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3501. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3502. iwl4965_rx_pm_debug_statistics_notif;
  3503. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3504. /*
  3505. * The same handler is used for both the REPLY to a discrete
  3506. * statistics request from the host as well as for the periodic
  3507. * statistics notifications (after received beacons) from the uCode.
  3508. */
  3509. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3510. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3511. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3512. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3513. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3514. iwl4965_rx_scan_results_notif;
  3515. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3516. iwl4965_rx_scan_complete_notif;
  3517. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3518. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3519. /* Set up hardware specific Rx handlers */
  3520. iwl4965_hw_rx_handler_setup(priv);
  3521. }
  3522. /**
  3523. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3524. * @rxb: Rx buffer to reclaim
  3525. *
  3526. * If an Rx buffer has an async callback associated with it the callback
  3527. * will be executed. The attached skb (if present) will only be freed
  3528. * if the callback returns 1
  3529. */
  3530. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3531. struct iwl4965_rx_mem_buffer *rxb)
  3532. {
  3533. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3534. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3535. int txq_id = SEQ_TO_QUEUE(sequence);
  3536. int index = SEQ_TO_INDEX(sequence);
  3537. int huge = sequence & SEQ_HUGE_FRAME;
  3538. int cmd_index;
  3539. struct iwl4965_cmd *cmd;
  3540. /* If a Tx command is being handled and it isn't in the actual
  3541. * command queue then there a command routing bug has been introduced
  3542. * in the queue management code. */
  3543. if (txq_id != IWL_CMD_QUEUE_NUM)
  3544. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3545. txq_id, pkt->hdr.cmd);
  3546. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3547. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3548. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3549. /* Input error checking is done when commands are added to queue. */
  3550. if (cmd->meta.flags & CMD_WANT_SKB) {
  3551. cmd->meta.source->u.skb = rxb->skb;
  3552. rxb->skb = NULL;
  3553. } else if (cmd->meta.u.callback &&
  3554. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3555. rxb->skb = NULL;
  3556. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3557. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3558. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3559. wake_up_interruptible(&priv->wait_command_queue);
  3560. }
  3561. }
  3562. /************************** RX-FUNCTIONS ****************************/
  3563. /*
  3564. * Rx theory of operation
  3565. *
  3566. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3567. * each of which point to Receive Buffers to be filled by 4965. These get
  3568. * used not only for Rx frames, but for any command response or notification
  3569. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3570. * of indexes into the circular buffer.
  3571. *
  3572. * Rx Queue Indexes
  3573. * The host/firmware share two index registers for managing the Rx buffers.
  3574. *
  3575. * The READ index maps to the first position that the firmware may be writing
  3576. * to -- the driver can read up to (but not including) this position and get
  3577. * good data.
  3578. * The READ index is managed by the firmware once the card is enabled.
  3579. *
  3580. * The WRITE index maps to the last position the driver has read from -- the
  3581. * position preceding WRITE is the last slot the firmware can place a packet.
  3582. *
  3583. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3584. * WRITE = READ.
  3585. *
  3586. * During initialization, the host sets up the READ queue position to the first
  3587. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3588. *
  3589. * When the firmware places a packet in a buffer, it will advance the READ index
  3590. * and fire the RX interrupt. The driver can then query the READ index and
  3591. * process as many packets as possible, moving the WRITE index forward as it
  3592. * resets the Rx queue buffers with new memory.
  3593. *
  3594. * The management in the driver is as follows:
  3595. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3596. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3597. * to replenish the iwl->rxq->rx_free.
  3598. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3599. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3600. * 'processed' and 'read' driver indexes as well)
  3601. * + A received packet is processed and handed to the kernel network stack,
  3602. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3603. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3604. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3605. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3606. * were enough free buffers and RX_STALLED is set it is cleared.
  3607. *
  3608. *
  3609. * Driver sequence:
  3610. *
  3611. * iwl4965_rx_queue_alloc() Allocates rx_free
  3612. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3613. * iwl4965_rx_queue_restock
  3614. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3615. * queue, updates firmware pointers, and updates
  3616. * the WRITE index. If insufficient rx_free buffers
  3617. * are available, schedules iwl4965_rx_replenish
  3618. *
  3619. * -- enable interrupts --
  3620. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3621. * READ INDEX, detaching the SKB from the pool.
  3622. * Moves the packet buffer from queue to rx_used.
  3623. * Calls iwl4965_rx_queue_restock to refill any empty
  3624. * slots.
  3625. * ...
  3626. *
  3627. */
  3628. /**
  3629. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3630. */
  3631. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3632. {
  3633. int s = q->read - q->write;
  3634. if (s <= 0)
  3635. s += RX_QUEUE_SIZE;
  3636. /* keep some buffer to not confuse full and empty queue */
  3637. s -= 2;
  3638. if (s < 0)
  3639. s = 0;
  3640. return s;
  3641. }
  3642. /**
  3643. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3644. */
  3645. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3646. {
  3647. u32 reg = 0;
  3648. int rc = 0;
  3649. unsigned long flags;
  3650. spin_lock_irqsave(&q->lock, flags);
  3651. if (q->need_update == 0)
  3652. goto exit_unlock;
  3653. /* If power-saving is in use, make sure device is awake */
  3654. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3655. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3656. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3657. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3658. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3659. goto exit_unlock;
  3660. }
  3661. rc = iwl4965_grab_nic_access(priv);
  3662. if (rc)
  3663. goto exit_unlock;
  3664. /* Device expects a multiple of 8 */
  3665. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3666. q->write & ~0x7);
  3667. iwl4965_release_nic_access(priv);
  3668. /* Else device is assumed to be awake */
  3669. } else
  3670. /* Device expects a multiple of 8 */
  3671. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3672. q->need_update = 0;
  3673. exit_unlock:
  3674. spin_unlock_irqrestore(&q->lock, flags);
  3675. return rc;
  3676. }
  3677. /**
  3678. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3679. */
  3680. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3681. dma_addr_t dma_addr)
  3682. {
  3683. return cpu_to_le32((u32)(dma_addr >> 8));
  3684. }
  3685. /**
  3686. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3687. *
  3688. * If there are slots in the RX queue that need to be restocked,
  3689. * and we have free pre-allocated buffers, fill the ranks as much
  3690. * as we can, pulling from rx_free.
  3691. *
  3692. * This moves the 'write' index forward to catch up with 'processed', and
  3693. * also updates the memory address in the firmware to reference the new
  3694. * target buffer.
  3695. */
  3696. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3697. {
  3698. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3699. struct list_head *element;
  3700. struct iwl4965_rx_mem_buffer *rxb;
  3701. unsigned long flags;
  3702. int write, rc;
  3703. spin_lock_irqsave(&rxq->lock, flags);
  3704. write = rxq->write & ~0x7;
  3705. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3706. /* Get next free Rx buffer, remove from free list */
  3707. element = rxq->rx_free.next;
  3708. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3709. list_del(element);
  3710. /* Point to Rx buffer via next RBD in circular buffer */
  3711. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3712. rxq->queue[rxq->write] = rxb;
  3713. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3714. rxq->free_count--;
  3715. }
  3716. spin_unlock_irqrestore(&rxq->lock, flags);
  3717. /* If the pre-allocated buffer pool is dropping low, schedule to
  3718. * refill it */
  3719. if (rxq->free_count <= RX_LOW_WATERMARK)
  3720. queue_work(priv->workqueue, &priv->rx_replenish);
  3721. /* If we've added more space for the firmware to place data, tell it.
  3722. * Increment device's write pointer in multiples of 8. */
  3723. if ((write != (rxq->write & ~0x7))
  3724. || (abs(rxq->write - rxq->read) > 7)) {
  3725. spin_lock_irqsave(&rxq->lock, flags);
  3726. rxq->need_update = 1;
  3727. spin_unlock_irqrestore(&rxq->lock, flags);
  3728. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3729. if (rc)
  3730. return rc;
  3731. }
  3732. return 0;
  3733. }
  3734. /**
  3735. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3736. *
  3737. * When moving to rx_free an SKB is allocated for the slot.
  3738. *
  3739. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3740. * This is called as a scheduled work item (except for during initialization)
  3741. */
  3742. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3743. {
  3744. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3745. struct list_head *element;
  3746. struct iwl4965_rx_mem_buffer *rxb;
  3747. unsigned long flags;
  3748. spin_lock_irqsave(&rxq->lock, flags);
  3749. while (!list_empty(&rxq->rx_used)) {
  3750. element = rxq->rx_used.next;
  3751. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3752. /* Alloc a new receive buffer */
  3753. rxb->skb =
  3754. alloc_skb(priv->hw_setting.rx_buf_size,
  3755. __GFP_NOWARN | GFP_ATOMIC);
  3756. if (!rxb->skb) {
  3757. if (net_ratelimit())
  3758. printk(KERN_CRIT DRV_NAME
  3759. ": Can not allocate SKB buffers\n");
  3760. /* We don't reschedule replenish work here -- we will
  3761. * call the restock method and if it still needs
  3762. * more buffers it will schedule replenish */
  3763. break;
  3764. }
  3765. priv->alloc_rxb_skb++;
  3766. list_del(element);
  3767. /* Get physical address of RB/SKB */
  3768. rxb->dma_addr =
  3769. pci_map_single(priv->pci_dev, rxb->skb->data,
  3770. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3771. list_add_tail(&rxb->list, &rxq->rx_free);
  3772. rxq->free_count++;
  3773. }
  3774. spin_unlock_irqrestore(&rxq->lock, flags);
  3775. }
  3776. /*
  3777. * this should be called while priv->lock is locked
  3778. */
  3779. static void __iwl4965_rx_replenish(void *data)
  3780. {
  3781. struct iwl4965_priv *priv = data;
  3782. iwl4965_rx_allocate(priv);
  3783. iwl4965_rx_queue_restock(priv);
  3784. }
  3785. void iwl4965_rx_replenish(void *data)
  3786. {
  3787. struct iwl4965_priv *priv = data;
  3788. unsigned long flags;
  3789. iwl4965_rx_allocate(priv);
  3790. spin_lock_irqsave(&priv->lock, flags);
  3791. iwl4965_rx_queue_restock(priv);
  3792. spin_unlock_irqrestore(&priv->lock, flags);
  3793. }
  3794. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3795. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3796. * This free routine walks the list of POOL entries and if SKB is set to
  3797. * non NULL it is unmapped and freed
  3798. */
  3799. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3800. {
  3801. int i;
  3802. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3803. if (rxq->pool[i].skb != NULL) {
  3804. pci_unmap_single(priv->pci_dev,
  3805. rxq->pool[i].dma_addr,
  3806. priv->hw_setting.rx_buf_size,
  3807. PCI_DMA_FROMDEVICE);
  3808. dev_kfree_skb(rxq->pool[i].skb);
  3809. }
  3810. }
  3811. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3812. rxq->dma_addr);
  3813. rxq->bd = NULL;
  3814. }
  3815. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3816. {
  3817. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3818. struct pci_dev *dev = priv->pci_dev;
  3819. int i;
  3820. spin_lock_init(&rxq->lock);
  3821. INIT_LIST_HEAD(&rxq->rx_free);
  3822. INIT_LIST_HEAD(&rxq->rx_used);
  3823. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3824. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3825. if (!rxq->bd)
  3826. return -ENOMEM;
  3827. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3828. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3829. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3830. /* Set us so that we have processed and used all buffers, but have
  3831. * not restocked the Rx queue with fresh buffers */
  3832. rxq->read = rxq->write = 0;
  3833. rxq->free_count = 0;
  3834. rxq->need_update = 0;
  3835. return 0;
  3836. }
  3837. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3838. {
  3839. unsigned long flags;
  3840. int i;
  3841. spin_lock_irqsave(&rxq->lock, flags);
  3842. INIT_LIST_HEAD(&rxq->rx_free);
  3843. INIT_LIST_HEAD(&rxq->rx_used);
  3844. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3845. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3846. /* In the reset function, these buffers may have been allocated
  3847. * to an SKB, so we need to unmap and free potential storage */
  3848. if (rxq->pool[i].skb != NULL) {
  3849. pci_unmap_single(priv->pci_dev,
  3850. rxq->pool[i].dma_addr,
  3851. priv->hw_setting.rx_buf_size,
  3852. PCI_DMA_FROMDEVICE);
  3853. priv->alloc_rxb_skb--;
  3854. dev_kfree_skb(rxq->pool[i].skb);
  3855. rxq->pool[i].skb = NULL;
  3856. }
  3857. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3858. }
  3859. /* Set us so that we have processed and used all buffers, but have
  3860. * not restocked the Rx queue with fresh buffers */
  3861. rxq->read = rxq->write = 0;
  3862. rxq->free_count = 0;
  3863. spin_unlock_irqrestore(&rxq->lock, flags);
  3864. }
  3865. /* Convert linear signal-to-noise ratio into dB */
  3866. static u8 ratio2dB[100] = {
  3867. /* 0 1 2 3 4 5 6 7 8 9 */
  3868. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3869. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3870. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3871. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3872. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3873. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3874. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3875. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3876. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3877. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3878. };
  3879. /* Calculates a relative dB value from a ratio of linear
  3880. * (i.e. not dB) signal levels.
  3881. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3882. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3883. {
  3884. /* 1000:1 or higher just report as 60 dB */
  3885. if (sig_ratio >= 1000)
  3886. return 60;
  3887. /* 100:1 or higher, divide by 10 and use table,
  3888. * add 20 dB to make up for divide by 10 */
  3889. if (sig_ratio >= 100)
  3890. return (20 + (int)ratio2dB[sig_ratio/10]);
  3891. /* We shouldn't see this */
  3892. if (sig_ratio < 1)
  3893. return 0;
  3894. /* Use table for ratios 1:1 - 99:1 */
  3895. return (int)ratio2dB[sig_ratio];
  3896. }
  3897. #define PERFECT_RSSI (-20) /* dBm */
  3898. #define WORST_RSSI (-95) /* dBm */
  3899. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3900. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3901. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3902. * about formulas used below. */
  3903. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3904. {
  3905. int sig_qual;
  3906. int degradation = PERFECT_RSSI - rssi_dbm;
  3907. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3908. * as indicator; formula is (signal dbm - noise dbm).
  3909. * SNR at or above 40 is a great signal (100%).
  3910. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3911. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3912. if (noise_dbm) {
  3913. if (rssi_dbm - noise_dbm >= 40)
  3914. return 100;
  3915. else if (rssi_dbm < noise_dbm)
  3916. return 0;
  3917. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3918. /* Else use just the signal level.
  3919. * This formula is a least squares fit of data points collected and
  3920. * compared with a reference system that had a percentage (%) display
  3921. * for signal quality. */
  3922. } else
  3923. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3924. (15 * RSSI_RANGE + 62 * degradation)) /
  3925. (RSSI_RANGE * RSSI_RANGE);
  3926. if (sig_qual > 100)
  3927. sig_qual = 100;
  3928. else if (sig_qual < 1)
  3929. sig_qual = 0;
  3930. return sig_qual;
  3931. }
  3932. /**
  3933. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3934. *
  3935. * Uses the priv->rx_handlers callback function array to invoke
  3936. * the appropriate handlers, including command responses,
  3937. * frame-received notifications, and other notifications.
  3938. */
  3939. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3940. {
  3941. struct iwl4965_rx_mem_buffer *rxb;
  3942. struct iwl4965_rx_packet *pkt;
  3943. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3944. u32 r, i;
  3945. int reclaim;
  3946. unsigned long flags;
  3947. u8 fill_rx = 0;
  3948. u32 count = 8;
  3949. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3950. * buffer that the driver may process (last buffer filled by ucode). */
  3951. r = iwl4965_hw_get_rx_read(priv);
  3952. i = rxq->read;
  3953. /* Rx interrupt, but nothing sent from uCode */
  3954. if (i == r)
  3955. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3956. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3957. fill_rx = 1;
  3958. while (i != r) {
  3959. rxb = rxq->queue[i];
  3960. /* If an RXB doesn't have a Rx queue slot associated with it,
  3961. * then a bug has been introduced in the queue refilling
  3962. * routines -- catch it here */
  3963. BUG_ON(rxb == NULL);
  3964. rxq->queue[i] = NULL;
  3965. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3966. priv->hw_setting.rx_buf_size,
  3967. PCI_DMA_FROMDEVICE);
  3968. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3969. /* Reclaim a command buffer only if this packet is a response
  3970. * to a (driver-originated) command.
  3971. * If the packet (e.g. Rx frame) originated from uCode,
  3972. * there is no command buffer to reclaim.
  3973. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3974. * but apparently a few don't get set; catch them here. */
  3975. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3976. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3977. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3978. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3979. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3980. (pkt->hdr.cmd != REPLY_TX);
  3981. /* Based on type of command response or notification,
  3982. * handle those that need handling via function in
  3983. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3984. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3985. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3986. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3987. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3988. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3989. } else {
  3990. /* No handling needed */
  3991. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3992. "r %d i %d No handler needed for %s, 0x%02x\n",
  3993. r, i, get_cmd_string(pkt->hdr.cmd),
  3994. pkt->hdr.cmd);
  3995. }
  3996. if (reclaim) {
  3997. /* Invoke any callbacks, transfer the skb to caller, and
  3998. * fire off the (possibly) blocking iwl4965_send_cmd()
  3999. * as we reclaim the driver command queue */
  4000. if (rxb && rxb->skb)
  4001. iwl4965_tx_cmd_complete(priv, rxb);
  4002. else
  4003. IWL_WARNING("Claim null rxb?\n");
  4004. }
  4005. /* For now we just don't re-use anything. We can tweak this
  4006. * later to try and re-use notification packets and SKBs that
  4007. * fail to Rx correctly */
  4008. if (rxb->skb != NULL) {
  4009. priv->alloc_rxb_skb--;
  4010. dev_kfree_skb_any(rxb->skb);
  4011. rxb->skb = NULL;
  4012. }
  4013. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  4014. priv->hw_setting.rx_buf_size,
  4015. PCI_DMA_FROMDEVICE);
  4016. spin_lock_irqsave(&rxq->lock, flags);
  4017. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  4018. spin_unlock_irqrestore(&rxq->lock, flags);
  4019. i = (i + 1) & RX_QUEUE_MASK;
  4020. /* If there are a lot of unused frames,
  4021. * restock the Rx queue so ucode wont assert. */
  4022. if (fill_rx) {
  4023. count++;
  4024. if (count >= 8) {
  4025. priv->rxq.read = i;
  4026. __iwl4965_rx_replenish(priv);
  4027. count = 0;
  4028. }
  4029. }
  4030. }
  4031. /* Backtrack one entry */
  4032. priv->rxq.read = i;
  4033. iwl4965_rx_queue_restock(priv);
  4034. }
  4035. /**
  4036. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4037. */
  4038. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4039. struct iwl4965_tx_queue *txq)
  4040. {
  4041. u32 reg = 0;
  4042. int rc = 0;
  4043. int txq_id = txq->q.id;
  4044. if (txq->need_update == 0)
  4045. return rc;
  4046. /* if we're trying to save power */
  4047. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4048. /* wake up nic if it's powered down ...
  4049. * uCode will wake up, and interrupt us again, so next
  4050. * time we'll skip this part. */
  4051. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4052. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4053. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4054. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4055. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4056. return rc;
  4057. }
  4058. /* restore this queue's parameters in nic hardware. */
  4059. rc = iwl4965_grab_nic_access(priv);
  4060. if (rc)
  4061. return rc;
  4062. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4063. txq->q.write_ptr | (txq_id << 8));
  4064. iwl4965_release_nic_access(priv);
  4065. /* else not in power-save mode, uCode will never sleep when we're
  4066. * trying to tx (during RFKILL, we're not trying to tx). */
  4067. } else
  4068. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4069. txq->q.write_ptr | (txq_id << 8));
  4070. txq->need_update = 0;
  4071. return rc;
  4072. }
  4073. #ifdef CONFIG_IWL4965_DEBUG
  4074. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4075. {
  4076. DECLARE_MAC_BUF(mac);
  4077. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4078. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4079. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4080. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4081. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4082. le32_to_cpu(rxon->filter_flags));
  4083. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4084. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4085. rxon->ofdm_basic_rates);
  4086. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4087. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4088. print_mac(mac, rxon->node_addr));
  4089. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4090. print_mac(mac, rxon->bssid_addr));
  4091. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4092. }
  4093. #endif
  4094. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4095. {
  4096. IWL_DEBUG_ISR("Enabling interrupts\n");
  4097. set_bit(STATUS_INT_ENABLED, &priv->status);
  4098. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4099. }
  4100. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4101. {
  4102. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4103. /* disable interrupts from uCode/NIC to host */
  4104. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4105. /* acknowledge/clear/reset any interrupts still pending
  4106. * from uCode or flow handler (Rx/Tx DMA) */
  4107. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4108. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4109. IWL_DEBUG_ISR("Disabled interrupts\n");
  4110. }
  4111. static const char *desc_lookup(int i)
  4112. {
  4113. switch (i) {
  4114. case 1:
  4115. return "FAIL";
  4116. case 2:
  4117. return "BAD_PARAM";
  4118. case 3:
  4119. return "BAD_CHECKSUM";
  4120. case 4:
  4121. return "NMI_INTERRUPT";
  4122. case 5:
  4123. return "SYSASSERT";
  4124. case 6:
  4125. return "FATAL_ERROR";
  4126. }
  4127. return "UNKNOWN";
  4128. }
  4129. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4130. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4131. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4132. {
  4133. u32 data2, line;
  4134. u32 desc, time, count, base, data1;
  4135. u32 blink1, blink2, ilink1, ilink2;
  4136. int rc;
  4137. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4138. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4139. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4140. return;
  4141. }
  4142. rc = iwl4965_grab_nic_access(priv);
  4143. if (rc) {
  4144. IWL_WARNING("Can not read from adapter at this time.\n");
  4145. return;
  4146. }
  4147. count = iwl4965_read_targ_mem(priv, base);
  4148. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4149. IWL_ERROR("Start IWL Error Log Dump:\n");
  4150. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4151. priv->status, priv->config, count);
  4152. }
  4153. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4154. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4155. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4156. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4157. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4158. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4159. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4160. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4161. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4162. IWL_ERROR("Desc Time "
  4163. "data1 data2 line\n");
  4164. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4165. desc_lookup(desc), desc, time, data1, data2, line);
  4166. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4167. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4168. ilink1, ilink2);
  4169. iwl4965_release_nic_access(priv);
  4170. }
  4171. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4172. /**
  4173. * iwl4965_print_event_log - Dump error event log to syslog
  4174. *
  4175. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4176. */
  4177. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4178. u32 num_events, u32 mode)
  4179. {
  4180. u32 i;
  4181. u32 base; /* SRAM byte address of event log header */
  4182. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4183. u32 ptr; /* SRAM byte address of log data */
  4184. u32 ev, time, data; /* event log data */
  4185. if (num_events == 0)
  4186. return;
  4187. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4188. if (mode == 0)
  4189. event_size = 2 * sizeof(u32);
  4190. else
  4191. event_size = 3 * sizeof(u32);
  4192. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4193. /* "time" is actually "data" for mode 0 (no timestamp).
  4194. * place event id # at far right for easier visual parsing. */
  4195. for (i = 0; i < num_events; i++) {
  4196. ev = iwl4965_read_targ_mem(priv, ptr);
  4197. ptr += sizeof(u32);
  4198. time = iwl4965_read_targ_mem(priv, ptr);
  4199. ptr += sizeof(u32);
  4200. if (mode == 0)
  4201. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4202. else {
  4203. data = iwl4965_read_targ_mem(priv, ptr);
  4204. ptr += sizeof(u32);
  4205. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4206. }
  4207. }
  4208. }
  4209. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4210. {
  4211. int rc;
  4212. u32 base; /* SRAM byte address of event log header */
  4213. u32 capacity; /* event log capacity in # entries */
  4214. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4215. u32 num_wraps; /* # times uCode wrapped to top of log */
  4216. u32 next_entry; /* index of next entry to be written by uCode */
  4217. u32 size; /* # entries that we'll print */
  4218. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4219. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4220. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4221. return;
  4222. }
  4223. rc = iwl4965_grab_nic_access(priv);
  4224. if (rc) {
  4225. IWL_WARNING("Can not read from adapter at this time.\n");
  4226. return;
  4227. }
  4228. /* event log header */
  4229. capacity = iwl4965_read_targ_mem(priv, base);
  4230. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4231. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4232. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4233. size = num_wraps ? capacity : next_entry;
  4234. /* bail out if nothing in log */
  4235. if (size == 0) {
  4236. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4237. iwl4965_release_nic_access(priv);
  4238. return;
  4239. }
  4240. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4241. size, num_wraps);
  4242. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4243. * i.e the next one that uCode would fill. */
  4244. if (num_wraps)
  4245. iwl4965_print_event_log(priv, next_entry,
  4246. capacity - next_entry, mode);
  4247. /* (then/else) start at top of log */
  4248. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4249. iwl4965_release_nic_access(priv);
  4250. }
  4251. /**
  4252. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4253. */
  4254. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4255. {
  4256. /* Set the FW error flag -- cleared on iwl4965_down */
  4257. set_bit(STATUS_FW_ERROR, &priv->status);
  4258. /* Cancel currently queued command. */
  4259. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4260. #ifdef CONFIG_IWL4965_DEBUG
  4261. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4262. iwl4965_dump_nic_error_log(priv);
  4263. iwl4965_dump_nic_event_log(priv);
  4264. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4265. }
  4266. #endif
  4267. wake_up_interruptible(&priv->wait_command_queue);
  4268. /* Keep the restart process from trying to send host
  4269. * commands by clearing the INIT status bit */
  4270. clear_bit(STATUS_READY, &priv->status);
  4271. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4272. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4273. "Restarting adapter due to uCode error.\n");
  4274. if (iwl4965_is_associated(priv)) {
  4275. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4276. sizeof(priv->recovery_rxon));
  4277. priv->error_recovering = 1;
  4278. }
  4279. queue_work(priv->workqueue, &priv->restart);
  4280. }
  4281. }
  4282. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4283. {
  4284. unsigned long flags;
  4285. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4286. sizeof(priv->staging_rxon));
  4287. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4288. iwl4965_commit_rxon(priv);
  4289. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4290. spin_lock_irqsave(&priv->lock, flags);
  4291. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4292. priv->error_recovering = 0;
  4293. spin_unlock_irqrestore(&priv->lock, flags);
  4294. }
  4295. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4296. {
  4297. u32 inta, handled = 0;
  4298. u32 inta_fh;
  4299. unsigned long flags;
  4300. #ifdef CONFIG_IWL4965_DEBUG
  4301. u32 inta_mask;
  4302. #endif
  4303. spin_lock_irqsave(&priv->lock, flags);
  4304. /* Ack/clear/reset pending uCode interrupts.
  4305. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4306. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4307. inta = iwl4965_read32(priv, CSR_INT);
  4308. iwl4965_write32(priv, CSR_INT, inta);
  4309. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4310. * Any new interrupts that happen after this, either while we're
  4311. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4312. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4313. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4314. #ifdef CONFIG_IWL4965_DEBUG
  4315. if (iwl4965_debug_level & IWL_DL_ISR) {
  4316. /* just for debug */
  4317. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4318. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4319. inta, inta_mask, inta_fh);
  4320. }
  4321. #endif
  4322. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4323. * atomic, make sure that inta covers all the interrupts that
  4324. * we've discovered, even if FH interrupt came in just after
  4325. * reading CSR_INT. */
  4326. if (inta_fh & CSR_FH_INT_RX_MASK)
  4327. inta |= CSR_INT_BIT_FH_RX;
  4328. if (inta_fh & CSR_FH_INT_TX_MASK)
  4329. inta |= CSR_INT_BIT_FH_TX;
  4330. /* Now service all interrupt bits discovered above. */
  4331. if (inta & CSR_INT_BIT_HW_ERR) {
  4332. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4333. /* Tell the device to stop sending interrupts */
  4334. iwl4965_disable_interrupts(priv);
  4335. iwl4965_irq_handle_error(priv);
  4336. handled |= CSR_INT_BIT_HW_ERR;
  4337. spin_unlock_irqrestore(&priv->lock, flags);
  4338. return;
  4339. }
  4340. #ifdef CONFIG_IWL4965_DEBUG
  4341. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4342. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4343. if (inta & CSR_INT_BIT_SCD)
  4344. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4345. "the frame/frames.\n");
  4346. /* Alive notification via Rx interrupt will do the real work */
  4347. if (inta & CSR_INT_BIT_ALIVE)
  4348. IWL_DEBUG_ISR("Alive interrupt\n");
  4349. }
  4350. #endif
  4351. /* Safely ignore these bits for debug checks below */
  4352. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4353. /* HW RF KILL switch toggled */
  4354. if (inta & CSR_INT_BIT_RF_KILL) {
  4355. int hw_rf_kill = 0;
  4356. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4357. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4358. hw_rf_kill = 1;
  4359. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4360. "RF_KILL bit toggled to %s.\n",
  4361. hw_rf_kill ? "disable radio":"enable radio");
  4362. /* Queue restart only if RF_KILL switch was set to "kill"
  4363. * when we loaded driver, and is now set to "enable".
  4364. * After we're Alive, RF_KILL gets handled by
  4365. * iwl_rx_card_state_notif() */
  4366. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4367. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4368. queue_work(priv->workqueue, &priv->restart);
  4369. }
  4370. handled |= CSR_INT_BIT_RF_KILL;
  4371. }
  4372. /* Chip got too hot and stopped itself */
  4373. if (inta & CSR_INT_BIT_CT_KILL) {
  4374. IWL_ERROR("Microcode CT kill error detected.\n");
  4375. handled |= CSR_INT_BIT_CT_KILL;
  4376. }
  4377. /* Error detected by uCode */
  4378. if (inta & CSR_INT_BIT_SW_ERR) {
  4379. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4380. inta);
  4381. iwl4965_irq_handle_error(priv);
  4382. handled |= CSR_INT_BIT_SW_ERR;
  4383. }
  4384. /* uCode wakes up after power-down sleep */
  4385. if (inta & CSR_INT_BIT_WAKEUP) {
  4386. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4387. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4388. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4389. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4390. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4391. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4392. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4393. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4394. handled |= CSR_INT_BIT_WAKEUP;
  4395. }
  4396. /* All uCode command responses, including Tx command responses,
  4397. * Rx "responses" (frame-received notification), and other
  4398. * notifications from uCode come through here*/
  4399. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4400. iwl4965_rx_handle(priv);
  4401. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4402. }
  4403. if (inta & CSR_INT_BIT_FH_TX) {
  4404. IWL_DEBUG_ISR("Tx interrupt\n");
  4405. handled |= CSR_INT_BIT_FH_TX;
  4406. }
  4407. if (inta & ~handled)
  4408. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4409. if (inta & ~CSR_INI_SET_MASK) {
  4410. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4411. inta & ~CSR_INI_SET_MASK);
  4412. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4413. }
  4414. /* Re-enable all interrupts */
  4415. iwl4965_enable_interrupts(priv);
  4416. #ifdef CONFIG_IWL4965_DEBUG
  4417. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4418. inta = iwl4965_read32(priv, CSR_INT);
  4419. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4420. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4421. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4422. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4423. }
  4424. #endif
  4425. spin_unlock_irqrestore(&priv->lock, flags);
  4426. }
  4427. static irqreturn_t iwl4965_isr(int irq, void *data)
  4428. {
  4429. struct iwl4965_priv *priv = data;
  4430. u32 inta, inta_mask;
  4431. u32 inta_fh;
  4432. if (!priv)
  4433. return IRQ_NONE;
  4434. spin_lock(&priv->lock);
  4435. /* Disable (but don't clear!) interrupts here to avoid
  4436. * back-to-back ISRs and sporadic interrupts from our NIC.
  4437. * If we have something to service, the tasklet will re-enable ints.
  4438. * If we *don't* have something, we'll re-enable before leaving here. */
  4439. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4440. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4441. /* Discover which interrupts are active/pending */
  4442. inta = iwl4965_read32(priv, CSR_INT);
  4443. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4444. /* Ignore interrupt if there's nothing in NIC to service.
  4445. * This may be due to IRQ shared with another device,
  4446. * or due to sporadic interrupts thrown from our NIC. */
  4447. if (!inta && !inta_fh) {
  4448. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4449. goto none;
  4450. }
  4451. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4452. /* Hardware disappeared. It might have already raised
  4453. * an interrupt */
  4454. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4455. goto unplugged;
  4456. }
  4457. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4458. inta, inta_mask, inta_fh);
  4459. inta &= ~CSR_INT_BIT_SCD;
  4460. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4461. if (likely(inta || inta_fh))
  4462. tasklet_schedule(&priv->irq_tasklet);
  4463. unplugged:
  4464. spin_unlock(&priv->lock);
  4465. return IRQ_HANDLED;
  4466. none:
  4467. /* re-enable interrupts here since we don't have anything to service. */
  4468. iwl4965_enable_interrupts(priv);
  4469. spin_unlock(&priv->lock);
  4470. return IRQ_NONE;
  4471. }
  4472. /************************** EEPROM BANDS ****************************
  4473. *
  4474. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4475. * EEPROM contents to the specific channel number supported for each
  4476. * band.
  4477. *
  4478. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4479. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4480. * The specific geography and calibration information for that channel
  4481. * is contained in the eeprom map itself.
  4482. *
  4483. * During init, we copy the eeprom information and channel map
  4484. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4485. *
  4486. * channel_map_24/52 provides the index in the channel_info array for a
  4487. * given channel. We have to have two separate maps as there is channel
  4488. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4489. * band_2
  4490. *
  4491. * A value of 0xff stored in the channel_map indicates that the channel
  4492. * is not supported by the hardware at all.
  4493. *
  4494. * A value of 0xfe in the channel_map indicates that the channel is not
  4495. * valid for Tx with the current hardware. This means that
  4496. * while the system can tune and receive on a given channel, it may not
  4497. * be able to associate or transmit any frames on that
  4498. * channel. There is no corresponding channel information for that
  4499. * entry.
  4500. *
  4501. *********************************************************************/
  4502. /* 2.4 GHz */
  4503. static const u8 iwl4965_eeprom_band_1[14] = {
  4504. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4505. };
  4506. /* 5.2 GHz bands */
  4507. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4508. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4509. };
  4510. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4511. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4512. };
  4513. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4514. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4515. };
  4516. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4517. 145, 149, 153, 157, 161, 165
  4518. };
  4519. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4520. 1, 2, 3, 4, 5, 6, 7
  4521. };
  4522. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4523. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4524. };
  4525. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4526. int band,
  4527. int *eeprom_ch_count,
  4528. const struct iwl4965_eeprom_channel
  4529. **eeprom_ch_info,
  4530. const u8 **eeprom_ch_index)
  4531. {
  4532. switch (band) {
  4533. case 1: /* 2.4GHz band */
  4534. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4535. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4536. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4537. break;
  4538. case 2: /* 4.9GHz band */
  4539. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4540. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4541. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4542. break;
  4543. case 3: /* 5.2GHz band */
  4544. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4545. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4546. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4547. break;
  4548. case 4: /* 5.5GHz band */
  4549. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4550. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4551. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4552. break;
  4553. case 5: /* 5.7GHz band */
  4554. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4555. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4556. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4557. break;
  4558. case 6: /* 2.4GHz FAT channels */
  4559. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4560. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4561. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4562. break;
  4563. case 7: /* 5 GHz FAT channels */
  4564. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4565. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4566. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4567. break;
  4568. default:
  4569. BUG();
  4570. return;
  4571. }
  4572. }
  4573. /**
  4574. * iwl4965_get_channel_info - Find driver's private channel info
  4575. *
  4576. * Based on band and channel number.
  4577. */
  4578. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4579. int phymode, u16 channel)
  4580. {
  4581. int i;
  4582. switch (phymode) {
  4583. case MODE_IEEE80211A:
  4584. for (i = 14; i < priv->channel_count; i++) {
  4585. if (priv->channel_info[i].channel == channel)
  4586. return &priv->channel_info[i];
  4587. }
  4588. break;
  4589. case MODE_IEEE80211B:
  4590. case MODE_IEEE80211G:
  4591. if (channel >= 1 && channel <= 14)
  4592. return &priv->channel_info[channel - 1];
  4593. break;
  4594. }
  4595. return NULL;
  4596. }
  4597. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4598. ? # x " " : "")
  4599. /**
  4600. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4601. */
  4602. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4603. {
  4604. int eeprom_ch_count = 0;
  4605. const u8 *eeprom_ch_index = NULL;
  4606. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4607. int band, ch;
  4608. struct iwl4965_channel_info *ch_info;
  4609. if (priv->channel_count) {
  4610. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4611. return 0;
  4612. }
  4613. if (priv->eeprom.version < 0x2f) {
  4614. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4615. priv->eeprom.version);
  4616. return -EINVAL;
  4617. }
  4618. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4619. priv->channel_count =
  4620. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4621. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4622. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4623. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4624. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4625. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4626. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4627. priv->channel_count, GFP_KERNEL);
  4628. if (!priv->channel_info) {
  4629. IWL_ERROR("Could not allocate channel_info\n");
  4630. priv->channel_count = 0;
  4631. return -ENOMEM;
  4632. }
  4633. ch_info = priv->channel_info;
  4634. /* Loop through the 5 EEPROM bands adding them in order to the
  4635. * channel map we maintain (that contains additional information than
  4636. * what just in the EEPROM) */
  4637. for (band = 1; band <= 5; band++) {
  4638. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4639. &eeprom_ch_info, &eeprom_ch_index);
  4640. /* Loop through each band adding each of the channels */
  4641. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4642. ch_info->channel = eeprom_ch_index[ch];
  4643. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4644. MODE_IEEE80211A;
  4645. /* permanently store EEPROM's channel regulatory flags
  4646. * and max power in channel info database. */
  4647. ch_info->eeprom = eeprom_ch_info[ch];
  4648. /* Copy the run-time flags so they are there even on
  4649. * invalid channels */
  4650. ch_info->flags = eeprom_ch_info[ch].flags;
  4651. if (!(is_channel_valid(ch_info))) {
  4652. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4653. "No traffic\n",
  4654. ch_info->channel,
  4655. ch_info->flags,
  4656. is_channel_a_band(ch_info) ?
  4657. "5.2" : "2.4");
  4658. ch_info++;
  4659. continue;
  4660. }
  4661. /* Initialize regulatory-based run-time data */
  4662. ch_info->max_power_avg = ch_info->curr_txpow =
  4663. eeprom_ch_info[ch].max_power_avg;
  4664. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4665. ch_info->min_power = 0;
  4666. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4667. " %ddBm): Ad-Hoc %ssupported\n",
  4668. ch_info->channel,
  4669. is_channel_a_band(ch_info) ?
  4670. "5.2" : "2.4",
  4671. CHECK_AND_PRINT(IBSS),
  4672. CHECK_AND_PRINT(ACTIVE),
  4673. CHECK_AND_PRINT(RADAR),
  4674. CHECK_AND_PRINT(WIDE),
  4675. CHECK_AND_PRINT(NARROW),
  4676. CHECK_AND_PRINT(DFS),
  4677. eeprom_ch_info[ch].flags,
  4678. eeprom_ch_info[ch].max_power_avg,
  4679. ((eeprom_ch_info[ch].
  4680. flags & EEPROM_CHANNEL_IBSS)
  4681. && !(eeprom_ch_info[ch].
  4682. flags & EEPROM_CHANNEL_RADAR))
  4683. ? "" : "not ");
  4684. /* Set the user_txpower_limit to the highest power
  4685. * supported by any channel */
  4686. if (eeprom_ch_info[ch].max_power_avg >
  4687. priv->user_txpower_limit)
  4688. priv->user_txpower_limit =
  4689. eeprom_ch_info[ch].max_power_avg;
  4690. ch_info++;
  4691. }
  4692. }
  4693. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4694. for (band = 6; band <= 7; band++) {
  4695. int phymode;
  4696. u8 fat_extension_chan;
  4697. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4698. &eeprom_ch_info, &eeprom_ch_index);
  4699. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4700. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4701. /* Loop through each band adding each of the channels */
  4702. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4703. if ((band == 6) &&
  4704. ((eeprom_ch_index[ch] == 5) ||
  4705. (eeprom_ch_index[ch] == 6) ||
  4706. (eeprom_ch_index[ch] == 7)))
  4707. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4708. else
  4709. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4710. /* Set up driver's info for lower half */
  4711. iwl4965_set_fat_chan_info(priv, phymode,
  4712. eeprom_ch_index[ch],
  4713. &(eeprom_ch_info[ch]),
  4714. fat_extension_chan);
  4715. /* Set up driver's info for upper half */
  4716. iwl4965_set_fat_chan_info(priv, phymode,
  4717. (eeprom_ch_index[ch] + 4),
  4718. &(eeprom_ch_info[ch]),
  4719. HT_IE_EXT_CHANNEL_BELOW);
  4720. }
  4721. }
  4722. return 0;
  4723. }
  4724. /*
  4725. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4726. */
  4727. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4728. {
  4729. kfree(priv->channel_info);
  4730. priv->channel_count = 0;
  4731. }
  4732. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4733. * sending probe req. This should be set long enough to hear probe responses
  4734. * from more than one AP. */
  4735. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4736. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4737. /* For faster active scanning, scan will move to the next channel if fewer than
  4738. * PLCP_QUIET_THRESH packets are heard on this channel within
  4739. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4740. * time if it's a quiet channel (nothing responded to our probe, and there's
  4741. * no other traffic).
  4742. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4743. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4744. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4745. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4746. * Must be set longer than active dwell time.
  4747. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4748. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4749. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4750. #define IWL_PASSIVE_DWELL_BASE (100)
  4751. #define IWL_CHANNEL_TUNE_TIME 5
  4752. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4753. {
  4754. if (phymode == MODE_IEEE80211A)
  4755. return IWL_ACTIVE_DWELL_TIME_52;
  4756. else
  4757. return IWL_ACTIVE_DWELL_TIME_24;
  4758. }
  4759. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4760. {
  4761. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4762. u16 passive = (phymode != MODE_IEEE80211A) ?
  4763. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4764. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4765. if (iwl4965_is_associated(priv)) {
  4766. /* If we're associated, we clamp the maximum passive
  4767. * dwell time to be 98% of the beacon interval (minus
  4768. * 2 * channel tune time) */
  4769. passive = priv->beacon_int;
  4770. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4771. passive = IWL_PASSIVE_DWELL_BASE;
  4772. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4773. }
  4774. if (passive <= active)
  4775. passive = active + 1;
  4776. return passive;
  4777. }
  4778. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4779. u8 is_active, u8 direct_mask,
  4780. struct iwl4965_scan_channel *scan_ch)
  4781. {
  4782. const struct ieee80211_channel *channels = NULL;
  4783. const struct ieee80211_hw_mode *hw_mode;
  4784. const struct iwl4965_channel_info *ch_info;
  4785. u16 passive_dwell = 0;
  4786. u16 active_dwell = 0;
  4787. int added, i;
  4788. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4789. if (!hw_mode)
  4790. return 0;
  4791. channels = hw_mode->channels;
  4792. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4793. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4794. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4795. if (channels[i].chan ==
  4796. le16_to_cpu(priv->active_rxon.channel)) {
  4797. if (iwl4965_is_associated(priv)) {
  4798. IWL_DEBUG_SCAN
  4799. ("Skipping current channel %d\n",
  4800. le16_to_cpu(priv->active_rxon.channel));
  4801. continue;
  4802. }
  4803. } else if (priv->only_active_channel)
  4804. continue;
  4805. scan_ch->channel = channels[i].chan;
  4806. ch_info = iwl4965_get_channel_info(priv, phymode,
  4807. scan_ch->channel);
  4808. if (!is_channel_valid(ch_info)) {
  4809. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4810. scan_ch->channel);
  4811. continue;
  4812. }
  4813. if (!is_active || is_channel_passive(ch_info) ||
  4814. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4815. scan_ch->type = 0; /* passive */
  4816. else
  4817. scan_ch->type = 1; /* active */
  4818. if (scan_ch->type & 1)
  4819. scan_ch->type |= (direct_mask << 1);
  4820. if (is_channel_narrow(ch_info))
  4821. scan_ch->type |= (1 << 7);
  4822. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4823. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4824. /* Set txpower levels to defaults */
  4825. scan_ch->tpc.dsp_atten = 110;
  4826. /* scan_pwr_info->tpc.dsp_atten; */
  4827. /*scan_pwr_info->tpc.tx_gain; */
  4828. if (phymode == MODE_IEEE80211A)
  4829. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4830. else {
  4831. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4832. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4833. * power level:
  4834. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4835. */
  4836. }
  4837. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4838. scan_ch->channel,
  4839. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4840. (scan_ch->type & 1) ?
  4841. active_dwell : passive_dwell);
  4842. scan_ch++;
  4843. added++;
  4844. }
  4845. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4846. return added;
  4847. }
  4848. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4849. {
  4850. int i, j;
  4851. for (i = 0; i < 3; i++) {
  4852. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4853. for (j = 0; j < hw_mode->num_channels; j++)
  4854. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4855. }
  4856. }
  4857. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4858. struct ieee80211_rate *rates)
  4859. {
  4860. int i;
  4861. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4862. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4863. rates[i].val = i; /* Rate scaling will work on indexes */
  4864. rates[i].val2 = i;
  4865. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4866. /* Only OFDM have the bits-per-symbol set */
  4867. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4868. rates[i].flags |= IEEE80211_RATE_OFDM;
  4869. else {
  4870. /*
  4871. * If CCK 1M then set rate flag to CCK else CCK_2
  4872. * which is CCK | PREAMBLE2
  4873. */
  4874. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4875. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4876. }
  4877. /* Set up which ones are basic rates... */
  4878. if (IWL_BASIC_RATES_MASK & (1 << i))
  4879. rates[i].flags |= IEEE80211_RATE_BASIC;
  4880. }
  4881. }
  4882. /**
  4883. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4884. */
  4885. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4886. {
  4887. struct iwl4965_channel_info *ch;
  4888. struct ieee80211_hw_mode *modes;
  4889. struct ieee80211_channel *channels;
  4890. struct ieee80211_channel *geo_ch;
  4891. struct ieee80211_rate *rates;
  4892. int i = 0;
  4893. enum {
  4894. A = 0,
  4895. B = 1,
  4896. G = 2,
  4897. };
  4898. int mode_count = 3;
  4899. if (priv->modes) {
  4900. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4901. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4902. return 0;
  4903. }
  4904. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4905. GFP_KERNEL);
  4906. if (!modes)
  4907. return -ENOMEM;
  4908. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4909. priv->channel_count, GFP_KERNEL);
  4910. if (!channels) {
  4911. kfree(modes);
  4912. return -ENOMEM;
  4913. }
  4914. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4915. GFP_KERNEL);
  4916. if (!rates) {
  4917. kfree(modes);
  4918. kfree(channels);
  4919. return -ENOMEM;
  4920. }
  4921. /* 0 = 802.11a
  4922. * 1 = 802.11b
  4923. * 2 = 802.11g
  4924. */
  4925. /* 5.2GHz channels start after the 2.4GHz channels */
  4926. modes[A].mode = MODE_IEEE80211A;
  4927. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4928. modes[A].rates = rates;
  4929. modes[A].num_rates = 8; /* just OFDM */
  4930. modes[A].rates = &rates[4];
  4931. modes[A].num_channels = 0;
  4932. #ifdef CONFIG_IWL4965_HT
  4933. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4934. #endif
  4935. modes[B].mode = MODE_IEEE80211B;
  4936. modes[B].channels = channels;
  4937. modes[B].rates = rates;
  4938. modes[B].num_rates = 4; /* just CCK */
  4939. modes[B].num_channels = 0;
  4940. modes[G].mode = MODE_IEEE80211G;
  4941. modes[G].channels = channels;
  4942. modes[G].rates = rates;
  4943. modes[G].num_rates = 12; /* OFDM & CCK */
  4944. modes[G].num_channels = 0;
  4945. #ifdef CONFIG_IWL4965_HT
  4946. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4947. #endif
  4948. priv->ieee_channels = channels;
  4949. priv->ieee_rates = rates;
  4950. iwl4965_init_hw_rates(priv, rates);
  4951. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4952. ch = &priv->channel_info[i];
  4953. if (!is_channel_valid(ch)) {
  4954. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4955. "skipping.\n",
  4956. ch->channel, is_channel_a_band(ch) ?
  4957. "5.2" : "2.4");
  4958. continue;
  4959. }
  4960. if (is_channel_a_band(ch)) {
  4961. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4962. } else {
  4963. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4964. modes[G].num_channels++;
  4965. }
  4966. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4967. geo_ch->chan = ch->channel;
  4968. geo_ch->power_level = ch->max_power_avg;
  4969. geo_ch->antenna_max = 0xff;
  4970. if (is_channel_valid(ch)) {
  4971. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4972. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4973. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4974. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4975. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4976. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4977. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4978. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4979. priv->max_channel_txpower_limit =
  4980. ch->max_power_avg;
  4981. }
  4982. geo_ch->val = geo_ch->flag;
  4983. }
  4984. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4985. printk(KERN_INFO DRV_NAME
  4986. ": Incorrectly detected BG card as ABG. Please send "
  4987. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4988. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4989. priv->is_abg = 0;
  4990. }
  4991. printk(KERN_INFO DRV_NAME
  4992. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4993. modes[G].num_channels, modes[A].num_channels);
  4994. /*
  4995. * NOTE: We register these in preference of order -- the
  4996. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4997. * a phymode based on rates or AP capabilities but seems to
  4998. * configure it purely on if the channel being configured
  4999. * is supported by a mode -- and the first match is taken
  5000. */
  5001. if (modes[G].num_channels)
  5002. ieee80211_register_hwmode(priv->hw, &modes[G]);
  5003. if (modes[B].num_channels)
  5004. ieee80211_register_hwmode(priv->hw, &modes[B]);
  5005. if (modes[A].num_channels)
  5006. ieee80211_register_hwmode(priv->hw, &modes[A]);
  5007. priv->modes = modes;
  5008. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5009. return 0;
  5010. }
  5011. /*
  5012. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  5013. */
  5014. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  5015. {
  5016. kfree(priv->modes);
  5017. kfree(priv->ieee_channels);
  5018. kfree(priv->ieee_rates);
  5019. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5020. }
  5021. /******************************************************************************
  5022. *
  5023. * uCode download functions
  5024. *
  5025. ******************************************************************************/
  5026. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  5027. {
  5028. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  5029. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  5030. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5031. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  5032. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5033. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5034. }
  5035. /**
  5036. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5037. * looking at all data.
  5038. */
  5039. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  5040. u32 len)
  5041. {
  5042. u32 val;
  5043. u32 save_len = len;
  5044. int rc = 0;
  5045. u32 errcnt;
  5046. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5047. rc = iwl4965_grab_nic_access(priv);
  5048. if (rc)
  5049. return rc;
  5050. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5051. errcnt = 0;
  5052. for (; len > 0; len -= sizeof(u32), image++) {
  5053. /* read data comes through single port, auto-incr addr */
  5054. /* NOTE: Use the debugless read so we don't flood kernel log
  5055. * if IWL_DL_IO is set */
  5056. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5057. if (val != le32_to_cpu(*image)) {
  5058. IWL_ERROR("uCode INST section is invalid at "
  5059. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5060. save_len - len, val, le32_to_cpu(*image));
  5061. rc = -EIO;
  5062. errcnt++;
  5063. if (errcnt >= 20)
  5064. break;
  5065. }
  5066. }
  5067. iwl4965_release_nic_access(priv);
  5068. if (!errcnt)
  5069. IWL_DEBUG_INFO
  5070. ("ucode image in INSTRUCTION memory is good\n");
  5071. return rc;
  5072. }
  5073. /**
  5074. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5075. * using sample data 100 bytes apart. If these sample points are good,
  5076. * it's a pretty good bet that everything between them is good, too.
  5077. */
  5078. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5079. {
  5080. u32 val;
  5081. int rc = 0;
  5082. u32 errcnt = 0;
  5083. u32 i;
  5084. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5085. rc = iwl4965_grab_nic_access(priv);
  5086. if (rc)
  5087. return rc;
  5088. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5089. /* read data comes through single port, auto-incr addr */
  5090. /* NOTE: Use the debugless read so we don't flood kernel log
  5091. * if IWL_DL_IO is set */
  5092. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5093. i + RTC_INST_LOWER_BOUND);
  5094. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5095. if (val != le32_to_cpu(*image)) {
  5096. #if 0 /* Enable this if you want to see details */
  5097. IWL_ERROR("uCode INST section is invalid at "
  5098. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5099. i, val, *image);
  5100. #endif
  5101. rc = -EIO;
  5102. errcnt++;
  5103. if (errcnt >= 3)
  5104. break;
  5105. }
  5106. }
  5107. iwl4965_release_nic_access(priv);
  5108. return rc;
  5109. }
  5110. /**
  5111. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5112. * and verify its contents
  5113. */
  5114. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5115. {
  5116. __le32 *image;
  5117. u32 len;
  5118. int rc = 0;
  5119. /* Try bootstrap */
  5120. image = (__le32 *)priv->ucode_boot.v_addr;
  5121. len = priv->ucode_boot.len;
  5122. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5123. if (rc == 0) {
  5124. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5125. return 0;
  5126. }
  5127. /* Try initialize */
  5128. image = (__le32 *)priv->ucode_init.v_addr;
  5129. len = priv->ucode_init.len;
  5130. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5131. if (rc == 0) {
  5132. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5133. return 0;
  5134. }
  5135. /* Try runtime/protocol */
  5136. image = (__le32 *)priv->ucode_code.v_addr;
  5137. len = priv->ucode_code.len;
  5138. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5139. if (rc == 0) {
  5140. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5141. return 0;
  5142. }
  5143. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5144. /* Since nothing seems to match, show first several data entries in
  5145. * instruction SRAM, so maybe visual inspection will give a clue.
  5146. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5147. image = (__le32 *)priv->ucode_boot.v_addr;
  5148. len = priv->ucode_boot.len;
  5149. rc = iwl4965_verify_inst_full(priv, image, len);
  5150. return rc;
  5151. }
  5152. /* check contents of special bootstrap uCode SRAM */
  5153. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5154. {
  5155. __le32 *image = priv->ucode_boot.v_addr;
  5156. u32 len = priv->ucode_boot.len;
  5157. u32 reg;
  5158. u32 val;
  5159. IWL_DEBUG_INFO("Begin verify bsm\n");
  5160. /* verify BSM SRAM contents */
  5161. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5162. for (reg = BSM_SRAM_LOWER_BOUND;
  5163. reg < BSM_SRAM_LOWER_BOUND + len;
  5164. reg += sizeof(u32), image ++) {
  5165. val = iwl4965_read_prph(priv, reg);
  5166. if (val != le32_to_cpu(*image)) {
  5167. IWL_ERROR("BSM uCode verification failed at "
  5168. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5169. BSM_SRAM_LOWER_BOUND,
  5170. reg - BSM_SRAM_LOWER_BOUND, len,
  5171. val, le32_to_cpu(*image));
  5172. return -EIO;
  5173. }
  5174. }
  5175. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5176. return 0;
  5177. }
  5178. /**
  5179. * iwl4965_load_bsm - Load bootstrap instructions
  5180. *
  5181. * BSM operation:
  5182. *
  5183. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5184. * in special SRAM that does not power down during RFKILL. When powering back
  5185. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5186. * the bootstrap program into the on-board processor, and starts it.
  5187. *
  5188. * The bootstrap program loads (via DMA) instructions and data for a new
  5189. * program from host DRAM locations indicated by the host driver in the
  5190. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5191. * automatically.
  5192. *
  5193. * When initializing the NIC, the host driver points the BSM to the
  5194. * "initialize" uCode image. This uCode sets up some internal data, then
  5195. * notifies host via "initialize alive" that it is complete.
  5196. *
  5197. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5198. * normal runtime uCode instructions and a backup uCode data cache buffer
  5199. * (filled initially with starting data values for the on-board processor),
  5200. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5201. * which begins normal operation.
  5202. *
  5203. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5204. * the backup data cache in DRAM before SRAM is powered down.
  5205. *
  5206. * When powering back up, the BSM loads the bootstrap program. This reloads
  5207. * the runtime uCode instructions and the backup data cache into SRAM,
  5208. * and re-launches the runtime uCode from where it left off.
  5209. */
  5210. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5211. {
  5212. __le32 *image = priv->ucode_boot.v_addr;
  5213. u32 len = priv->ucode_boot.len;
  5214. dma_addr_t pinst;
  5215. dma_addr_t pdata;
  5216. u32 inst_len;
  5217. u32 data_len;
  5218. int rc;
  5219. int i;
  5220. u32 done;
  5221. u32 reg_offset;
  5222. IWL_DEBUG_INFO("Begin load bsm\n");
  5223. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5224. if (len > IWL_MAX_BSM_SIZE)
  5225. return -EINVAL;
  5226. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5227. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5228. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5229. * after the "initialize" uCode has run, to point to
  5230. * runtime/protocol instructions and backup data cache. */
  5231. pinst = priv->ucode_init.p_addr >> 4;
  5232. pdata = priv->ucode_init_data.p_addr >> 4;
  5233. inst_len = priv->ucode_init.len;
  5234. data_len = priv->ucode_init_data.len;
  5235. rc = iwl4965_grab_nic_access(priv);
  5236. if (rc)
  5237. return rc;
  5238. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5239. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5240. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5241. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5242. /* Fill BSM memory with bootstrap instructions */
  5243. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5244. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5245. reg_offset += sizeof(u32), image++)
  5246. _iwl4965_write_prph(priv, reg_offset,
  5247. le32_to_cpu(*image));
  5248. rc = iwl4965_verify_bsm(priv);
  5249. if (rc) {
  5250. iwl4965_release_nic_access(priv);
  5251. return rc;
  5252. }
  5253. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5254. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5255. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5256. RTC_INST_LOWER_BOUND);
  5257. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5258. /* Load bootstrap code into instruction SRAM now,
  5259. * to prepare to load "initialize" uCode */
  5260. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5261. BSM_WR_CTRL_REG_BIT_START);
  5262. /* Wait for load of bootstrap uCode to finish */
  5263. for (i = 0; i < 100; i++) {
  5264. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5265. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5266. break;
  5267. udelay(10);
  5268. }
  5269. if (i < 100)
  5270. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5271. else {
  5272. IWL_ERROR("BSM write did not complete!\n");
  5273. return -EIO;
  5274. }
  5275. /* Enable future boot loads whenever power management unit triggers it
  5276. * (e.g. when powering back up after power-save shutdown) */
  5277. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5278. BSM_WR_CTRL_REG_BIT_START_EN);
  5279. iwl4965_release_nic_access(priv);
  5280. return 0;
  5281. }
  5282. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5283. {
  5284. /* Remove all resets to allow NIC to operate */
  5285. iwl4965_write32(priv, CSR_RESET, 0);
  5286. }
  5287. /**
  5288. * iwl4965_read_ucode - Read uCode images from disk file.
  5289. *
  5290. * Copy into buffers for card to fetch via bus-mastering
  5291. */
  5292. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5293. {
  5294. struct iwl4965_ucode *ucode;
  5295. int ret;
  5296. const struct firmware *ucode_raw;
  5297. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5298. u8 *src;
  5299. size_t len;
  5300. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5301. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5302. * request_firmware() is synchronous, file is in memory on return. */
  5303. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5304. if (ret < 0) {
  5305. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5306. name, ret);
  5307. goto error;
  5308. }
  5309. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5310. name, ucode_raw->size);
  5311. /* Make sure that we got at least our header! */
  5312. if (ucode_raw->size < sizeof(*ucode)) {
  5313. IWL_ERROR("File size way too small!\n");
  5314. ret = -EINVAL;
  5315. goto err_release;
  5316. }
  5317. /* Data from ucode file: header followed by uCode images */
  5318. ucode = (void *)ucode_raw->data;
  5319. ver = le32_to_cpu(ucode->ver);
  5320. inst_size = le32_to_cpu(ucode->inst_size);
  5321. data_size = le32_to_cpu(ucode->data_size);
  5322. init_size = le32_to_cpu(ucode->init_size);
  5323. init_data_size = le32_to_cpu(ucode->init_data_size);
  5324. boot_size = le32_to_cpu(ucode->boot_size);
  5325. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5326. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5327. inst_size);
  5328. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5329. data_size);
  5330. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5331. init_size);
  5332. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5333. init_data_size);
  5334. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5335. boot_size);
  5336. /* Verify size of file vs. image size info in file's header */
  5337. if (ucode_raw->size < sizeof(*ucode) +
  5338. inst_size + data_size + init_size +
  5339. init_data_size + boot_size) {
  5340. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5341. (int)ucode_raw->size);
  5342. ret = -EINVAL;
  5343. goto err_release;
  5344. }
  5345. /* Verify that uCode images will fit in card's SRAM */
  5346. if (inst_size > IWL_MAX_INST_SIZE) {
  5347. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5348. inst_size);
  5349. ret = -EINVAL;
  5350. goto err_release;
  5351. }
  5352. if (data_size > IWL_MAX_DATA_SIZE) {
  5353. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5354. data_size);
  5355. ret = -EINVAL;
  5356. goto err_release;
  5357. }
  5358. if (init_size > IWL_MAX_INST_SIZE) {
  5359. IWL_DEBUG_INFO
  5360. ("uCode init instr len %d too large to fit in\n",
  5361. init_size);
  5362. ret = -EINVAL;
  5363. goto err_release;
  5364. }
  5365. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5366. IWL_DEBUG_INFO
  5367. ("uCode init data len %d too large to fit in\n",
  5368. init_data_size);
  5369. ret = -EINVAL;
  5370. goto err_release;
  5371. }
  5372. if (boot_size > IWL_MAX_BSM_SIZE) {
  5373. IWL_DEBUG_INFO
  5374. ("uCode boot instr len %d too large to fit in\n",
  5375. boot_size);
  5376. ret = -EINVAL;
  5377. goto err_release;
  5378. }
  5379. /* Allocate ucode buffers for card's bus-master loading ... */
  5380. /* Runtime instructions and 2 copies of data:
  5381. * 1) unmodified from disk
  5382. * 2) backup cache for save/restore during power-downs */
  5383. priv->ucode_code.len = inst_size;
  5384. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5385. priv->ucode_data.len = data_size;
  5386. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5387. priv->ucode_data_backup.len = data_size;
  5388. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5389. /* Initialization instructions and data */
  5390. if (init_size && init_data_size) {
  5391. priv->ucode_init.len = init_size;
  5392. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5393. priv->ucode_init_data.len = init_data_size;
  5394. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5395. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5396. goto err_pci_alloc;
  5397. }
  5398. /* Bootstrap (instructions only, no data) */
  5399. if (boot_size) {
  5400. priv->ucode_boot.len = boot_size;
  5401. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5402. if (!priv->ucode_boot.v_addr)
  5403. goto err_pci_alloc;
  5404. }
  5405. /* Copy images into buffers for card's bus-master reads ... */
  5406. /* Runtime instructions (first block of data in file) */
  5407. src = &ucode->data[0];
  5408. len = priv->ucode_code.len;
  5409. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5410. memcpy(priv->ucode_code.v_addr, src, len);
  5411. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5412. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5413. /* Runtime data (2nd block)
  5414. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5415. src = &ucode->data[inst_size];
  5416. len = priv->ucode_data.len;
  5417. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5418. memcpy(priv->ucode_data.v_addr, src, len);
  5419. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5420. /* Initialization instructions (3rd block) */
  5421. if (init_size) {
  5422. src = &ucode->data[inst_size + data_size];
  5423. len = priv->ucode_init.len;
  5424. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5425. len);
  5426. memcpy(priv->ucode_init.v_addr, src, len);
  5427. }
  5428. /* Initialization data (4th block) */
  5429. if (init_data_size) {
  5430. src = &ucode->data[inst_size + data_size + init_size];
  5431. len = priv->ucode_init_data.len;
  5432. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5433. len);
  5434. memcpy(priv->ucode_init_data.v_addr, src, len);
  5435. }
  5436. /* Bootstrap instructions (5th block) */
  5437. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5438. len = priv->ucode_boot.len;
  5439. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5440. memcpy(priv->ucode_boot.v_addr, src, len);
  5441. /* We have our copies now, allow OS release its copies */
  5442. release_firmware(ucode_raw);
  5443. return 0;
  5444. err_pci_alloc:
  5445. IWL_ERROR("failed to allocate pci memory\n");
  5446. ret = -ENOMEM;
  5447. iwl4965_dealloc_ucode_pci(priv);
  5448. err_release:
  5449. release_firmware(ucode_raw);
  5450. error:
  5451. return ret;
  5452. }
  5453. /**
  5454. * iwl4965_set_ucode_ptrs - Set uCode address location
  5455. *
  5456. * Tell initialization uCode where to find runtime uCode.
  5457. *
  5458. * BSM registers initially contain pointers to initialization uCode.
  5459. * We need to replace them to load runtime uCode inst and data,
  5460. * and to save runtime data when powering down.
  5461. */
  5462. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5463. {
  5464. dma_addr_t pinst;
  5465. dma_addr_t pdata;
  5466. int rc = 0;
  5467. unsigned long flags;
  5468. /* bits 35:4 for 4965 */
  5469. pinst = priv->ucode_code.p_addr >> 4;
  5470. pdata = priv->ucode_data_backup.p_addr >> 4;
  5471. spin_lock_irqsave(&priv->lock, flags);
  5472. rc = iwl4965_grab_nic_access(priv);
  5473. if (rc) {
  5474. spin_unlock_irqrestore(&priv->lock, flags);
  5475. return rc;
  5476. }
  5477. /* Tell bootstrap uCode where to find image to load */
  5478. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5479. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5480. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5481. priv->ucode_data.len);
  5482. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5483. * that all new ptr/size info is in place */
  5484. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5485. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5486. iwl4965_release_nic_access(priv);
  5487. spin_unlock_irqrestore(&priv->lock, flags);
  5488. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5489. return rc;
  5490. }
  5491. /**
  5492. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5493. *
  5494. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5495. *
  5496. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5497. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5498. * (3945 does not contain this data).
  5499. *
  5500. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5501. */
  5502. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5503. {
  5504. /* Check alive response for "valid" sign from uCode */
  5505. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5506. /* We had an error bringing up the hardware, so take it
  5507. * all the way back down so we can try again */
  5508. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5509. goto restart;
  5510. }
  5511. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5512. * This is a paranoid check, because we would not have gotten the
  5513. * "initialize" alive if code weren't properly loaded. */
  5514. if (iwl4965_verify_ucode(priv)) {
  5515. /* Runtime instruction load was bad;
  5516. * take it all the way back down so we can try again */
  5517. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5518. goto restart;
  5519. }
  5520. /* Calculate temperature */
  5521. priv->temperature = iwl4965_get_temperature(priv);
  5522. /* Send pointers to protocol/runtime uCode image ... init code will
  5523. * load and launch runtime uCode, which will send us another "Alive"
  5524. * notification. */
  5525. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5526. if (iwl4965_set_ucode_ptrs(priv)) {
  5527. /* Runtime instruction load won't happen;
  5528. * take it all the way back down so we can try again */
  5529. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5530. goto restart;
  5531. }
  5532. return;
  5533. restart:
  5534. queue_work(priv->workqueue, &priv->restart);
  5535. }
  5536. /**
  5537. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5538. * from protocol/runtime uCode (initialization uCode's
  5539. * Alive gets handled by iwl4965_init_alive_start()).
  5540. */
  5541. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5542. {
  5543. int rc = 0;
  5544. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5545. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5546. /* We had an error bringing up the hardware, so take it
  5547. * all the way back down so we can try again */
  5548. IWL_DEBUG_INFO("Alive failed.\n");
  5549. goto restart;
  5550. }
  5551. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5552. * This is a paranoid check, because we would not have gotten the
  5553. * "runtime" alive if code weren't properly loaded. */
  5554. if (iwl4965_verify_ucode(priv)) {
  5555. /* Runtime instruction load was bad;
  5556. * take it all the way back down so we can try again */
  5557. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5558. goto restart;
  5559. }
  5560. iwl4965_clear_stations_table(priv);
  5561. rc = iwl4965_alive_notify(priv);
  5562. if (rc) {
  5563. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5564. rc);
  5565. goto restart;
  5566. }
  5567. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5568. set_bit(STATUS_ALIVE, &priv->status);
  5569. /* Clear out the uCode error bit if it is set */
  5570. clear_bit(STATUS_FW_ERROR, &priv->status);
  5571. if (iwl4965_is_rfkill(priv))
  5572. return;
  5573. ieee80211_start_queues(priv->hw);
  5574. priv->active_rate = priv->rates_mask;
  5575. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5576. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5577. if (iwl4965_is_associated(priv)) {
  5578. struct iwl4965_rxon_cmd *active_rxon =
  5579. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5580. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5581. sizeof(priv->staging_rxon));
  5582. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5583. } else {
  5584. /* Initialize our rx_config data */
  5585. iwl4965_connection_init_rx_config(priv);
  5586. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5587. }
  5588. /* Configure Bluetooth device coexistence support */
  5589. iwl4965_send_bt_config(priv);
  5590. /* Configure the adapter for unassociated operation */
  5591. iwl4965_commit_rxon(priv);
  5592. /* At this point, the NIC is initialized and operational */
  5593. priv->notif_missed_beacons = 0;
  5594. set_bit(STATUS_READY, &priv->status);
  5595. iwl4965_rf_kill_ct_config(priv);
  5596. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5597. wake_up_interruptible(&priv->wait_command_queue);
  5598. if (priv->error_recovering)
  5599. iwl4965_error_recovery(priv);
  5600. return;
  5601. restart:
  5602. queue_work(priv->workqueue, &priv->restart);
  5603. }
  5604. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5605. static void __iwl4965_down(struct iwl4965_priv *priv)
  5606. {
  5607. unsigned long flags;
  5608. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5609. struct ieee80211_conf *conf = NULL;
  5610. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5611. conf = ieee80211_get_hw_conf(priv->hw);
  5612. if (!exit_pending)
  5613. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5614. iwl4965_clear_stations_table(priv);
  5615. /* Unblock any waiting calls */
  5616. wake_up_interruptible_all(&priv->wait_command_queue);
  5617. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5618. * exiting the module */
  5619. if (!exit_pending)
  5620. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5621. /* stop and reset the on-board processor */
  5622. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5623. /* tell the device to stop sending interrupts */
  5624. iwl4965_disable_interrupts(priv);
  5625. if (priv->mac80211_registered)
  5626. ieee80211_stop_queues(priv->hw);
  5627. /* If we have not previously called iwl4965_init() then
  5628. * clear all bits but the RF Kill and SUSPEND bits and return */
  5629. if (!iwl4965_is_init(priv)) {
  5630. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5631. STATUS_RF_KILL_HW |
  5632. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5633. STATUS_RF_KILL_SW |
  5634. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5635. STATUS_GEO_CONFIGURED |
  5636. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5637. STATUS_IN_SUSPEND;
  5638. goto exit;
  5639. }
  5640. /* ...otherwise clear out all the status bits but the RF Kill and
  5641. * SUSPEND bits and continue taking the NIC down. */
  5642. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5643. STATUS_RF_KILL_HW |
  5644. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5645. STATUS_RF_KILL_SW |
  5646. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5647. STATUS_GEO_CONFIGURED |
  5648. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5649. STATUS_IN_SUSPEND |
  5650. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5651. STATUS_FW_ERROR;
  5652. spin_lock_irqsave(&priv->lock, flags);
  5653. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5654. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5655. spin_unlock_irqrestore(&priv->lock, flags);
  5656. iwl4965_hw_txq_ctx_stop(priv);
  5657. iwl4965_hw_rxq_stop(priv);
  5658. spin_lock_irqsave(&priv->lock, flags);
  5659. if (!iwl4965_grab_nic_access(priv)) {
  5660. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5661. APMG_CLK_VAL_DMA_CLK_RQT);
  5662. iwl4965_release_nic_access(priv);
  5663. }
  5664. spin_unlock_irqrestore(&priv->lock, flags);
  5665. udelay(5);
  5666. iwl4965_hw_nic_stop_master(priv);
  5667. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5668. iwl4965_hw_nic_reset(priv);
  5669. exit:
  5670. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5671. if (priv->ibss_beacon)
  5672. dev_kfree_skb(priv->ibss_beacon);
  5673. priv->ibss_beacon = NULL;
  5674. /* clear out any free frames */
  5675. iwl4965_clear_free_frames(priv);
  5676. }
  5677. static void iwl4965_down(struct iwl4965_priv *priv)
  5678. {
  5679. mutex_lock(&priv->mutex);
  5680. __iwl4965_down(priv);
  5681. mutex_unlock(&priv->mutex);
  5682. iwl4965_cancel_deferred_work(priv);
  5683. }
  5684. #define MAX_HW_RESTARTS 5
  5685. static int __iwl4965_up(struct iwl4965_priv *priv)
  5686. {
  5687. int rc, i;
  5688. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5689. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5690. return -EIO;
  5691. }
  5692. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5693. IWL_WARNING("Radio disabled by SW RF kill (module "
  5694. "parameter)\n");
  5695. return -ENODEV;
  5696. }
  5697. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5698. IWL_ERROR("ucode not available for device bringup\n");
  5699. return -EIO;
  5700. }
  5701. /* If platform's RF_KILL switch is NOT set to KILL */
  5702. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5703. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5704. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5705. else {
  5706. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5707. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5708. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5709. return -ENODEV;
  5710. }
  5711. }
  5712. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5713. rc = iwl4965_hw_nic_init(priv);
  5714. if (rc) {
  5715. IWL_ERROR("Unable to int nic\n");
  5716. return rc;
  5717. }
  5718. /* make sure rfkill handshake bits are cleared */
  5719. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5720. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5721. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5722. /* clear (again), then enable host interrupts */
  5723. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5724. iwl4965_enable_interrupts(priv);
  5725. /* really make sure rfkill handshake bits are cleared */
  5726. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5727. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5728. /* Copy original ucode data image from disk into backup cache.
  5729. * This will be used to initialize the on-board processor's
  5730. * data SRAM for a clean start when the runtime program first loads. */
  5731. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5732. priv->ucode_data.len);
  5733. /* We return success when we resume from suspend and rf_kill is on. */
  5734. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5735. return 0;
  5736. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5737. iwl4965_clear_stations_table(priv);
  5738. /* load bootstrap state machine,
  5739. * load bootstrap program into processor's memory,
  5740. * prepare to load the "initialize" uCode */
  5741. rc = iwl4965_load_bsm(priv);
  5742. if (rc) {
  5743. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5744. continue;
  5745. }
  5746. /* start card; "initialize" will load runtime ucode */
  5747. iwl4965_nic_start(priv);
  5748. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5749. return 0;
  5750. }
  5751. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5752. __iwl4965_down(priv);
  5753. /* tried to restart and config the device for as long as our
  5754. * patience could withstand */
  5755. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5756. return -EIO;
  5757. }
  5758. /*****************************************************************************
  5759. *
  5760. * Workqueue callbacks
  5761. *
  5762. *****************************************************************************/
  5763. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5764. {
  5765. struct iwl4965_priv *priv =
  5766. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5767. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5768. return;
  5769. mutex_lock(&priv->mutex);
  5770. iwl4965_init_alive_start(priv);
  5771. mutex_unlock(&priv->mutex);
  5772. }
  5773. static void iwl4965_bg_alive_start(struct work_struct *data)
  5774. {
  5775. struct iwl4965_priv *priv =
  5776. container_of(data, struct iwl4965_priv, alive_start.work);
  5777. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5778. return;
  5779. mutex_lock(&priv->mutex);
  5780. iwl4965_alive_start(priv);
  5781. mutex_unlock(&priv->mutex);
  5782. }
  5783. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5784. {
  5785. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5786. wake_up_interruptible(&priv->wait_command_queue);
  5787. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5788. return;
  5789. mutex_lock(&priv->mutex);
  5790. if (!iwl4965_is_rfkill(priv)) {
  5791. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5792. "HW and/or SW RF Kill no longer active, restarting "
  5793. "device\n");
  5794. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5795. queue_work(priv->workqueue, &priv->restart);
  5796. } else {
  5797. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5798. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5799. "disabled by SW switch\n");
  5800. else
  5801. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5802. "Kill switch must be turned off for "
  5803. "wireless networking to work.\n");
  5804. }
  5805. mutex_unlock(&priv->mutex);
  5806. }
  5807. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5808. static void iwl4965_bg_scan_check(struct work_struct *data)
  5809. {
  5810. struct iwl4965_priv *priv =
  5811. container_of(data, struct iwl4965_priv, scan_check.work);
  5812. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5813. return;
  5814. mutex_lock(&priv->mutex);
  5815. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5816. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5817. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5818. "Scan completion watchdog resetting adapter (%dms)\n",
  5819. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5820. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5821. iwl4965_send_scan_abort(priv);
  5822. }
  5823. mutex_unlock(&priv->mutex);
  5824. }
  5825. static void iwl4965_bg_request_scan(struct work_struct *data)
  5826. {
  5827. struct iwl4965_priv *priv =
  5828. container_of(data, struct iwl4965_priv, request_scan);
  5829. struct iwl4965_host_cmd cmd = {
  5830. .id = REPLY_SCAN_CMD,
  5831. .len = sizeof(struct iwl4965_scan_cmd),
  5832. .meta.flags = CMD_SIZE_HUGE,
  5833. };
  5834. int rc = 0;
  5835. struct iwl4965_scan_cmd *scan;
  5836. struct ieee80211_conf *conf = NULL;
  5837. u8 direct_mask;
  5838. int phymode;
  5839. conf = ieee80211_get_hw_conf(priv->hw);
  5840. mutex_lock(&priv->mutex);
  5841. if (!iwl4965_is_ready(priv)) {
  5842. IWL_WARNING("request scan called when driver not ready.\n");
  5843. goto done;
  5844. }
  5845. /* Make sure the scan wasn't cancelled before this queued work
  5846. * was given the chance to run... */
  5847. if (!test_bit(STATUS_SCANNING, &priv->status))
  5848. goto done;
  5849. /* This should never be called or scheduled if there is currently
  5850. * a scan active in the hardware. */
  5851. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5852. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5853. "Ignoring second request.\n");
  5854. rc = -EIO;
  5855. goto done;
  5856. }
  5857. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5858. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5859. goto done;
  5860. }
  5861. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5862. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5863. goto done;
  5864. }
  5865. if (iwl4965_is_rfkill(priv)) {
  5866. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5867. goto done;
  5868. }
  5869. if (!test_bit(STATUS_READY, &priv->status)) {
  5870. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5871. goto done;
  5872. }
  5873. if (!priv->scan_bands) {
  5874. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5875. goto done;
  5876. }
  5877. if (!priv->scan) {
  5878. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5879. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5880. if (!priv->scan) {
  5881. rc = -ENOMEM;
  5882. goto done;
  5883. }
  5884. }
  5885. scan = priv->scan;
  5886. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5887. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5888. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5889. if (iwl4965_is_associated(priv)) {
  5890. u16 interval = 0;
  5891. u32 extra;
  5892. u32 suspend_time = 100;
  5893. u32 scan_suspend_time = 100;
  5894. unsigned long flags;
  5895. IWL_DEBUG_INFO("Scanning while associated...\n");
  5896. spin_lock_irqsave(&priv->lock, flags);
  5897. interval = priv->beacon_int;
  5898. spin_unlock_irqrestore(&priv->lock, flags);
  5899. scan->suspend_time = 0;
  5900. scan->max_out_time = cpu_to_le32(200 * 1024);
  5901. if (!interval)
  5902. interval = suspend_time;
  5903. extra = (suspend_time / interval) << 22;
  5904. scan_suspend_time = (extra |
  5905. ((suspend_time % interval) * 1024));
  5906. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5907. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5908. scan_suspend_time, interval);
  5909. }
  5910. /* We should add the ability for user to lock to PASSIVE ONLY */
  5911. if (priv->one_direct_scan) {
  5912. IWL_DEBUG_SCAN
  5913. ("Kicking off one direct scan for '%s'\n",
  5914. iwl4965_escape_essid(priv->direct_ssid,
  5915. priv->direct_ssid_len));
  5916. scan->direct_scan[0].id = WLAN_EID_SSID;
  5917. scan->direct_scan[0].len = priv->direct_ssid_len;
  5918. memcpy(scan->direct_scan[0].ssid,
  5919. priv->direct_ssid, priv->direct_ssid_len);
  5920. direct_mask = 1;
  5921. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5922. scan->direct_scan[0].id = WLAN_EID_SSID;
  5923. scan->direct_scan[0].len = priv->essid_len;
  5924. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5925. direct_mask = 1;
  5926. } else
  5927. direct_mask = 0;
  5928. /* We don't build a direct scan probe request; the uCode will do
  5929. * that based on the direct_mask added to each channel entry */
  5930. scan->tx_cmd.len = cpu_to_le16(
  5931. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5932. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
  5933. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5934. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5935. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5936. /* flags + rate selection */
  5937. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5938. switch (priv->scan_bands) {
  5939. case 2:
  5940. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5941. scan->tx_cmd.rate_n_flags =
  5942. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5943. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5944. scan->good_CRC_th = 0;
  5945. phymode = MODE_IEEE80211G;
  5946. break;
  5947. case 1:
  5948. scan->tx_cmd.rate_n_flags =
  5949. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5950. RATE_MCS_ANT_B_MSK);
  5951. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5952. phymode = MODE_IEEE80211A;
  5953. break;
  5954. default:
  5955. IWL_WARNING("Invalid scan band count\n");
  5956. goto done;
  5957. }
  5958. /* select Rx chains */
  5959. /* Force use of chains B and C (0x6) for scan Rx.
  5960. * Avoid A (0x1) because of its off-channel reception on A-band.
  5961. * MIMO is not used here, but value is required to make uCode happy. */
  5962. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5963. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5964. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5965. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5966. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5967. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5968. if (direct_mask)
  5969. IWL_DEBUG_SCAN
  5970. ("Initiating direct scan for %s.\n",
  5971. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5972. else
  5973. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5974. scan->channel_count =
  5975. iwl4965_get_channels_for_scan(
  5976. priv, phymode, 1, /* active */
  5977. direct_mask,
  5978. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5979. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5980. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5981. cmd.data = scan;
  5982. scan->len = cpu_to_le16(cmd.len);
  5983. set_bit(STATUS_SCAN_HW, &priv->status);
  5984. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5985. if (rc)
  5986. goto done;
  5987. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5988. IWL_SCAN_CHECK_WATCHDOG);
  5989. mutex_unlock(&priv->mutex);
  5990. return;
  5991. done:
  5992. /* inform mac80211 scan aborted */
  5993. queue_work(priv->workqueue, &priv->scan_completed);
  5994. mutex_unlock(&priv->mutex);
  5995. }
  5996. static void iwl4965_bg_up(struct work_struct *data)
  5997. {
  5998. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5999. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6000. return;
  6001. mutex_lock(&priv->mutex);
  6002. __iwl4965_up(priv);
  6003. mutex_unlock(&priv->mutex);
  6004. }
  6005. static void iwl4965_bg_restart(struct work_struct *data)
  6006. {
  6007. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  6008. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6009. return;
  6010. iwl4965_down(priv);
  6011. queue_work(priv->workqueue, &priv->up);
  6012. }
  6013. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6014. {
  6015. struct iwl4965_priv *priv =
  6016. container_of(data, struct iwl4965_priv, rx_replenish);
  6017. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6018. return;
  6019. mutex_lock(&priv->mutex);
  6020. iwl4965_rx_replenish(priv);
  6021. mutex_unlock(&priv->mutex);
  6022. }
  6023. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6024. static void iwl4965_bg_post_associate(struct work_struct *data)
  6025. {
  6026. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6027. post_associate.work);
  6028. int rc = 0;
  6029. struct ieee80211_conf *conf = NULL;
  6030. DECLARE_MAC_BUF(mac);
  6031. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6032. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6033. return;
  6034. }
  6035. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6036. priv->assoc_id,
  6037. print_mac(mac, priv->active_rxon.bssid_addr));
  6038. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6039. return;
  6040. mutex_lock(&priv->mutex);
  6041. if (!priv->vif || !priv->is_open) {
  6042. mutex_unlock(&priv->mutex);
  6043. return;
  6044. }
  6045. iwl4965_scan_cancel_timeout(priv, 200);
  6046. conf = ieee80211_get_hw_conf(priv->hw);
  6047. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6048. iwl4965_commit_rxon(priv);
  6049. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6050. iwl4965_setup_rxon_timing(priv);
  6051. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6052. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6053. if (rc)
  6054. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6055. "Attempting to continue.\n");
  6056. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6057. #ifdef CONFIG_IWL4965_HT
  6058. if (priv->current_ht_config.is_ht)
  6059. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  6060. #endif /* CONFIG_IWL4965_HT*/
  6061. iwl4965_set_rxon_chain(priv);
  6062. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6063. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6064. priv->assoc_id, priv->beacon_int);
  6065. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6066. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6067. else
  6068. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6069. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6070. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6071. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6072. else
  6073. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6074. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6075. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6076. }
  6077. iwl4965_commit_rxon(priv);
  6078. switch (priv->iw_mode) {
  6079. case IEEE80211_IF_TYPE_STA:
  6080. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6081. break;
  6082. case IEEE80211_IF_TYPE_IBSS:
  6083. /* clear out the station table */
  6084. iwl4965_clear_stations_table(priv);
  6085. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6086. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6087. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6088. iwl4965_send_beacon_cmd(priv);
  6089. break;
  6090. default:
  6091. IWL_ERROR("%s Should not be called in %d mode\n",
  6092. __FUNCTION__, priv->iw_mode);
  6093. break;
  6094. }
  6095. iwl4965_sequence_reset(priv);
  6096. #ifdef CONFIG_IWL4965_SENSITIVITY
  6097. /* Enable Rx differential gain and sensitivity calibrations */
  6098. iwl4965_chain_noise_reset(priv);
  6099. priv->start_calib = 1;
  6100. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6101. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6102. priv->assoc_station_added = 1;
  6103. #ifdef CONFIG_IWL4965_QOS
  6104. iwl4965_activate_qos(priv, 0);
  6105. #endif /* CONFIG_IWL4965_QOS */
  6106. /* we have just associated, don't start scan too early */
  6107. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6108. mutex_unlock(&priv->mutex);
  6109. }
  6110. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6111. {
  6112. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6113. if (!iwl4965_is_ready(priv))
  6114. return;
  6115. mutex_lock(&priv->mutex);
  6116. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6117. iwl4965_send_scan_abort(priv);
  6118. mutex_unlock(&priv->mutex);
  6119. }
  6120. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6121. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6122. {
  6123. struct iwl4965_priv *priv =
  6124. container_of(work, struct iwl4965_priv, scan_completed);
  6125. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6126. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6127. return;
  6128. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6129. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6130. ieee80211_scan_completed(priv->hw);
  6131. /* Since setting the TXPOWER may have been deferred while
  6132. * performing the scan, fire one off */
  6133. mutex_lock(&priv->mutex);
  6134. iwl4965_hw_reg_send_txpower(priv);
  6135. mutex_unlock(&priv->mutex);
  6136. }
  6137. /*****************************************************************************
  6138. *
  6139. * mac80211 entry point functions
  6140. *
  6141. *****************************************************************************/
  6142. #define UCODE_READY_TIMEOUT (2 * HZ)
  6143. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6144. {
  6145. struct iwl4965_priv *priv = hw->priv;
  6146. int ret;
  6147. IWL_DEBUG_MAC80211("enter\n");
  6148. if (pci_enable_device(priv->pci_dev)) {
  6149. IWL_ERROR("Fail to pci_enable_device\n");
  6150. return -ENODEV;
  6151. }
  6152. pci_restore_state(priv->pci_dev);
  6153. pci_enable_msi(priv->pci_dev);
  6154. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  6155. DRV_NAME, priv);
  6156. if (ret) {
  6157. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  6158. goto out_disable_msi;
  6159. }
  6160. /* we should be verifying the device is ready to be opened */
  6161. mutex_lock(&priv->mutex);
  6162. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  6163. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  6164. * ucode filename and max sizes are card-specific. */
  6165. if (!priv->ucode_code.len) {
  6166. ret = iwl4965_read_ucode(priv);
  6167. if (ret) {
  6168. IWL_ERROR("Could not read microcode: %d\n", ret);
  6169. mutex_unlock(&priv->mutex);
  6170. goto out_release_irq;
  6171. }
  6172. }
  6173. ret = __iwl4965_up(priv);
  6174. mutex_unlock(&priv->mutex);
  6175. if (ret)
  6176. goto out_release_irq;
  6177. IWL_DEBUG_INFO("Start UP work done.\n");
  6178. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  6179. return 0;
  6180. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  6181. * mac80211 will not be run successfully. */
  6182. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  6183. test_bit(STATUS_READY, &priv->status),
  6184. UCODE_READY_TIMEOUT);
  6185. if (!ret) {
  6186. if (!test_bit(STATUS_READY, &priv->status)) {
  6187. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  6188. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  6189. ret = -ETIMEDOUT;
  6190. goto out_release_irq;
  6191. }
  6192. }
  6193. priv->is_open = 1;
  6194. IWL_DEBUG_MAC80211("leave\n");
  6195. return 0;
  6196. out_release_irq:
  6197. free_irq(priv->pci_dev->irq, priv);
  6198. out_disable_msi:
  6199. pci_disable_msi(priv->pci_dev);
  6200. pci_disable_device(priv->pci_dev);
  6201. priv->is_open = 0;
  6202. IWL_DEBUG_MAC80211("leave - failed\n");
  6203. return ret;
  6204. }
  6205. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6206. {
  6207. struct iwl4965_priv *priv = hw->priv;
  6208. IWL_DEBUG_MAC80211("enter\n");
  6209. if (!priv->is_open) {
  6210. IWL_DEBUG_MAC80211("leave - skip\n");
  6211. return;
  6212. }
  6213. priv->is_open = 0;
  6214. if (iwl4965_is_ready_rf(priv)) {
  6215. /* stop mac, cancel any scan request and clear
  6216. * RXON_FILTER_ASSOC_MSK BIT
  6217. */
  6218. mutex_lock(&priv->mutex);
  6219. iwl4965_scan_cancel_timeout(priv, 100);
  6220. cancel_delayed_work(&priv->post_associate);
  6221. mutex_unlock(&priv->mutex);
  6222. }
  6223. iwl4965_down(priv);
  6224. flush_workqueue(priv->workqueue);
  6225. free_irq(priv->pci_dev->irq, priv);
  6226. pci_disable_msi(priv->pci_dev);
  6227. pci_save_state(priv->pci_dev);
  6228. pci_disable_device(priv->pci_dev);
  6229. IWL_DEBUG_MAC80211("leave\n");
  6230. }
  6231. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6232. struct ieee80211_tx_control *ctl)
  6233. {
  6234. struct iwl4965_priv *priv = hw->priv;
  6235. IWL_DEBUG_MAC80211("enter\n");
  6236. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6237. IWL_DEBUG_MAC80211("leave - monitor\n");
  6238. return -1;
  6239. }
  6240. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6241. ctl->tx_rate);
  6242. if (iwl4965_tx_skb(priv, skb, ctl))
  6243. dev_kfree_skb_any(skb);
  6244. IWL_DEBUG_MAC80211("leave\n");
  6245. return 0;
  6246. }
  6247. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6248. struct ieee80211_if_init_conf *conf)
  6249. {
  6250. struct iwl4965_priv *priv = hw->priv;
  6251. unsigned long flags;
  6252. DECLARE_MAC_BUF(mac);
  6253. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6254. if (priv->vif) {
  6255. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6256. return -EOPNOTSUPP;
  6257. }
  6258. spin_lock_irqsave(&priv->lock, flags);
  6259. priv->vif = conf->vif;
  6260. spin_unlock_irqrestore(&priv->lock, flags);
  6261. mutex_lock(&priv->mutex);
  6262. if (conf->mac_addr) {
  6263. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6264. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6265. }
  6266. if (iwl4965_is_ready(priv))
  6267. iwl4965_set_mode(priv, conf->type);
  6268. mutex_unlock(&priv->mutex);
  6269. IWL_DEBUG_MAC80211("leave\n");
  6270. return 0;
  6271. }
  6272. /**
  6273. * iwl4965_mac_config - mac80211 config callback
  6274. *
  6275. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6276. * be set inappropriately and the driver currently sets the hardware up to
  6277. * use it whenever needed.
  6278. */
  6279. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6280. {
  6281. struct iwl4965_priv *priv = hw->priv;
  6282. const struct iwl4965_channel_info *ch_info;
  6283. unsigned long flags;
  6284. int ret = 0;
  6285. mutex_lock(&priv->mutex);
  6286. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6287. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6288. if (!iwl4965_is_ready(priv)) {
  6289. IWL_DEBUG_MAC80211("leave - not ready\n");
  6290. ret = -EIO;
  6291. goto out;
  6292. }
  6293. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6294. test_bit(STATUS_SCANNING, &priv->status))) {
  6295. IWL_DEBUG_MAC80211("leave - scanning\n");
  6296. set_bit(STATUS_CONF_PENDING, &priv->status);
  6297. mutex_unlock(&priv->mutex);
  6298. return 0;
  6299. }
  6300. spin_lock_irqsave(&priv->lock, flags);
  6301. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6302. if (!is_channel_valid(ch_info)) {
  6303. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6304. conf->channel, conf->phymode);
  6305. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6306. spin_unlock_irqrestore(&priv->lock, flags);
  6307. ret = -EINVAL;
  6308. goto out;
  6309. }
  6310. #ifdef CONFIG_IWL4965_HT
  6311. /* if we are switching fron ht to 2.4 clear flags
  6312. * from any ht related info since 2.4 does not
  6313. * support ht */
  6314. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6315. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6316. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6317. #endif
  6318. )
  6319. priv->staging_rxon.flags = 0;
  6320. #endif /* CONFIG_IWL4965_HT */
  6321. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6322. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6323. /* The list of supported rates and rate mask can be different
  6324. * for each phymode; since the phymode may have changed, reset
  6325. * the rate mask to what mac80211 lists */
  6326. iwl4965_set_rate(priv);
  6327. spin_unlock_irqrestore(&priv->lock, flags);
  6328. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6329. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6330. iwl4965_hw_channel_switch(priv, conf->channel);
  6331. goto out;
  6332. }
  6333. #endif
  6334. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6335. if (!conf->radio_enabled) {
  6336. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6337. goto out;
  6338. }
  6339. if (iwl4965_is_rfkill(priv)) {
  6340. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6341. ret = -EIO;
  6342. goto out;
  6343. }
  6344. iwl4965_set_rate(priv);
  6345. if (memcmp(&priv->active_rxon,
  6346. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6347. iwl4965_commit_rxon(priv);
  6348. else
  6349. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6350. IWL_DEBUG_MAC80211("leave\n");
  6351. out:
  6352. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6353. mutex_unlock(&priv->mutex);
  6354. return ret;
  6355. }
  6356. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6357. {
  6358. int rc = 0;
  6359. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6360. return;
  6361. /* The following should be done only at AP bring up */
  6362. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6363. /* RXON - unassoc (to set timing command) */
  6364. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6365. iwl4965_commit_rxon(priv);
  6366. /* RXON Timing */
  6367. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6368. iwl4965_setup_rxon_timing(priv);
  6369. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6370. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6371. if (rc)
  6372. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6373. "Attempting to continue.\n");
  6374. iwl4965_set_rxon_chain(priv);
  6375. /* FIXME: what should be the assoc_id for AP? */
  6376. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6377. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6378. priv->staging_rxon.flags |=
  6379. RXON_FLG_SHORT_PREAMBLE_MSK;
  6380. else
  6381. priv->staging_rxon.flags &=
  6382. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6383. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6384. if (priv->assoc_capability &
  6385. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6386. priv->staging_rxon.flags |=
  6387. RXON_FLG_SHORT_SLOT_MSK;
  6388. else
  6389. priv->staging_rxon.flags &=
  6390. ~RXON_FLG_SHORT_SLOT_MSK;
  6391. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6392. priv->staging_rxon.flags &=
  6393. ~RXON_FLG_SHORT_SLOT_MSK;
  6394. }
  6395. /* restore RXON assoc */
  6396. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6397. iwl4965_commit_rxon(priv);
  6398. #ifdef CONFIG_IWL4965_QOS
  6399. iwl4965_activate_qos(priv, 1);
  6400. #endif
  6401. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6402. }
  6403. iwl4965_send_beacon_cmd(priv);
  6404. /* FIXME - we need to add code here to detect a totally new
  6405. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6406. * clear sta table, add BCAST sta... */
  6407. }
  6408. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6409. struct ieee80211_vif *vif,
  6410. struct ieee80211_if_conf *conf)
  6411. {
  6412. struct iwl4965_priv *priv = hw->priv;
  6413. DECLARE_MAC_BUF(mac);
  6414. unsigned long flags;
  6415. int rc;
  6416. if (conf == NULL)
  6417. return -EIO;
  6418. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6419. (!conf->beacon || !conf->ssid_len)) {
  6420. IWL_DEBUG_MAC80211
  6421. ("Leaving in AP mode because HostAPD is not ready.\n");
  6422. return 0;
  6423. }
  6424. if (!iwl4965_is_alive(priv))
  6425. return -EAGAIN;
  6426. mutex_lock(&priv->mutex);
  6427. if (conf->bssid)
  6428. IWL_DEBUG_MAC80211("bssid: %s\n",
  6429. print_mac(mac, conf->bssid));
  6430. /*
  6431. * very dubious code was here; the probe filtering flag is never set:
  6432. *
  6433. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6434. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6435. */
  6436. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6437. IWL_DEBUG_MAC80211("leave - scanning\n");
  6438. mutex_unlock(&priv->mutex);
  6439. return 0;
  6440. }
  6441. if (priv->vif != vif) {
  6442. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6443. mutex_unlock(&priv->mutex);
  6444. return 0;
  6445. }
  6446. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6447. if (!conf->bssid) {
  6448. conf->bssid = priv->mac_addr;
  6449. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6450. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6451. print_mac(mac, conf->bssid));
  6452. }
  6453. if (priv->ibss_beacon)
  6454. dev_kfree_skb(priv->ibss_beacon);
  6455. priv->ibss_beacon = conf->beacon;
  6456. }
  6457. if (iwl4965_is_rfkill(priv))
  6458. goto done;
  6459. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6460. !is_multicast_ether_addr(conf->bssid)) {
  6461. /* If there is currently a HW scan going on in the background
  6462. * then we need to cancel it else the RXON below will fail. */
  6463. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6464. IWL_WARNING("Aborted scan still in progress "
  6465. "after 100ms\n");
  6466. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6467. mutex_unlock(&priv->mutex);
  6468. return -EAGAIN;
  6469. }
  6470. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6471. /* TODO: Audit driver for usage of these members and see
  6472. * if mac80211 deprecates them (priv->bssid looks like it
  6473. * shouldn't be there, but I haven't scanned the IBSS code
  6474. * to verify) - jpk */
  6475. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6476. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6477. iwl4965_config_ap(priv);
  6478. else {
  6479. rc = iwl4965_commit_rxon(priv);
  6480. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6481. iwl4965_rxon_add_station(
  6482. priv, priv->active_rxon.bssid_addr, 1);
  6483. }
  6484. } else {
  6485. iwl4965_scan_cancel_timeout(priv, 100);
  6486. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6487. iwl4965_commit_rxon(priv);
  6488. }
  6489. done:
  6490. spin_lock_irqsave(&priv->lock, flags);
  6491. if (!conf->ssid_len)
  6492. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6493. else
  6494. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6495. priv->essid_len = conf->ssid_len;
  6496. spin_unlock_irqrestore(&priv->lock, flags);
  6497. IWL_DEBUG_MAC80211("leave\n");
  6498. mutex_unlock(&priv->mutex);
  6499. return 0;
  6500. }
  6501. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6502. unsigned int changed_flags,
  6503. unsigned int *total_flags,
  6504. int mc_count, struct dev_addr_list *mc_list)
  6505. {
  6506. /*
  6507. * XXX: dummy
  6508. * see also iwl4965_connection_init_rx_config
  6509. */
  6510. *total_flags = 0;
  6511. }
  6512. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6513. struct ieee80211_if_init_conf *conf)
  6514. {
  6515. struct iwl4965_priv *priv = hw->priv;
  6516. IWL_DEBUG_MAC80211("enter\n");
  6517. mutex_lock(&priv->mutex);
  6518. if (iwl4965_is_ready_rf(priv)) {
  6519. iwl4965_scan_cancel_timeout(priv, 100);
  6520. cancel_delayed_work(&priv->post_associate);
  6521. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6522. iwl4965_commit_rxon(priv);
  6523. }
  6524. if (priv->vif == conf->vif) {
  6525. priv->vif = NULL;
  6526. memset(priv->bssid, 0, ETH_ALEN);
  6527. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6528. priv->essid_len = 0;
  6529. }
  6530. mutex_unlock(&priv->mutex);
  6531. IWL_DEBUG_MAC80211("leave\n");
  6532. }
  6533. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6534. struct ieee80211_vif *vif,
  6535. struct ieee80211_bss_conf *bss_conf,
  6536. u32 changes)
  6537. {
  6538. struct iwl4965_priv *priv = hw->priv;
  6539. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6540. if (bss_conf->use_short_preamble)
  6541. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6542. else
  6543. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6544. }
  6545. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6546. if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
  6547. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6548. else
  6549. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6550. }
  6551. if (changes & BSS_CHANGED_ASSOC) {
  6552. /*
  6553. * TODO:
  6554. * do stuff instead of sniffing assoc resp
  6555. */
  6556. }
  6557. if (iwl4965_is_associated(priv))
  6558. iwl4965_send_rxon_assoc(priv);
  6559. }
  6560. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6561. {
  6562. int rc = 0;
  6563. unsigned long flags;
  6564. struct iwl4965_priv *priv = hw->priv;
  6565. IWL_DEBUG_MAC80211("enter\n");
  6566. mutex_lock(&priv->mutex);
  6567. spin_lock_irqsave(&priv->lock, flags);
  6568. if (!iwl4965_is_ready_rf(priv)) {
  6569. rc = -EIO;
  6570. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6571. goto out_unlock;
  6572. }
  6573. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6574. rc = -EIO;
  6575. IWL_ERROR("ERROR: APs don't scan\n");
  6576. goto out_unlock;
  6577. }
  6578. /* we don't schedule scan within next_scan_jiffies period */
  6579. if (priv->next_scan_jiffies &&
  6580. time_after(priv->next_scan_jiffies, jiffies)) {
  6581. rc = -EAGAIN;
  6582. goto out_unlock;
  6583. }
  6584. /* if we just finished scan ask for delay */
  6585. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6586. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6587. rc = -EAGAIN;
  6588. goto out_unlock;
  6589. }
  6590. if (len) {
  6591. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6592. iwl4965_escape_essid(ssid, len), (int)len);
  6593. priv->one_direct_scan = 1;
  6594. priv->direct_ssid_len = (u8)
  6595. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6596. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6597. } else
  6598. priv->one_direct_scan = 0;
  6599. rc = iwl4965_scan_initiate(priv);
  6600. IWL_DEBUG_MAC80211("leave\n");
  6601. out_unlock:
  6602. spin_unlock_irqrestore(&priv->lock, flags);
  6603. mutex_unlock(&priv->mutex);
  6604. return rc;
  6605. }
  6606. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6607. const u8 *local_addr, const u8 *addr,
  6608. struct ieee80211_key_conf *key)
  6609. {
  6610. struct iwl4965_priv *priv = hw->priv;
  6611. DECLARE_MAC_BUF(mac);
  6612. int rc = 0;
  6613. u8 sta_id;
  6614. IWL_DEBUG_MAC80211("enter\n");
  6615. if (!iwl4965_param_hwcrypto) {
  6616. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6617. return -EOPNOTSUPP;
  6618. }
  6619. if (is_zero_ether_addr(addr))
  6620. /* only support pairwise keys */
  6621. return -EOPNOTSUPP;
  6622. sta_id = iwl4965_hw_find_station(priv, addr);
  6623. if (sta_id == IWL_INVALID_STATION) {
  6624. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6625. print_mac(mac, addr));
  6626. return -EINVAL;
  6627. }
  6628. mutex_lock(&priv->mutex);
  6629. iwl4965_scan_cancel_timeout(priv, 100);
  6630. switch (cmd) {
  6631. case SET_KEY:
  6632. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6633. if (!rc) {
  6634. iwl4965_set_rxon_hwcrypto(priv, 1);
  6635. iwl4965_commit_rxon(priv);
  6636. key->hw_key_idx = sta_id;
  6637. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6638. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6639. }
  6640. break;
  6641. case DISABLE_KEY:
  6642. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6643. if (!rc) {
  6644. iwl4965_set_rxon_hwcrypto(priv, 0);
  6645. iwl4965_commit_rxon(priv);
  6646. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6647. }
  6648. break;
  6649. default:
  6650. rc = -EINVAL;
  6651. }
  6652. IWL_DEBUG_MAC80211("leave\n");
  6653. mutex_unlock(&priv->mutex);
  6654. return rc;
  6655. }
  6656. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6657. const struct ieee80211_tx_queue_params *params)
  6658. {
  6659. struct iwl4965_priv *priv = hw->priv;
  6660. #ifdef CONFIG_IWL4965_QOS
  6661. unsigned long flags;
  6662. int q;
  6663. #endif /* CONFIG_IWL4965_QOS */
  6664. IWL_DEBUG_MAC80211("enter\n");
  6665. if (!iwl4965_is_ready_rf(priv)) {
  6666. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6667. return -EIO;
  6668. }
  6669. if (queue >= AC_NUM) {
  6670. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6671. return 0;
  6672. }
  6673. #ifdef CONFIG_IWL4965_QOS
  6674. if (!priv->qos_data.qos_enable) {
  6675. priv->qos_data.qos_active = 0;
  6676. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6677. return 0;
  6678. }
  6679. q = AC_NUM - 1 - queue;
  6680. spin_lock_irqsave(&priv->lock, flags);
  6681. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6682. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6683. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6684. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6685. cpu_to_le16((params->burst_time * 100));
  6686. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6687. priv->qos_data.qos_active = 1;
  6688. spin_unlock_irqrestore(&priv->lock, flags);
  6689. mutex_lock(&priv->mutex);
  6690. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6691. iwl4965_activate_qos(priv, 1);
  6692. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6693. iwl4965_activate_qos(priv, 0);
  6694. mutex_unlock(&priv->mutex);
  6695. #endif /*CONFIG_IWL4965_QOS */
  6696. IWL_DEBUG_MAC80211("leave\n");
  6697. return 0;
  6698. }
  6699. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6700. struct ieee80211_tx_queue_stats *stats)
  6701. {
  6702. struct iwl4965_priv *priv = hw->priv;
  6703. int i, avail;
  6704. struct iwl4965_tx_queue *txq;
  6705. struct iwl4965_queue *q;
  6706. unsigned long flags;
  6707. IWL_DEBUG_MAC80211("enter\n");
  6708. if (!iwl4965_is_ready_rf(priv)) {
  6709. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6710. return -EIO;
  6711. }
  6712. spin_lock_irqsave(&priv->lock, flags);
  6713. for (i = 0; i < AC_NUM; i++) {
  6714. txq = &priv->txq[i];
  6715. q = &txq->q;
  6716. avail = iwl4965_queue_space(q);
  6717. stats->data[i].len = q->n_window - avail;
  6718. stats->data[i].limit = q->n_window - q->high_mark;
  6719. stats->data[i].count = q->n_window;
  6720. }
  6721. spin_unlock_irqrestore(&priv->lock, flags);
  6722. IWL_DEBUG_MAC80211("leave\n");
  6723. return 0;
  6724. }
  6725. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6726. struct ieee80211_low_level_stats *stats)
  6727. {
  6728. IWL_DEBUG_MAC80211("enter\n");
  6729. IWL_DEBUG_MAC80211("leave\n");
  6730. return 0;
  6731. }
  6732. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6733. {
  6734. IWL_DEBUG_MAC80211("enter\n");
  6735. IWL_DEBUG_MAC80211("leave\n");
  6736. return 0;
  6737. }
  6738. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6739. {
  6740. struct iwl4965_priv *priv = hw->priv;
  6741. unsigned long flags;
  6742. mutex_lock(&priv->mutex);
  6743. IWL_DEBUG_MAC80211("enter\n");
  6744. priv->lq_mngr.lq_ready = 0;
  6745. #ifdef CONFIG_IWL4965_HT
  6746. spin_lock_irqsave(&priv->lock, flags);
  6747. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6748. spin_unlock_irqrestore(&priv->lock, flags);
  6749. #ifdef CONFIG_IWL4965_HT_AGG
  6750. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6751. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6752. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6753. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6754. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6755. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6756. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6757. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6758. #endif /*CONFIG_IWL4965_HT_AGG */
  6759. #endif /* CONFIG_IWL4965_HT */
  6760. #ifdef CONFIG_IWL4965_QOS
  6761. iwl4965_reset_qos(priv);
  6762. #endif
  6763. cancel_delayed_work(&priv->post_associate);
  6764. spin_lock_irqsave(&priv->lock, flags);
  6765. priv->assoc_id = 0;
  6766. priv->assoc_capability = 0;
  6767. priv->call_post_assoc_from_beacon = 0;
  6768. priv->assoc_station_added = 0;
  6769. /* new association get rid of ibss beacon skb */
  6770. if (priv->ibss_beacon)
  6771. dev_kfree_skb(priv->ibss_beacon);
  6772. priv->ibss_beacon = NULL;
  6773. priv->beacon_int = priv->hw->conf.beacon_int;
  6774. priv->timestamp1 = 0;
  6775. priv->timestamp0 = 0;
  6776. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6777. priv->beacon_int = 0;
  6778. spin_unlock_irqrestore(&priv->lock, flags);
  6779. if (!iwl4965_is_ready_rf(priv)) {
  6780. IWL_DEBUG_MAC80211("leave - not ready\n");
  6781. mutex_unlock(&priv->mutex);
  6782. return;
  6783. }
  6784. /* we are restarting association process
  6785. * clear RXON_FILTER_ASSOC_MSK bit
  6786. */
  6787. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6788. iwl4965_scan_cancel_timeout(priv, 100);
  6789. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6790. iwl4965_commit_rxon(priv);
  6791. }
  6792. /* Per mac80211.h: This is only used in IBSS mode... */
  6793. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6794. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6795. mutex_unlock(&priv->mutex);
  6796. return;
  6797. }
  6798. priv->only_active_channel = 0;
  6799. iwl4965_set_rate(priv);
  6800. mutex_unlock(&priv->mutex);
  6801. IWL_DEBUG_MAC80211("leave\n");
  6802. }
  6803. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6804. struct ieee80211_tx_control *control)
  6805. {
  6806. struct iwl4965_priv *priv = hw->priv;
  6807. unsigned long flags;
  6808. mutex_lock(&priv->mutex);
  6809. IWL_DEBUG_MAC80211("enter\n");
  6810. if (!iwl4965_is_ready_rf(priv)) {
  6811. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6812. mutex_unlock(&priv->mutex);
  6813. return -EIO;
  6814. }
  6815. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6816. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6817. mutex_unlock(&priv->mutex);
  6818. return -EIO;
  6819. }
  6820. spin_lock_irqsave(&priv->lock, flags);
  6821. if (priv->ibss_beacon)
  6822. dev_kfree_skb(priv->ibss_beacon);
  6823. priv->ibss_beacon = skb;
  6824. priv->assoc_id = 0;
  6825. IWL_DEBUG_MAC80211("leave\n");
  6826. spin_unlock_irqrestore(&priv->lock, flags);
  6827. #ifdef CONFIG_IWL4965_QOS
  6828. iwl4965_reset_qos(priv);
  6829. #endif
  6830. queue_work(priv->workqueue, &priv->post_associate.work);
  6831. mutex_unlock(&priv->mutex);
  6832. return 0;
  6833. }
  6834. #ifdef CONFIG_IWL4965_HT
  6835. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6836. struct iwl4965_priv *priv)
  6837. {
  6838. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6839. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6840. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6841. IWL_DEBUG_MAC80211("enter: \n");
  6842. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6843. iwl_conf->is_ht = 0;
  6844. return;
  6845. }
  6846. iwl_conf->is_ht = 1;
  6847. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6848. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6849. iwl_conf->sgf |= 0x1;
  6850. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6851. iwl_conf->sgf |= 0x2;
  6852. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6853. iwl_conf->max_amsdu_size =
  6854. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6855. iwl_conf->supported_chan_width =
  6856. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6857. iwl_conf->tx_mimo_ps_mode =
  6858. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6859. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6860. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6861. iwl_conf->extension_chan_offset =
  6862. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6863. iwl_conf->tx_chan_width =
  6864. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6865. iwl_conf->ht_protection =
  6866. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6867. iwl_conf->non_GF_STA_present =
  6868. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6869. IWL_DEBUG_MAC80211("control channel %d\n",
  6870. iwl_conf->control_channel);
  6871. IWL_DEBUG_MAC80211("leave\n");
  6872. }
  6873. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6874. struct ieee80211_conf *conf)
  6875. {
  6876. struct iwl4965_priv *priv = hw->priv;
  6877. IWL_DEBUG_MAC80211("enter: \n");
  6878. iwl4965_ht_info_fill(conf, priv);
  6879. iwl4965_set_rxon_chain(priv);
  6880. if (priv && priv->assoc_id &&
  6881. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6882. unsigned long flags;
  6883. spin_lock_irqsave(&priv->lock, flags);
  6884. if (priv->beacon_int)
  6885. queue_work(priv->workqueue, &priv->post_associate.work);
  6886. else
  6887. priv->call_post_assoc_from_beacon = 1;
  6888. spin_unlock_irqrestore(&priv->lock, flags);
  6889. }
  6890. IWL_DEBUG_MAC80211("leave:\n");
  6891. return 0;
  6892. }
  6893. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6894. struct ieee80211_ht_cap *ht_cap,
  6895. u8 use_current_config)
  6896. {
  6897. struct ieee80211_conf *conf = &hw->conf;
  6898. struct ieee80211_hw_mode *mode = conf->mode;
  6899. if (use_current_config) {
  6900. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6901. memcpy(ht_cap->supp_mcs_set,
  6902. conf->ht_conf.supp_mcs_set, 16);
  6903. } else {
  6904. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6905. memcpy(ht_cap->supp_mcs_set,
  6906. mode->ht_info.supp_mcs_set, 16);
  6907. }
  6908. ht_cap->ampdu_params_info =
  6909. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6910. ((mode->ht_info.ampdu_density << 2) &
  6911. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6912. }
  6913. #endif /*CONFIG_IWL4965_HT*/
  6914. /*****************************************************************************
  6915. *
  6916. * sysfs attributes
  6917. *
  6918. *****************************************************************************/
  6919. #ifdef CONFIG_IWL4965_DEBUG
  6920. /*
  6921. * The following adds a new attribute to the sysfs representation
  6922. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6923. * used for controlling the debug level.
  6924. *
  6925. * See the level definitions in iwl for details.
  6926. */
  6927. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6928. {
  6929. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6930. }
  6931. static ssize_t store_debug_level(struct device_driver *d,
  6932. const char *buf, size_t count)
  6933. {
  6934. char *p = (char *)buf;
  6935. u32 val;
  6936. val = simple_strtoul(p, &p, 0);
  6937. if (p == buf)
  6938. printk(KERN_INFO DRV_NAME
  6939. ": %s is not in hex or decimal form.\n", buf);
  6940. else
  6941. iwl4965_debug_level = val;
  6942. return strnlen(buf, count);
  6943. }
  6944. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6945. show_debug_level, store_debug_level);
  6946. #endif /* CONFIG_IWL4965_DEBUG */
  6947. static ssize_t show_rf_kill(struct device *d,
  6948. struct device_attribute *attr, char *buf)
  6949. {
  6950. /*
  6951. * 0 - RF kill not enabled
  6952. * 1 - SW based RF kill active (sysfs)
  6953. * 2 - HW based RF kill active
  6954. * 3 - Both HW and SW based RF kill active
  6955. */
  6956. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6957. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6958. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6959. return sprintf(buf, "%i\n", val);
  6960. }
  6961. static ssize_t store_rf_kill(struct device *d,
  6962. struct device_attribute *attr,
  6963. const char *buf, size_t count)
  6964. {
  6965. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6966. mutex_lock(&priv->mutex);
  6967. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6968. mutex_unlock(&priv->mutex);
  6969. return count;
  6970. }
  6971. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6972. static ssize_t show_temperature(struct device *d,
  6973. struct device_attribute *attr, char *buf)
  6974. {
  6975. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6976. if (!iwl4965_is_alive(priv))
  6977. return -EAGAIN;
  6978. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6979. }
  6980. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6981. static ssize_t show_rs_window(struct device *d,
  6982. struct device_attribute *attr,
  6983. char *buf)
  6984. {
  6985. struct iwl4965_priv *priv = d->driver_data;
  6986. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6987. }
  6988. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6989. static ssize_t show_tx_power(struct device *d,
  6990. struct device_attribute *attr, char *buf)
  6991. {
  6992. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6993. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6994. }
  6995. static ssize_t store_tx_power(struct device *d,
  6996. struct device_attribute *attr,
  6997. const char *buf, size_t count)
  6998. {
  6999. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7000. char *p = (char *)buf;
  7001. u32 val;
  7002. val = simple_strtoul(p, &p, 10);
  7003. if (p == buf)
  7004. printk(KERN_INFO DRV_NAME
  7005. ": %s is not in decimal form.\n", buf);
  7006. else
  7007. iwl4965_hw_reg_set_txpower(priv, val);
  7008. return count;
  7009. }
  7010. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  7011. static ssize_t show_flags(struct device *d,
  7012. struct device_attribute *attr, char *buf)
  7013. {
  7014. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7015. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  7016. }
  7017. static ssize_t store_flags(struct device *d,
  7018. struct device_attribute *attr,
  7019. const char *buf, size_t count)
  7020. {
  7021. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7022. u32 flags = simple_strtoul(buf, NULL, 0);
  7023. mutex_lock(&priv->mutex);
  7024. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  7025. /* Cancel any currently running scans... */
  7026. if (iwl4965_scan_cancel_timeout(priv, 100))
  7027. IWL_WARNING("Could not cancel scan.\n");
  7028. else {
  7029. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  7030. flags);
  7031. priv->staging_rxon.flags = cpu_to_le32(flags);
  7032. iwl4965_commit_rxon(priv);
  7033. }
  7034. }
  7035. mutex_unlock(&priv->mutex);
  7036. return count;
  7037. }
  7038. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7039. static ssize_t show_filter_flags(struct device *d,
  7040. struct device_attribute *attr, char *buf)
  7041. {
  7042. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7043. return sprintf(buf, "0x%04X\n",
  7044. le32_to_cpu(priv->active_rxon.filter_flags));
  7045. }
  7046. static ssize_t store_filter_flags(struct device *d,
  7047. struct device_attribute *attr,
  7048. const char *buf, size_t count)
  7049. {
  7050. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7051. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7052. mutex_lock(&priv->mutex);
  7053. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7054. /* Cancel any currently running scans... */
  7055. if (iwl4965_scan_cancel_timeout(priv, 100))
  7056. IWL_WARNING("Could not cancel scan.\n");
  7057. else {
  7058. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7059. "0x%04X\n", filter_flags);
  7060. priv->staging_rxon.filter_flags =
  7061. cpu_to_le32(filter_flags);
  7062. iwl4965_commit_rxon(priv);
  7063. }
  7064. }
  7065. mutex_unlock(&priv->mutex);
  7066. return count;
  7067. }
  7068. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7069. store_filter_flags);
  7070. static ssize_t show_tune(struct device *d,
  7071. struct device_attribute *attr, char *buf)
  7072. {
  7073. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7074. return sprintf(buf, "0x%04X\n",
  7075. (priv->phymode << 8) |
  7076. le16_to_cpu(priv->active_rxon.channel));
  7077. }
  7078. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7079. static ssize_t store_tune(struct device *d,
  7080. struct device_attribute *attr,
  7081. const char *buf, size_t count)
  7082. {
  7083. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7084. char *p = (char *)buf;
  7085. u16 tune = simple_strtoul(p, &p, 0);
  7086. u8 phymode = (tune >> 8) & 0xff;
  7087. u16 channel = tune & 0xff;
  7088. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7089. mutex_lock(&priv->mutex);
  7090. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7091. (priv->phymode != phymode)) {
  7092. const struct iwl4965_channel_info *ch_info;
  7093. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7094. if (!ch_info) {
  7095. IWL_WARNING("Requested invalid phymode/channel "
  7096. "combination: %d %d\n", phymode, channel);
  7097. mutex_unlock(&priv->mutex);
  7098. return -EINVAL;
  7099. }
  7100. /* Cancel any currently running scans... */
  7101. if (iwl4965_scan_cancel_timeout(priv, 100))
  7102. IWL_WARNING("Could not cancel scan.\n");
  7103. else {
  7104. IWL_DEBUG_INFO("Committing phymode and "
  7105. "rxon.channel = %d %d\n",
  7106. phymode, channel);
  7107. iwl4965_set_rxon_channel(priv, phymode, channel);
  7108. iwl4965_set_flags_for_phymode(priv, phymode);
  7109. iwl4965_set_rate(priv);
  7110. iwl4965_commit_rxon(priv);
  7111. }
  7112. }
  7113. mutex_unlock(&priv->mutex);
  7114. return count;
  7115. }
  7116. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7117. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7118. static ssize_t show_measurement(struct device *d,
  7119. struct device_attribute *attr, char *buf)
  7120. {
  7121. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7122. struct iwl4965_spectrum_notification measure_report;
  7123. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7124. u8 *data = (u8 *) & measure_report;
  7125. unsigned long flags;
  7126. spin_lock_irqsave(&priv->lock, flags);
  7127. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7128. spin_unlock_irqrestore(&priv->lock, flags);
  7129. return 0;
  7130. }
  7131. memcpy(&measure_report, &priv->measure_report, size);
  7132. priv->measurement_status = 0;
  7133. spin_unlock_irqrestore(&priv->lock, flags);
  7134. while (size && (PAGE_SIZE - len)) {
  7135. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7136. PAGE_SIZE - len, 1);
  7137. len = strlen(buf);
  7138. if (PAGE_SIZE - len)
  7139. buf[len++] = '\n';
  7140. ofs += 16;
  7141. size -= min(size, 16U);
  7142. }
  7143. return len;
  7144. }
  7145. static ssize_t store_measurement(struct device *d,
  7146. struct device_attribute *attr,
  7147. const char *buf, size_t count)
  7148. {
  7149. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7150. struct ieee80211_measurement_params params = {
  7151. .channel = le16_to_cpu(priv->active_rxon.channel),
  7152. .start_time = cpu_to_le64(priv->last_tsf),
  7153. .duration = cpu_to_le16(1),
  7154. };
  7155. u8 type = IWL_MEASURE_BASIC;
  7156. u8 buffer[32];
  7157. u8 channel;
  7158. if (count) {
  7159. char *p = buffer;
  7160. strncpy(buffer, buf, min(sizeof(buffer), count));
  7161. channel = simple_strtoul(p, NULL, 0);
  7162. if (channel)
  7163. params.channel = channel;
  7164. p = buffer;
  7165. while (*p && *p != ' ')
  7166. p++;
  7167. if (*p)
  7168. type = simple_strtoul(p + 1, NULL, 0);
  7169. }
  7170. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7171. "channel %d (for '%s')\n", type, params.channel, buf);
  7172. iwl4965_get_measurement(priv, &params, type);
  7173. return count;
  7174. }
  7175. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7176. show_measurement, store_measurement);
  7177. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7178. static ssize_t store_retry_rate(struct device *d,
  7179. struct device_attribute *attr,
  7180. const char *buf, size_t count)
  7181. {
  7182. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7183. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7184. if (priv->retry_rate <= 0)
  7185. priv->retry_rate = 1;
  7186. return count;
  7187. }
  7188. static ssize_t show_retry_rate(struct device *d,
  7189. struct device_attribute *attr, char *buf)
  7190. {
  7191. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7192. return sprintf(buf, "%d", priv->retry_rate);
  7193. }
  7194. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7195. store_retry_rate);
  7196. static ssize_t store_power_level(struct device *d,
  7197. struct device_attribute *attr,
  7198. const char *buf, size_t count)
  7199. {
  7200. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7201. int rc;
  7202. int mode;
  7203. mode = simple_strtoul(buf, NULL, 0);
  7204. mutex_lock(&priv->mutex);
  7205. if (!iwl4965_is_ready(priv)) {
  7206. rc = -EAGAIN;
  7207. goto out;
  7208. }
  7209. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7210. mode = IWL_POWER_AC;
  7211. else
  7212. mode |= IWL_POWER_ENABLED;
  7213. if (mode != priv->power_mode) {
  7214. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7215. if (rc) {
  7216. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7217. goto out;
  7218. }
  7219. priv->power_mode = mode;
  7220. }
  7221. rc = count;
  7222. out:
  7223. mutex_unlock(&priv->mutex);
  7224. return rc;
  7225. }
  7226. #define MAX_WX_STRING 80
  7227. /* Values are in microsecond */
  7228. static const s32 timeout_duration[] = {
  7229. 350000,
  7230. 250000,
  7231. 75000,
  7232. 37000,
  7233. 25000,
  7234. };
  7235. static const s32 period_duration[] = {
  7236. 400000,
  7237. 700000,
  7238. 1000000,
  7239. 1000000,
  7240. 1000000
  7241. };
  7242. static ssize_t show_power_level(struct device *d,
  7243. struct device_attribute *attr, char *buf)
  7244. {
  7245. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7246. int level = IWL_POWER_LEVEL(priv->power_mode);
  7247. char *p = buf;
  7248. p += sprintf(p, "%d ", level);
  7249. switch (level) {
  7250. case IWL_POWER_MODE_CAM:
  7251. case IWL_POWER_AC:
  7252. p += sprintf(p, "(AC)");
  7253. break;
  7254. case IWL_POWER_BATTERY:
  7255. p += sprintf(p, "(BATTERY)");
  7256. break;
  7257. default:
  7258. p += sprintf(p,
  7259. "(Timeout %dms, Period %dms)",
  7260. timeout_duration[level - 1] / 1000,
  7261. period_duration[level - 1] / 1000);
  7262. }
  7263. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7264. p += sprintf(p, " OFF\n");
  7265. else
  7266. p += sprintf(p, " \n");
  7267. return (p - buf + 1);
  7268. }
  7269. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7270. store_power_level);
  7271. static ssize_t show_channels(struct device *d,
  7272. struct device_attribute *attr, char *buf)
  7273. {
  7274. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7275. int len = 0, i;
  7276. struct ieee80211_channel *channels = NULL;
  7277. const struct ieee80211_hw_mode *hw_mode = NULL;
  7278. int count = 0;
  7279. if (!iwl4965_is_ready(priv))
  7280. return -EAGAIN;
  7281. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7282. if (!hw_mode)
  7283. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7284. if (hw_mode) {
  7285. channels = hw_mode->channels;
  7286. count = hw_mode->num_channels;
  7287. }
  7288. len +=
  7289. sprintf(&buf[len],
  7290. "Displaying %d channels in 2.4GHz band "
  7291. "(802.11bg):\n", count);
  7292. for (i = 0; i < count; i++)
  7293. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7294. channels[i].chan,
  7295. channels[i].power_level,
  7296. channels[i].
  7297. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7298. " (IEEE 802.11h required)" : "",
  7299. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7300. || (channels[i].
  7301. flag &
  7302. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7303. ", IBSS",
  7304. channels[i].
  7305. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7306. "active/passive" : "passive only");
  7307. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7308. if (hw_mode) {
  7309. channels = hw_mode->channels;
  7310. count = hw_mode->num_channels;
  7311. } else {
  7312. channels = NULL;
  7313. count = 0;
  7314. }
  7315. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7316. "(802.11a):\n", count);
  7317. for (i = 0; i < count; i++)
  7318. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7319. channels[i].chan,
  7320. channels[i].power_level,
  7321. channels[i].
  7322. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7323. " (IEEE 802.11h required)" : "",
  7324. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7325. || (channels[i].
  7326. flag &
  7327. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7328. ", IBSS",
  7329. channels[i].
  7330. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7331. "active/passive" : "passive only");
  7332. return len;
  7333. }
  7334. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7335. static ssize_t show_statistics(struct device *d,
  7336. struct device_attribute *attr, char *buf)
  7337. {
  7338. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7339. u32 size = sizeof(struct iwl4965_notif_statistics);
  7340. u32 len = 0, ofs = 0;
  7341. u8 *data = (u8 *) & priv->statistics;
  7342. int rc = 0;
  7343. if (!iwl4965_is_alive(priv))
  7344. return -EAGAIN;
  7345. mutex_lock(&priv->mutex);
  7346. rc = iwl4965_send_statistics_request(priv);
  7347. mutex_unlock(&priv->mutex);
  7348. if (rc) {
  7349. len = sprintf(buf,
  7350. "Error sending statistics request: 0x%08X\n", rc);
  7351. return len;
  7352. }
  7353. while (size && (PAGE_SIZE - len)) {
  7354. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7355. PAGE_SIZE - len, 1);
  7356. len = strlen(buf);
  7357. if (PAGE_SIZE - len)
  7358. buf[len++] = '\n';
  7359. ofs += 16;
  7360. size -= min(size, 16U);
  7361. }
  7362. return len;
  7363. }
  7364. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7365. static ssize_t show_antenna(struct device *d,
  7366. struct device_attribute *attr, char *buf)
  7367. {
  7368. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7369. if (!iwl4965_is_alive(priv))
  7370. return -EAGAIN;
  7371. return sprintf(buf, "%d\n", priv->antenna);
  7372. }
  7373. static ssize_t store_antenna(struct device *d,
  7374. struct device_attribute *attr,
  7375. const char *buf, size_t count)
  7376. {
  7377. int ant;
  7378. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7379. if (count == 0)
  7380. return 0;
  7381. if (sscanf(buf, "%1i", &ant) != 1) {
  7382. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7383. return count;
  7384. }
  7385. if ((ant >= 0) && (ant <= 2)) {
  7386. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7387. priv->antenna = (enum iwl4965_antenna)ant;
  7388. } else
  7389. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7390. return count;
  7391. }
  7392. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7393. static ssize_t show_status(struct device *d,
  7394. struct device_attribute *attr, char *buf)
  7395. {
  7396. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7397. if (!iwl4965_is_alive(priv))
  7398. return -EAGAIN;
  7399. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7400. }
  7401. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7402. static ssize_t dump_error_log(struct device *d,
  7403. struct device_attribute *attr,
  7404. const char *buf, size_t count)
  7405. {
  7406. char *p = (char *)buf;
  7407. if (p[0] == '1')
  7408. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7409. return strnlen(buf, count);
  7410. }
  7411. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7412. static ssize_t dump_event_log(struct device *d,
  7413. struct device_attribute *attr,
  7414. const char *buf, size_t count)
  7415. {
  7416. char *p = (char *)buf;
  7417. if (p[0] == '1')
  7418. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7419. return strnlen(buf, count);
  7420. }
  7421. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7422. /*****************************************************************************
  7423. *
  7424. * driver setup and teardown
  7425. *
  7426. *****************************************************************************/
  7427. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7428. {
  7429. priv->workqueue = create_workqueue(DRV_NAME);
  7430. init_waitqueue_head(&priv->wait_command_queue);
  7431. INIT_WORK(&priv->up, iwl4965_bg_up);
  7432. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7433. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7434. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7435. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7436. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7437. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7438. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7439. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7440. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7441. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7442. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7443. iwl4965_hw_setup_deferred_work(priv);
  7444. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7445. iwl4965_irq_tasklet, (unsigned long)priv);
  7446. }
  7447. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7448. {
  7449. iwl4965_hw_cancel_deferred_work(priv);
  7450. cancel_delayed_work_sync(&priv->init_alive_start);
  7451. cancel_delayed_work(&priv->scan_check);
  7452. cancel_delayed_work(&priv->alive_start);
  7453. cancel_delayed_work(&priv->post_associate);
  7454. cancel_work_sync(&priv->beacon_update);
  7455. }
  7456. static struct attribute *iwl4965_sysfs_entries[] = {
  7457. &dev_attr_antenna.attr,
  7458. &dev_attr_channels.attr,
  7459. &dev_attr_dump_errors.attr,
  7460. &dev_attr_dump_events.attr,
  7461. &dev_attr_flags.attr,
  7462. &dev_attr_filter_flags.attr,
  7463. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7464. &dev_attr_measurement.attr,
  7465. #endif
  7466. &dev_attr_power_level.attr,
  7467. &dev_attr_retry_rate.attr,
  7468. &dev_attr_rf_kill.attr,
  7469. &dev_attr_rs_window.attr,
  7470. &dev_attr_statistics.attr,
  7471. &dev_attr_status.attr,
  7472. &dev_attr_temperature.attr,
  7473. &dev_attr_tune.attr,
  7474. &dev_attr_tx_power.attr,
  7475. NULL
  7476. };
  7477. static struct attribute_group iwl4965_attribute_group = {
  7478. .name = NULL, /* put in device directory */
  7479. .attrs = iwl4965_sysfs_entries,
  7480. };
  7481. static struct ieee80211_ops iwl4965_hw_ops = {
  7482. .tx = iwl4965_mac_tx,
  7483. .start = iwl4965_mac_start,
  7484. .stop = iwl4965_mac_stop,
  7485. .add_interface = iwl4965_mac_add_interface,
  7486. .remove_interface = iwl4965_mac_remove_interface,
  7487. .config = iwl4965_mac_config,
  7488. .config_interface = iwl4965_mac_config_interface,
  7489. .configure_filter = iwl4965_configure_filter,
  7490. .set_key = iwl4965_mac_set_key,
  7491. .get_stats = iwl4965_mac_get_stats,
  7492. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7493. .conf_tx = iwl4965_mac_conf_tx,
  7494. .get_tsf = iwl4965_mac_get_tsf,
  7495. .reset_tsf = iwl4965_mac_reset_tsf,
  7496. .beacon_update = iwl4965_mac_beacon_update,
  7497. .bss_info_changed = iwl4965_bss_info_changed,
  7498. #ifdef CONFIG_IWL4965_HT
  7499. .conf_ht = iwl4965_mac_conf_ht,
  7500. .ampdu_action = iwl4965_mac_ampdu_action,
  7501. #endif /* CONFIG_IWL4965_HT */
  7502. .hw_scan = iwl4965_mac_hw_scan
  7503. };
  7504. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7505. {
  7506. int err = 0;
  7507. struct iwl4965_priv *priv;
  7508. struct ieee80211_hw *hw;
  7509. int i;
  7510. DECLARE_MAC_BUF(mac);
  7511. /* Disabling hardware scan means that mac80211 will perform scans
  7512. * "the hard way", rather than using device's scan. */
  7513. if (iwl4965_param_disable_hw_scan) {
  7514. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7515. iwl4965_hw_ops.hw_scan = NULL;
  7516. }
  7517. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7518. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7519. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7520. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7521. err = -EINVAL;
  7522. goto out;
  7523. }
  7524. /* mac80211 allocates memory for this device instance, including
  7525. * space for this driver's private structure */
  7526. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7527. if (hw == NULL) {
  7528. IWL_ERROR("Can not allocate network device\n");
  7529. err = -ENOMEM;
  7530. goto out;
  7531. }
  7532. SET_IEEE80211_DEV(hw, &pdev->dev);
  7533. hw->rate_control_algorithm = "iwl-4965-rs";
  7534. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7535. priv = hw->priv;
  7536. priv->hw = hw;
  7537. priv->pci_dev = pdev;
  7538. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7539. #ifdef CONFIG_IWL4965_DEBUG
  7540. iwl4965_debug_level = iwl4965_param_debug;
  7541. atomic_set(&priv->restrict_refcnt, 0);
  7542. #endif
  7543. priv->retry_rate = 1;
  7544. priv->ibss_beacon = NULL;
  7545. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7546. * the range of signal quality values that we'll provide.
  7547. * Negative values for level/noise indicate that we'll provide dBm.
  7548. * For WE, at least, non-0 values here *enable* display of values
  7549. * in app (iwconfig). */
  7550. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7551. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7552. hw->max_signal = 100; /* link quality indication (%) */
  7553. /* Tell mac80211 our Tx characteristics */
  7554. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7555. /* Default value; 4 EDCA QOS priorities */
  7556. hw->queues = 4;
  7557. #ifdef CONFIG_IWL4965_HT
  7558. /* Enhanced value; more queues, to support 11n aggregation */
  7559. hw->queues = 16;
  7560. #endif /* CONFIG_IWL4965_HT */
  7561. spin_lock_init(&priv->lock);
  7562. spin_lock_init(&priv->power_data.lock);
  7563. spin_lock_init(&priv->sta_lock);
  7564. spin_lock_init(&priv->hcmd_lock);
  7565. spin_lock_init(&priv->lq_mngr.lock);
  7566. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7567. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7568. INIT_LIST_HEAD(&priv->free_frames);
  7569. mutex_init(&priv->mutex);
  7570. if (pci_enable_device(pdev)) {
  7571. err = -ENODEV;
  7572. goto out_ieee80211_free_hw;
  7573. }
  7574. pci_set_master(pdev);
  7575. /* Clear the driver's (not device's) station table */
  7576. iwl4965_clear_stations_table(priv);
  7577. priv->data_retry_limit = -1;
  7578. priv->ieee_channels = NULL;
  7579. priv->ieee_rates = NULL;
  7580. priv->phymode = -1;
  7581. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7582. if (!err)
  7583. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7584. if (err) {
  7585. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7586. goto out_pci_disable_device;
  7587. }
  7588. pci_set_drvdata(pdev, priv);
  7589. err = pci_request_regions(pdev, DRV_NAME);
  7590. if (err)
  7591. goto out_pci_disable_device;
  7592. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7593. * PCI Tx retries from interfering with C3 CPU state */
  7594. pci_write_config_byte(pdev, 0x41, 0x00);
  7595. priv->hw_base = pci_iomap(pdev, 0, 0);
  7596. if (!priv->hw_base) {
  7597. err = -ENODEV;
  7598. goto out_pci_release_regions;
  7599. }
  7600. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7601. (unsigned long long) pci_resource_len(pdev, 0));
  7602. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7603. /* Initialize module parameter values here */
  7604. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7605. if (iwl4965_param_disable) {
  7606. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7607. IWL_DEBUG_INFO("Radio disabled.\n");
  7608. }
  7609. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7610. priv->ps_mode = 0;
  7611. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7612. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7613. priv->ps_mode = IWL_MIMO_PS_NONE;
  7614. /* Choose which receivers/antennas to use */
  7615. iwl4965_set_rxon_chain(priv);
  7616. printk(KERN_INFO DRV_NAME
  7617. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7618. /* Device-specific setup */
  7619. if (iwl4965_hw_set_hw_setting(priv)) {
  7620. IWL_ERROR("failed to set hw settings\n");
  7621. goto out_iounmap;
  7622. }
  7623. #ifdef CONFIG_IWL4965_QOS
  7624. if (iwl4965_param_qos_enable)
  7625. priv->qos_data.qos_enable = 1;
  7626. iwl4965_reset_qos(priv);
  7627. priv->qos_data.qos_active = 0;
  7628. priv->qos_data.qos_cap.val = 0;
  7629. #endif /* CONFIG_IWL4965_QOS */
  7630. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7631. iwl4965_setup_deferred_work(priv);
  7632. iwl4965_setup_rx_handlers(priv);
  7633. priv->rates_mask = IWL_RATES_MASK;
  7634. /* If power management is turned on, default to AC mode */
  7635. priv->power_mode = IWL_POWER_AC;
  7636. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7637. iwl4965_disable_interrupts(priv);
  7638. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7639. if (err) {
  7640. IWL_ERROR("failed to create sysfs device attributes\n");
  7641. goto out_release_irq;
  7642. }
  7643. /* nic init */
  7644. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7645. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7646. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7647. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7648. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7649. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7650. if (err < 0) {
  7651. IWL_DEBUG_INFO("Failed to init the card\n");
  7652. goto out_remove_sysfs;
  7653. }
  7654. /* Read the EEPROM */
  7655. err = iwl4965_eeprom_init(priv);
  7656. if (err) {
  7657. IWL_ERROR("Unable to init EEPROM\n");
  7658. goto out_remove_sysfs;
  7659. }
  7660. /* MAC Address location in EEPROM same for 3945/4965 */
  7661. get_eeprom_mac(priv, priv->mac_addr);
  7662. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7663. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7664. err = iwl4965_init_channel_map(priv);
  7665. if (err) {
  7666. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7667. goto out_remove_sysfs;
  7668. }
  7669. err = iwl4965_init_geos(priv);
  7670. if (err) {
  7671. IWL_ERROR("initializing geos failed: %d\n", err);
  7672. goto out_free_channel_map;
  7673. }
  7674. iwl4965_reset_channel_flag(priv);
  7675. iwl4965_rate_control_register(priv->hw);
  7676. err = ieee80211_register_hw(priv->hw);
  7677. if (err) {
  7678. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7679. goto out_free_geos;
  7680. }
  7681. priv->hw->conf.beacon_int = 100;
  7682. priv->mac80211_registered = 1;
  7683. pci_save_state(pdev);
  7684. pci_disable_device(pdev);
  7685. return 0;
  7686. out_free_geos:
  7687. iwl4965_free_geos(priv);
  7688. out_free_channel_map:
  7689. iwl4965_free_channel_map(priv);
  7690. out_remove_sysfs:
  7691. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7692. out_release_irq:
  7693. destroy_workqueue(priv->workqueue);
  7694. priv->workqueue = NULL;
  7695. iwl4965_unset_hw_setting(priv);
  7696. out_iounmap:
  7697. pci_iounmap(pdev, priv->hw_base);
  7698. out_pci_release_regions:
  7699. pci_release_regions(pdev);
  7700. out_pci_disable_device:
  7701. pci_disable_device(pdev);
  7702. pci_set_drvdata(pdev, NULL);
  7703. out_ieee80211_free_hw:
  7704. ieee80211_free_hw(priv->hw);
  7705. out:
  7706. return err;
  7707. }
  7708. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7709. {
  7710. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7711. struct list_head *p, *q;
  7712. int i;
  7713. if (!priv)
  7714. return;
  7715. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7716. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7717. iwl4965_down(priv);
  7718. /* Free MAC hash list for ADHOC */
  7719. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7720. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7721. list_del(p);
  7722. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7723. }
  7724. }
  7725. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7726. iwl4965_dealloc_ucode_pci(priv);
  7727. if (priv->rxq.bd)
  7728. iwl4965_rx_queue_free(priv, &priv->rxq);
  7729. iwl4965_hw_txq_ctx_free(priv);
  7730. iwl4965_unset_hw_setting(priv);
  7731. iwl4965_clear_stations_table(priv);
  7732. if (priv->mac80211_registered) {
  7733. ieee80211_unregister_hw(priv->hw);
  7734. iwl4965_rate_control_unregister(priv->hw);
  7735. }
  7736. /*netif_stop_queue(dev); */
  7737. flush_workqueue(priv->workqueue);
  7738. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7739. * priv->workqueue... so we can't take down the workqueue
  7740. * until now... */
  7741. destroy_workqueue(priv->workqueue);
  7742. priv->workqueue = NULL;
  7743. pci_iounmap(pdev, priv->hw_base);
  7744. pci_release_regions(pdev);
  7745. pci_disable_device(pdev);
  7746. pci_set_drvdata(pdev, NULL);
  7747. iwl4965_free_channel_map(priv);
  7748. iwl4965_free_geos(priv);
  7749. if (priv->ibss_beacon)
  7750. dev_kfree_skb(priv->ibss_beacon);
  7751. ieee80211_free_hw(priv->hw);
  7752. }
  7753. #ifdef CONFIG_PM
  7754. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7755. {
  7756. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7757. if (priv->is_open) {
  7758. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7759. iwl4965_mac_stop(priv->hw);
  7760. priv->is_open = 1;
  7761. }
  7762. pci_set_power_state(pdev, PCI_D3hot);
  7763. return 0;
  7764. }
  7765. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7766. {
  7767. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7768. pci_set_power_state(pdev, PCI_D0);
  7769. if (priv->is_open)
  7770. iwl4965_mac_start(priv->hw);
  7771. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7772. return 0;
  7773. }
  7774. #endif /* CONFIG_PM */
  7775. /*****************************************************************************
  7776. *
  7777. * driver and module entry point
  7778. *
  7779. *****************************************************************************/
  7780. static struct pci_driver iwl4965_driver = {
  7781. .name = DRV_NAME,
  7782. .id_table = iwl4965_hw_card_ids,
  7783. .probe = iwl4965_pci_probe,
  7784. .remove = __devexit_p(iwl4965_pci_remove),
  7785. #ifdef CONFIG_PM
  7786. .suspend = iwl4965_pci_suspend,
  7787. .resume = iwl4965_pci_resume,
  7788. #endif
  7789. };
  7790. static int __init iwl4965_init(void)
  7791. {
  7792. int ret;
  7793. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7794. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7795. ret = pci_register_driver(&iwl4965_driver);
  7796. if (ret) {
  7797. IWL_ERROR("Unable to initialize PCI module\n");
  7798. return ret;
  7799. }
  7800. #ifdef CONFIG_IWL4965_DEBUG
  7801. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7802. if (ret) {
  7803. IWL_ERROR("Unable to create driver sysfs file\n");
  7804. pci_unregister_driver(&iwl4965_driver);
  7805. return ret;
  7806. }
  7807. #endif
  7808. return ret;
  7809. }
  7810. static void __exit iwl4965_exit(void)
  7811. {
  7812. #ifdef CONFIG_IWL4965_DEBUG
  7813. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7814. #endif
  7815. pci_unregister_driver(&iwl4965_driver);
  7816. }
  7817. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7818. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7819. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7820. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7821. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7822. MODULE_PARM_DESC(hwcrypto,
  7823. "using hardware crypto engine (default 0 [software])\n");
  7824. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7825. MODULE_PARM_DESC(debug, "debug output mask");
  7826. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7827. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7828. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7829. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7830. /* QoS */
  7831. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7832. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7833. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7834. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7835. module_exit(iwl4965_exit);
  7836. module_init(iwl4965_init);