rtc-s3c.c 15 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <asm/irq.h>
  31. #include <plat/regs-rtc.h>
  32. enum s3c_cpu_type {
  33. TYPE_S3C2410,
  34. TYPE_S3C64XX,
  35. };
  36. /* I have yet to find an S3C implementation with more than one
  37. * of these rtc blocks in */
  38. static struct resource *s3c_rtc_mem;
  39. static struct clk *rtc_clk;
  40. static void __iomem *s3c_rtc_base;
  41. static int s3c_rtc_alarmno = NO_IRQ;
  42. static int s3c_rtc_tickno = NO_IRQ;
  43. static enum s3c_cpu_type s3c_rtc_cpu_type;
  44. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  45. /* IRQ Handlers */
  46. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  47. {
  48. struct rtc_device *rdev = id;
  49. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  50. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  51. writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
  52. return IRQ_HANDLED;
  53. }
  54. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  55. {
  56. struct rtc_device *rdev = id;
  57. rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
  58. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  59. writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
  60. return IRQ_HANDLED;
  61. }
  62. /* Update control registers */
  63. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  64. {
  65. unsigned int tmp;
  66. pr_debug("%s: aie=%d\n", __func__, enabled);
  67. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  68. if (enabled)
  69. tmp |= S3C2410_RTCALM_ALMEN;
  70. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  71. return 0;
  72. }
  73. static int s3c_rtc_setfreq(struct device *dev, int freq)
  74. {
  75. struct platform_device *pdev = to_platform_device(dev);
  76. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  77. unsigned int tmp = 0;
  78. if (!is_power_of_2(freq))
  79. return -EINVAL;
  80. spin_lock_irq(&s3c_rtc_pie_lock);
  81. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  82. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  83. tmp &= S3C2410_TICNT_ENABLE;
  84. }
  85. tmp |= (rtc_dev->max_user_freq / freq)-1;
  86. writel(tmp, s3c_rtc_base + S3C2410_TICNT);
  87. spin_unlock_irq(&s3c_rtc_pie_lock);
  88. return 0;
  89. }
  90. /* Time read/write */
  91. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  92. {
  93. unsigned int have_retried = 0;
  94. void __iomem *base = s3c_rtc_base;
  95. retry_get_time:
  96. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  97. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  98. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  99. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  100. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  101. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  102. /* the only way to work out wether the system was mid-update
  103. * when we read it is to check the second counter, and if it
  104. * is zero, then we re-try the entire read
  105. */
  106. if (rtc_tm->tm_sec == 0 && !have_retried) {
  107. have_retried = 1;
  108. goto retry_get_time;
  109. }
  110. pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
  111. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  112. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  113. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  114. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  115. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  116. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  117. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  118. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  119. rtc_tm->tm_year += 100;
  120. rtc_tm->tm_mon -= 1;
  121. return rtc_valid_tm(rtc_tm);
  122. }
  123. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  124. {
  125. void __iomem *base = s3c_rtc_base;
  126. int year = tm->tm_year - 100;
  127. pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
  128. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  129. tm->tm_hour, tm->tm_min, tm->tm_sec);
  130. /* we get around y2k by simply not supporting it */
  131. if (year < 0 || year >= 100) {
  132. dev_err(dev, "rtc only supports 100 years\n");
  133. return -EINVAL;
  134. }
  135. writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
  136. writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
  137. writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
  138. writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
  139. writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
  140. writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
  141. return 0;
  142. }
  143. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  144. {
  145. struct rtc_time *alm_tm = &alrm->time;
  146. void __iomem *base = s3c_rtc_base;
  147. unsigned int alm_en;
  148. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  149. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  150. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  151. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  152. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  153. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  154. alm_en = readb(base + S3C2410_RTCALM);
  155. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  156. pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  157. alm_en,
  158. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  159. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  160. /* decode the alarm enable field */
  161. if (alm_en & S3C2410_RTCALM_SECEN)
  162. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  163. else
  164. alm_tm->tm_sec = -1;
  165. if (alm_en & S3C2410_RTCALM_MINEN)
  166. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  167. else
  168. alm_tm->tm_min = -1;
  169. if (alm_en & S3C2410_RTCALM_HOUREN)
  170. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  171. else
  172. alm_tm->tm_hour = -1;
  173. if (alm_en & S3C2410_RTCALM_DAYEN)
  174. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  175. else
  176. alm_tm->tm_mday = -1;
  177. if (alm_en & S3C2410_RTCALM_MONEN) {
  178. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  179. alm_tm->tm_mon -= 1;
  180. } else {
  181. alm_tm->tm_mon = -1;
  182. }
  183. if (alm_en & S3C2410_RTCALM_YEAREN)
  184. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  185. else
  186. alm_tm->tm_year = -1;
  187. return 0;
  188. }
  189. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  190. {
  191. struct rtc_time *tm = &alrm->time;
  192. void __iomem *base = s3c_rtc_base;
  193. unsigned int alrm_en;
  194. pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  195. alrm->enabled,
  196. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  197. tm->tm_hour, tm->tm_min, tm->tm_sec);
  198. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  199. writeb(0x00, base + S3C2410_RTCALM);
  200. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  201. alrm_en |= S3C2410_RTCALM_SECEN;
  202. writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
  203. }
  204. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  205. alrm_en |= S3C2410_RTCALM_MINEN;
  206. writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
  207. }
  208. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  209. alrm_en |= S3C2410_RTCALM_HOUREN;
  210. writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
  211. }
  212. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  213. writeb(alrm_en, base + S3C2410_RTCALM);
  214. s3c_rtc_setaie(dev, alrm->enabled);
  215. return 0;
  216. }
  217. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  218. {
  219. unsigned int ticnt;
  220. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  221. ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
  222. ticnt &= S3C64XX_RTCCON_TICEN;
  223. } else {
  224. ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  225. ticnt &= S3C2410_TICNT_ENABLE;
  226. }
  227. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  228. return 0;
  229. }
  230. static int s3c_rtc_open(struct device *dev)
  231. {
  232. struct platform_device *pdev = to_platform_device(dev);
  233. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  234. int ret;
  235. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  236. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  237. if (ret) {
  238. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  239. return ret;
  240. }
  241. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  242. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  243. if (ret) {
  244. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  245. goto tick_err;
  246. }
  247. return ret;
  248. tick_err:
  249. free_irq(s3c_rtc_alarmno, rtc_dev);
  250. return ret;
  251. }
  252. static void s3c_rtc_release(struct device *dev)
  253. {
  254. struct platform_device *pdev = to_platform_device(dev);
  255. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  256. /* do not clear AIE here, it may be needed for wake */
  257. free_irq(s3c_rtc_alarmno, rtc_dev);
  258. free_irq(s3c_rtc_tickno, rtc_dev);
  259. }
  260. static const struct rtc_class_ops s3c_rtcops = {
  261. .open = s3c_rtc_open,
  262. .release = s3c_rtc_release,
  263. .read_time = s3c_rtc_gettime,
  264. .set_time = s3c_rtc_settime,
  265. .read_alarm = s3c_rtc_getalarm,
  266. .set_alarm = s3c_rtc_setalarm,
  267. .proc = s3c_rtc_proc,
  268. .alarm_irq_enable = s3c_rtc_setaie,
  269. };
  270. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  271. {
  272. void __iomem *base = s3c_rtc_base;
  273. unsigned int tmp;
  274. if (s3c_rtc_base == NULL)
  275. return;
  276. if (!en) {
  277. tmp = readw(base + S3C2410_RTCCON);
  278. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  279. tmp &= ~S3C64XX_RTCCON_TICEN;
  280. tmp &= ~S3C2410_RTCCON_RTCEN;
  281. writew(tmp, base + S3C2410_RTCCON);
  282. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  283. tmp = readb(base + S3C2410_TICNT);
  284. tmp &= ~S3C2410_TICNT_ENABLE;
  285. writeb(tmp, base + S3C2410_TICNT);
  286. }
  287. } else {
  288. /* re-enable the device, and check it is ok */
  289. if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
  290. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  291. tmp = readw(base + S3C2410_RTCCON);
  292. writew(tmp | S3C2410_RTCCON_RTCEN,
  293. base + S3C2410_RTCCON);
  294. }
  295. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
  296. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  297. tmp = readw(base + S3C2410_RTCCON);
  298. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  299. base + S3C2410_RTCCON);
  300. }
  301. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
  302. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  303. tmp = readw(base + S3C2410_RTCCON);
  304. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  305. base + S3C2410_RTCCON);
  306. }
  307. }
  308. }
  309. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  310. {
  311. struct rtc_device *rtc = platform_get_drvdata(dev);
  312. platform_set_drvdata(dev, NULL);
  313. rtc_device_unregister(rtc);
  314. s3c_rtc_setaie(&dev->dev, 0);
  315. clk_disable(rtc_clk);
  316. clk_put(rtc_clk);
  317. rtc_clk = NULL;
  318. iounmap(s3c_rtc_base);
  319. release_resource(s3c_rtc_mem);
  320. kfree(s3c_rtc_mem);
  321. return 0;
  322. }
  323. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  324. {
  325. struct rtc_device *rtc;
  326. struct rtc_time rtc_tm;
  327. struct resource *res;
  328. int ret;
  329. pr_debug("%s: probe=%p\n", __func__, pdev);
  330. /* find the IRQs */
  331. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  332. if (s3c_rtc_tickno < 0) {
  333. dev_err(&pdev->dev, "no irq for rtc tick\n");
  334. return -ENOENT;
  335. }
  336. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  337. if (s3c_rtc_alarmno < 0) {
  338. dev_err(&pdev->dev, "no irq for alarm\n");
  339. return -ENOENT;
  340. }
  341. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  342. s3c_rtc_tickno, s3c_rtc_alarmno);
  343. /* get the memory region */
  344. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  345. if (res == NULL) {
  346. dev_err(&pdev->dev, "failed to get memory region resource\n");
  347. return -ENOENT;
  348. }
  349. s3c_rtc_mem = request_mem_region(res->start,
  350. res->end-res->start+1,
  351. pdev->name);
  352. if (s3c_rtc_mem == NULL) {
  353. dev_err(&pdev->dev, "failed to reserve memory region\n");
  354. ret = -ENOENT;
  355. goto err_nores;
  356. }
  357. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  358. if (s3c_rtc_base == NULL) {
  359. dev_err(&pdev->dev, "failed ioremap()\n");
  360. ret = -EINVAL;
  361. goto err_nomap;
  362. }
  363. rtc_clk = clk_get(&pdev->dev, "rtc");
  364. if (IS_ERR(rtc_clk)) {
  365. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  366. ret = PTR_ERR(rtc_clk);
  367. rtc_clk = NULL;
  368. goto err_clk;
  369. }
  370. clk_enable(rtc_clk);
  371. /* check to see if everything is setup correctly */
  372. s3c_rtc_enable(pdev, 1);
  373. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  374. readw(s3c_rtc_base + S3C2410_RTCCON));
  375. device_init_wakeup(&pdev->dev, 1);
  376. /* register RTC and exit */
  377. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  378. THIS_MODULE);
  379. if (IS_ERR(rtc)) {
  380. dev_err(&pdev->dev, "cannot attach rtc\n");
  381. ret = PTR_ERR(rtc);
  382. goto err_nortc;
  383. }
  384. s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
  385. /* Check RTC Time */
  386. s3c_rtc_gettime(NULL, &rtc_tm);
  387. if (rtc_valid_tm(&rtc_tm)) {
  388. rtc_tm.tm_year = 100;
  389. rtc_tm.tm_mon = 0;
  390. rtc_tm.tm_mday = 1;
  391. rtc_tm.tm_hour = 0;
  392. rtc_tm.tm_min = 0;
  393. rtc_tm.tm_sec = 0;
  394. s3c_rtc_settime(NULL, &rtc_tm);
  395. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  396. }
  397. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  398. rtc->max_user_freq = 32768;
  399. else
  400. rtc->max_user_freq = 128;
  401. platform_set_drvdata(pdev, rtc);
  402. s3c_rtc_setfreq(&pdev->dev, 1);
  403. return 0;
  404. err_nortc:
  405. s3c_rtc_enable(pdev, 0);
  406. clk_disable(rtc_clk);
  407. clk_put(rtc_clk);
  408. err_clk:
  409. iounmap(s3c_rtc_base);
  410. err_nomap:
  411. release_resource(s3c_rtc_mem);
  412. err_nores:
  413. return ret;
  414. }
  415. #ifdef CONFIG_PM
  416. /* RTC Power management control */
  417. static int ticnt_save, ticnt_en_save;
  418. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  419. {
  420. /* save TICNT for anyone using periodic interrupts */
  421. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  422. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  423. ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
  424. ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  425. }
  426. s3c_rtc_enable(pdev, 0);
  427. if (device_may_wakeup(&pdev->dev))
  428. enable_irq_wake(s3c_rtc_alarmno);
  429. return 0;
  430. }
  431. static int s3c_rtc_resume(struct platform_device *pdev)
  432. {
  433. unsigned int tmp;
  434. s3c_rtc_enable(pdev, 1);
  435. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  436. if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
  437. tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
  438. writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
  439. }
  440. if (device_may_wakeup(&pdev->dev))
  441. disable_irq_wake(s3c_rtc_alarmno);
  442. return 0;
  443. }
  444. #else
  445. #define s3c_rtc_suspend NULL
  446. #define s3c_rtc_resume NULL
  447. #endif
  448. static struct platform_device_id s3c_rtc_driver_ids[] = {
  449. {
  450. .name = "s3c2410-rtc",
  451. .driver_data = TYPE_S3C2410,
  452. }, {
  453. .name = "s3c64xx-rtc",
  454. .driver_data = TYPE_S3C64XX,
  455. },
  456. { }
  457. };
  458. MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
  459. static struct platform_driver s3c_rtc_driver = {
  460. .probe = s3c_rtc_probe,
  461. .remove = __devexit_p(s3c_rtc_remove),
  462. .suspend = s3c_rtc_suspend,
  463. .resume = s3c_rtc_resume,
  464. .id_table = s3c_rtc_driver_ids,
  465. .driver = {
  466. .name = "s3c-rtc",
  467. .owner = THIS_MODULE,
  468. },
  469. };
  470. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  471. static int __init s3c_rtc_init(void)
  472. {
  473. printk(banner);
  474. return platform_driver_register(&s3c_rtc_driver);
  475. }
  476. static void __exit s3c_rtc_exit(void)
  477. {
  478. platform_driver_unregister(&s3c_rtc_driver);
  479. }
  480. module_init(s3c_rtc_init);
  481. module_exit(s3c_rtc_exit);
  482. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  483. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  484. MODULE_LICENSE("GPL");
  485. MODULE_ALIAS("platform:s3c2410-rtc");