am33xx.dtsi 17 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. serial2 = &uart2;
  20. serial3 = &uart3;
  21. serial4 = &uart4;
  22. serial5 = &uart5;
  23. d_can0 = &dcan0;
  24. d_can1 = &dcan1;
  25. usb0 = &usb0;
  26. usb1 = &usb1;
  27. phy0 = &usb0_phy;
  28. phy1 = &usb1_phy;
  29. ethernet0 = &cpsw_emac0;
  30. ethernet1 = &cpsw_emac1;
  31. };
  32. cpus {
  33. #address-cells = <1>;
  34. #size-cells = <0>;
  35. cpu@0 {
  36. compatible = "arm,cortex-a8";
  37. device_type = "cpu";
  38. reg = <0>;
  39. /*
  40. * To consider voltage drop between PMIC and SoC,
  41. * tolerance value is reduced to 2% from 4% and
  42. * voltage value is increased as a precaution.
  43. */
  44. operating-points = <
  45. /* kHz uV */
  46. 720000 1285000
  47. 600000 1225000
  48. 500000 1125000
  49. 275000 1125000
  50. >;
  51. voltage-tolerance = <2>; /* 2 percentage */
  52. clock-latency = <300000>; /* From omap-cpufreq driver */
  53. };
  54. };
  55. pmu {
  56. compatible = "arm,cortex-a8-pmu";
  57. interrupts = <3>;
  58. };
  59. /*
  60. * The soc node represents the soc top level view. It is uses for IPs
  61. * that are not memory mapped in the MPU view or for the MPU itself.
  62. */
  63. soc {
  64. compatible = "ti,omap-infra";
  65. mpu {
  66. compatible = "ti,omap3-mpu";
  67. ti,hwmods = "mpu";
  68. };
  69. };
  70. am33xx_pinmux: pinmux@44e10800 {
  71. compatible = "pinctrl-single";
  72. reg = <0x44e10800 0x0238>;
  73. #address-cells = <1>;
  74. #size-cells = <0>;
  75. pinctrl-single,register-width = <32>;
  76. pinctrl-single,function-mask = <0x7f>;
  77. };
  78. /*
  79. * XXX: Use a flat representation of the AM33XX interconnect.
  80. * The real AM33XX interconnect network is quite complex.Since
  81. * that will not bring real advantage to represent that in DT
  82. * for the moment, just use a fake OCP bus entry to represent
  83. * the whole bus hierarchy.
  84. */
  85. ocp {
  86. compatible = "simple-bus";
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. ranges;
  90. ti,hwmods = "l3_main";
  91. intc: interrupt-controller@48200000 {
  92. compatible = "ti,omap2-intc";
  93. interrupt-controller;
  94. #interrupt-cells = <1>;
  95. ti,intc-size = <128>;
  96. reg = <0x48200000 0x1000>;
  97. };
  98. edma: edma@49000000 {
  99. compatible = "ti,edma3";
  100. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  101. reg = <0x49000000 0x10000>,
  102. <0x44e10f90 0x10>;
  103. interrupts = <12 13 14>;
  104. #dma-cells = <1>;
  105. dma-channels = <64>;
  106. ti,edma-regions = <4>;
  107. ti,edma-slots = <256>;
  108. };
  109. gpio0: gpio@44e07000 {
  110. compatible = "ti,omap4-gpio";
  111. ti,hwmods = "gpio1";
  112. gpio-controller;
  113. #gpio-cells = <2>;
  114. interrupt-controller;
  115. #interrupt-cells = <2>;
  116. reg = <0x44e07000 0x1000>;
  117. interrupts = <96>;
  118. };
  119. gpio1: gpio@4804c000 {
  120. compatible = "ti,omap4-gpio";
  121. ti,hwmods = "gpio2";
  122. gpio-controller;
  123. #gpio-cells = <2>;
  124. interrupt-controller;
  125. #interrupt-cells = <2>;
  126. reg = <0x4804c000 0x1000>;
  127. interrupts = <98>;
  128. };
  129. gpio2: gpio@481ac000 {
  130. compatible = "ti,omap4-gpio";
  131. ti,hwmods = "gpio3";
  132. gpio-controller;
  133. #gpio-cells = <2>;
  134. interrupt-controller;
  135. #interrupt-cells = <2>;
  136. reg = <0x481ac000 0x1000>;
  137. interrupts = <32>;
  138. };
  139. gpio3: gpio@481ae000 {
  140. compatible = "ti,omap4-gpio";
  141. ti,hwmods = "gpio4";
  142. gpio-controller;
  143. #gpio-cells = <2>;
  144. interrupt-controller;
  145. #interrupt-cells = <2>;
  146. reg = <0x481ae000 0x1000>;
  147. interrupts = <62>;
  148. };
  149. uart0: serial@44e09000 {
  150. compatible = "ti,omap3-uart";
  151. ti,hwmods = "uart1";
  152. clock-frequency = <48000000>;
  153. reg = <0x44e09000 0x2000>;
  154. interrupts = <72>;
  155. status = "disabled";
  156. };
  157. uart1: serial@48022000 {
  158. compatible = "ti,omap3-uart";
  159. ti,hwmods = "uart2";
  160. clock-frequency = <48000000>;
  161. reg = <0x48022000 0x2000>;
  162. interrupts = <73>;
  163. status = "disabled";
  164. };
  165. uart2: serial@48024000 {
  166. compatible = "ti,omap3-uart";
  167. ti,hwmods = "uart3";
  168. clock-frequency = <48000000>;
  169. reg = <0x48024000 0x2000>;
  170. interrupts = <74>;
  171. status = "disabled";
  172. };
  173. uart3: serial@481a6000 {
  174. compatible = "ti,omap3-uart";
  175. ti,hwmods = "uart4";
  176. clock-frequency = <48000000>;
  177. reg = <0x481a6000 0x2000>;
  178. interrupts = <44>;
  179. status = "disabled";
  180. };
  181. uart4: serial@481a8000 {
  182. compatible = "ti,omap3-uart";
  183. ti,hwmods = "uart5";
  184. clock-frequency = <48000000>;
  185. reg = <0x481a8000 0x2000>;
  186. interrupts = <45>;
  187. status = "disabled";
  188. };
  189. uart5: serial@481aa000 {
  190. compatible = "ti,omap3-uart";
  191. ti,hwmods = "uart6";
  192. clock-frequency = <48000000>;
  193. reg = <0x481aa000 0x2000>;
  194. interrupts = <46>;
  195. status = "disabled";
  196. };
  197. i2c0: i2c@44e0b000 {
  198. compatible = "ti,omap4-i2c";
  199. #address-cells = <1>;
  200. #size-cells = <0>;
  201. ti,hwmods = "i2c1";
  202. reg = <0x44e0b000 0x1000>;
  203. interrupts = <70>;
  204. status = "disabled";
  205. };
  206. i2c1: i2c@4802a000 {
  207. compatible = "ti,omap4-i2c";
  208. #address-cells = <1>;
  209. #size-cells = <0>;
  210. ti,hwmods = "i2c2";
  211. reg = <0x4802a000 0x1000>;
  212. interrupts = <71>;
  213. status = "disabled";
  214. };
  215. i2c2: i2c@4819c000 {
  216. compatible = "ti,omap4-i2c";
  217. #address-cells = <1>;
  218. #size-cells = <0>;
  219. ti,hwmods = "i2c3";
  220. reg = <0x4819c000 0x1000>;
  221. interrupts = <30>;
  222. status = "disabled";
  223. };
  224. mmc1: mmc@48060000 {
  225. compatible = "ti,omap4-hsmmc";
  226. ti,hwmods = "mmc1";
  227. ti,dual-volt;
  228. ti,needs-special-reset;
  229. ti,needs-special-hs-handling;
  230. dmas = <&edma 24
  231. &edma 25>;
  232. dma-names = "tx", "rx";
  233. interrupts = <64>;
  234. interrupt-parent = <&intc>;
  235. reg = <0x48060000 0x1000>;
  236. status = "disabled";
  237. };
  238. mmc2: mmc@481d8000 {
  239. compatible = "ti,omap4-hsmmc";
  240. ti,hwmods = "mmc2";
  241. ti,needs-special-reset;
  242. dmas = <&edma 2
  243. &edma 3>;
  244. dma-names = "tx", "rx";
  245. interrupts = <28>;
  246. interrupt-parent = <&intc>;
  247. reg = <0x481d8000 0x1000>;
  248. status = "disabled";
  249. };
  250. mmc3: mmc@47810000 {
  251. compatible = "ti,omap4-hsmmc";
  252. ti,hwmods = "mmc3";
  253. ti,needs-special-reset;
  254. interrupts = <29>;
  255. interrupt-parent = <&intc>;
  256. reg = <0x47810000 0x1000>;
  257. status = "disabled";
  258. };
  259. wdt2: wdt@44e35000 {
  260. compatible = "ti,omap3-wdt";
  261. ti,hwmods = "wd_timer2";
  262. reg = <0x44e35000 0x1000>;
  263. interrupts = <91>;
  264. };
  265. dcan0: d_can@481cc000 {
  266. compatible = "bosch,d_can";
  267. ti,hwmods = "d_can0";
  268. reg = <0x481cc000 0x2000
  269. 0x44e10644 0x4>;
  270. interrupts = <52>;
  271. status = "disabled";
  272. };
  273. dcan1: d_can@481d0000 {
  274. compatible = "bosch,d_can";
  275. ti,hwmods = "d_can1";
  276. reg = <0x481d0000 0x2000
  277. 0x44e10644 0x4>;
  278. interrupts = <55>;
  279. status = "disabled";
  280. };
  281. timer1: timer@44e31000 {
  282. compatible = "ti,am335x-timer-1ms";
  283. reg = <0x44e31000 0x400>;
  284. interrupts = <67>;
  285. ti,hwmods = "timer1";
  286. ti,timer-alwon;
  287. };
  288. timer2: timer@48040000 {
  289. compatible = "ti,am335x-timer";
  290. reg = <0x48040000 0x400>;
  291. interrupts = <68>;
  292. ti,hwmods = "timer2";
  293. };
  294. timer3: timer@48042000 {
  295. compatible = "ti,am335x-timer";
  296. reg = <0x48042000 0x400>;
  297. interrupts = <69>;
  298. ti,hwmods = "timer3";
  299. };
  300. timer4: timer@48044000 {
  301. compatible = "ti,am335x-timer";
  302. reg = <0x48044000 0x400>;
  303. interrupts = <92>;
  304. ti,hwmods = "timer4";
  305. ti,timer-pwm;
  306. };
  307. timer5: timer@48046000 {
  308. compatible = "ti,am335x-timer";
  309. reg = <0x48046000 0x400>;
  310. interrupts = <93>;
  311. ti,hwmods = "timer5";
  312. ti,timer-pwm;
  313. };
  314. timer6: timer@48048000 {
  315. compatible = "ti,am335x-timer";
  316. reg = <0x48048000 0x400>;
  317. interrupts = <94>;
  318. ti,hwmods = "timer6";
  319. ti,timer-pwm;
  320. };
  321. timer7: timer@4804a000 {
  322. compatible = "ti,am335x-timer";
  323. reg = <0x4804a000 0x400>;
  324. interrupts = <95>;
  325. ti,hwmods = "timer7";
  326. ti,timer-pwm;
  327. };
  328. rtc@44e3e000 {
  329. compatible = "ti,da830-rtc";
  330. reg = <0x44e3e000 0x1000>;
  331. interrupts = <75
  332. 76>;
  333. ti,hwmods = "rtc";
  334. };
  335. spi0: spi@48030000 {
  336. compatible = "ti,omap4-mcspi";
  337. #address-cells = <1>;
  338. #size-cells = <0>;
  339. reg = <0x48030000 0x400>;
  340. interrupts = <65>;
  341. ti,spi-num-cs = <2>;
  342. ti,hwmods = "spi0";
  343. dmas = <&edma 16
  344. &edma 17
  345. &edma 18
  346. &edma 19>;
  347. dma-names = "tx0", "rx0", "tx1", "rx1";
  348. status = "disabled";
  349. };
  350. spi1: spi@481a0000 {
  351. compatible = "ti,omap4-mcspi";
  352. #address-cells = <1>;
  353. #size-cells = <0>;
  354. reg = <0x481a0000 0x400>;
  355. interrupts = <125>;
  356. ti,spi-num-cs = <2>;
  357. ti,hwmods = "spi1";
  358. dmas = <&edma 42
  359. &edma 43
  360. &edma 44
  361. &edma 45>;
  362. dma-names = "tx0", "rx0", "tx1", "rx1";
  363. status = "disabled";
  364. };
  365. usb: usb@47400000 {
  366. compatible = "ti,am33xx-usb";
  367. reg = <0x47400000 0x1000>;
  368. ranges;
  369. #address-cells = <1>;
  370. #size-cells = <1>;
  371. ti,hwmods = "usb_otg_hs";
  372. status = "disabled";
  373. ctrl_mod: control@44e10000 {
  374. compatible = "ti,am335x-usb-ctrl-module";
  375. reg = <0x44e10620 0x10
  376. 0x44e10648 0x4>;
  377. reg-names = "phy_ctrl", "wakeup";
  378. status = "disabled";
  379. };
  380. usb0_phy: usb-phy@47401300 {
  381. compatible = "ti,am335x-usb-phy";
  382. reg = <0x47401300 0x100>;
  383. reg-names = "phy";
  384. status = "disabled";
  385. ti,ctrl_mod = <&ctrl_mod>;
  386. };
  387. usb0: usb@47401000 {
  388. compatible = "ti,musb-am33xx";
  389. status = "disabled";
  390. reg = <0x47401400 0x400
  391. 0x47401000 0x200>;
  392. reg-names = "mc", "control";
  393. interrupts = <18>;
  394. interrupt-names = "mc";
  395. dr_mode = "otg";
  396. mentor,multipoint = <1>;
  397. mentor,num-eps = <16>;
  398. mentor,ram-bits = <12>;
  399. mentor,power = <500>;
  400. phys = <&usb0_phy>;
  401. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  402. &cppi41dma 2 0 &cppi41dma 3 0
  403. &cppi41dma 4 0 &cppi41dma 5 0
  404. &cppi41dma 6 0 &cppi41dma 7 0
  405. &cppi41dma 8 0 &cppi41dma 9 0
  406. &cppi41dma 10 0 &cppi41dma 11 0
  407. &cppi41dma 12 0 &cppi41dma 13 0
  408. &cppi41dma 14 0 &cppi41dma 0 1
  409. &cppi41dma 1 1 &cppi41dma 2 1
  410. &cppi41dma 3 1 &cppi41dma 4 1
  411. &cppi41dma 5 1 &cppi41dma 6 1
  412. &cppi41dma 7 1 &cppi41dma 8 1
  413. &cppi41dma 9 1 &cppi41dma 10 1
  414. &cppi41dma 11 1 &cppi41dma 12 1
  415. &cppi41dma 13 1 &cppi41dma 14 1>;
  416. dma-names =
  417. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  418. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  419. "rx14", "rx15",
  420. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  421. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  422. "tx14", "tx15";
  423. };
  424. usb1_phy: usb-phy@47401b00 {
  425. compatible = "ti,am335x-usb-phy";
  426. reg = <0x47401b00 0x100>;
  427. reg-names = "phy";
  428. status = "disabled";
  429. ti,ctrl_mod = <&ctrl_mod>;
  430. };
  431. usb1: usb@47401800 {
  432. compatible = "ti,musb-am33xx";
  433. status = "disabled";
  434. reg = <0x47401c00 0x400
  435. 0x47401800 0x200>;
  436. reg-names = "mc", "control";
  437. interrupts = <19>;
  438. interrupt-names = "mc";
  439. dr_mode = "otg";
  440. mentor,multipoint = <1>;
  441. mentor,num-eps = <16>;
  442. mentor,ram-bits = <12>;
  443. mentor,power = <500>;
  444. phys = <&usb1_phy>;
  445. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  446. &cppi41dma 17 0 &cppi41dma 18 0
  447. &cppi41dma 19 0 &cppi41dma 20 0
  448. &cppi41dma 21 0 &cppi41dma 22 0
  449. &cppi41dma 23 0 &cppi41dma 24 0
  450. &cppi41dma 25 0 &cppi41dma 26 0
  451. &cppi41dma 27 0 &cppi41dma 28 0
  452. &cppi41dma 29 0 &cppi41dma 15 1
  453. &cppi41dma 16 1 &cppi41dma 17 1
  454. &cppi41dma 18 1 &cppi41dma 19 1
  455. &cppi41dma 20 1 &cppi41dma 21 1
  456. &cppi41dma 22 1 &cppi41dma 23 1
  457. &cppi41dma 24 1 &cppi41dma 25 1
  458. &cppi41dma 26 1 &cppi41dma 27 1
  459. &cppi41dma 28 1 &cppi41dma 29 1>;
  460. dma-names =
  461. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  462. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  463. "rx14", "rx15",
  464. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  465. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  466. "tx14", "tx15";
  467. };
  468. cppi41dma: dma-controller@07402000 {
  469. compatible = "ti,am3359-cppi41";
  470. reg = <0x47400000 0x1000
  471. 0x47402000 0x1000
  472. 0x47403000 0x1000
  473. 0x47404000 0x4000>;
  474. reg-names = "glue", "controller", "scheduler", "queuemgr";
  475. interrupts = <17>;
  476. interrupt-names = "glue";
  477. #dma-cells = <2>;
  478. #dma-channels = <30>;
  479. #dma-requests = <256>;
  480. status = "disabled";
  481. };
  482. };
  483. epwmss0: epwmss@48300000 {
  484. compatible = "ti,am33xx-pwmss";
  485. reg = <0x48300000 0x10>;
  486. ti,hwmods = "epwmss0";
  487. #address-cells = <1>;
  488. #size-cells = <1>;
  489. status = "disabled";
  490. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  491. 0x48300180 0x48300180 0x80 /* EQEP */
  492. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  493. ecap0: ecap@48300100 {
  494. compatible = "ti,am33xx-ecap";
  495. #pwm-cells = <3>;
  496. reg = <0x48300100 0x80>;
  497. ti,hwmods = "ecap0";
  498. status = "disabled";
  499. };
  500. ehrpwm0: ehrpwm@48300200 {
  501. compatible = "ti,am33xx-ehrpwm";
  502. #pwm-cells = <3>;
  503. reg = <0x48300200 0x80>;
  504. ti,hwmods = "ehrpwm0";
  505. status = "disabled";
  506. };
  507. };
  508. epwmss1: epwmss@48302000 {
  509. compatible = "ti,am33xx-pwmss";
  510. reg = <0x48302000 0x10>;
  511. ti,hwmods = "epwmss1";
  512. #address-cells = <1>;
  513. #size-cells = <1>;
  514. status = "disabled";
  515. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  516. 0x48302180 0x48302180 0x80 /* EQEP */
  517. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  518. ecap1: ecap@48302100 {
  519. compatible = "ti,am33xx-ecap";
  520. #pwm-cells = <3>;
  521. reg = <0x48302100 0x80>;
  522. ti,hwmods = "ecap1";
  523. status = "disabled";
  524. };
  525. ehrpwm1: ehrpwm@48302200 {
  526. compatible = "ti,am33xx-ehrpwm";
  527. #pwm-cells = <3>;
  528. reg = <0x48302200 0x80>;
  529. ti,hwmods = "ehrpwm1";
  530. status = "disabled";
  531. };
  532. };
  533. epwmss2: epwmss@48304000 {
  534. compatible = "ti,am33xx-pwmss";
  535. reg = <0x48304000 0x10>;
  536. ti,hwmods = "epwmss2";
  537. #address-cells = <1>;
  538. #size-cells = <1>;
  539. status = "disabled";
  540. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  541. 0x48304180 0x48304180 0x80 /* EQEP */
  542. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  543. ecap2: ecap@48304100 {
  544. compatible = "ti,am33xx-ecap";
  545. #pwm-cells = <3>;
  546. reg = <0x48304100 0x80>;
  547. ti,hwmods = "ecap2";
  548. status = "disabled";
  549. };
  550. ehrpwm2: ehrpwm@48304200 {
  551. compatible = "ti,am33xx-ehrpwm";
  552. #pwm-cells = <3>;
  553. reg = <0x48304200 0x80>;
  554. ti,hwmods = "ehrpwm2";
  555. status = "disabled";
  556. };
  557. };
  558. mac: ethernet@4a100000 {
  559. compatible = "ti,cpsw";
  560. ti,hwmods = "cpgmac0";
  561. cpdma_channels = <8>;
  562. ale_entries = <1024>;
  563. bd_ram_size = <0x2000>;
  564. no_bd_ram = <0>;
  565. rx_descs = <64>;
  566. mac_control = <0x20>;
  567. slaves = <2>;
  568. active_slave = <0>;
  569. cpts_clock_mult = <0x80000000>;
  570. cpts_clock_shift = <29>;
  571. reg = <0x4a100000 0x800
  572. 0x4a101200 0x100>;
  573. #address-cells = <1>;
  574. #size-cells = <1>;
  575. interrupt-parent = <&intc>;
  576. /*
  577. * c0_rx_thresh_pend
  578. * c0_rx_pend
  579. * c0_tx_pend
  580. * c0_misc_pend
  581. */
  582. interrupts = <40 41 42 43>;
  583. ranges;
  584. davinci_mdio: mdio@4a101000 {
  585. compatible = "ti,davinci_mdio";
  586. #address-cells = <1>;
  587. #size-cells = <0>;
  588. ti,hwmods = "davinci_mdio";
  589. bus_freq = <1000000>;
  590. reg = <0x4a101000 0x100>;
  591. };
  592. cpsw_emac0: slave@4a100200 {
  593. /* Filled in by U-Boot */
  594. mac-address = [ 00 00 00 00 00 00 ];
  595. };
  596. cpsw_emac1: slave@4a100300 {
  597. /* Filled in by U-Boot */
  598. mac-address = [ 00 00 00 00 00 00 ];
  599. };
  600. };
  601. ocmcram: ocmcram@40300000 {
  602. compatible = "ti,am3352-ocmcram";
  603. reg = <0x40300000 0x10000>;
  604. ti,hwmods = "ocmcram";
  605. };
  606. wkup_m3: wkup_m3@44d00000 {
  607. compatible = "ti,am3353-wkup-m3";
  608. reg = <0x44d00000 0x4000 /* M3 UMEM */
  609. 0x44d80000 0x2000>; /* M3 DMEM */
  610. ti,hwmods = "wkup_m3";
  611. };
  612. elm: elm@48080000 {
  613. compatible = "ti,am3352-elm";
  614. reg = <0x48080000 0x2000>;
  615. interrupts = <4>;
  616. ti,hwmods = "elm";
  617. status = "disabled";
  618. };
  619. lcdc: lcdc@4830e000 {
  620. compatible = "ti,am33xx-tilcdc";
  621. reg = <0x4830e000 0x1000>;
  622. interrupt-parent = <&intc>;
  623. interrupts = <36>;
  624. ti,hwmods = "lcdc";
  625. status = "disabled";
  626. };
  627. tscadc: tscadc@44e0d000 {
  628. compatible = "ti,am3359-tscadc";
  629. reg = <0x44e0d000 0x1000>;
  630. interrupt-parent = <&intc>;
  631. interrupts = <16>;
  632. ti,hwmods = "adc_tsc";
  633. status = "disabled";
  634. tsc {
  635. compatible = "ti,am3359-tsc";
  636. };
  637. am335x_adc: adc {
  638. #io-channel-cells = <1>;
  639. compatible = "ti,am3359-adc";
  640. };
  641. };
  642. gpmc: gpmc@50000000 {
  643. compatible = "ti,am3352-gpmc";
  644. ti,hwmods = "gpmc";
  645. reg = <0x50000000 0x2000>;
  646. interrupts = <100>;
  647. gpmc,num-cs = <7>;
  648. gpmc,num-waitpins = <2>;
  649. #address-cells = <2>;
  650. #size-cells = <1>;
  651. status = "disabled";
  652. };
  653. sham: sham@53100000 {
  654. compatible = "ti,omap4-sham";
  655. ti,hwmods = "sham";
  656. reg = <0x53100000 0x200>;
  657. interrupts = <109>;
  658. dmas = <&edma 36>;
  659. dma-names = "rx";
  660. };
  661. aes: aes@53500000 {
  662. compatible = "ti,omap4-aes";
  663. ti,hwmods = "aes";
  664. reg = <0x53500000 0xa0>;
  665. interrupts = <103>;
  666. dmas = <&edma 6>,
  667. <&edma 5>;
  668. dma-names = "tx", "rx";
  669. };
  670. };
  671. };