cx23418.h 17 KB

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  1. /*
  2. * cx18 header containing common defines.
  3. *
  4. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  19. * 02111-1307 USA
  20. */
  21. #ifndef CX23418_H
  22. #define CX23418_H
  23. #include <media/cx2341x.h>
  24. #define MGR_CMD_MASK 0x40000000
  25. /* The MSB of the command code indicates that this is the completion of a
  26. command */
  27. #define MGR_CMD_MASK_ACK (MGR_CMD_MASK | 0x80000000)
  28. /* Description: This command creates a new instance of a certain task
  29. IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
  30. the processor on which the task YYY will be created
  31. OUT[0] - Task handle. This handle is passed along with commands to
  32. dispatch to the right instance of the task
  33. ReturnCode - One of the ERR_SYS_... */
  34. #define CX18_CREATE_TASK (MGR_CMD_MASK | 0x0001)
  35. /* Description: This command destroys an instance of a task
  36. IN[0] - Task handle. Hanlde of the task to destroy
  37. ReturnCode - One of the ERR_SYS_... */
  38. #define CX18_DESTROY_TASK (MGR_CMD_MASK | 0x0002)
  39. /* All commands for CPU have the following mask set */
  40. #define CPU_CMD_MASK 0x20000000
  41. #define CPU_CMD_MASK_DEBUG (CPU_CMD_MASK | 0x00000000)
  42. #define CPU_CMD_MASK_ACK (CPU_CMD_MASK | 0x80000000)
  43. #define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK | 0x00020000)
  44. #define CPU_CMD_MASK_TS (CPU_CMD_MASK | 0x00040000)
  45. #define EPU_CMD_MASK 0x02000000
  46. #define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK | 0x000000)
  47. #define EPU_CMD_MASK_DE (EPU_CMD_MASK | 0x040000)
  48. #define APU_CMD_MASK 0x10000000
  49. #define APU_CMD_MASK_ACK (APU_CMD_MASK | 0x80000000)
  50. #define CX18_APU_RESETAI (APU_CMD_MASK | 0x05)
  51. /* Description: This command indicates that a Memory Descriptor List has been
  52. filled with the requested channel type
  53. IN[0] - Task handle. Handle of the task
  54. IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
  55. IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
  56. ReturnCode - One of the ERR_DE_... */
  57. #define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE | 0x0001)
  58. /* Something interesting happened
  59. IN[0] - A value to log
  60. IN[1] - An offset of a string in the MiniMe memory;
  61. 0/zero/NULL means "I have nothing to say" */
  62. #define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG | 0x0003)
  63. /* Reads memory/registers (32-bit)
  64. IN[0] - Address
  65. OUT[1] - Value */
  66. #define CX18_CPU_DEBUG_PEEK32 (CPU_CMD_MASK_DEBUG | 0x0003)
  67. /* Description: This command starts streaming with the set channel type
  68. IN[0] - Task handle. Handle of the task to start
  69. ReturnCode - One of the ERR_CAPTURE_... */
  70. #define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE | 0x0002)
  71. /* Description: This command stops streaming with the set channel type
  72. IN[0] - Task handle. Handle of the task to stop
  73. IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
  74. ReturnCode - One of the ERR_CAPTURE_... */
  75. #define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE | 0x0003)
  76. /* Description: This command pauses streaming with the set channel type
  77. IN[0] - Task handle. Handle of the task to pause
  78. ReturnCode - One of the ERR_CAPTURE_... */
  79. #define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE | 0x0007)
  80. /* Description: This command resumes streaming with the set channel type
  81. IN[0] - Task handle. Handle of the task to resume
  82. ReturnCode - One of the ERR_CAPTURE_... */
  83. #define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE | 0x0008)
  84. #define CAPTURE_CHANNEL_TYPE_NONE 0
  85. #define CAPTURE_CHANNEL_TYPE_MPEG 1
  86. #define CAPTURE_CHANNEL_TYPE_INDEX 2
  87. #define CAPTURE_CHANNEL_TYPE_YUV 3
  88. #define CAPTURE_CHANNEL_TYPE_PCM 4
  89. #define CAPTURE_CHANNEL_TYPE_VBI 5
  90. #define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6
  91. #define CAPTURE_CHANNEL_TYPE_TS 7
  92. #define CAPTURE_CHANNEL_TYPE_MAX 15
  93. /* Description: This command sets the channel type. This can only be done
  94. when stopped.
  95. IN[0] - Task handle. Handle of the task to start
  96. IN[1] - Channel Type. See Below.
  97. ReturnCode - One of the ERR_CAPTURE_... */
  98. #define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1)
  99. /* Description: Set stream output type
  100. IN[0] - task handle. Handle of the task to start
  101. IN[1] - type
  102. ReturnCode - One of the ERR_CAPTURE_... */
  103. #define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE | 0x0012)
  104. /* Description: Set video input resolution and frame rate
  105. IN[0] - task handle
  106. IN[1] - reserved
  107. IN[2] - reserved
  108. IN[3] - reserved
  109. IN[4] - reserved
  110. IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
  111. ReturnCode - One of the ERR_CAPTURE_... */
  112. #define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE | 0x0004)
  113. /* Description: Set video frame rate
  114. IN[0] - task handle. Handle of the task to start
  115. IN[1] - video bit rate mode
  116. IN[2] - video average rate
  117. IN[3] - video peak rate
  118. IN[4] - system mux rate
  119. ReturnCode - One of the ERR_CAPTURE_... */
  120. #define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE | 0x0005)
  121. /* Description: Set video output resolution
  122. IN[0] - task handle
  123. IN[1] - horizontal size
  124. IN[2] - vertical size
  125. ReturnCode - One of the ERR_CAPTURE_... */
  126. #define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE | 0x0006)
  127. /* Description: This command set filter parameters
  128. IN[0] - Task handle. Handle of the task
  129. IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
  130. IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
  131. median: 0 = disable, 1 = horizontal, 2 = vertical,
  132. 3 = horizontal/vertical, 4 = diagonal
  133. IN[3] - strength, temporal 0 - 31, spatial 0 - 15
  134. ReturnCode - One of the ERR_CAPTURE_... */
  135. #define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE | 0x0009)
  136. /* Description: This command set spatial filter type
  137. IN[0] - Task handle.
  138. IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
  139. 3 = 2D H/V separable, 4 = 2D symmetric non-separable
  140. IN[2] - chroma type: 0 - diable, 1 = 1D horizontal
  141. ReturnCode - One of the ERR_CAPTURE_... */
  142. #define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE | 0x000C)
  143. /* Description: This command set coring levels for median filter
  144. IN[0] - Task handle.
  145. IN[1] - luma_high
  146. IN[2] - luma_low
  147. IN[3] - chroma_high
  148. IN[4] - chroma_low
  149. ReturnCode - One of the ERR_CAPTURE_... */
  150. #define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E)
  151. /* Description: This command set the picture type mask for index file
  152. IN[0] - 0 = disable index file output
  153. 1 = output I picture
  154. 2 = P picture
  155. 4 = B picture
  156. other = illegal */
  157. #define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE | 0x0010)
  158. /* Description: Set audio parameters
  159. IN[0] - task handle. Handle of the task to start
  160. IN[1] - audio parameter
  161. ReturnCode - One of the ERR_CAPTURE_... */
  162. #define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0011)
  163. /* Description: Set video mute
  164. IN[0] - task handle. Handle of the task to start
  165. IN[1] - bit31-24: muteYvalue
  166. bit23-16: muteUvalue
  167. bit15-8: muteVvalue
  168. bit0: 1:mute, 0: unmute
  169. ReturnCode - One of the ERR_CAPTURE_... */
  170. #define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0013)
  171. /* Description: Set audio mute
  172. IN[0] - task handle. Handle of the task to start
  173. IN[1] - mute/unmute
  174. ReturnCode - One of the ERR_CAPTURE_... */
  175. #define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0014)
  176. /* Description: Set stream output type
  177. IN[0] - task handle. Handle of the task to start
  178. IN[1] - subType
  179. SET_INITIAL_SCR 1
  180. SET_QUALITY_MODE 2
  181. SET_VIM_PROTECT_MODE 3
  182. SET_PTS_CORRECTION 4
  183. SET_USB_FLUSH_MODE 5
  184. SET_MERAQPAR_ENABLE 6
  185. SET_NAV_PACK_INSERTION 7
  186. SET_SCENE_CHANGE_ENABLE 8
  187. IN[2] - parameter 1
  188. IN[3] - parameter 2
  189. ReturnCode - One of the ERR_CAPTURE_... */
  190. #define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0015)
  191. /* Description: Set raw VBI parameters
  192. IN[0] - Task handle
  193. IN[1] - No. of input lines per field:
  194. bit[15:0]: field 1,
  195. bit[31:16]: field 2
  196. IN[2] - No. of input bytes per line
  197. IN[3] - No. of output frames per transfer
  198. IN[4] - start code
  199. IN[5] - stop code
  200. ReturnCode */
  201. #define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0016)
  202. /* Description: Set capture line No.
  203. IN[0] - task handle. Handle of the task to start
  204. IN[1] - height1
  205. IN[2] - height2
  206. ReturnCode - One of the ERR_CAPTURE_... */
  207. #define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE | 0x0017)
  208. /* Description: Set copyright
  209. IN[0] - task handle. Handle of the task to start
  210. IN[1] - copyright
  211. ReturnCode - One of the ERR_CAPTURE_... */
  212. #define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE | 0x0018)
  213. /* Description: Set audio PID
  214. IN[0] - task handle. Handle of the task to start
  215. IN[1] - PID
  216. ReturnCode - One of the ERR_CAPTURE_... */
  217. #define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE | 0x0019)
  218. /* Description: Set video PID
  219. IN[0] - task handle. Handle of the task to start
  220. IN[1] - PID
  221. ReturnCode - One of the ERR_CAPTURE_... */
  222. #define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE | 0x001A)
  223. /* Description: Set Vertical Crop Line
  224. IN[0] - task handle. Handle of the task to start
  225. IN[1] - Line
  226. ReturnCode - One of the ERR_CAPTURE_... */
  227. #define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE | 0x001B)
  228. /* Description: Set COP structure
  229. IN[0] - task handle. Handle of the task to start
  230. IN[1] - M
  231. IN[2] - N
  232. ReturnCode - One of the ERR_CAPTURE_... */
  233. #define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE | 0x001C)
  234. /* Description: Set Scene Change Detection
  235. IN[0] - task handle. Handle of the task to start
  236. IN[1] - scene change
  237. ReturnCode - One of the ERR_CAPTURE_... */
  238. #define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE | 0x001D)
  239. /* Description: Set Aspect Ratio
  240. IN[0] - task handle. Handle of the task to start
  241. IN[1] - AspectRatio
  242. ReturnCode - One of the ERR_CAPTURE_... */
  243. #define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE | 0x001E)
  244. /* Description: Set Skip Input Frame
  245. IN[0] - task handle. Handle of the task to start
  246. IN[1] - skip input frames
  247. ReturnCode - One of the ERR_CAPTURE_... */
  248. #define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE | 0x001F)
  249. /* Description: Set sliced VBI parameters -
  250. Note This API will only apply to MPEG and Sliced VBI Channels
  251. IN[0] - Task handle
  252. IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
  253. IN[2] - start / stop line
  254. bit[15:0] start line number
  255. bit[31:16] stop line number
  256. IN[3] - number of output frames per interrupt
  257. IN[4] - VBI insertion mode
  258. bit 0: output user data, 1 - enable
  259. bit 1: output private stream, 1 - enable
  260. bit 2: mux option, 0 - in GOP, 1 - in picture
  261. bit[7:0] private stream ID
  262. IN[5] - insertion period while mux option is in picture
  263. ReturnCode - VBI data offset */
  264. #define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0020)
  265. /* Description: Set the user data place holder
  266. IN[0] - type of data (0 for user)
  267. IN[1] - Stuffing period
  268. IN[2] - ID data size in word (less than 10)
  269. IN[3] - Pointer to ID buffer */
  270. #define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE | 0x0021)
  271. /* Description:
  272. In[0] Task Handle
  273. return parameter:
  274. Out[0] Reserved
  275. Out[1] Video PTS bit[32:2] of last output video frame.
  276. Out[2] Video PTS bit[ 1:0] of last output video frame.
  277. Out[3] Hardware Video PTS counter bit[31:0],
  278. these bits get incremented on every 90kHz clock tick.
  279. Out[4] Hardware Video PTS counter bit32,
  280. these bits get incremented on every 90kHz clock tick.
  281. ReturnCode */
  282. #define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE | 0x0022)
  283. /* Below is the list of commands related to the data exchange */
  284. #define CPU_CMD_MASK_DE (CPU_CMD_MASK | 0x040000)
  285. /* Description: This command provides the physical base address of the local
  286. DDR as viewed by EPU
  287. IN[0] - Physical offset where EPU has the local DDR mapped
  288. ReturnCode - One of the ERR_DE_... */
  289. #define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE | 0x0001)
  290. /* Description: This command provides the offsets in the device memory where
  291. the 2 cx18_mdl_ack blocks reside
  292. IN[0] - Task handle. Handle of the task to start
  293. IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
  294. local DDR.
  295. IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
  296. local DDR.
  297. ReturnCode - One of the ERR_DE_... */
  298. #define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE | 0x0002)
  299. /* Description: This command provides the offset to a Memory Descriptor List
  300. IN[0] - Task handle. Handle of the task to start
  301. IN[1] - Offset of the MDL from the beginning of the local DDR.
  302. IN[2] - Number of cx18_mdl structures in the array pointed to by IN[1]
  303. IN[3] - Buffer ID
  304. IN[4] - Total buffer length
  305. ReturnCode - One of the ERR_DE_... */
  306. #define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE | 0x0005)
  307. /* Description: This command requests return of all current Memory
  308. Descriptor Lists to the driver
  309. IN[0] - Task handle. Handle of the task to start
  310. ReturnCode - One of the ERR_DE_... */
  311. #define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE | 0x0006)
  312. /* Description: This command signals the cpu that the dat buffer has been
  313. consumed and ready for re-use.
  314. IN[0] - Task handle. Handle of the task
  315. IN[1] - Offset of the data block from the beginning of the local DDR.
  316. IN[2] - Number of bytes in the data block
  317. ReturnCode - One of the ERR_DE_... */
  318. /* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE | 0x0007) */
  319. /* No Error / Success */
  320. #define CNXT_OK 0x000000
  321. /* Received unknown command */
  322. #define CXERR_UNK_CMD 0x000001
  323. /* First parameter in the command is invalid */
  324. #define CXERR_INVALID_PARAM1 0x000002
  325. /* Second parameter in the command is invalid */
  326. #define CXERR_INVALID_PARAM2 0x000003
  327. /* Device interface is not open/found */
  328. #define CXERR_DEV_NOT_FOUND 0x000004
  329. /* Requested function is not implemented/available */
  330. #define CXERR_NOTSUPPORTED 0x000005
  331. /* Invalid pointer is provided */
  332. #define CXERR_BADPTR 0x000006
  333. /* Unable to allocate memory */
  334. #define CXERR_NOMEM 0x000007
  335. /* Object/Link not found */
  336. #define CXERR_LINK 0x000008
  337. /* Device busy, command cannot be executed */
  338. #define CXERR_BUSY 0x000009
  339. /* File/device/handle is not open. */
  340. #define CXERR_NOT_OPEN 0x00000A
  341. /* Value is out of range */
  342. #define CXERR_OUTOFRANGE 0x00000B
  343. /* Buffer overflow */
  344. #define CXERR_OVERFLOW 0x00000C
  345. /* Version mismatch */
  346. #define CXERR_BADVER 0x00000D
  347. /* Operation timed out */
  348. #define CXERR_TIMEOUT 0x00000E
  349. /* Operation aborted */
  350. #define CXERR_ABORT 0x00000F
  351. /* Specified I2C device not found for read/write */
  352. #define CXERR_I2CDEV_NOTFOUND 0x000010
  353. /* Error in I2C data xfer (but I2C device is present) */
  354. #define CXERR_I2CDEV_XFERERR 0x000011
  355. /* Chanel changing component not ready */
  356. #define CXERR_CHANNELNOTREADY 0x000012
  357. /* PPU (Presensation/Decoder) mail box is corrupted */
  358. #define CXERR_PPU_MB_CORRUPT 0x000013
  359. /* CPU (Capture/Encoder) mail box is corrupted */
  360. #define CXERR_CPU_MB_CORRUPT 0x000014
  361. /* APU (Audio) mail box is corrupted */
  362. #define CXERR_APU_MB_CORRUPT 0x000015
  363. /* Unable to open file for reading */
  364. #define CXERR_FILE_OPEN_READ 0x000016
  365. /* Unable to open file for writing */
  366. #define CXERR_FILE_OPEN_WRITE 0x000017
  367. /* Unable to find the I2C section specified */
  368. #define CXERR_I2C_BADSECTION 0x000018
  369. /* Error in I2C data xfer (but I2C device is present) */
  370. #define CXERR_I2CDEV_DATALOW 0x000019
  371. /* Error in I2C data xfer (but I2C device is present) */
  372. #define CXERR_I2CDEV_CLOCKLOW 0x00001A
  373. /* No Interrupt received from HW (for I2C access) */
  374. #define CXERR_NO_HW_I2C_INTR 0x00001B
  375. /* RPU is not ready to accept commands! */
  376. #define CXERR_RPU_NOT_READY 0x00001C
  377. /* RPU is not ready to accept commands! */
  378. #define CXERR_RPU_NO_ACK 0x00001D
  379. /* The are no buffers ready. Try again soon! */
  380. #define CXERR_NODATA_AGAIN 0x00001E
  381. /* The stream is stopping. Function not alllowed now! */
  382. #define CXERR_STOPPING_STATUS 0x00001F
  383. /* Trying to access hardware when the power is turned OFF */
  384. #define CXERR_DEVPOWER_OFF 0x000020
  385. #endif /* CX23418_H */