synclink_cs.c 116 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <asm/serial.h>
  58. #include <linux/delay.h>
  59. #include <linux/ioctl.h>
  60. #include <asm/system.h>
  61. #include <asm/io.h>
  62. #include <asm/irq.h>
  63. #include <asm/dma.h>
  64. #include <linux/bitops.h>
  65. #include <asm/types.h>
  66. #include <linux/termios.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/hdlc.h>
  69. #include <pcmcia/cs_types.h>
  70. #include <pcmcia/cs.h>
  71. #include <pcmcia/cistpl.h>
  72. #include <pcmcia/cisreg.h>
  73. #include <pcmcia/ds.h>
  74. #ifdef CONFIG_HDLC_MODULE
  75. #define CONFIG_HDLC 1
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. struct pcmcia_device *p_dev;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #ifdef CONFIG_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #ifdef CONFIG_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(void* Context);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static void mgslpc_config(dev_link_t *link);
  398. static void mgslpc_release(u_long arg);
  399. static void mgslpc_detach(struct pcmcia_device *p_dev);
  400. /*
  401. * 1st function defined in .text section. Calling this function in
  402. * init_module() followed by a breakpoint allows a remote debugger
  403. * (gdb) to get the .text address for the add-symbol-file command.
  404. * This allows remote debugging of dynamically loadable modules.
  405. */
  406. static void* mgslpc_get_text_ptr(void)
  407. {
  408. return mgslpc_get_text_ptr;
  409. }
  410. /**
  411. * line discipline callback wrappers
  412. *
  413. * The wrappers maintain line discipline references
  414. * while calling into the line discipline.
  415. *
  416. * ldisc_flush_buffer - flush line discipline receive buffers
  417. * ldisc_receive_buf - pass receive data to line discipline
  418. */
  419. static void ldisc_flush_buffer(struct tty_struct *tty)
  420. {
  421. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  422. if (ld) {
  423. if (ld->flush_buffer)
  424. ld->flush_buffer(tty);
  425. tty_ldisc_deref(ld);
  426. }
  427. }
  428. static void ldisc_receive_buf(struct tty_struct *tty,
  429. const __u8 *data, char *flags, int count)
  430. {
  431. struct tty_ldisc *ld;
  432. if (!tty)
  433. return;
  434. ld = tty_ldisc_ref(tty);
  435. if (ld) {
  436. if (ld->receive_buf)
  437. ld->receive_buf(tty, data, flags, count);
  438. tty_ldisc_deref(ld);
  439. }
  440. }
  441. static int mgslpc_attach(struct pcmcia_device *p_dev)
  442. {
  443. MGSLPC_INFO *info;
  444. dev_link_t *link = dev_to_instance(p_dev);
  445. if (debug_level >= DEBUG_LEVEL_INFO)
  446. printk("mgslpc_attach\n");
  447. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  448. if (!info) {
  449. printk("Error can't allocate device instance data\n");
  450. return -ENOMEM;
  451. }
  452. memset(info, 0, sizeof(MGSLPC_INFO));
  453. info->magic = MGSLPC_MAGIC;
  454. INIT_WORK(&info->task, bh_handler, info);
  455. info->max_frame_size = 4096;
  456. info->close_delay = 5*HZ/10;
  457. info->closing_wait = 30*HZ;
  458. init_waitqueue_head(&info->open_wait);
  459. init_waitqueue_head(&info->close_wait);
  460. init_waitqueue_head(&info->status_event_wait_q);
  461. init_waitqueue_head(&info->event_wait_q);
  462. spin_lock_init(&info->lock);
  463. spin_lock_init(&info->netlock);
  464. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  465. info->idle_mode = HDLC_TXIDLE_FLAGS;
  466. info->imra_value = 0xffff;
  467. info->imrb_value = 0xffff;
  468. info->pim_value = 0xff;
  469. info->p_dev = p_dev;
  470. link->priv = info;
  471. /* Initialize the dev_link_t structure */
  472. /* Interrupt setup */
  473. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  474. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  475. link->irq.Handler = NULL;
  476. link->conf.Attributes = 0;
  477. link->conf.IntType = INT_MEMORY_AND_IO;
  478. link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
  479. mgslpc_config(link);
  480. mgslpc_add_device(info);
  481. return 0;
  482. }
  483. /* Card has been inserted.
  484. */
  485. #define CS_CHECK(fn, ret) \
  486. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  487. static void mgslpc_config(dev_link_t *link)
  488. {
  489. client_handle_t handle = link->handle;
  490. MGSLPC_INFO *info = link->priv;
  491. tuple_t tuple;
  492. cisparse_t parse;
  493. int last_fn, last_ret;
  494. u_char buf[64];
  495. cistpl_cftable_entry_t dflt = { 0 };
  496. cistpl_cftable_entry_t *cfg;
  497. if (debug_level >= DEBUG_LEVEL_INFO)
  498. printk("mgslpc_config(0x%p)\n", link);
  499. /* read CONFIG tuple to find its configuration registers */
  500. tuple.DesiredTuple = CISTPL_CONFIG;
  501. tuple.Attributes = 0;
  502. tuple.TupleData = buf;
  503. tuple.TupleDataMax = sizeof(buf);
  504. tuple.TupleOffset = 0;
  505. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  506. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  507. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  508. link->conf.ConfigBase = parse.config.base;
  509. link->conf.Present = parse.config.rmask[0];
  510. /* Configure card */
  511. link->state |= DEV_CONFIG;
  512. /* get CIS configuration entry */
  513. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  514. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  515. cfg = &(parse.cftable_entry);
  516. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  517. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  518. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  519. if (cfg->index == 0)
  520. goto cs_failed;
  521. link->conf.ConfigIndex = cfg->index;
  522. link->conf.Attributes |= CONF_ENABLE_IRQ;
  523. /* IO window settings */
  524. link->io.NumPorts1 = 0;
  525. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  526. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  527. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  528. if (!(io->flags & CISTPL_IO_8BIT))
  529. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  530. if (!(io->flags & CISTPL_IO_16BIT))
  531. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  532. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  533. link->io.BasePort1 = io->win[0].base;
  534. link->io.NumPorts1 = io->win[0].len;
  535. CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
  536. }
  537. link->conf.Attributes = CONF_ENABLE_IRQ;
  538. link->conf.IntType = INT_MEMORY_AND_IO;
  539. link->conf.ConfigIndex = 8;
  540. link->conf.Present = PRESENT_OPTION;
  541. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  542. link->irq.Handler = mgslpc_isr;
  543. link->irq.Instance = info;
  544. CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
  545. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
  546. info->io_base = link->io.BasePort1;
  547. info->irq_level = link->irq.AssignedIRQ;
  548. /* add to linked list of devices */
  549. sprintf(info->node.dev_name, "mgslpc0");
  550. info->node.major = info->node.minor = 0;
  551. link->dev_node = &info->node;
  552. printk(KERN_INFO "%s: index 0x%02x:",
  553. info->node.dev_name, link->conf.ConfigIndex);
  554. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  555. printk(", irq %d", link->irq.AssignedIRQ);
  556. if (link->io.NumPorts1)
  557. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  558. link->io.BasePort1+link->io.NumPorts1-1);
  559. printk("\n");
  560. link->state &= ~DEV_CONFIG_PENDING;
  561. return;
  562. cs_failed:
  563. cs_error(link->handle, last_fn, last_ret);
  564. mgslpc_release((u_long)link);
  565. }
  566. /* Card has been removed.
  567. * Unregister device and release PCMCIA configuration.
  568. * If device is open, postpone until it is closed.
  569. */
  570. static void mgslpc_release(u_long arg)
  571. {
  572. dev_link_t *link = (dev_link_t *)arg;
  573. if (debug_level >= DEBUG_LEVEL_INFO)
  574. printk("mgslpc_release(0x%p)\n", link);
  575. pcmcia_disable_device(link->handle);
  576. }
  577. static void mgslpc_detach(struct pcmcia_device *p_dev)
  578. {
  579. dev_link_t *link = dev_to_instance(p_dev);
  580. if (debug_level >= DEBUG_LEVEL_INFO)
  581. printk("mgslpc_detach(0x%p)\n", link);
  582. if (link->state & DEV_CONFIG) {
  583. ((MGSLPC_INFO *)link->priv)->stop = 1;
  584. mgslpc_release((u_long)link);
  585. }
  586. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  587. }
  588. static int mgslpc_suspend(struct pcmcia_device *dev)
  589. {
  590. dev_link_t *link = dev_to_instance(dev);
  591. MGSLPC_INFO *info = link->priv;
  592. info->stop = 1;
  593. return 0;
  594. }
  595. static int mgslpc_resume(struct pcmcia_device *dev)
  596. {
  597. dev_link_t *link = dev_to_instance(dev);
  598. MGSLPC_INFO *info = link->priv;
  599. info->stop = 0;
  600. return 0;
  601. }
  602. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  603. char *name, const char *routine)
  604. {
  605. #ifdef MGSLPC_PARANOIA_CHECK
  606. static const char *badmagic =
  607. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  608. static const char *badinfo =
  609. "Warning: null mgslpc_info for (%s) in %s\n";
  610. if (!info) {
  611. printk(badinfo, name, routine);
  612. return 1;
  613. }
  614. if (info->magic != MGSLPC_MAGIC) {
  615. printk(badmagic, name, routine);
  616. return 1;
  617. }
  618. #else
  619. if (!info)
  620. return 1;
  621. #endif
  622. return 0;
  623. }
  624. #define CMD_RXFIFO BIT7 // release current rx FIFO
  625. #define CMD_RXRESET BIT6 // receiver reset
  626. #define CMD_RXFIFO_READ BIT5
  627. #define CMD_START_TIMER BIT4
  628. #define CMD_TXFIFO BIT3 // release current tx FIFO
  629. #define CMD_TXEOM BIT1 // transmit end message
  630. #define CMD_TXRESET BIT0 // transmit reset
  631. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  632. {
  633. int i = 0;
  634. /* wait for command completion */
  635. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  636. udelay(1);
  637. if (i++ == 1000)
  638. return FALSE;
  639. }
  640. return TRUE;
  641. }
  642. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  643. {
  644. wait_command_complete(info, channel);
  645. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  646. }
  647. static void tx_pause(struct tty_struct *tty)
  648. {
  649. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  650. unsigned long flags;
  651. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  652. return;
  653. if (debug_level >= DEBUG_LEVEL_INFO)
  654. printk("tx_pause(%s)\n",info->device_name);
  655. spin_lock_irqsave(&info->lock,flags);
  656. if (info->tx_enabled)
  657. tx_stop(info);
  658. spin_unlock_irqrestore(&info->lock,flags);
  659. }
  660. static void tx_release(struct tty_struct *tty)
  661. {
  662. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  663. unsigned long flags;
  664. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  665. return;
  666. if (debug_level >= DEBUG_LEVEL_INFO)
  667. printk("tx_release(%s)\n",info->device_name);
  668. spin_lock_irqsave(&info->lock,flags);
  669. if (!info->tx_enabled)
  670. tx_start(info);
  671. spin_unlock_irqrestore(&info->lock,flags);
  672. }
  673. /* Return next bottom half action to perform.
  674. * or 0 if nothing to do.
  675. */
  676. static int bh_action(MGSLPC_INFO *info)
  677. {
  678. unsigned long flags;
  679. int rc = 0;
  680. spin_lock_irqsave(&info->lock,flags);
  681. if (info->pending_bh & BH_RECEIVE) {
  682. info->pending_bh &= ~BH_RECEIVE;
  683. rc = BH_RECEIVE;
  684. } else if (info->pending_bh & BH_TRANSMIT) {
  685. info->pending_bh &= ~BH_TRANSMIT;
  686. rc = BH_TRANSMIT;
  687. } else if (info->pending_bh & BH_STATUS) {
  688. info->pending_bh &= ~BH_STATUS;
  689. rc = BH_STATUS;
  690. }
  691. if (!rc) {
  692. /* Mark BH routine as complete */
  693. info->bh_running = 0;
  694. info->bh_requested = 0;
  695. }
  696. spin_unlock_irqrestore(&info->lock,flags);
  697. return rc;
  698. }
  699. void bh_handler(void* Context)
  700. {
  701. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  702. int action;
  703. if (!info)
  704. return;
  705. if (debug_level >= DEBUG_LEVEL_BH)
  706. printk( "%s(%d):bh_handler(%s) entry\n",
  707. __FILE__,__LINE__,info->device_name);
  708. info->bh_running = 1;
  709. while((action = bh_action(info)) != 0) {
  710. /* Process work item */
  711. if ( debug_level >= DEBUG_LEVEL_BH )
  712. printk( "%s(%d):bh_handler() work item action=%d\n",
  713. __FILE__,__LINE__,action);
  714. switch (action) {
  715. case BH_RECEIVE:
  716. while(rx_get_frame(info));
  717. break;
  718. case BH_TRANSMIT:
  719. bh_transmit(info);
  720. break;
  721. case BH_STATUS:
  722. bh_status(info);
  723. break;
  724. default:
  725. /* unknown work item ID */
  726. printk("Unknown work item ID=%08X!\n", action);
  727. break;
  728. }
  729. }
  730. if (debug_level >= DEBUG_LEVEL_BH)
  731. printk( "%s(%d):bh_handler(%s) exit\n",
  732. __FILE__,__LINE__,info->device_name);
  733. }
  734. void bh_transmit(MGSLPC_INFO *info)
  735. {
  736. struct tty_struct *tty = info->tty;
  737. if (debug_level >= DEBUG_LEVEL_BH)
  738. printk("bh_transmit() entry on %s\n", info->device_name);
  739. if (tty) {
  740. tty_wakeup(tty);
  741. wake_up_interruptible(&tty->write_wait);
  742. }
  743. }
  744. void bh_status(MGSLPC_INFO *info)
  745. {
  746. info->ri_chkcount = 0;
  747. info->dsr_chkcount = 0;
  748. info->dcd_chkcount = 0;
  749. info->cts_chkcount = 0;
  750. }
  751. /* eom: non-zero = end of frame */
  752. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  753. {
  754. unsigned char data[2];
  755. unsigned char fifo_count, read_count, i;
  756. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  757. if (debug_level >= DEBUG_LEVEL_ISR)
  758. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  759. if (!info->rx_enabled)
  760. return;
  761. if (info->rx_frame_count >= info->rx_buf_count) {
  762. /* no more free buffers */
  763. issue_command(info, CHA, CMD_RXRESET);
  764. info->pending_bh |= BH_RECEIVE;
  765. info->rx_overflow = 1;
  766. info->icount.buf_overrun++;
  767. return;
  768. }
  769. if (eom) {
  770. /* end of frame, get FIFO count from RBCL register */
  771. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  772. fifo_count = 32;
  773. } else
  774. fifo_count = 32;
  775. do {
  776. if (fifo_count == 1) {
  777. read_count = 1;
  778. data[0] = read_reg(info, CHA + RXFIFO);
  779. } else {
  780. read_count = 2;
  781. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  782. }
  783. fifo_count -= read_count;
  784. if (!fifo_count && eom)
  785. buf->status = data[--read_count];
  786. for (i = 0; i < read_count; i++) {
  787. if (buf->count >= info->max_frame_size) {
  788. /* frame too large, reset receiver and reset current buffer */
  789. issue_command(info, CHA, CMD_RXRESET);
  790. buf->count = 0;
  791. return;
  792. }
  793. *(buf->data + buf->count) = data[i];
  794. buf->count++;
  795. }
  796. } while (fifo_count);
  797. if (eom) {
  798. info->pending_bh |= BH_RECEIVE;
  799. info->rx_frame_count++;
  800. info->rx_put++;
  801. if (info->rx_put >= info->rx_buf_count)
  802. info->rx_put = 0;
  803. }
  804. issue_command(info, CHA, CMD_RXFIFO);
  805. }
  806. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  807. {
  808. unsigned char data, status, flag;
  809. int fifo_count;
  810. int work = 0;
  811. struct tty_struct *tty = info->tty;
  812. struct mgsl_icount *icount = &info->icount;
  813. if (tcd) {
  814. /* early termination, get FIFO count from RBCL register */
  815. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  816. /* Zero fifo count could mean 0 or 32 bytes available.
  817. * If BIT5 of STAR is set then at least 1 byte is available.
  818. */
  819. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  820. fifo_count = 32;
  821. } else
  822. fifo_count = 32;
  823. tty_buffer_request_room(tty, fifo_count);
  824. /* Flush received async data to receive data buffer. */
  825. while (fifo_count) {
  826. data = read_reg(info, CHA + RXFIFO);
  827. status = read_reg(info, CHA + RXFIFO);
  828. fifo_count -= 2;
  829. icount->rx++;
  830. flag = TTY_NORMAL;
  831. // if no frameing/crc error then save data
  832. // BIT7:parity error
  833. // BIT6:framing error
  834. if (status & (BIT7 + BIT6)) {
  835. if (status & BIT7)
  836. icount->parity++;
  837. else
  838. icount->frame++;
  839. /* discard char if tty control flags say so */
  840. if (status & info->ignore_status_mask)
  841. continue;
  842. status &= info->read_status_mask;
  843. if (status & BIT7)
  844. flag = TTY_PARITY;
  845. else if (status & BIT6)
  846. flag = TTY_FRAME;
  847. }
  848. work += tty_insert_flip_char(tty, data, flag);
  849. }
  850. issue_command(info, CHA, CMD_RXFIFO);
  851. if (debug_level >= DEBUG_LEVEL_ISR) {
  852. printk("%s(%d):rx_ready_async",
  853. __FILE__,__LINE__);
  854. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  855. __FILE__,__LINE__,icount->rx,icount->brk,
  856. icount->parity,icount->frame,icount->overrun);
  857. }
  858. if (work)
  859. tty_flip_buffer_push(tty);
  860. }
  861. static void tx_done(MGSLPC_INFO *info)
  862. {
  863. if (!info->tx_active)
  864. return;
  865. info->tx_active = 0;
  866. info->tx_aborting = 0;
  867. if (info->params.mode == MGSL_MODE_ASYNC)
  868. return;
  869. info->tx_count = info->tx_put = info->tx_get = 0;
  870. del_timer(&info->tx_timer);
  871. if (info->drop_rts_on_tx_done) {
  872. get_signals(info);
  873. if (info->serial_signals & SerialSignal_RTS) {
  874. info->serial_signals &= ~SerialSignal_RTS;
  875. set_signals(info);
  876. }
  877. info->drop_rts_on_tx_done = 0;
  878. }
  879. #ifdef CONFIG_HDLC
  880. if (info->netcount)
  881. hdlcdev_tx_done(info);
  882. else
  883. #endif
  884. {
  885. if (info->tty->stopped || info->tty->hw_stopped) {
  886. tx_stop(info);
  887. return;
  888. }
  889. info->pending_bh |= BH_TRANSMIT;
  890. }
  891. }
  892. static void tx_ready(MGSLPC_INFO *info)
  893. {
  894. unsigned char fifo_count = 32;
  895. int c;
  896. if (debug_level >= DEBUG_LEVEL_ISR)
  897. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  898. if (info->params.mode == MGSL_MODE_HDLC) {
  899. if (!info->tx_active)
  900. return;
  901. } else {
  902. if (info->tty->stopped || info->tty->hw_stopped) {
  903. tx_stop(info);
  904. return;
  905. }
  906. if (!info->tx_count)
  907. info->tx_active = 0;
  908. }
  909. if (!info->tx_count)
  910. return;
  911. while (info->tx_count && fifo_count) {
  912. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  913. if (c == 1) {
  914. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  915. } else {
  916. write_reg16(info, CHA + TXFIFO,
  917. *((unsigned short*)(info->tx_buf + info->tx_get)));
  918. }
  919. info->tx_count -= c;
  920. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  921. fifo_count -= c;
  922. }
  923. if (info->params.mode == MGSL_MODE_ASYNC) {
  924. if (info->tx_count < WAKEUP_CHARS)
  925. info->pending_bh |= BH_TRANSMIT;
  926. issue_command(info, CHA, CMD_TXFIFO);
  927. } else {
  928. if (info->tx_count)
  929. issue_command(info, CHA, CMD_TXFIFO);
  930. else
  931. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  932. }
  933. }
  934. static void cts_change(MGSLPC_INFO *info)
  935. {
  936. get_signals(info);
  937. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  938. irq_disable(info, CHB, IRQ_CTS);
  939. info->icount.cts++;
  940. if (info->serial_signals & SerialSignal_CTS)
  941. info->input_signal_events.cts_up++;
  942. else
  943. info->input_signal_events.cts_down++;
  944. wake_up_interruptible(&info->status_event_wait_q);
  945. wake_up_interruptible(&info->event_wait_q);
  946. if (info->flags & ASYNC_CTS_FLOW) {
  947. if (info->tty->hw_stopped) {
  948. if (info->serial_signals & SerialSignal_CTS) {
  949. if (debug_level >= DEBUG_LEVEL_ISR)
  950. printk("CTS tx start...");
  951. if (info->tty)
  952. info->tty->hw_stopped = 0;
  953. tx_start(info);
  954. info->pending_bh |= BH_TRANSMIT;
  955. return;
  956. }
  957. } else {
  958. if (!(info->serial_signals & SerialSignal_CTS)) {
  959. if (debug_level >= DEBUG_LEVEL_ISR)
  960. printk("CTS tx stop...");
  961. if (info->tty)
  962. info->tty->hw_stopped = 1;
  963. tx_stop(info);
  964. }
  965. }
  966. }
  967. info->pending_bh |= BH_STATUS;
  968. }
  969. static void dcd_change(MGSLPC_INFO *info)
  970. {
  971. get_signals(info);
  972. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  973. irq_disable(info, CHB, IRQ_DCD);
  974. info->icount.dcd++;
  975. if (info->serial_signals & SerialSignal_DCD) {
  976. info->input_signal_events.dcd_up++;
  977. }
  978. else
  979. info->input_signal_events.dcd_down++;
  980. #ifdef CONFIG_HDLC
  981. if (info->netcount)
  982. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
  983. #endif
  984. wake_up_interruptible(&info->status_event_wait_q);
  985. wake_up_interruptible(&info->event_wait_q);
  986. if (info->flags & ASYNC_CHECK_CD) {
  987. if (debug_level >= DEBUG_LEVEL_ISR)
  988. printk("%s CD now %s...", info->device_name,
  989. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  990. if (info->serial_signals & SerialSignal_DCD)
  991. wake_up_interruptible(&info->open_wait);
  992. else {
  993. if (debug_level >= DEBUG_LEVEL_ISR)
  994. printk("doing serial hangup...");
  995. if (info->tty)
  996. tty_hangup(info->tty);
  997. }
  998. }
  999. info->pending_bh |= BH_STATUS;
  1000. }
  1001. static void dsr_change(MGSLPC_INFO *info)
  1002. {
  1003. get_signals(info);
  1004. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1005. port_irq_disable(info, PVR_DSR);
  1006. info->icount.dsr++;
  1007. if (info->serial_signals & SerialSignal_DSR)
  1008. info->input_signal_events.dsr_up++;
  1009. else
  1010. info->input_signal_events.dsr_down++;
  1011. wake_up_interruptible(&info->status_event_wait_q);
  1012. wake_up_interruptible(&info->event_wait_q);
  1013. info->pending_bh |= BH_STATUS;
  1014. }
  1015. static void ri_change(MGSLPC_INFO *info)
  1016. {
  1017. get_signals(info);
  1018. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1019. port_irq_disable(info, PVR_RI);
  1020. info->icount.rng++;
  1021. if (info->serial_signals & SerialSignal_RI)
  1022. info->input_signal_events.ri_up++;
  1023. else
  1024. info->input_signal_events.ri_down++;
  1025. wake_up_interruptible(&info->status_event_wait_q);
  1026. wake_up_interruptible(&info->event_wait_q);
  1027. info->pending_bh |= BH_STATUS;
  1028. }
  1029. /* Interrupt service routine entry point.
  1030. *
  1031. * Arguments:
  1032. *
  1033. * irq interrupt number that caused interrupt
  1034. * dev_id device ID supplied during interrupt registration
  1035. * regs interrupted processor context
  1036. */
  1037. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1038. {
  1039. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1040. unsigned short isr;
  1041. unsigned char gis, pis;
  1042. int count=0;
  1043. if (debug_level >= DEBUG_LEVEL_ISR)
  1044. printk("mgslpc_isr(%d) entry.\n", irq);
  1045. if (!info)
  1046. return IRQ_NONE;
  1047. if (!(info->p_dev->state & DEV_CONFIG))
  1048. return IRQ_HANDLED;
  1049. spin_lock(&info->lock);
  1050. while ((gis = read_reg(info, CHA + GIS))) {
  1051. if (debug_level >= DEBUG_LEVEL_ISR)
  1052. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1053. if ((gis & 0x70) || count > 1000) {
  1054. printk("synclink_cs:hardware failed or ejected\n");
  1055. break;
  1056. }
  1057. count++;
  1058. if (gis & (BIT1 + BIT0)) {
  1059. isr = read_reg16(info, CHB + ISR);
  1060. if (isr & IRQ_DCD)
  1061. dcd_change(info);
  1062. if (isr & IRQ_CTS)
  1063. cts_change(info);
  1064. }
  1065. if (gis & (BIT3 + BIT2))
  1066. {
  1067. isr = read_reg16(info, CHA + ISR);
  1068. if (isr & IRQ_TIMER) {
  1069. info->irq_occurred = 1;
  1070. irq_disable(info, CHA, IRQ_TIMER);
  1071. }
  1072. /* receive IRQs */
  1073. if (isr & IRQ_EXITHUNT) {
  1074. info->icount.exithunt++;
  1075. wake_up_interruptible(&info->event_wait_q);
  1076. }
  1077. if (isr & IRQ_BREAK_ON) {
  1078. info->icount.brk++;
  1079. if (info->flags & ASYNC_SAK)
  1080. do_SAK(info->tty);
  1081. }
  1082. if (isr & IRQ_RXTIME) {
  1083. issue_command(info, CHA, CMD_RXFIFO_READ);
  1084. }
  1085. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1086. if (info->params.mode == MGSL_MODE_HDLC)
  1087. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1088. else
  1089. rx_ready_async(info, isr & IRQ_RXEOM);
  1090. }
  1091. /* transmit IRQs */
  1092. if (isr & IRQ_UNDERRUN) {
  1093. if (info->tx_aborting)
  1094. info->icount.txabort++;
  1095. else
  1096. info->icount.txunder++;
  1097. tx_done(info);
  1098. }
  1099. else if (isr & IRQ_ALLSENT) {
  1100. info->icount.txok++;
  1101. tx_done(info);
  1102. }
  1103. else if (isr & IRQ_TXFIFO)
  1104. tx_ready(info);
  1105. }
  1106. if (gis & BIT7) {
  1107. pis = read_reg(info, CHA + PIS);
  1108. if (pis & BIT1)
  1109. dsr_change(info);
  1110. if (pis & BIT2)
  1111. ri_change(info);
  1112. }
  1113. }
  1114. /* Request bottom half processing if there's something
  1115. * for it to do and the bh is not already running
  1116. */
  1117. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1118. if ( debug_level >= DEBUG_LEVEL_ISR )
  1119. printk("%s(%d):%s queueing bh task.\n",
  1120. __FILE__,__LINE__,info->device_name);
  1121. schedule_work(&info->task);
  1122. info->bh_requested = 1;
  1123. }
  1124. spin_unlock(&info->lock);
  1125. if (debug_level >= DEBUG_LEVEL_ISR)
  1126. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1127. __FILE__,__LINE__,irq);
  1128. return IRQ_HANDLED;
  1129. }
  1130. /* Initialize and start device.
  1131. */
  1132. static int startup(MGSLPC_INFO * info)
  1133. {
  1134. int retval = 0;
  1135. if (debug_level >= DEBUG_LEVEL_INFO)
  1136. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1137. if (info->flags & ASYNC_INITIALIZED)
  1138. return 0;
  1139. if (!info->tx_buf) {
  1140. /* allocate a page of memory for a transmit buffer */
  1141. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1142. if (!info->tx_buf) {
  1143. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1144. __FILE__,__LINE__,info->device_name);
  1145. return -ENOMEM;
  1146. }
  1147. }
  1148. info->pending_bh = 0;
  1149. memset(&info->icount, 0, sizeof(info->icount));
  1150. init_timer(&info->tx_timer);
  1151. info->tx_timer.data = (unsigned long)info;
  1152. info->tx_timer.function = tx_timeout;
  1153. /* Allocate and claim adapter resources */
  1154. retval = claim_resources(info);
  1155. /* perform existance check and diagnostics */
  1156. if ( !retval )
  1157. retval = adapter_test(info);
  1158. if ( retval ) {
  1159. if (capable(CAP_SYS_ADMIN) && info->tty)
  1160. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1161. release_resources(info);
  1162. return retval;
  1163. }
  1164. /* program hardware for current parameters */
  1165. mgslpc_change_params(info);
  1166. if (info->tty)
  1167. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1168. info->flags |= ASYNC_INITIALIZED;
  1169. return 0;
  1170. }
  1171. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1172. */
  1173. static void shutdown(MGSLPC_INFO * info)
  1174. {
  1175. unsigned long flags;
  1176. if (!(info->flags & ASYNC_INITIALIZED))
  1177. return;
  1178. if (debug_level >= DEBUG_LEVEL_INFO)
  1179. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1180. __FILE__,__LINE__, info->device_name );
  1181. /* clear status wait queue because status changes */
  1182. /* can't happen after shutting down the hardware */
  1183. wake_up_interruptible(&info->status_event_wait_q);
  1184. wake_up_interruptible(&info->event_wait_q);
  1185. del_timer(&info->tx_timer);
  1186. if (info->tx_buf) {
  1187. free_page((unsigned long) info->tx_buf);
  1188. info->tx_buf = NULL;
  1189. }
  1190. spin_lock_irqsave(&info->lock,flags);
  1191. rx_stop(info);
  1192. tx_stop(info);
  1193. /* TODO:disable interrupts instead of reset to preserve signal states */
  1194. reset_device(info);
  1195. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1196. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1197. set_signals(info);
  1198. }
  1199. spin_unlock_irqrestore(&info->lock,flags);
  1200. release_resources(info);
  1201. if (info->tty)
  1202. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1203. info->flags &= ~ASYNC_INITIALIZED;
  1204. }
  1205. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1206. {
  1207. unsigned long flags;
  1208. spin_lock_irqsave(&info->lock,flags);
  1209. rx_stop(info);
  1210. tx_stop(info);
  1211. info->tx_count = info->tx_put = info->tx_get = 0;
  1212. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1213. hdlc_mode(info);
  1214. else
  1215. async_mode(info);
  1216. set_signals(info);
  1217. info->dcd_chkcount = 0;
  1218. info->cts_chkcount = 0;
  1219. info->ri_chkcount = 0;
  1220. info->dsr_chkcount = 0;
  1221. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1222. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1223. get_signals(info);
  1224. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1225. rx_start(info);
  1226. spin_unlock_irqrestore(&info->lock,flags);
  1227. }
  1228. /* Reconfigure adapter based on new parameters
  1229. */
  1230. static void mgslpc_change_params(MGSLPC_INFO *info)
  1231. {
  1232. unsigned cflag;
  1233. int bits_per_char;
  1234. if (!info->tty || !info->tty->termios)
  1235. return;
  1236. if (debug_level >= DEBUG_LEVEL_INFO)
  1237. printk("%s(%d):mgslpc_change_params(%s)\n",
  1238. __FILE__,__LINE__, info->device_name );
  1239. cflag = info->tty->termios->c_cflag;
  1240. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1241. /* otherwise assert DTR and RTS */
  1242. if (cflag & CBAUD)
  1243. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1244. else
  1245. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1246. /* byte size and parity */
  1247. switch (cflag & CSIZE) {
  1248. case CS5: info->params.data_bits = 5; break;
  1249. case CS6: info->params.data_bits = 6; break;
  1250. case CS7: info->params.data_bits = 7; break;
  1251. case CS8: info->params.data_bits = 8; break;
  1252. default: info->params.data_bits = 7; break;
  1253. }
  1254. if (cflag & CSTOPB)
  1255. info->params.stop_bits = 2;
  1256. else
  1257. info->params.stop_bits = 1;
  1258. info->params.parity = ASYNC_PARITY_NONE;
  1259. if (cflag & PARENB) {
  1260. if (cflag & PARODD)
  1261. info->params.parity = ASYNC_PARITY_ODD;
  1262. else
  1263. info->params.parity = ASYNC_PARITY_EVEN;
  1264. #ifdef CMSPAR
  1265. if (cflag & CMSPAR)
  1266. info->params.parity = ASYNC_PARITY_SPACE;
  1267. #endif
  1268. }
  1269. /* calculate number of jiffies to transmit a full
  1270. * FIFO (32 bytes) at specified data rate
  1271. */
  1272. bits_per_char = info->params.data_bits +
  1273. info->params.stop_bits + 1;
  1274. /* if port data rate is set to 460800 or less then
  1275. * allow tty settings to override, otherwise keep the
  1276. * current data rate.
  1277. */
  1278. if (info->params.data_rate <= 460800) {
  1279. info->params.data_rate = tty_get_baud_rate(info->tty);
  1280. }
  1281. if ( info->params.data_rate ) {
  1282. info->timeout = (32*HZ*bits_per_char) /
  1283. info->params.data_rate;
  1284. }
  1285. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1286. if (cflag & CRTSCTS)
  1287. info->flags |= ASYNC_CTS_FLOW;
  1288. else
  1289. info->flags &= ~ASYNC_CTS_FLOW;
  1290. if (cflag & CLOCAL)
  1291. info->flags &= ~ASYNC_CHECK_CD;
  1292. else
  1293. info->flags |= ASYNC_CHECK_CD;
  1294. /* process tty input control flags */
  1295. info->read_status_mask = 0;
  1296. if (I_INPCK(info->tty))
  1297. info->read_status_mask |= BIT7 | BIT6;
  1298. if (I_IGNPAR(info->tty))
  1299. info->ignore_status_mask |= BIT7 | BIT6;
  1300. mgslpc_program_hw(info);
  1301. }
  1302. /* Add a character to the transmit buffer
  1303. */
  1304. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1305. {
  1306. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1307. unsigned long flags;
  1308. if (debug_level >= DEBUG_LEVEL_INFO) {
  1309. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1310. __FILE__,__LINE__,ch,info->device_name);
  1311. }
  1312. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1313. return;
  1314. if (!tty || !info->tx_buf)
  1315. return;
  1316. spin_lock_irqsave(&info->lock,flags);
  1317. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1318. if (info->tx_count < TXBUFSIZE - 1) {
  1319. info->tx_buf[info->tx_put++] = ch;
  1320. info->tx_put &= TXBUFSIZE-1;
  1321. info->tx_count++;
  1322. }
  1323. }
  1324. spin_unlock_irqrestore(&info->lock,flags);
  1325. }
  1326. /* Enable transmitter so remaining characters in the
  1327. * transmit buffer are sent.
  1328. */
  1329. static void mgslpc_flush_chars(struct tty_struct *tty)
  1330. {
  1331. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1332. unsigned long flags;
  1333. if (debug_level >= DEBUG_LEVEL_INFO)
  1334. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1335. __FILE__,__LINE__,info->device_name,info->tx_count);
  1336. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1337. return;
  1338. if (info->tx_count <= 0 || tty->stopped ||
  1339. tty->hw_stopped || !info->tx_buf)
  1340. return;
  1341. if (debug_level >= DEBUG_LEVEL_INFO)
  1342. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1343. __FILE__,__LINE__,info->device_name);
  1344. spin_lock_irqsave(&info->lock,flags);
  1345. if (!info->tx_active)
  1346. tx_start(info);
  1347. spin_unlock_irqrestore(&info->lock,flags);
  1348. }
  1349. /* Send a block of data
  1350. *
  1351. * Arguments:
  1352. *
  1353. * tty pointer to tty information structure
  1354. * buf pointer to buffer containing send data
  1355. * count size of send data in bytes
  1356. *
  1357. * Returns: number of characters written
  1358. */
  1359. static int mgslpc_write(struct tty_struct * tty,
  1360. const unsigned char *buf, int count)
  1361. {
  1362. int c, ret = 0;
  1363. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1364. unsigned long flags;
  1365. if (debug_level >= DEBUG_LEVEL_INFO)
  1366. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1367. __FILE__,__LINE__,info->device_name,count);
  1368. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1369. !tty || !info->tx_buf)
  1370. goto cleanup;
  1371. if (info->params.mode == MGSL_MODE_HDLC) {
  1372. if (count > TXBUFSIZE) {
  1373. ret = -EIO;
  1374. goto cleanup;
  1375. }
  1376. if (info->tx_active)
  1377. goto cleanup;
  1378. else if (info->tx_count)
  1379. goto start;
  1380. }
  1381. for (;;) {
  1382. c = min(count,
  1383. min(TXBUFSIZE - info->tx_count - 1,
  1384. TXBUFSIZE - info->tx_put));
  1385. if (c <= 0)
  1386. break;
  1387. memcpy(info->tx_buf + info->tx_put, buf, c);
  1388. spin_lock_irqsave(&info->lock,flags);
  1389. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1390. info->tx_count += c;
  1391. spin_unlock_irqrestore(&info->lock,flags);
  1392. buf += c;
  1393. count -= c;
  1394. ret += c;
  1395. }
  1396. start:
  1397. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1398. spin_lock_irqsave(&info->lock,flags);
  1399. if (!info->tx_active)
  1400. tx_start(info);
  1401. spin_unlock_irqrestore(&info->lock,flags);
  1402. }
  1403. cleanup:
  1404. if (debug_level >= DEBUG_LEVEL_INFO)
  1405. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1406. __FILE__,__LINE__,info->device_name,ret);
  1407. return ret;
  1408. }
  1409. /* Return the count of free bytes in transmit buffer
  1410. */
  1411. static int mgslpc_write_room(struct tty_struct *tty)
  1412. {
  1413. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1414. int ret;
  1415. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1416. return 0;
  1417. if (info->params.mode == MGSL_MODE_HDLC) {
  1418. /* HDLC (frame oriented) mode */
  1419. if (info->tx_active)
  1420. return 0;
  1421. else
  1422. return HDLC_MAX_FRAME_SIZE;
  1423. } else {
  1424. ret = TXBUFSIZE - info->tx_count - 1;
  1425. if (ret < 0)
  1426. ret = 0;
  1427. }
  1428. if (debug_level >= DEBUG_LEVEL_INFO)
  1429. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1430. __FILE__,__LINE__, info->device_name, ret);
  1431. return ret;
  1432. }
  1433. /* Return the count of bytes in transmit buffer
  1434. */
  1435. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1436. {
  1437. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1438. int rc;
  1439. if (debug_level >= DEBUG_LEVEL_INFO)
  1440. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1441. __FILE__,__LINE__, info->device_name );
  1442. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1443. return 0;
  1444. if (info->params.mode == MGSL_MODE_HDLC)
  1445. rc = info->tx_active ? info->max_frame_size : 0;
  1446. else
  1447. rc = info->tx_count;
  1448. if (debug_level >= DEBUG_LEVEL_INFO)
  1449. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1450. __FILE__,__LINE__, info->device_name, rc);
  1451. return rc;
  1452. }
  1453. /* Discard all data in the send buffer
  1454. */
  1455. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1456. {
  1457. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1458. unsigned long flags;
  1459. if (debug_level >= DEBUG_LEVEL_INFO)
  1460. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1461. __FILE__,__LINE__, info->device_name );
  1462. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1463. return;
  1464. spin_lock_irqsave(&info->lock,flags);
  1465. info->tx_count = info->tx_put = info->tx_get = 0;
  1466. del_timer(&info->tx_timer);
  1467. spin_unlock_irqrestore(&info->lock,flags);
  1468. wake_up_interruptible(&tty->write_wait);
  1469. tty_wakeup(tty);
  1470. }
  1471. /* Send a high-priority XON/XOFF character
  1472. */
  1473. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1474. {
  1475. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1476. unsigned long flags;
  1477. if (debug_level >= DEBUG_LEVEL_INFO)
  1478. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1479. __FILE__,__LINE__, info->device_name, ch );
  1480. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1481. return;
  1482. info->x_char = ch;
  1483. if (ch) {
  1484. spin_lock_irqsave(&info->lock,flags);
  1485. if (!info->tx_enabled)
  1486. tx_start(info);
  1487. spin_unlock_irqrestore(&info->lock,flags);
  1488. }
  1489. }
  1490. /* Signal remote device to throttle send data (our receive data)
  1491. */
  1492. static void mgslpc_throttle(struct tty_struct * tty)
  1493. {
  1494. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1495. unsigned long flags;
  1496. if (debug_level >= DEBUG_LEVEL_INFO)
  1497. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1498. __FILE__,__LINE__, info->device_name );
  1499. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1500. return;
  1501. if (I_IXOFF(tty))
  1502. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1503. if (tty->termios->c_cflag & CRTSCTS) {
  1504. spin_lock_irqsave(&info->lock,flags);
  1505. info->serial_signals &= ~SerialSignal_RTS;
  1506. set_signals(info);
  1507. spin_unlock_irqrestore(&info->lock,flags);
  1508. }
  1509. }
  1510. /* Signal remote device to stop throttling send data (our receive data)
  1511. */
  1512. static void mgslpc_unthrottle(struct tty_struct * tty)
  1513. {
  1514. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1515. unsigned long flags;
  1516. if (debug_level >= DEBUG_LEVEL_INFO)
  1517. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1518. __FILE__,__LINE__, info->device_name );
  1519. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1520. return;
  1521. if (I_IXOFF(tty)) {
  1522. if (info->x_char)
  1523. info->x_char = 0;
  1524. else
  1525. mgslpc_send_xchar(tty, START_CHAR(tty));
  1526. }
  1527. if (tty->termios->c_cflag & CRTSCTS) {
  1528. spin_lock_irqsave(&info->lock,flags);
  1529. info->serial_signals |= SerialSignal_RTS;
  1530. set_signals(info);
  1531. spin_unlock_irqrestore(&info->lock,flags);
  1532. }
  1533. }
  1534. /* get the current serial statistics
  1535. */
  1536. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1537. {
  1538. int err;
  1539. if (debug_level >= DEBUG_LEVEL_INFO)
  1540. printk("get_params(%s)\n", info->device_name);
  1541. if (!user_icount) {
  1542. memset(&info->icount, 0, sizeof(info->icount));
  1543. } else {
  1544. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1545. if (err)
  1546. return -EFAULT;
  1547. }
  1548. return 0;
  1549. }
  1550. /* get the current serial parameters
  1551. */
  1552. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1553. {
  1554. int err;
  1555. if (debug_level >= DEBUG_LEVEL_INFO)
  1556. printk("get_params(%s)\n", info->device_name);
  1557. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1558. if (err)
  1559. return -EFAULT;
  1560. return 0;
  1561. }
  1562. /* set the serial parameters
  1563. *
  1564. * Arguments:
  1565. *
  1566. * info pointer to device instance data
  1567. * new_params user buffer containing new serial params
  1568. *
  1569. * Returns: 0 if success, otherwise error code
  1570. */
  1571. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1572. {
  1573. unsigned long flags;
  1574. MGSL_PARAMS tmp_params;
  1575. int err;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1578. info->device_name );
  1579. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1580. if (err) {
  1581. if ( debug_level >= DEBUG_LEVEL_INFO )
  1582. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1583. __FILE__,__LINE__,info->device_name);
  1584. return -EFAULT;
  1585. }
  1586. spin_lock_irqsave(&info->lock,flags);
  1587. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1588. spin_unlock_irqrestore(&info->lock,flags);
  1589. mgslpc_change_params(info);
  1590. return 0;
  1591. }
  1592. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1593. {
  1594. int err;
  1595. if (debug_level >= DEBUG_LEVEL_INFO)
  1596. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1597. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1598. if (err)
  1599. return -EFAULT;
  1600. return 0;
  1601. }
  1602. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1603. {
  1604. unsigned long flags;
  1605. if (debug_level >= DEBUG_LEVEL_INFO)
  1606. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1607. spin_lock_irqsave(&info->lock,flags);
  1608. info->idle_mode = idle_mode;
  1609. tx_set_idle(info);
  1610. spin_unlock_irqrestore(&info->lock,flags);
  1611. return 0;
  1612. }
  1613. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1614. {
  1615. int err;
  1616. if (debug_level >= DEBUG_LEVEL_INFO)
  1617. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1618. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1619. if (err)
  1620. return -EFAULT;
  1621. return 0;
  1622. }
  1623. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1624. {
  1625. unsigned long flags;
  1626. unsigned char val;
  1627. if (debug_level >= DEBUG_LEVEL_INFO)
  1628. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1629. spin_lock_irqsave(&info->lock,flags);
  1630. info->if_mode = if_mode;
  1631. val = read_reg(info, PVR) & 0x0f;
  1632. switch (info->if_mode)
  1633. {
  1634. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1635. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1636. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1637. }
  1638. write_reg(info, PVR, val);
  1639. spin_unlock_irqrestore(&info->lock,flags);
  1640. return 0;
  1641. }
  1642. static int set_txenable(MGSLPC_INFO * info, int enable)
  1643. {
  1644. unsigned long flags;
  1645. if (debug_level >= DEBUG_LEVEL_INFO)
  1646. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1647. spin_lock_irqsave(&info->lock,flags);
  1648. if (enable) {
  1649. if (!info->tx_enabled)
  1650. tx_start(info);
  1651. } else {
  1652. if (info->tx_enabled)
  1653. tx_stop(info);
  1654. }
  1655. spin_unlock_irqrestore(&info->lock,flags);
  1656. return 0;
  1657. }
  1658. static int tx_abort(MGSLPC_INFO * info)
  1659. {
  1660. unsigned long flags;
  1661. if (debug_level >= DEBUG_LEVEL_INFO)
  1662. printk("tx_abort(%s)\n", info->device_name);
  1663. spin_lock_irqsave(&info->lock,flags);
  1664. if (info->tx_active && info->tx_count &&
  1665. info->params.mode == MGSL_MODE_HDLC) {
  1666. /* clear data count so FIFO is not filled on next IRQ.
  1667. * This results in underrun and abort transmission.
  1668. */
  1669. info->tx_count = info->tx_put = info->tx_get = 0;
  1670. info->tx_aborting = TRUE;
  1671. }
  1672. spin_unlock_irqrestore(&info->lock,flags);
  1673. return 0;
  1674. }
  1675. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1676. {
  1677. unsigned long flags;
  1678. if (debug_level >= DEBUG_LEVEL_INFO)
  1679. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1680. spin_lock_irqsave(&info->lock,flags);
  1681. if (enable) {
  1682. if (!info->rx_enabled)
  1683. rx_start(info);
  1684. } else {
  1685. if (info->rx_enabled)
  1686. rx_stop(info);
  1687. }
  1688. spin_unlock_irqrestore(&info->lock,flags);
  1689. return 0;
  1690. }
  1691. /* wait for specified event to occur
  1692. *
  1693. * Arguments: info pointer to device instance data
  1694. * mask pointer to bitmask of events to wait for
  1695. * Return Value: 0 if successful and bit mask updated with
  1696. * of events triggerred,
  1697. * otherwise error code
  1698. */
  1699. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1700. {
  1701. unsigned long flags;
  1702. int s;
  1703. int rc=0;
  1704. struct mgsl_icount cprev, cnow;
  1705. int events;
  1706. int mask;
  1707. struct _input_signal_events oldsigs, newsigs;
  1708. DECLARE_WAITQUEUE(wait, current);
  1709. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1710. if (rc)
  1711. return -EFAULT;
  1712. if (debug_level >= DEBUG_LEVEL_INFO)
  1713. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1714. spin_lock_irqsave(&info->lock,flags);
  1715. /* return immediately if state matches requested events */
  1716. get_signals(info);
  1717. s = info->serial_signals;
  1718. events = mask &
  1719. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1720. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1721. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1722. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1723. if (events) {
  1724. spin_unlock_irqrestore(&info->lock,flags);
  1725. goto exit;
  1726. }
  1727. /* save current irq counts */
  1728. cprev = info->icount;
  1729. oldsigs = info->input_signal_events;
  1730. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1731. (mask & MgslEvent_ExitHuntMode))
  1732. irq_enable(info, CHA, IRQ_EXITHUNT);
  1733. set_current_state(TASK_INTERRUPTIBLE);
  1734. add_wait_queue(&info->event_wait_q, &wait);
  1735. spin_unlock_irqrestore(&info->lock,flags);
  1736. for(;;) {
  1737. schedule();
  1738. if (signal_pending(current)) {
  1739. rc = -ERESTARTSYS;
  1740. break;
  1741. }
  1742. /* get current irq counts */
  1743. spin_lock_irqsave(&info->lock,flags);
  1744. cnow = info->icount;
  1745. newsigs = info->input_signal_events;
  1746. set_current_state(TASK_INTERRUPTIBLE);
  1747. spin_unlock_irqrestore(&info->lock,flags);
  1748. /* if no change, wait aborted for some reason */
  1749. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1750. newsigs.dsr_down == oldsigs.dsr_down &&
  1751. newsigs.dcd_up == oldsigs.dcd_up &&
  1752. newsigs.dcd_down == oldsigs.dcd_down &&
  1753. newsigs.cts_up == oldsigs.cts_up &&
  1754. newsigs.cts_down == oldsigs.cts_down &&
  1755. newsigs.ri_up == oldsigs.ri_up &&
  1756. newsigs.ri_down == oldsigs.ri_down &&
  1757. cnow.exithunt == cprev.exithunt &&
  1758. cnow.rxidle == cprev.rxidle) {
  1759. rc = -EIO;
  1760. break;
  1761. }
  1762. events = mask &
  1763. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1764. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1765. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1766. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1767. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1768. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1769. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1770. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1771. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1772. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1773. if (events)
  1774. break;
  1775. cprev = cnow;
  1776. oldsigs = newsigs;
  1777. }
  1778. remove_wait_queue(&info->event_wait_q, &wait);
  1779. set_current_state(TASK_RUNNING);
  1780. if (mask & MgslEvent_ExitHuntMode) {
  1781. spin_lock_irqsave(&info->lock,flags);
  1782. if (!waitqueue_active(&info->event_wait_q))
  1783. irq_disable(info, CHA, IRQ_EXITHUNT);
  1784. spin_unlock_irqrestore(&info->lock,flags);
  1785. }
  1786. exit:
  1787. if (rc == 0)
  1788. PUT_USER(rc, events, mask_ptr);
  1789. return rc;
  1790. }
  1791. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1792. {
  1793. unsigned long flags;
  1794. int rc;
  1795. struct mgsl_icount cprev, cnow;
  1796. DECLARE_WAITQUEUE(wait, current);
  1797. /* save current irq counts */
  1798. spin_lock_irqsave(&info->lock,flags);
  1799. cprev = info->icount;
  1800. add_wait_queue(&info->status_event_wait_q, &wait);
  1801. set_current_state(TASK_INTERRUPTIBLE);
  1802. spin_unlock_irqrestore(&info->lock,flags);
  1803. for(;;) {
  1804. schedule();
  1805. if (signal_pending(current)) {
  1806. rc = -ERESTARTSYS;
  1807. break;
  1808. }
  1809. /* get new irq counts */
  1810. spin_lock_irqsave(&info->lock,flags);
  1811. cnow = info->icount;
  1812. set_current_state(TASK_INTERRUPTIBLE);
  1813. spin_unlock_irqrestore(&info->lock,flags);
  1814. /* if no change, wait aborted for some reason */
  1815. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1816. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1817. rc = -EIO;
  1818. break;
  1819. }
  1820. /* check for change in caller specified modem input */
  1821. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1822. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1823. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1824. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1825. rc = 0;
  1826. break;
  1827. }
  1828. cprev = cnow;
  1829. }
  1830. remove_wait_queue(&info->status_event_wait_q, &wait);
  1831. set_current_state(TASK_RUNNING);
  1832. return rc;
  1833. }
  1834. /* return the state of the serial control and status signals
  1835. */
  1836. static int tiocmget(struct tty_struct *tty, struct file *file)
  1837. {
  1838. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1839. unsigned int result;
  1840. unsigned long flags;
  1841. spin_lock_irqsave(&info->lock,flags);
  1842. get_signals(info);
  1843. spin_unlock_irqrestore(&info->lock,flags);
  1844. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1845. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1846. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1847. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1848. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1849. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1850. if (debug_level >= DEBUG_LEVEL_INFO)
  1851. printk("%s(%d):%s tiocmget() value=%08X\n",
  1852. __FILE__,__LINE__, info->device_name, result );
  1853. return result;
  1854. }
  1855. /* set modem control signals (DTR/RTS)
  1856. */
  1857. static int tiocmset(struct tty_struct *tty, struct file *file,
  1858. unsigned int set, unsigned int clear)
  1859. {
  1860. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1861. unsigned long flags;
  1862. if (debug_level >= DEBUG_LEVEL_INFO)
  1863. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1864. __FILE__,__LINE__,info->device_name, set, clear);
  1865. if (set & TIOCM_RTS)
  1866. info->serial_signals |= SerialSignal_RTS;
  1867. if (set & TIOCM_DTR)
  1868. info->serial_signals |= SerialSignal_DTR;
  1869. if (clear & TIOCM_RTS)
  1870. info->serial_signals &= ~SerialSignal_RTS;
  1871. if (clear & TIOCM_DTR)
  1872. info->serial_signals &= ~SerialSignal_DTR;
  1873. spin_lock_irqsave(&info->lock,flags);
  1874. set_signals(info);
  1875. spin_unlock_irqrestore(&info->lock,flags);
  1876. return 0;
  1877. }
  1878. /* Set or clear transmit break condition
  1879. *
  1880. * Arguments: tty pointer to tty instance data
  1881. * break_state -1=set break condition, 0=clear
  1882. */
  1883. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1884. {
  1885. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1886. unsigned long flags;
  1887. if (debug_level >= DEBUG_LEVEL_INFO)
  1888. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1889. __FILE__,__LINE__, info->device_name, break_state);
  1890. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1891. return;
  1892. spin_lock_irqsave(&info->lock,flags);
  1893. if (break_state == -1)
  1894. set_reg_bits(info, CHA+DAFO, BIT6);
  1895. else
  1896. clear_reg_bits(info, CHA+DAFO, BIT6);
  1897. spin_unlock_irqrestore(&info->lock,flags);
  1898. }
  1899. /* Service an IOCTL request
  1900. *
  1901. * Arguments:
  1902. *
  1903. * tty pointer to tty instance data
  1904. * file pointer to associated file object for device
  1905. * cmd IOCTL command code
  1906. * arg command argument/context
  1907. *
  1908. * Return Value: 0 if success, otherwise error code
  1909. */
  1910. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1911. unsigned int cmd, unsigned long arg)
  1912. {
  1913. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1914. if (debug_level >= DEBUG_LEVEL_INFO)
  1915. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1916. info->device_name, cmd );
  1917. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1918. return -ENODEV;
  1919. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1920. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1921. if (tty->flags & (1 << TTY_IO_ERROR))
  1922. return -EIO;
  1923. }
  1924. return ioctl_common(info, cmd, arg);
  1925. }
  1926. int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1927. {
  1928. int error;
  1929. struct mgsl_icount cnow; /* kernel counter temps */
  1930. struct serial_icounter_struct __user *p_cuser; /* user space */
  1931. void __user *argp = (void __user *)arg;
  1932. unsigned long flags;
  1933. switch (cmd) {
  1934. case MGSL_IOCGPARAMS:
  1935. return get_params(info, argp);
  1936. case MGSL_IOCSPARAMS:
  1937. return set_params(info, argp);
  1938. case MGSL_IOCGTXIDLE:
  1939. return get_txidle(info, argp);
  1940. case MGSL_IOCSTXIDLE:
  1941. return set_txidle(info, (int)arg);
  1942. case MGSL_IOCGIF:
  1943. return get_interface(info, argp);
  1944. case MGSL_IOCSIF:
  1945. return set_interface(info,(int)arg);
  1946. case MGSL_IOCTXENABLE:
  1947. return set_txenable(info,(int)arg);
  1948. case MGSL_IOCRXENABLE:
  1949. return set_rxenable(info,(int)arg);
  1950. case MGSL_IOCTXABORT:
  1951. return tx_abort(info);
  1952. case MGSL_IOCGSTATS:
  1953. return get_stats(info, argp);
  1954. case MGSL_IOCWAITEVENT:
  1955. return wait_events(info, argp);
  1956. case TIOCMIWAIT:
  1957. return modem_input_wait(info,(int)arg);
  1958. case TIOCGICOUNT:
  1959. spin_lock_irqsave(&info->lock,flags);
  1960. cnow = info->icount;
  1961. spin_unlock_irqrestore(&info->lock,flags);
  1962. p_cuser = argp;
  1963. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1964. if (error) return error;
  1965. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1966. if (error) return error;
  1967. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1968. if (error) return error;
  1969. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1970. if (error) return error;
  1971. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1972. if (error) return error;
  1973. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1974. if (error) return error;
  1975. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1976. if (error) return error;
  1977. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1978. if (error) return error;
  1979. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1980. if (error) return error;
  1981. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1982. if (error) return error;
  1983. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1984. if (error) return error;
  1985. return 0;
  1986. default:
  1987. return -ENOIOCTLCMD;
  1988. }
  1989. return 0;
  1990. }
  1991. /* Set new termios settings
  1992. *
  1993. * Arguments:
  1994. *
  1995. * tty pointer to tty structure
  1996. * termios pointer to buffer to hold returned old termios
  1997. */
  1998. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1999. {
  2000. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  2001. unsigned long flags;
  2002. if (debug_level >= DEBUG_LEVEL_INFO)
  2003. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  2004. tty->driver->name );
  2005. /* just return if nothing has changed */
  2006. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2007. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2008. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2009. return;
  2010. mgslpc_change_params(info);
  2011. /* Handle transition to B0 status */
  2012. if (old_termios->c_cflag & CBAUD &&
  2013. !(tty->termios->c_cflag & CBAUD)) {
  2014. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2015. spin_lock_irqsave(&info->lock,flags);
  2016. set_signals(info);
  2017. spin_unlock_irqrestore(&info->lock,flags);
  2018. }
  2019. /* Handle transition away from B0 status */
  2020. if (!(old_termios->c_cflag & CBAUD) &&
  2021. tty->termios->c_cflag & CBAUD) {
  2022. info->serial_signals |= SerialSignal_DTR;
  2023. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2024. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2025. info->serial_signals |= SerialSignal_RTS;
  2026. }
  2027. spin_lock_irqsave(&info->lock,flags);
  2028. set_signals(info);
  2029. spin_unlock_irqrestore(&info->lock,flags);
  2030. }
  2031. /* Handle turning off CRTSCTS */
  2032. if (old_termios->c_cflag & CRTSCTS &&
  2033. !(tty->termios->c_cflag & CRTSCTS)) {
  2034. tty->hw_stopped = 0;
  2035. tx_release(tty);
  2036. }
  2037. }
  2038. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2039. {
  2040. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2041. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2042. return;
  2043. if (debug_level >= DEBUG_LEVEL_INFO)
  2044. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2045. __FILE__,__LINE__, info->device_name, info->count);
  2046. if (!info->count)
  2047. return;
  2048. if (tty_hung_up_p(filp))
  2049. goto cleanup;
  2050. if ((tty->count == 1) && (info->count != 1)) {
  2051. /*
  2052. * tty->count is 1 and the tty structure will be freed.
  2053. * info->count should be one in this case.
  2054. * if it's not, correct it so that the port is shutdown.
  2055. */
  2056. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2057. "info->count is %d\n", info->count);
  2058. info->count = 1;
  2059. }
  2060. info->count--;
  2061. /* if at least one open remaining, leave hardware active */
  2062. if (info->count)
  2063. goto cleanup;
  2064. info->flags |= ASYNC_CLOSING;
  2065. /* set tty->closing to notify line discipline to
  2066. * only process XON/XOFF characters. Only the N_TTY
  2067. * discipline appears to use this (ppp does not).
  2068. */
  2069. tty->closing = 1;
  2070. /* wait for transmit data to clear all layers */
  2071. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2072. if (debug_level >= DEBUG_LEVEL_INFO)
  2073. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2074. __FILE__,__LINE__, info->device_name );
  2075. tty_wait_until_sent(tty, info->closing_wait);
  2076. }
  2077. if (info->flags & ASYNC_INITIALIZED)
  2078. mgslpc_wait_until_sent(tty, info->timeout);
  2079. if (tty->driver->flush_buffer)
  2080. tty->driver->flush_buffer(tty);
  2081. ldisc_flush_buffer(tty);
  2082. shutdown(info);
  2083. tty->closing = 0;
  2084. info->tty = NULL;
  2085. if (info->blocked_open) {
  2086. if (info->close_delay) {
  2087. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2088. }
  2089. wake_up_interruptible(&info->open_wait);
  2090. }
  2091. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2092. wake_up_interruptible(&info->close_wait);
  2093. cleanup:
  2094. if (debug_level >= DEBUG_LEVEL_INFO)
  2095. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2096. tty->driver->name, info->count);
  2097. }
  2098. /* Wait until the transmitter is empty.
  2099. */
  2100. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2101. {
  2102. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2103. unsigned long orig_jiffies, char_time;
  2104. if (!info )
  2105. return;
  2106. if (debug_level >= DEBUG_LEVEL_INFO)
  2107. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2108. __FILE__,__LINE__, info->device_name );
  2109. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2110. return;
  2111. if (!(info->flags & ASYNC_INITIALIZED))
  2112. goto exit;
  2113. orig_jiffies = jiffies;
  2114. /* Set check interval to 1/5 of estimated time to
  2115. * send a character, and make it at least 1. The check
  2116. * interval should also be less than the timeout.
  2117. * Note: use tight timings here to satisfy the NIST-PCTS.
  2118. */
  2119. if ( info->params.data_rate ) {
  2120. char_time = info->timeout/(32 * 5);
  2121. if (!char_time)
  2122. char_time++;
  2123. } else
  2124. char_time = 1;
  2125. if (timeout)
  2126. char_time = min_t(unsigned long, char_time, timeout);
  2127. if (info->params.mode == MGSL_MODE_HDLC) {
  2128. while (info->tx_active) {
  2129. msleep_interruptible(jiffies_to_msecs(char_time));
  2130. if (signal_pending(current))
  2131. break;
  2132. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2133. break;
  2134. }
  2135. } else {
  2136. while ((info->tx_count || info->tx_active) &&
  2137. info->tx_enabled) {
  2138. msleep_interruptible(jiffies_to_msecs(char_time));
  2139. if (signal_pending(current))
  2140. break;
  2141. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2142. break;
  2143. }
  2144. }
  2145. exit:
  2146. if (debug_level >= DEBUG_LEVEL_INFO)
  2147. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2148. __FILE__,__LINE__, info->device_name );
  2149. }
  2150. /* Called by tty_hangup() when a hangup is signaled.
  2151. * This is the same as closing all open files for the port.
  2152. */
  2153. static void mgslpc_hangup(struct tty_struct *tty)
  2154. {
  2155. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2156. if (debug_level >= DEBUG_LEVEL_INFO)
  2157. printk("%s(%d):mgslpc_hangup(%s)\n",
  2158. __FILE__,__LINE__, info->device_name );
  2159. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2160. return;
  2161. mgslpc_flush_buffer(tty);
  2162. shutdown(info);
  2163. info->count = 0;
  2164. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2165. info->tty = NULL;
  2166. wake_up_interruptible(&info->open_wait);
  2167. }
  2168. /* Block the current process until the specified port
  2169. * is ready to be opened.
  2170. */
  2171. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2172. MGSLPC_INFO *info)
  2173. {
  2174. DECLARE_WAITQUEUE(wait, current);
  2175. int retval;
  2176. int do_clocal = 0, extra_count = 0;
  2177. unsigned long flags;
  2178. if (debug_level >= DEBUG_LEVEL_INFO)
  2179. printk("%s(%d):block_til_ready on %s\n",
  2180. __FILE__,__LINE__, tty->driver->name );
  2181. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2182. /* nonblock mode is set or port is not enabled */
  2183. /* just verify that callout device is not active */
  2184. info->flags |= ASYNC_NORMAL_ACTIVE;
  2185. return 0;
  2186. }
  2187. if (tty->termios->c_cflag & CLOCAL)
  2188. do_clocal = 1;
  2189. /* Wait for carrier detect and the line to become
  2190. * free (i.e., not in use by the callout). While we are in
  2191. * this loop, info->count is dropped by one, so that
  2192. * mgslpc_close() knows when to free things. We restore it upon
  2193. * exit, either normal or abnormal.
  2194. */
  2195. retval = 0;
  2196. add_wait_queue(&info->open_wait, &wait);
  2197. if (debug_level >= DEBUG_LEVEL_INFO)
  2198. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2199. __FILE__,__LINE__, tty->driver->name, info->count );
  2200. spin_lock_irqsave(&info->lock, flags);
  2201. if (!tty_hung_up_p(filp)) {
  2202. extra_count = 1;
  2203. info->count--;
  2204. }
  2205. spin_unlock_irqrestore(&info->lock, flags);
  2206. info->blocked_open++;
  2207. while (1) {
  2208. if ((tty->termios->c_cflag & CBAUD)) {
  2209. spin_lock_irqsave(&info->lock,flags);
  2210. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2211. set_signals(info);
  2212. spin_unlock_irqrestore(&info->lock,flags);
  2213. }
  2214. set_current_state(TASK_INTERRUPTIBLE);
  2215. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2216. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2217. -EAGAIN : -ERESTARTSYS;
  2218. break;
  2219. }
  2220. spin_lock_irqsave(&info->lock,flags);
  2221. get_signals(info);
  2222. spin_unlock_irqrestore(&info->lock,flags);
  2223. if (!(info->flags & ASYNC_CLOSING) &&
  2224. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2225. break;
  2226. }
  2227. if (signal_pending(current)) {
  2228. retval = -ERESTARTSYS;
  2229. break;
  2230. }
  2231. if (debug_level >= DEBUG_LEVEL_INFO)
  2232. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2233. __FILE__,__LINE__, tty->driver->name, info->count );
  2234. schedule();
  2235. }
  2236. set_current_state(TASK_RUNNING);
  2237. remove_wait_queue(&info->open_wait, &wait);
  2238. if (extra_count)
  2239. info->count++;
  2240. info->blocked_open--;
  2241. if (debug_level >= DEBUG_LEVEL_INFO)
  2242. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2243. __FILE__,__LINE__, tty->driver->name, info->count );
  2244. if (!retval)
  2245. info->flags |= ASYNC_NORMAL_ACTIVE;
  2246. return retval;
  2247. }
  2248. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2249. {
  2250. MGSLPC_INFO *info;
  2251. int retval, line;
  2252. unsigned long flags;
  2253. /* verify range of specified line number */
  2254. line = tty->index;
  2255. if ((line < 0) || (line >= mgslpc_device_count)) {
  2256. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2257. __FILE__,__LINE__,line);
  2258. return -ENODEV;
  2259. }
  2260. /* find the info structure for the specified line */
  2261. info = mgslpc_device_list;
  2262. while(info && info->line != line)
  2263. info = info->next_device;
  2264. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2265. return -ENODEV;
  2266. tty->driver_data = info;
  2267. info->tty = tty;
  2268. if (debug_level >= DEBUG_LEVEL_INFO)
  2269. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2270. __FILE__,__LINE__,tty->driver->name, info->count);
  2271. /* If port is closing, signal caller to try again */
  2272. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2273. if (info->flags & ASYNC_CLOSING)
  2274. interruptible_sleep_on(&info->close_wait);
  2275. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2276. -EAGAIN : -ERESTARTSYS);
  2277. goto cleanup;
  2278. }
  2279. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2280. spin_lock_irqsave(&info->netlock, flags);
  2281. if (info->netcount) {
  2282. retval = -EBUSY;
  2283. spin_unlock_irqrestore(&info->netlock, flags);
  2284. goto cleanup;
  2285. }
  2286. info->count++;
  2287. spin_unlock_irqrestore(&info->netlock, flags);
  2288. if (info->count == 1) {
  2289. /* 1st open on this device, init hardware */
  2290. retval = startup(info);
  2291. if (retval < 0)
  2292. goto cleanup;
  2293. }
  2294. retval = block_til_ready(tty, filp, info);
  2295. if (retval) {
  2296. if (debug_level >= DEBUG_LEVEL_INFO)
  2297. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2298. __FILE__,__LINE__, info->device_name, retval);
  2299. goto cleanup;
  2300. }
  2301. if (debug_level >= DEBUG_LEVEL_INFO)
  2302. printk("%s(%d):mgslpc_open(%s) success\n",
  2303. __FILE__,__LINE__, info->device_name);
  2304. retval = 0;
  2305. cleanup:
  2306. if (retval) {
  2307. if (tty->count == 1)
  2308. info->tty = NULL; /* tty layer will release tty struct */
  2309. if(info->count)
  2310. info->count--;
  2311. }
  2312. return retval;
  2313. }
  2314. /*
  2315. * /proc fs routines....
  2316. */
  2317. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2318. {
  2319. char stat_buf[30];
  2320. int ret;
  2321. unsigned long flags;
  2322. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2323. info->device_name, info->io_base, info->irq_level);
  2324. /* output current serial signal states */
  2325. spin_lock_irqsave(&info->lock,flags);
  2326. get_signals(info);
  2327. spin_unlock_irqrestore(&info->lock,flags);
  2328. stat_buf[0] = 0;
  2329. stat_buf[1] = 0;
  2330. if (info->serial_signals & SerialSignal_RTS)
  2331. strcat(stat_buf, "|RTS");
  2332. if (info->serial_signals & SerialSignal_CTS)
  2333. strcat(stat_buf, "|CTS");
  2334. if (info->serial_signals & SerialSignal_DTR)
  2335. strcat(stat_buf, "|DTR");
  2336. if (info->serial_signals & SerialSignal_DSR)
  2337. strcat(stat_buf, "|DSR");
  2338. if (info->serial_signals & SerialSignal_DCD)
  2339. strcat(stat_buf, "|CD");
  2340. if (info->serial_signals & SerialSignal_RI)
  2341. strcat(stat_buf, "|RI");
  2342. if (info->params.mode == MGSL_MODE_HDLC) {
  2343. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2344. info->icount.txok, info->icount.rxok);
  2345. if (info->icount.txunder)
  2346. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2347. if (info->icount.txabort)
  2348. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2349. if (info->icount.rxshort)
  2350. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2351. if (info->icount.rxlong)
  2352. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2353. if (info->icount.rxover)
  2354. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2355. if (info->icount.rxcrc)
  2356. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2357. } else {
  2358. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2359. info->icount.tx, info->icount.rx);
  2360. if (info->icount.frame)
  2361. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2362. if (info->icount.parity)
  2363. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2364. if (info->icount.brk)
  2365. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2366. if (info->icount.overrun)
  2367. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2368. }
  2369. /* Append serial signal status to end */
  2370. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2371. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2372. info->tx_active,info->bh_requested,info->bh_running,
  2373. info->pending_bh);
  2374. return ret;
  2375. }
  2376. /* Called to print information about devices
  2377. */
  2378. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2379. int *eof, void *data)
  2380. {
  2381. int len = 0, l;
  2382. off_t begin = 0;
  2383. MGSLPC_INFO *info;
  2384. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2385. info = mgslpc_device_list;
  2386. while( info ) {
  2387. l = line_info(page + len, info);
  2388. len += l;
  2389. if (len+begin > off+count)
  2390. goto done;
  2391. if (len+begin < off) {
  2392. begin += len;
  2393. len = 0;
  2394. }
  2395. info = info->next_device;
  2396. }
  2397. *eof = 1;
  2398. done:
  2399. if (off >= len+begin)
  2400. return 0;
  2401. *start = page + (off-begin);
  2402. return ((count < begin+len-off) ? count : begin+len-off);
  2403. }
  2404. int rx_alloc_buffers(MGSLPC_INFO *info)
  2405. {
  2406. /* each buffer has header and data */
  2407. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2408. /* calculate total allocation size for 8 buffers */
  2409. info->rx_buf_total_size = info->rx_buf_size * 8;
  2410. /* limit total allocated memory */
  2411. if (info->rx_buf_total_size > 0x10000)
  2412. info->rx_buf_total_size = 0x10000;
  2413. /* calculate number of buffers */
  2414. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2415. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2416. if (info->rx_buf == NULL)
  2417. return -ENOMEM;
  2418. rx_reset_buffers(info);
  2419. return 0;
  2420. }
  2421. void rx_free_buffers(MGSLPC_INFO *info)
  2422. {
  2423. kfree(info->rx_buf);
  2424. info->rx_buf = NULL;
  2425. }
  2426. int claim_resources(MGSLPC_INFO *info)
  2427. {
  2428. if (rx_alloc_buffers(info) < 0 ) {
  2429. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2430. release_resources(info);
  2431. return -ENODEV;
  2432. }
  2433. return 0;
  2434. }
  2435. void release_resources(MGSLPC_INFO *info)
  2436. {
  2437. if (debug_level >= DEBUG_LEVEL_INFO)
  2438. printk("release_resources(%s)\n", info->device_name);
  2439. rx_free_buffers(info);
  2440. }
  2441. /* Add the specified device instance data structure to the
  2442. * global linked list of devices and increment the device count.
  2443. *
  2444. * Arguments: info pointer to device instance data
  2445. */
  2446. void mgslpc_add_device(MGSLPC_INFO *info)
  2447. {
  2448. info->next_device = NULL;
  2449. info->line = mgslpc_device_count;
  2450. sprintf(info->device_name,"ttySLP%d",info->line);
  2451. if (info->line < MAX_DEVICE_COUNT) {
  2452. if (maxframe[info->line])
  2453. info->max_frame_size = maxframe[info->line];
  2454. info->dosyncppp = dosyncppp[info->line];
  2455. }
  2456. mgslpc_device_count++;
  2457. if (!mgslpc_device_list)
  2458. mgslpc_device_list = info;
  2459. else {
  2460. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2461. while( current_dev->next_device )
  2462. current_dev = current_dev->next_device;
  2463. current_dev->next_device = info;
  2464. }
  2465. if (info->max_frame_size < 4096)
  2466. info->max_frame_size = 4096;
  2467. else if (info->max_frame_size > 65535)
  2468. info->max_frame_size = 65535;
  2469. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2470. info->device_name, info->io_base, info->irq_level);
  2471. #ifdef CONFIG_HDLC
  2472. hdlcdev_init(info);
  2473. #endif
  2474. }
  2475. void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2476. {
  2477. MGSLPC_INFO *info = mgslpc_device_list;
  2478. MGSLPC_INFO *last = NULL;
  2479. while(info) {
  2480. if (info == remove_info) {
  2481. if (last)
  2482. last->next_device = info->next_device;
  2483. else
  2484. mgslpc_device_list = info->next_device;
  2485. #ifdef CONFIG_HDLC
  2486. hdlcdev_exit(info);
  2487. #endif
  2488. release_resources(info);
  2489. kfree(info);
  2490. mgslpc_device_count--;
  2491. return;
  2492. }
  2493. last = info;
  2494. info = info->next_device;
  2495. }
  2496. }
  2497. static struct pcmcia_device_id mgslpc_ids[] = {
  2498. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2499. PCMCIA_DEVICE_NULL
  2500. };
  2501. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2502. static struct pcmcia_driver mgslpc_driver = {
  2503. .owner = THIS_MODULE,
  2504. .drv = {
  2505. .name = "synclink_cs",
  2506. },
  2507. .probe = mgslpc_attach,
  2508. .remove = mgslpc_detach,
  2509. .id_table = mgslpc_ids,
  2510. .suspend = mgslpc_suspend,
  2511. .resume = mgslpc_resume,
  2512. };
  2513. static struct tty_operations mgslpc_ops = {
  2514. .open = mgslpc_open,
  2515. .close = mgslpc_close,
  2516. .write = mgslpc_write,
  2517. .put_char = mgslpc_put_char,
  2518. .flush_chars = mgslpc_flush_chars,
  2519. .write_room = mgslpc_write_room,
  2520. .chars_in_buffer = mgslpc_chars_in_buffer,
  2521. .flush_buffer = mgslpc_flush_buffer,
  2522. .ioctl = mgslpc_ioctl,
  2523. .throttle = mgslpc_throttle,
  2524. .unthrottle = mgslpc_unthrottle,
  2525. .send_xchar = mgslpc_send_xchar,
  2526. .break_ctl = mgslpc_break,
  2527. .wait_until_sent = mgslpc_wait_until_sent,
  2528. .read_proc = mgslpc_read_proc,
  2529. .set_termios = mgslpc_set_termios,
  2530. .stop = tx_pause,
  2531. .start = tx_release,
  2532. .hangup = mgslpc_hangup,
  2533. .tiocmget = tiocmget,
  2534. .tiocmset = tiocmset,
  2535. };
  2536. static void synclink_cs_cleanup(void)
  2537. {
  2538. int rc;
  2539. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2540. while(mgslpc_device_list)
  2541. mgslpc_remove_device(mgslpc_device_list);
  2542. if (serial_driver) {
  2543. if ((rc = tty_unregister_driver(serial_driver)))
  2544. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2545. __FILE__,__LINE__,rc);
  2546. put_tty_driver(serial_driver);
  2547. }
  2548. pcmcia_unregister_driver(&mgslpc_driver);
  2549. }
  2550. static int __init synclink_cs_init(void)
  2551. {
  2552. int rc;
  2553. if (break_on_load) {
  2554. mgslpc_get_text_ptr();
  2555. BREAKPOINT();
  2556. }
  2557. printk("%s %s\n", driver_name, driver_version);
  2558. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2559. return rc;
  2560. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2561. if (!serial_driver) {
  2562. rc = -ENOMEM;
  2563. goto error;
  2564. }
  2565. /* Initialize the tty_driver structure */
  2566. serial_driver->owner = THIS_MODULE;
  2567. serial_driver->driver_name = "synclink_cs";
  2568. serial_driver->name = "ttySLP";
  2569. serial_driver->major = ttymajor;
  2570. serial_driver->minor_start = 64;
  2571. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2572. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2573. serial_driver->init_termios = tty_std_termios;
  2574. serial_driver->init_termios.c_cflag =
  2575. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2576. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2577. tty_set_operations(serial_driver, &mgslpc_ops);
  2578. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2579. printk("%s(%d):Couldn't register serial driver\n",
  2580. __FILE__,__LINE__);
  2581. put_tty_driver(serial_driver);
  2582. serial_driver = NULL;
  2583. goto error;
  2584. }
  2585. printk("%s %s, tty major#%d\n",
  2586. driver_name, driver_version,
  2587. serial_driver->major);
  2588. return 0;
  2589. error:
  2590. synclink_cs_cleanup();
  2591. return rc;
  2592. }
  2593. static void __exit synclink_cs_exit(void)
  2594. {
  2595. synclink_cs_cleanup();
  2596. }
  2597. module_init(synclink_cs_init);
  2598. module_exit(synclink_cs_exit);
  2599. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2600. {
  2601. unsigned int M, N;
  2602. unsigned char val;
  2603. /* note:standard BRG mode is broken in V3.2 chip
  2604. * so enhanced mode is always used
  2605. */
  2606. if (rate) {
  2607. N = 3686400 / rate;
  2608. if (!N)
  2609. N = 1;
  2610. N >>= 1;
  2611. for (M = 1; N > 64 && M < 16; M++)
  2612. N >>= 1;
  2613. N--;
  2614. /* BGR[5..0] = N
  2615. * BGR[9..6] = M
  2616. * BGR[7..0] contained in BGR register
  2617. * BGR[9..8] contained in CCR2[7..6]
  2618. * divisor = (N+1)*2^M
  2619. *
  2620. * Note: M *must* not be zero (causes asymetric duty cycle)
  2621. */
  2622. write_reg(info, (unsigned char) (channel + BGR),
  2623. (unsigned char) ((M << 6) + N));
  2624. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2625. val |= ((M << 4) & 0xc0);
  2626. write_reg(info, (unsigned char) (channel + CCR2), val);
  2627. }
  2628. }
  2629. /* Enabled the AUX clock output at the specified frequency.
  2630. */
  2631. static void enable_auxclk(MGSLPC_INFO *info)
  2632. {
  2633. unsigned char val;
  2634. /* MODE
  2635. *
  2636. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2637. * 05 ADM Address Mode, 0 = no addr recognition
  2638. * 04 TMD Timer Mode, 0 = external
  2639. * 03 RAC Receiver Active, 0 = inactive
  2640. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2641. * 01 TRS Timer Resolution, 1=512
  2642. * 00 TLP Test Loop, 0 = no loop
  2643. *
  2644. * 1000 0010
  2645. */
  2646. val = 0x82;
  2647. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2648. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2649. val |= BIT2;
  2650. write_reg(info, CHB + MODE, val);
  2651. /* CCR0
  2652. *
  2653. * 07 PU Power Up, 1=active, 0=power down
  2654. * 06 MCE Master Clock Enable, 1=enabled
  2655. * 05 Reserved, 0
  2656. * 04..02 SC[2..0] Encoding
  2657. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2658. *
  2659. * 11000000
  2660. */
  2661. write_reg(info, CHB + CCR0, 0xc0);
  2662. /* CCR1
  2663. *
  2664. * 07 SFLG Shared Flag, 0 = disable shared flags
  2665. * 06 GALP Go Active On Loop, 0 = not used
  2666. * 05 GLP Go On Loop, 0 = not used
  2667. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2668. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2669. * 02..00 CM[2..0] Clock Mode
  2670. *
  2671. * 0001 0111
  2672. */
  2673. write_reg(info, CHB + CCR1, 0x17);
  2674. /* CCR2 (Channel B)
  2675. *
  2676. * 07..06 BGR[9..8] Baud rate bits 9..8
  2677. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2678. * 04 SSEL Clock source select, 1=submode b
  2679. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2680. * 02 RWX Read/Write Exchange 0=disabled
  2681. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2682. * 00 DIV, data inversion 0=disabled, 1=enabled
  2683. *
  2684. * 0011 1000
  2685. */
  2686. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2687. write_reg(info, CHB + CCR2, 0x38);
  2688. else
  2689. write_reg(info, CHB + CCR2, 0x30);
  2690. /* CCR4
  2691. *
  2692. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2693. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2694. * 05 TST1 Test Pin, 0=normal operation
  2695. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2696. * 03..02 Reserved, must be 0
  2697. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2698. *
  2699. * 0101 0000
  2700. */
  2701. write_reg(info, CHB + CCR4, 0x50);
  2702. /* if auxclk not enabled, set internal BRG so
  2703. * CTS transitions can be detected (requires TxC)
  2704. */
  2705. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2706. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2707. else
  2708. mgslpc_set_rate(info, CHB, 921600);
  2709. }
  2710. static void loopback_enable(MGSLPC_INFO *info)
  2711. {
  2712. unsigned char val;
  2713. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2714. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2715. write_reg(info, CHA + CCR1, val);
  2716. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2717. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2718. write_reg(info, CHA + CCR2, val);
  2719. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2720. if (info->params.clock_speed)
  2721. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2722. else
  2723. mgslpc_set_rate(info, CHA, 1843200);
  2724. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2725. val = read_reg(info, CHA + MODE) | BIT0;
  2726. write_reg(info, CHA + MODE, val);
  2727. }
  2728. void hdlc_mode(MGSLPC_INFO *info)
  2729. {
  2730. unsigned char val;
  2731. unsigned char clkmode, clksubmode;
  2732. /* disable all interrupts */
  2733. irq_disable(info, CHA, 0xffff);
  2734. irq_disable(info, CHB, 0xffff);
  2735. port_irq_disable(info, 0xff);
  2736. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2737. clkmode = clksubmode = 0;
  2738. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2739. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2740. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2741. clkmode = 7;
  2742. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2743. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2744. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2745. clkmode = 7;
  2746. clksubmode = 1;
  2747. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2748. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2749. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2750. clkmode = 6;
  2751. clksubmode = 1;
  2752. } else {
  2753. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2754. clkmode = 6;
  2755. }
  2756. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2757. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2758. clksubmode = 1;
  2759. }
  2760. /* MODE
  2761. *
  2762. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2763. * 05 ADM Address Mode, 0 = no addr recognition
  2764. * 04 TMD Timer Mode, 0 = external
  2765. * 03 RAC Receiver Active, 0 = inactive
  2766. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2767. * 01 TRS Timer Resolution, 1=512
  2768. * 00 TLP Test Loop, 0 = no loop
  2769. *
  2770. * 1000 0010
  2771. */
  2772. val = 0x82;
  2773. if (info->params.loopback)
  2774. val |= BIT0;
  2775. /* preserve RTS state */
  2776. if (info->serial_signals & SerialSignal_RTS)
  2777. val |= BIT2;
  2778. write_reg(info, CHA + MODE, val);
  2779. /* CCR0
  2780. *
  2781. * 07 PU Power Up, 1=active, 0=power down
  2782. * 06 MCE Master Clock Enable, 1=enabled
  2783. * 05 Reserved, 0
  2784. * 04..02 SC[2..0] Encoding
  2785. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2786. *
  2787. * 11000000
  2788. */
  2789. val = 0xc0;
  2790. switch (info->params.encoding)
  2791. {
  2792. case HDLC_ENCODING_NRZI:
  2793. val |= BIT3;
  2794. break;
  2795. case HDLC_ENCODING_BIPHASE_SPACE:
  2796. val |= BIT4;
  2797. break; // FM0
  2798. case HDLC_ENCODING_BIPHASE_MARK:
  2799. val |= BIT4 + BIT2;
  2800. break; // FM1
  2801. case HDLC_ENCODING_BIPHASE_LEVEL:
  2802. val |= BIT4 + BIT3;
  2803. break; // Manchester
  2804. }
  2805. write_reg(info, CHA + CCR0, val);
  2806. /* CCR1
  2807. *
  2808. * 07 SFLG Shared Flag, 0 = disable shared flags
  2809. * 06 GALP Go Active On Loop, 0 = not used
  2810. * 05 GLP Go On Loop, 0 = not used
  2811. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2812. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2813. * 02..00 CM[2..0] Clock Mode
  2814. *
  2815. * 0001 0000
  2816. */
  2817. val = 0x10 + clkmode;
  2818. write_reg(info, CHA + CCR1, val);
  2819. /* CCR2
  2820. *
  2821. * 07..06 BGR[9..8] Baud rate bits 9..8
  2822. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2823. * 04 SSEL Clock source select, 1=submode b
  2824. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2825. * 02 RWX Read/Write Exchange 0=disabled
  2826. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2827. * 00 DIV, data inversion 0=disabled, 1=enabled
  2828. *
  2829. * 0000 0000
  2830. */
  2831. val = 0x00;
  2832. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2833. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2834. val |= BIT5;
  2835. if (clksubmode)
  2836. val |= BIT4;
  2837. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2838. val |= BIT1;
  2839. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2840. val |= BIT0;
  2841. write_reg(info, CHA + CCR2, val);
  2842. /* CCR3
  2843. *
  2844. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2845. * 05 EPT Enable preamble transmission, 1=enabled
  2846. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2847. * 03 CRL CRC Reset Level, 0=FFFF
  2848. * 02 RCRC Rx CRC 0=On 1=Off
  2849. * 01 TCRC Tx CRC 0=On 1=Off
  2850. * 00 PSD DPLL Phase Shift Disable
  2851. *
  2852. * 0000 0000
  2853. */
  2854. val = 0x00;
  2855. if (info->params.crc_type == HDLC_CRC_NONE)
  2856. val |= BIT2 + BIT1;
  2857. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2858. val |= BIT5;
  2859. switch (info->params.preamble_length)
  2860. {
  2861. case HDLC_PREAMBLE_LENGTH_16BITS:
  2862. val |= BIT6;
  2863. break;
  2864. case HDLC_PREAMBLE_LENGTH_32BITS:
  2865. val |= BIT6;
  2866. break;
  2867. case HDLC_PREAMBLE_LENGTH_64BITS:
  2868. val |= BIT7 + BIT6;
  2869. break;
  2870. }
  2871. write_reg(info, CHA + CCR3, val);
  2872. /* PRE - Preamble pattern */
  2873. val = 0;
  2874. switch (info->params.preamble)
  2875. {
  2876. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2877. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2878. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2879. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2880. }
  2881. write_reg(info, CHA + PRE, val);
  2882. /* CCR4
  2883. *
  2884. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2885. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2886. * 05 TST1 Test Pin, 0=normal operation
  2887. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2888. * 03..02 Reserved, must be 0
  2889. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2890. *
  2891. * 0101 0000
  2892. */
  2893. val = 0x50;
  2894. write_reg(info, CHA + CCR4, val);
  2895. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2896. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2897. else
  2898. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2899. /* RLCR Receive length check register
  2900. *
  2901. * 7 1=enable receive length check
  2902. * 6..0 Max frame length = (RL + 1) * 32
  2903. */
  2904. write_reg(info, CHA + RLCR, 0);
  2905. /* XBCH Transmit Byte Count High
  2906. *
  2907. * 07 DMA mode, 0 = interrupt driven
  2908. * 06 NRM, 0=ABM (ignored)
  2909. * 05 CAS Carrier Auto Start
  2910. * 04 XC Transmit Continuously (ignored)
  2911. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2912. *
  2913. * 0000 0000
  2914. */
  2915. val = 0x00;
  2916. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2917. val |= BIT5;
  2918. write_reg(info, CHA + XBCH, val);
  2919. enable_auxclk(info);
  2920. if (info->params.loopback || info->testing_irq)
  2921. loopback_enable(info);
  2922. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2923. {
  2924. irq_enable(info, CHB, IRQ_CTS);
  2925. /* PVR[3] 1=AUTO CTS active */
  2926. set_reg_bits(info, CHA + PVR, BIT3);
  2927. } else
  2928. clear_reg_bits(info, CHA + PVR, BIT3);
  2929. irq_enable(info, CHA,
  2930. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2931. IRQ_UNDERRUN + IRQ_TXFIFO);
  2932. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2933. wait_command_complete(info, CHA);
  2934. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2935. /* Master clock mode enabled above to allow reset commands
  2936. * to complete even if no data clocks are present.
  2937. *
  2938. * Disable master clock mode for normal communications because
  2939. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2940. * IRQ when in master clock mode.
  2941. *
  2942. * Leave master clock mode enabled for IRQ test because the
  2943. * timer IRQ used by the test can only happen in master clock mode.
  2944. */
  2945. if (!info->testing_irq)
  2946. clear_reg_bits(info, CHA + CCR0, BIT6);
  2947. tx_set_idle(info);
  2948. tx_stop(info);
  2949. rx_stop(info);
  2950. }
  2951. void rx_stop(MGSLPC_INFO *info)
  2952. {
  2953. if (debug_level >= DEBUG_LEVEL_ISR)
  2954. printk("%s(%d):rx_stop(%s)\n",
  2955. __FILE__,__LINE__, info->device_name );
  2956. /* MODE:03 RAC Receiver Active, 0=inactive */
  2957. clear_reg_bits(info, CHA + MODE, BIT3);
  2958. info->rx_enabled = 0;
  2959. info->rx_overflow = 0;
  2960. }
  2961. void rx_start(MGSLPC_INFO *info)
  2962. {
  2963. if (debug_level >= DEBUG_LEVEL_ISR)
  2964. printk("%s(%d):rx_start(%s)\n",
  2965. __FILE__,__LINE__, info->device_name );
  2966. rx_reset_buffers(info);
  2967. info->rx_enabled = 0;
  2968. info->rx_overflow = 0;
  2969. /* MODE:03 RAC Receiver Active, 1=active */
  2970. set_reg_bits(info, CHA + MODE, BIT3);
  2971. info->rx_enabled = 1;
  2972. }
  2973. void tx_start(MGSLPC_INFO *info)
  2974. {
  2975. if (debug_level >= DEBUG_LEVEL_ISR)
  2976. printk("%s(%d):tx_start(%s)\n",
  2977. __FILE__,__LINE__, info->device_name );
  2978. if (info->tx_count) {
  2979. /* If auto RTS enabled and RTS is inactive, then assert */
  2980. /* RTS and set a flag indicating that the driver should */
  2981. /* negate RTS when the transmission completes. */
  2982. info->drop_rts_on_tx_done = 0;
  2983. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2984. get_signals(info);
  2985. if (!(info->serial_signals & SerialSignal_RTS)) {
  2986. info->serial_signals |= SerialSignal_RTS;
  2987. set_signals(info);
  2988. info->drop_rts_on_tx_done = 1;
  2989. }
  2990. }
  2991. if (info->params.mode == MGSL_MODE_ASYNC) {
  2992. if (!info->tx_active) {
  2993. info->tx_active = 1;
  2994. tx_ready(info);
  2995. }
  2996. } else {
  2997. info->tx_active = 1;
  2998. tx_ready(info);
  2999. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  3000. add_timer(&info->tx_timer);
  3001. }
  3002. }
  3003. if (!info->tx_enabled)
  3004. info->tx_enabled = 1;
  3005. }
  3006. void tx_stop(MGSLPC_INFO *info)
  3007. {
  3008. if (debug_level >= DEBUG_LEVEL_ISR)
  3009. printk("%s(%d):tx_stop(%s)\n",
  3010. __FILE__,__LINE__, info->device_name );
  3011. del_timer(&info->tx_timer);
  3012. info->tx_enabled = 0;
  3013. info->tx_active = 0;
  3014. }
  3015. /* Reset the adapter to a known state and prepare it for further use.
  3016. */
  3017. void reset_device(MGSLPC_INFO *info)
  3018. {
  3019. /* power up both channels (set BIT7) */
  3020. write_reg(info, CHA + CCR0, 0x80);
  3021. write_reg(info, CHB + CCR0, 0x80);
  3022. write_reg(info, CHA + MODE, 0);
  3023. write_reg(info, CHB + MODE, 0);
  3024. /* disable all interrupts */
  3025. irq_disable(info, CHA, 0xffff);
  3026. irq_disable(info, CHB, 0xffff);
  3027. port_irq_disable(info, 0xff);
  3028. /* PCR Port Configuration Register
  3029. *
  3030. * 07..04 DEC[3..0] Serial I/F select outputs
  3031. * 03 output, 1=AUTO CTS control enabled
  3032. * 02 RI Ring Indicator input 0=active
  3033. * 01 DSR input 0=active
  3034. * 00 DTR output 0=active
  3035. *
  3036. * 0000 0110
  3037. */
  3038. write_reg(info, PCR, 0x06);
  3039. /* PVR Port Value Register
  3040. *
  3041. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3042. * 03 AUTO CTS output 1=enabled
  3043. * 02 RI Ring Indicator input
  3044. * 01 DSR input
  3045. * 00 DTR output (1=inactive)
  3046. *
  3047. * 0000 0001
  3048. */
  3049. // write_reg(info, PVR, PVR_DTR);
  3050. /* IPC Interrupt Port Configuration
  3051. *
  3052. * 07 VIS 1=Masked interrupts visible
  3053. * 06..05 Reserved, 0
  3054. * 04..03 SLA Slave address, 00 ignored
  3055. * 02 CASM Cascading Mode, 1=daisy chain
  3056. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3057. *
  3058. * 0000 0101
  3059. */
  3060. write_reg(info, IPC, 0x05);
  3061. }
  3062. void async_mode(MGSLPC_INFO *info)
  3063. {
  3064. unsigned char val;
  3065. /* disable all interrupts */
  3066. irq_disable(info, CHA, 0xffff);
  3067. irq_disable(info, CHB, 0xffff);
  3068. port_irq_disable(info, 0xff);
  3069. /* MODE
  3070. *
  3071. * 07 Reserved, 0
  3072. * 06 FRTS RTS State, 0=active
  3073. * 05 FCTS Flow Control on CTS
  3074. * 04 FLON Flow Control Enable
  3075. * 03 RAC Receiver Active, 0 = inactive
  3076. * 02 RTS 0=Auto RTS, 1=manual RTS
  3077. * 01 TRS Timer Resolution, 1=512
  3078. * 00 TLP Test Loop, 0 = no loop
  3079. *
  3080. * 0000 0110
  3081. */
  3082. val = 0x06;
  3083. if (info->params.loopback)
  3084. val |= BIT0;
  3085. /* preserve RTS state */
  3086. if (!(info->serial_signals & SerialSignal_RTS))
  3087. val |= BIT6;
  3088. write_reg(info, CHA + MODE, val);
  3089. /* CCR0
  3090. *
  3091. * 07 PU Power Up, 1=active, 0=power down
  3092. * 06 MCE Master Clock Enable, 1=enabled
  3093. * 05 Reserved, 0
  3094. * 04..02 SC[2..0] Encoding, 000=NRZ
  3095. * 01..00 SM[1..0] Serial Mode, 11=Async
  3096. *
  3097. * 1000 0011
  3098. */
  3099. write_reg(info, CHA + CCR0, 0x83);
  3100. /* CCR1
  3101. *
  3102. * 07..05 Reserved, 0
  3103. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3104. * 03 BCR Bit Clock Rate, 1=16x
  3105. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3106. *
  3107. * 0001 1111
  3108. */
  3109. write_reg(info, CHA + CCR1, 0x1f);
  3110. /* CCR2 (channel A)
  3111. *
  3112. * 07..06 BGR[9..8] Baud rate bits 9..8
  3113. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3114. * 04 SSEL Clock source select, 1=submode b
  3115. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3116. * 02 RWX Read/Write Exchange 0=disabled
  3117. * 01 Reserved, 0
  3118. * 00 DIV, data inversion 0=disabled, 1=enabled
  3119. *
  3120. * 0001 0000
  3121. */
  3122. write_reg(info, CHA + CCR2, 0x10);
  3123. /* CCR3
  3124. *
  3125. * 07..01 Reserved, 0
  3126. * 00 PSD DPLL Phase Shift Disable
  3127. *
  3128. * 0000 0000
  3129. */
  3130. write_reg(info, CHA + CCR3, 0);
  3131. /* CCR4
  3132. *
  3133. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3134. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3135. * 05 TST1 Test Pin, 0=normal operation
  3136. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3137. * 03..00 Reserved, must be 0
  3138. *
  3139. * 0101 0000
  3140. */
  3141. write_reg(info, CHA + CCR4, 0x50);
  3142. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3143. /* DAFO Data Format
  3144. *
  3145. * 07 Reserved, 0
  3146. * 06 XBRK transmit break, 0=normal operation
  3147. * 05 Stop bits (0=1, 1=2)
  3148. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3149. * 02 PAREN Parity Enable
  3150. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3151. *
  3152. */
  3153. val = 0x00;
  3154. if (info->params.data_bits != 8)
  3155. val |= BIT0; /* 7 bits */
  3156. if (info->params.stop_bits != 1)
  3157. val |= BIT5;
  3158. if (info->params.parity != ASYNC_PARITY_NONE)
  3159. {
  3160. val |= BIT2; /* Parity enable */
  3161. if (info->params.parity == ASYNC_PARITY_ODD)
  3162. val |= BIT3;
  3163. else
  3164. val |= BIT4;
  3165. }
  3166. write_reg(info, CHA + DAFO, val);
  3167. /* RFC Rx FIFO Control
  3168. *
  3169. * 07 Reserved, 0
  3170. * 06 DPS, 1=parity bit not stored in data byte
  3171. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3172. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3173. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3174. * 01 Reserved, 0
  3175. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3176. *
  3177. * 0101 1100
  3178. */
  3179. write_reg(info, CHA + RFC, 0x5c);
  3180. /* RLCR Receive length check register
  3181. *
  3182. * Max frame length = (RL + 1) * 32
  3183. */
  3184. write_reg(info, CHA + RLCR, 0);
  3185. /* XBCH Transmit Byte Count High
  3186. *
  3187. * 07 DMA mode, 0 = interrupt driven
  3188. * 06 NRM, 0=ABM (ignored)
  3189. * 05 CAS Carrier Auto Start
  3190. * 04 XC Transmit Continuously (ignored)
  3191. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3192. *
  3193. * 0000 0000
  3194. */
  3195. val = 0x00;
  3196. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3197. val |= BIT5;
  3198. write_reg(info, CHA + XBCH, val);
  3199. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3200. irq_enable(info, CHA, IRQ_CTS);
  3201. /* MODE:03 RAC Receiver Active, 1=active */
  3202. set_reg_bits(info, CHA + MODE, BIT3);
  3203. enable_auxclk(info);
  3204. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3205. irq_enable(info, CHB, IRQ_CTS);
  3206. /* PVR[3] 1=AUTO CTS active */
  3207. set_reg_bits(info, CHA + PVR, BIT3);
  3208. } else
  3209. clear_reg_bits(info, CHA + PVR, BIT3);
  3210. irq_enable(info, CHA,
  3211. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3212. IRQ_ALLSENT + IRQ_TXFIFO);
  3213. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3214. wait_command_complete(info, CHA);
  3215. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3216. }
  3217. /* Set the HDLC idle mode for the transmitter.
  3218. */
  3219. void tx_set_idle(MGSLPC_INFO *info)
  3220. {
  3221. /* Note: ESCC2 only supports flags and one idle modes */
  3222. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3223. set_reg_bits(info, CHA + CCR1, BIT3);
  3224. else
  3225. clear_reg_bits(info, CHA + CCR1, BIT3);
  3226. }
  3227. /* get state of the V24 status (input) signals.
  3228. */
  3229. void get_signals(MGSLPC_INFO *info)
  3230. {
  3231. unsigned char status = 0;
  3232. /* preserve DTR and RTS */
  3233. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3234. if (read_reg(info, CHB + VSTR) & BIT7)
  3235. info->serial_signals |= SerialSignal_DCD;
  3236. if (read_reg(info, CHB + STAR) & BIT1)
  3237. info->serial_signals |= SerialSignal_CTS;
  3238. status = read_reg(info, CHA + PVR);
  3239. if (!(status & PVR_RI))
  3240. info->serial_signals |= SerialSignal_RI;
  3241. if (!(status & PVR_DSR))
  3242. info->serial_signals |= SerialSignal_DSR;
  3243. }
  3244. /* Set the state of DTR and RTS based on contents of
  3245. * serial_signals member of device extension.
  3246. */
  3247. void set_signals(MGSLPC_INFO *info)
  3248. {
  3249. unsigned char val;
  3250. val = read_reg(info, CHA + MODE);
  3251. if (info->params.mode == MGSL_MODE_ASYNC) {
  3252. if (info->serial_signals & SerialSignal_RTS)
  3253. val &= ~BIT6;
  3254. else
  3255. val |= BIT6;
  3256. } else {
  3257. if (info->serial_signals & SerialSignal_RTS)
  3258. val |= BIT2;
  3259. else
  3260. val &= ~BIT2;
  3261. }
  3262. write_reg(info, CHA + MODE, val);
  3263. if (info->serial_signals & SerialSignal_DTR)
  3264. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3265. else
  3266. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3267. }
  3268. void rx_reset_buffers(MGSLPC_INFO *info)
  3269. {
  3270. RXBUF *buf;
  3271. int i;
  3272. info->rx_put = 0;
  3273. info->rx_get = 0;
  3274. info->rx_frame_count = 0;
  3275. for (i=0 ; i < info->rx_buf_count ; i++) {
  3276. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3277. buf->status = buf->count = 0;
  3278. }
  3279. }
  3280. /* Attempt to return a received HDLC frame
  3281. * Only frames received without errors are returned.
  3282. *
  3283. * Returns 1 if frame returned, otherwise 0
  3284. */
  3285. int rx_get_frame(MGSLPC_INFO *info)
  3286. {
  3287. unsigned short status;
  3288. RXBUF *buf;
  3289. unsigned int framesize = 0;
  3290. unsigned long flags;
  3291. struct tty_struct *tty = info->tty;
  3292. int return_frame = 0;
  3293. if (info->rx_frame_count == 0)
  3294. return 0;
  3295. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3296. status = buf->status;
  3297. /* 07 VFR 1=valid frame
  3298. * 06 RDO 1=data overrun
  3299. * 05 CRC 1=OK, 0=error
  3300. * 04 RAB 1=frame aborted
  3301. */
  3302. if ((status & 0xf0) != 0xA0) {
  3303. if (!(status & BIT7) || (status & BIT4))
  3304. info->icount.rxabort++;
  3305. else if (status & BIT6)
  3306. info->icount.rxover++;
  3307. else if (!(status & BIT5)) {
  3308. info->icount.rxcrc++;
  3309. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3310. return_frame = 1;
  3311. }
  3312. framesize = 0;
  3313. #ifdef CONFIG_HDLC
  3314. {
  3315. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3316. stats->rx_errors++;
  3317. stats->rx_frame_errors++;
  3318. }
  3319. #endif
  3320. } else
  3321. return_frame = 1;
  3322. if (return_frame)
  3323. framesize = buf->count;
  3324. if (debug_level >= DEBUG_LEVEL_BH)
  3325. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3326. __FILE__,__LINE__,info->device_name,status,framesize);
  3327. if (debug_level >= DEBUG_LEVEL_DATA)
  3328. trace_block(info, buf->data, framesize, 0);
  3329. if (framesize) {
  3330. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3331. framesize+1 > info->max_frame_size) ||
  3332. framesize > info->max_frame_size)
  3333. info->icount.rxlong++;
  3334. else {
  3335. if (status & BIT5)
  3336. info->icount.rxok++;
  3337. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3338. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3339. ++framesize;
  3340. }
  3341. #ifdef CONFIG_HDLC
  3342. if (info->netcount)
  3343. hdlcdev_rx(info, buf->data, framesize);
  3344. else
  3345. #endif
  3346. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3347. }
  3348. }
  3349. spin_lock_irqsave(&info->lock,flags);
  3350. buf->status = buf->count = 0;
  3351. info->rx_frame_count--;
  3352. info->rx_get++;
  3353. if (info->rx_get >= info->rx_buf_count)
  3354. info->rx_get = 0;
  3355. spin_unlock_irqrestore(&info->lock,flags);
  3356. return 1;
  3357. }
  3358. BOOLEAN register_test(MGSLPC_INFO *info)
  3359. {
  3360. static unsigned char patterns[] =
  3361. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3362. static unsigned int count = ARRAY_SIZE(patterns);
  3363. unsigned int i;
  3364. BOOLEAN rc = TRUE;
  3365. unsigned long flags;
  3366. spin_lock_irqsave(&info->lock,flags);
  3367. reset_device(info);
  3368. for (i = 0; i < count; i++) {
  3369. write_reg(info, XAD1, patterns[i]);
  3370. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3371. if ((read_reg(info, XAD1) != patterns[i]) ||
  3372. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3373. rc = FALSE;
  3374. break;
  3375. }
  3376. }
  3377. spin_unlock_irqrestore(&info->lock,flags);
  3378. return rc;
  3379. }
  3380. BOOLEAN irq_test(MGSLPC_INFO *info)
  3381. {
  3382. unsigned long end_time;
  3383. unsigned long flags;
  3384. spin_lock_irqsave(&info->lock,flags);
  3385. reset_device(info);
  3386. info->testing_irq = TRUE;
  3387. hdlc_mode(info);
  3388. info->irq_occurred = FALSE;
  3389. /* init hdlc mode */
  3390. irq_enable(info, CHA, IRQ_TIMER);
  3391. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3392. issue_command(info, CHA, CMD_START_TIMER);
  3393. spin_unlock_irqrestore(&info->lock,flags);
  3394. end_time=100;
  3395. while(end_time-- && !info->irq_occurred) {
  3396. msleep_interruptible(10);
  3397. }
  3398. info->testing_irq = FALSE;
  3399. spin_lock_irqsave(&info->lock,flags);
  3400. reset_device(info);
  3401. spin_unlock_irqrestore(&info->lock,flags);
  3402. return info->irq_occurred ? TRUE : FALSE;
  3403. }
  3404. int adapter_test(MGSLPC_INFO *info)
  3405. {
  3406. if (!register_test(info)) {
  3407. info->init_error = DiagStatus_AddressFailure;
  3408. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3409. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3410. return -ENODEV;
  3411. }
  3412. if (!irq_test(info)) {
  3413. info->init_error = DiagStatus_IrqFailure;
  3414. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3415. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3416. return -ENODEV;
  3417. }
  3418. if (debug_level >= DEBUG_LEVEL_INFO)
  3419. printk("%s(%d):device %s passed diagnostics\n",
  3420. __FILE__,__LINE__,info->device_name);
  3421. return 0;
  3422. }
  3423. void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3424. {
  3425. int i;
  3426. int linecount;
  3427. if (xmit)
  3428. printk("%s tx data:\n",info->device_name);
  3429. else
  3430. printk("%s rx data:\n",info->device_name);
  3431. while(count) {
  3432. if (count > 16)
  3433. linecount = 16;
  3434. else
  3435. linecount = count;
  3436. for(i=0;i<linecount;i++)
  3437. printk("%02X ",(unsigned char)data[i]);
  3438. for(;i<17;i++)
  3439. printk(" ");
  3440. for(i=0;i<linecount;i++) {
  3441. if (data[i]>=040 && data[i]<=0176)
  3442. printk("%c",data[i]);
  3443. else
  3444. printk(".");
  3445. }
  3446. printk("\n");
  3447. data += linecount;
  3448. count -= linecount;
  3449. }
  3450. }
  3451. /* HDLC frame time out
  3452. * update stats and do tx completion processing
  3453. */
  3454. void tx_timeout(unsigned long context)
  3455. {
  3456. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3457. unsigned long flags;
  3458. if ( debug_level >= DEBUG_LEVEL_INFO )
  3459. printk( "%s(%d):tx_timeout(%s)\n",
  3460. __FILE__,__LINE__,info->device_name);
  3461. if(info->tx_active &&
  3462. info->params.mode == MGSL_MODE_HDLC) {
  3463. info->icount.txtimeout++;
  3464. }
  3465. spin_lock_irqsave(&info->lock,flags);
  3466. info->tx_active = 0;
  3467. info->tx_count = info->tx_put = info->tx_get = 0;
  3468. spin_unlock_irqrestore(&info->lock,flags);
  3469. #ifdef CONFIG_HDLC
  3470. if (info->netcount)
  3471. hdlcdev_tx_done(info);
  3472. else
  3473. #endif
  3474. bh_transmit(info);
  3475. }
  3476. #ifdef CONFIG_HDLC
  3477. /**
  3478. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3479. * set encoding and frame check sequence (FCS) options
  3480. *
  3481. * dev pointer to network device structure
  3482. * encoding serial encoding setting
  3483. * parity FCS setting
  3484. *
  3485. * returns 0 if success, otherwise error code
  3486. */
  3487. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3488. unsigned short parity)
  3489. {
  3490. MGSLPC_INFO *info = dev_to_port(dev);
  3491. unsigned char new_encoding;
  3492. unsigned short new_crctype;
  3493. /* return error if TTY interface open */
  3494. if (info->count)
  3495. return -EBUSY;
  3496. switch (encoding)
  3497. {
  3498. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3499. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3500. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3501. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3502. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3503. default: return -EINVAL;
  3504. }
  3505. switch (parity)
  3506. {
  3507. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3508. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3509. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3510. default: return -EINVAL;
  3511. }
  3512. info->params.encoding = new_encoding;
  3513. info->params.crc_type = new_crctype;
  3514. /* if network interface up, reprogram hardware */
  3515. if (info->netcount)
  3516. mgslpc_program_hw(info);
  3517. return 0;
  3518. }
  3519. /**
  3520. * called by generic HDLC layer to send frame
  3521. *
  3522. * skb socket buffer containing HDLC frame
  3523. * dev pointer to network device structure
  3524. *
  3525. * returns 0 if success, otherwise error code
  3526. */
  3527. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3528. {
  3529. MGSLPC_INFO *info = dev_to_port(dev);
  3530. struct net_device_stats *stats = hdlc_stats(dev);
  3531. unsigned long flags;
  3532. if (debug_level >= DEBUG_LEVEL_INFO)
  3533. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3534. /* stop sending until this frame completes */
  3535. netif_stop_queue(dev);
  3536. /* copy data to device buffers */
  3537. memcpy(info->tx_buf, skb->data, skb->len);
  3538. info->tx_get = 0;
  3539. info->tx_put = info->tx_count = skb->len;
  3540. /* update network statistics */
  3541. stats->tx_packets++;
  3542. stats->tx_bytes += skb->len;
  3543. /* done with socket buffer, so free it */
  3544. dev_kfree_skb(skb);
  3545. /* save start time for transmit timeout detection */
  3546. dev->trans_start = jiffies;
  3547. /* start hardware transmitter if necessary */
  3548. spin_lock_irqsave(&info->lock,flags);
  3549. if (!info->tx_active)
  3550. tx_start(info);
  3551. spin_unlock_irqrestore(&info->lock,flags);
  3552. return 0;
  3553. }
  3554. /**
  3555. * called by network layer when interface enabled
  3556. * claim resources and initialize hardware
  3557. *
  3558. * dev pointer to network device structure
  3559. *
  3560. * returns 0 if success, otherwise error code
  3561. */
  3562. static int hdlcdev_open(struct net_device *dev)
  3563. {
  3564. MGSLPC_INFO *info = dev_to_port(dev);
  3565. int rc;
  3566. unsigned long flags;
  3567. if (debug_level >= DEBUG_LEVEL_INFO)
  3568. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3569. /* generic HDLC layer open processing */
  3570. if ((rc = hdlc_open(dev)))
  3571. return rc;
  3572. /* arbitrate between network and tty opens */
  3573. spin_lock_irqsave(&info->netlock, flags);
  3574. if (info->count != 0 || info->netcount != 0) {
  3575. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3576. spin_unlock_irqrestore(&info->netlock, flags);
  3577. return -EBUSY;
  3578. }
  3579. info->netcount=1;
  3580. spin_unlock_irqrestore(&info->netlock, flags);
  3581. /* claim resources and init adapter */
  3582. if ((rc = startup(info)) != 0) {
  3583. spin_lock_irqsave(&info->netlock, flags);
  3584. info->netcount=0;
  3585. spin_unlock_irqrestore(&info->netlock, flags);
  3586. return rc;
  3587. }
  3588. /* assert DTR and RTS, apply hardware settings */
  3589. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3590. mgslpc_program_hw(info);
  3591. /* enable network layer transmit */
  3592. dev->trans_start = jiffies;
  3593. netif_start_queue(dev);
  3594. /* inform generic HDLC layer of current DCD status */
  3595. spin_lock_irqsave(&info->lock, flags);
  3596. get_signals(info);
  3597. spin_unlock_irqrestore(&info->lock, flags);
  3598. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
  3599. return 0;
  3600. }
  3601. /**
  3602. * called by network layer when interface is disabled
  3603. * shutdown hardware and release resources
  3604. *
  3605. * dev pointer to network device structure
  3606. *
  3607. * returns 0 if success, otherwise error code
  3608. */
  3609. static int hdlcdev_close(struct net_device *dev)
  3610. {
  3611. MGSLPC_INFO *info = dev_to_port(dev);
  3612. unsigned long flags;
  3613. if (debug_level >= DEBUG_LEVEL_INFO)
  3614. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3615. netif_stop_queue(dev);
  3616. /* shutdown adapter and release resources */
  3617. shutdown(info);
  3618. hdlc_close(dev);
  3619. spin_lock_irqsave(&info->netlock, flags);
  3620. info->netcount=0;
  3621. spin_unlock_irqrestore(&info->netlock, flags);
  3622. return 0;
  3623. }
  3624. /**
  3625. * called by network layer to process IOCTL call to network device
  3626. *
  3627. * dev pointer to network device structure
  3628. * ifr pointer to network interface request structure
  3629. * cmd IOCTL command code
  3630. *
  3631. * returns 0 if success, otherwise error code
  3632. */
  3633. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3634. {
  3635. const size_t size = sizeof(sync_serial_settings);
  3636. sync_serial_settings new_line;
  3637. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3638. MGSLPC_INFO *info = dev_to_port(dev);
  3639. unsigned int flags;
  3640. if (debug_level >= DEBUG_LEVEL_INFO)
  3641. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3642. /* return error if TTY interface open */
  3643. if (info->count)
  3644. return -EBUSY;
  3645. if (cmd != SIOCWANDEV)
  3646. return hdlc_ioctl(dev, ifr, cmd);
  3647. switch(ifr->ifr_settings.type) {
  3648. case IF_GET_IFACE: /* return current sync_serial_settings */
  3649. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3650. if (ifr->ifr_settings.size < size) {
  3651. ifr->ifr_settings.size = size; /* data size wanted */
  3652. return -ENOBUFS;
  3653. }
  3654. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3655. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3656. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3657. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3658. switch (flags){
  3659. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3660. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3661. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3662. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3663. default: new_line.clock_type = CLOCK_DEFAULT;
  3664. }
  3665. new_line.clock_rate = info->params.clock_speed;
  3666. new_line.loopback = info->params.loopback ? 1:0;
  3667. if (copy_to_user(line, &new_line, size))
  3668. return -EFAULT;
  3669. return 0;
  3670. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3671. if(!capable(CAP_NET_ADMIN))
  3672. return -EPERM;
  3673. if (copy_from_user(&new_line, line, size))
  3674. return -EFAULT;
  3675. switch (new_line.clock_type)
  3676. {
  3677. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3678. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3679. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3680. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3681. case CLOCK_DEFAULT: flags = info->params.flags &
  3682. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3683. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3684. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3685. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3686. default: return -EINVAL;
  3687. }
  3688. if (new_line.loopback != 0 && new_line.loopback != 1)
  3689. return -EINVAL;
  3690. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3691. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3692. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3693. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3694. info->params.flags |= flags;
  3695. info->params.loopback = new_line.loopback;
  3696. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3697. info->params.clock_speed = new_line.clock_rate;
  3698. else
  3699. info->params.clock_speed = 0;
  3700. /* if network interface up, reprogram hardware */
  3701. if (info->netcount)
  3702. mgslpc_program_hw(info);
  3703. return 0;
  3704. default:
  3705. return hdlc_ioctl(dev, ifr, cmd);
  3706. }
  3707. }
  3708. /**
  3709. * called by network layer when transmit timeout is detected
  3710. *
  3711. * dev pointer to network device structure
  3712. */
  3713. static void hdlcdev_tx_timeout(struct net_device *dev)
  3714. {
  3715. MGSLPC_INFO *info = dev_to_port(dev);
  3716. struct net_device_stats *stats = hdlc_stats(dev);
  3717. unsigned long flags;
  3718. if (debug_level >= DEBUG_LEVEL_INFO)
  3719. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3720. stats->tx_errors++;
  3721. stats->tx_aborted_errors++;
  3722. spin_lock_irqsave(&info->lock,flags);
  3723. tx_stop(info);
  3724. spin_unlock_irqrestore(&info->lock,flags);
  3725. netif_wake_queue(dev);
  3726. }
  3727. /**
  3728. * called by device driver when transmit completes
  3729. * reenable network layer transmit if stopped
  3730. *
  3731. * info pointer to device instance information
  3732. */
  3733. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3734. {
  3735. if (netif_queue_stopped(info->netdev))
  3736. netif_wake_queue(info->netdev);
  3737. }
  3738. /**
  3739. * called by device driver when frame received
  3740. * pass frame to network layer
  3741. *
  3742. * info pointer to device instance information
  3743. * buf pointer to buffer contianing frame data
  3744. * size count of data bytes in buf
  3745. */
  3746. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3747. {
  3748. struct sk_buff *skb = dev_alloc_skb(size);
  3749. struct net_device *dev = info->netdev;
  3750. struct net_device_stats *stats = hdlc_stats(dev);
  3751. if (debug_level >= DEBUG_LEVEL_INFO)
  3752. printk("hdlcdev_rx(%s)\n",dev->name);
  3753. if (skb == NULL) {
  3754. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3755. stats->rx_dropped++;
  3756. return;
  3757. }
  3758. memcpy(skb_put(skb, size),buf,size);
  3759. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3760. stats->rx_packets++;
  3761. stats->rx_bytes += size;
  3762. netif_rx(skb);
  3763. info->netdev->last_rx = jiffies;
  3764. }
  3765. /**
  3766. * called by device driver when adding device instance
  3767. * do generic HDLC initialization
  3768. *
  3769. * info pointer to device instance information
  3770. *
  3771. * returns 0 if success, otherwise error code
  3772. */
  3773. static int hdlcdev_init(MGSLPC_INFO *info)
  3774. {
  3775. int rc;
  3776. struct net_device *dev;
  3777. hdlc_device *hdlc;
  3778. /* allocate and initialize network and HDLC layer objects */
  3779. if (!(dev = alloc_hdlcdev(info))) {
  3780. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3781. return -ENOMEM;
  3782. }
  3783. /* for network layer reporting purposes only */
  3784. dev->base_addr = info->io_base;
  3785. dev->irq = info->irq_level;
  3786. /* network layer callbacks and settings */
  3787. dev->do_ioctl = hdlcdev_ioctl;
  3788. dev->open = hdlcdev_open;
  3789. dev->stop = hdlcdev_close;
  3790. dev->tx_timeout = hdlcdev_tx_timeout;
  3791. dev->watchdog_timeo = 10*HZ;
  3792. dev->tx_queue_len = 50;
  3793. /* generic HDLC layer callbacks and settings */
  3794. hdlc = dev_to_hdlc(dev);
  3795. hdlc->attach = hdlcdev_attach;
  3796. hdlc->xmit = hdlcdev_xmit;
  3797. /* register objects with HDLC layer */
  3798. if ((rc = register_hdlc_device(dev))) {
  3799. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3800. free_netdev(dev);
  3801. return rc;
  3802. }
  3803. info->netdev = dev;
  3804. return 0;
  3805. }
  3806. /**
  3807. * called by device driver when removing device instance
  3808. * do generic HDLC cleanup
  3809. *
  3810. * info pointer to device instance information
  3811. */
  3812. static void hdlcdev_exit(MGSLPC_INFO *info)
  3813. {
  3814. unregister_hdlc_device(info->netdev);
  3815. free_netdev(info->netdev);
  3816. info->netdev = NULL;
  3817. }
  3818. #endif /* CONFIG_HDLC */