soc-cache.c 32 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. #ifdef CONFIG_SPI_MASTER
  21. static int do_spi_write(void *control, const char *data, int len)
  22. {
  23. struct spi_device *spi = control;
  24. int ret;
  25. ret = spi_write(spi, data, len);
  26. if (ret < 0)
  27. return ret;
  28. return len;
  29. }
  30. #endif
  31. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  32. unsigned int value, const void *data, int len)
  33. {
  34. int ret;
  35. if (!snd_soc_codec_volatile_register(codec, reg) &&
  36. reg < codec->driver->reg_cache_size &&
  37. !codec->cache_bypass) {
  38. ret = snd_soc_cache_write(codec, reg, value);
  39. if (ret < 0)
  40. return -1;
  41. }
  42. if (codec->cache_only) {
  43. codec->cache_sync = 1;
  44. return 0;
  45. }
  46. ret = codec->hw_write(codec->control_data, data, len);
  47. if (ret == len)
  48. return 0;
  49. if (ret < 0)
  50. return ret;
  51. else
  52. return -EIO;
  53. }
  54. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  55. {
  56. int ret;
  57. unsigned int val;
  58. if (reg >= codec->driver->reg_cache_size ||
  59. snd_soc_codec_volatile_register(codec, reg) ||
  60. codec->cache_bypass) {
  61. if (codec->cache_only)
  62. return -1;
  63. BUG_ON(!codec->hw_read);
  64. return codec->hw_read(codec, reg);
  65. }
  66. ret = snd_soc_cache_read(codec, reg, &val);
  67. if (ret < 0)
  68. return -1;
  69. return val;
  70. }
  71. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  72. unsigned int reg)
  73. {
  74. return do_hw_read(codec, reg);
  75. }
  76. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  77. unsigned int value)
  78. {
  79. u16 data;
  80. data = cpu_to_be16((reg << 12) | (value & 0xffffff));
  81. return do_hw_write(codec, reg, value, &data, 2);
  82. }
  83. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  84. unsigned int reg)
  85. {
  86. return do_hw_read(codec, reg);
  87. }
  88. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  89. unsigned int value)
  90. {
  91. u8 data[2];
  92. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  93. data[1] = value & 0x00ff;
  94. return do_hw_write(codec, reg, value, data, 2);
  95. }
  96. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  97. unsigned int value)
  98. {
  99. u8 data[2];
  100. reg &= 0xff;
  101. data[0] = reg;
  102. data[1] = value & 0xff;
  103. return do_hw_write(codec, reg, value, data, 2);
  104. }
  105. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  106. unsigned int reg)
  107. {
  108. return do_hw_read(codec, reg);
  109. }
  110. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  111. unsigned int value)
  112. {
  113. u8 data[3];
  114. data[0] = reg;
  115. data[1] = (value >> 8) & 0xff;
  116. data[2] = value & 0xff;
  117. return do_hw_write(codec, reg, value, data, 3);
  118. }
  119. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  120. unsigned int reg)
  121. {
  122. return do_hw_read(codec, reg);
  123. }
  124. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  125. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  126. void *reg, int reglen,
  127. void *data, int datalen)
  128. {
  129. struct i2c_msg xfer[2];
  130. int ret;
  131. struct i2c_client *client = codec->control_data;
  132. /* Write register */
  133. xfer[0].addr = client->addr;
  134. xfer[0].flags = 0;
  135. xfer[0].len = reglen;
  136. xfer[0].buf = reg;
  137. /* Read data */
  138. xfer[1].addr = client->addr;
  139. xfer[1].flags = I2C_M_RD;
  140. xfer[1].len = datalen;
  141. xfer[1].buf = data;
  142. ret = i2c_transfer(client->adapter, xfer, 2);
  143. if (ret == 2)
  144. return 0;
  145. else if (ret < 0)
  146. return ret;
  147. else
  148. return -EIO;
  149. }
  150. #endif
  151. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  152. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  153. unsigned int r)
  154. {
  155. u8 reg = r;
  156. u8 data;
  157. int ret;
  158. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  159. if (ret < 0)
  160. return 0;
  161. return data;
  162. }
  163. #else
  164. #define snd_soc_8_8_read_i2c NULL
  165. #endif
  166. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  167. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  168. unsigned int r)
  169. {
  170. u8 reg = r;
  171. u16 data;
  172. int ret;
  173. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  174. if (ret < 0)
  175. return 0;
  176. return (data >> 8) | ((data & 0xff) << 8);
  177. }
  178. #else
  179. #define snd_soc_8_16_read_i2c NULL
  180. #endif
  181. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  182. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  183. unsigned int r)
  184. {
  185. u16 reg = r;
  186. u8 data;
  187. int ret;
  188. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  189. if (ret < 0)
  190. return 0;
  191. return data;
  192. }
  193. #else
  194. #define snd_soc_16_8_read_i2c NULL
  195. #endif
  196. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  197. unsigned int reg)
  198. {
  199. return do_hw_read(codec, reg);
  200. }
  201. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  202. unsigned int value)
  203. {
  204. u8 data[3];
  205. data[0] = (reg >> 8) & 0xff;
  206. data[1] = reg & 0xff;
  207. data[2] = value;
  208. return do_hw_write(codec, reg, value, data, 3);
  209. }
  210. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  211. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  212. unsigned int r)
  213. {
  214. u16 reg = cpu_to_be16(r);
  215. u16 data;
  216. int ret;
  217. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  218. if (ret < 0)
  219. return 0;
  220. return be16_to_cpu(data);
  221. }
  222. #else
  223. #define snd_soc_16_16_read_i2c NULL
  224. #endif
  225. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  226. unsigned int reg)
  227. {
  228. return do_hw_read(codec, reg);
  229. }
  230. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  231. unsigned int value)
  232. {
  233. u8 data[4];
  234. data[0] = (reg >> 8) & 0xff;
  235. data[1] = reg & 0xff;
  236. data[2] = (value >> 8) & 0xff;
  237. data[3] = value & 0xff;
  238. return do_hw_write(codec, reg, value, data, 4);
  239. }
  240. /* Primitive bulk write support for soc-cache. The data pointed to by
  241. * `data' needs to already be in the form the hardware expects
  242. * including any leading register specific data. Any data written
  243. * through this function will not go through the cache as it only
  244. * handles writing to volatile or out of bounds registers.
  245. */
  246. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  247. const void *data, size_t len)
  248. {
  249. int ret;
  250. /* To ensure that we don't get out of sync with the cache, check
  251. * whether the base register is volatile or if we've directly asked
  252. * to bypass the cache. Out of bounds registers are considered
  253. * volatile.
  254. */
  255. if (!codec->cache_bypass
  256. && !snd_soc_codec_volatile_register(codec, reg)
  257. && reg < codec->driver->reg_cache_size)
  258. return -EINVAL;
  259. switch (codec->control_type) {
  260. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  261. case SND_SOC_I2C:
  262. ret = i2c_master_send(codec->control_data, data, len);
  263. break;
  264. #endif
  265. #if defined(CONFIG_SPI_MASTER)
  266. case SND_SOC_SPI:
  267. ret = spi_write(codec->control_data, data, len);
  268. break;
  269. #endif
  270. default:
  271. BUG();
  272. }
  273. if (ret == len)
  274. return 0;
  275. if (ret < 0)
  276. return ret;
  277. else
  278. return -EIO;
  279. }
  280. static struct {
  281. int addr_bits;
  282. int data_bits;
  283. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  284. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  285. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  286. } io_types[] = {
  287. {
  288. .addr_bits = 4, .data_bits = 12,
  289. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  290. },
  291. {
  292. .addr_bits = 7, .data_bits = 9,
  293. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  294. },
  295. {
  296. .addr_bits = 8, .data_bits = 8,
  297. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  298. .i2c_read = snd_soc_8_8_read_i2c,
  299. },
  300. {
  301. .addr_bits = 8, .data_bits = 16,
  302. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  303. .i2c_read = snd_soc_8_16_read_i2c,
  304. },
  305. {
  306. .addr_bits = 16, .data_bits = 8,
  307. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  308. .i2c_read = snd_soc_16_8_read_i2c,
  309. },
  310. {
  311. .addr_bits = 16, .data_bits = 16,
  312. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  313. .i2c_read = snd_soc_16_16_read_i2c,
  314. },
  315. };
  316. /**
  317. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  318. *
  319. * @codec: CODEC to configure.
  320. * @addr_bits: Number of bits of register address data.
  321. * @data_bits: Number of bits of data per register.
  322. * @control: Control bus used.
  323. *
  324. * Register formats are frequently shared between many I2C and SPI
  325. * devices. In order to promote code reuse the ASoC core provides
  326. * some standard implementations of CODEC read and write operations
  327. * which can be set up using this function.
  328. *
  329. * The caller is responsible for allocating and initialising the
  330. * actual cache.
  331. *
  332. * Note that at present this code cannot be used by CODECs with
  333. * volatile registers.
  334. */
  335. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  336. int addr_bits, int data_bits,
  337. enum snd_soc_control_type control)
  338. {
  339. int i;
  340. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  341. if (io_types[i].addr_bits == addr_bits &&
  342. io_types[i].data_bits == data_bits)
  343. break;
  344. if (i == ARRAY_SIZE(io_types)) {
  345. printk(KERN_ERR
  346. "No I/O functions for %d bit address %d bit data\n",
  347. addr_bits, data_bits);
  348. return -EINVAL;
  349. }
  350. codec->write = io_types[i].write;
  351. codec->read = io_types[i].read;
  352. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  353. switch (control) {
  354. case SND_SOC_CUSTOM:
  355. break;
  356. case SND_SOC_I2C:
  357. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  358. codec->hw_write = (hw_write_t)i2c_master_send;
  359. #endif
  360. if (io_types[i].i2c_read)
  361. codec->hw_read = io_types[i].i2c_read;
  362. codec->control_data = container_of(codec->dev,
  363. struct i2c_client,
  364. dev);
  365. break;
  366. case SND_SOC_SPI:
  367. #ifdef CONFIG_SPI_MASTER
  368. codec->hw_write = do_spi_write;
  369. #endif
  370. codec->control_data = container_of(codec->dev,
  371. struct spi_device,
  372. dev);
  373. break;
  374. }
  375. return 0;
  376. }
  377. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  378. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  379. unsigned int val, unsigned int word_size)
  380. {
  381. switch (word_size) {
  382. case 1: {
  383. u8 *cache = base;
  384. if (cache[idx] == val)
  385. return true;
  386. cache[idx] = val;
  387. break;
  388. }
  389. case 2: {
  390. u16 *cache = base;
  391. if (cache[idx] == val)
  392. return true;
  393. cache[idx] = val;
  394. break;
  395. }
  396. default:
  397. BUG();
  398. }
  399. return false;
  400. }
  401. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  402. unsigned int word_size)
  403. {
  404. if (!base)
  405. return -1;
  406. switch (word_size) {
  407. case 1: {
  408. const u8 *cache = base;
  409. return cache[idx];
  410. }
  411. case 2: {
  412. const u16 *cache = base;
  413. return cache[idx];
  414. }
  415. default:
  416. BUG();
  417. }
  418. /* unreachable */
  419. return -1;
  420. }
  421. struct snd_soc_rbtree_node {
  422. struct rb_node node;
  423. unsigned int reg;
  424. unsigned int value;
  425. unsigned int defval;
  426. } __attribute__ ((packed));
  427. struct snd_soc_rbtree_ctx {
  428. struct rb_root root;
  429. };
  430. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  431. struct rb_root *root, unsigned int reg)
  432. {
  433. struct rb_node *node;
  434. struct snd_soc_rbtree_node *rbnode;
  435. node = root->rb_node;
  436. while (node) {
  437. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  438. if (rbnode->reg < reg)
  439. node = node->rb_left;
  440. else if (rbnode->reg > reg)
  441. node = node->rb_right;
  442. else
  443. return rbnode;
  444. }
  445. return NULL;
  446. }
  447. static int snd_soc_rbtree_insert(struct rb_root *root,
  448. struct snd_soc_rbtree_node *rbnode)
  449. {
  450. struct rb_node **new, *parent;
  451. struct snd_soc_rbtree_node *rbnode_tmp;
  452. parent = NULL;
  453. new = &root->rb_node;
  454. while (*new) {
  455. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  456. node);
  457. parent = *new;
  458. if (rbnode_tmp->reg < rbnode->reg)
  459. new = &((*new)->rb_left);
  460. else if (rbnode_tmp->reg > rbnode->reg)
  461. new = &((*new)->rb_right);
  462. else
  463. return 0;
  464. }
  465. /* insert the node into the rbtree */
  466. rb_link_node(&rbnode->node, parent, new);
  467. rb_insert_color(&rbnode->node, root);
  468. return 1;
  469. }
  470. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  471. {
  472. struct snd_soc_rbtree_ctx *rbtree_ctx;
  473. struct rb_node *node;
  474. struct snd_soc_rbtree_node *rbnode;
  475. unsigned int val;
  476. int ret;
  477. rbtree_ctx = codec->reg_cache;
  478. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  479. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  480. if (rbnode->value == rbnode->defval)
  481. continue;
  482. WARN_ON(codec->writable_register &&
  483. codec->writable_register(codec, rbnode->reg));
  484. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  485. if (ret)
  486. return ret;
  487. codec->cache_bypass = 1;
  488. ret = snd_soc_write(codec, rbnode->reg, val);
  489. codec->cache_bypass = 0;
  490. if (ret)
  491. return ret;
  492. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  493. rbnode->reg, val);
  494. }
  495. return 0;
  496. }
  497. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  498. unsigned int reg, unsigned int value)
  499. {
  500. struct snd_soc_rbtree_ctx *rbtree_ctx;
  501. struct snd_soc_rbtree_node *rbnode;
  502. rbtree_ctx = codec->reg_cache;
  503. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  504. if (rbnode) {
  505. if (rbnode->value == value)
  506. return 0;
  507. rbnode->value = value;
  508. } else {
  509. /* bail out early, no need to create the rbnode yet */
  510. if (!value)
  511. return 0;
  512. /*
  513. * for uninitialized registers whose value is changed
  514. * from the default zero, create an rbnode and insert
  515. * it into the tree.
  516. */
  517. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  518. if (!rbnode)
  519. return -ENOMEM;
  520. rbnode->reg = reg;
  521. rbnode->value = value;
  522. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  523. }
  524. return 0;
  525. }
  526. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  527. unsigned int reg, unsigned int *value)
  528. {
  529. struct snd_soc_rbtree_ctx *rbtree_ctx;
  530. struct snd_soc_rbtree_node *rbnode;
  531. rbtree_ctx = codec->reg_cache;
  532. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  533. if (rbnode) {
  534. *value = rbnode->value;
  535. } else {
  536. /* uninitialized registers default to 0 */
  537. *value = 0;
  538. }
  539. return 0;
  540. }
  541. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  542. {
  543. struct rb_node *next;
  544. struct snd_soc_rbtree_ctx *rbtree_ctx;
  545. struct snd_soc_rbtree_node *rbtree_node;
  546. /* if we've already been called then just return */
  547. rbtree_ctx = codec->reg_cache;
  548. if (!rbtree_ctx)
  549. return 0;
  550. /* free up the rbtree */
  551. next = rb_first(&rbtree_ctx->root);
  552. while (next) {
  553. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  554. next = rb_next(&rbtree_node->node);
  555. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  556. kfree(rbtree_node);
  557. }
  558. /* release the resources */
  559. kfree(codec->reg_cache);
  560. codec->reg_cache = NULL;
  561. return 0;
  562. }
  563. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  564. {
  565. struct snd_soc_rbtree_node *rbtree_node;
  566. struct snd_soc_rbtree_ctx *rbtree_ctx;
  567. unsigned int val;
  568. unsigned int word_size;
  569. int i;
  570. int ret;
  571. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  572. if (!codec->reg_cache)
  573. return -ENOMEM;
  574. rbtree_ctx = codec->reg_cache;
  575. rbtree_ctx->root = RB_ROOT;
  576. if (!codec->reg_def_copy)
  577. return 0;
  578. /*
  579. * populate the rbtree with the initialized registers. All other
  580. * registers will be inserted when they are first modified.
  581. */
  582. word_size = codec->driver->reg_word_size;
  583. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  584. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  585. if (!val)
  586. continue;
  587. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  588. if (!rbtree_node) {
  589. ret = -ENOMEM;
  590. snd_soc_cache_exit(codec);
  591. break;
  592. }
  593. rbtree_node->reg = i;
  594. rbtree_node->value = val;
  595. rbtree_node->defval = val;
  596. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  597. }
  598. return 0;
  599. }
  600. #ifdef CONFIG_SND_SOC_CACHE_LZO
  601. struct snd_soc_lzo_ctx {
  602. void *wmem;
  603. void *dst;
  604. const void *src;
  605. size_t src_len;
  606. size_t dst_len;
  607. size_t decompressed_size;
  608. unsigned long *sync_bmp;
  609. int sync_bmp_nbits;
  610. };
  611. #define LZO_BLOCK_NUM 8
  612. static int snd_soc_lzo_block_count(void)
  613. {
  614. return LZO_BLOCK_NUM;
  615. }
  616. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  617. {
  618. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  619. if (!lzo_ctx->wmem)
  620. return -ENOMEM;
  621. return 0;
  622. }
  623. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  624. {
  625. size_t compress_size;
  626. int ret;
  627. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  628. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  629. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  630. return -EINVAL;
  631. lzo_ctx->dst_len = compress_size;
  632. return 0;
  633. }
  634. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  635. {
  636. size_t dst_len;
  637. int ret;
  638. dst_len = lzo_ctx->dst_len;
  639. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  640. lzo_ctx->dst, &dst_len);
  641. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  642. return -EINVAL;
  643. return 0;
  644. }
  645. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  646. struct snd_soc_lzo_ctx *lzo_ctx)
  647. {
  648. int ret;
  649. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  650. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  651. if (!lzo_ctx->dst) {
  652. lzo_ctx->dst_len = 0;
  653. return -ENOMEM;
  654. }
  655. ret = snd_soc_lzo_compress(lzo_ctx);
  656. if (ret < 0)
  657. return ret;
  658. return 0;
  659. }
  660. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  661. struct snd_soc_lzo_ctx *lzo_ctx)
  662. {
  663. int ret;
  664. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  665. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  666. if (!lzo_ctx->dst) {
  667. lzo_ctx->dst_len = 0;
  668. return -ENOMEM;
  669. }
  670. ret = snd_soc_lzo_decompress(lzo_ctx);
  671. if (ret < 0)
  672. return ret;
  673. return 0;
  674. }
  675. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  676. unsigned int reg)
  677. {
  678. const struct snd_soc_codec_driver *codec_drv;
  679. codec_drv = codec->driver;
  680. return (reg * codec_drv->reg_word_size) /
  681. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  682. }
  683. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  684. unsigned int reg)
  685. {
  686. const struct snd_soc_codec_driver *codec_drv;
  687. codec_drv = codec->driver;
  688. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  689. codec_drv->reg_word_size);
  690. }
  691. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  692. {
  693. const struct snd_soc_codec_driver *codec_drv;
  694. codec_drv = codec->driver;
  695. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  696. }
  697. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  698. {
  699. struct snd_soc_lzo_ctx **lzo_blocks;
  700. unsigned int val;
  701. int i;
  702. int ret;
  703. lzo_blocks = codec->reg_cache;
  704. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  705. WARN_ON(codec->writable_register &&
  706. codec->writable_register(codec, i));
  707. ret = snd_soc_cache_read(codec, i, &val);
  708. if (ret)
  709. return ret;
  710. codec->cache_bypass = 1;
  711. ret = snd_soc_write(codec, i, val);
  712. codec->cache_bypass = 0;
  713. if (ret)
  714. return ret;
  715. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  716. i, val);
  717. }
  718. return 0;
  719. }
  720. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  721. unsigned int reg, unsigned int value)
  722. {
  723. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  724. int ret, blkindex, blkpos;
  725. size_t blksize, tmp_dst_len;
  726. void *tmp_dst;
  727. /* index of the compressed lzo block */
  728. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  729. /* register index within the decompressed block */
  730. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  731. /* size of the compressed block */
  732. blksize = snd_soc_lzo_get_blksize(codec);
  733. lzo_blocks = codec->reg_cache;
  734. lzo_block = lzo_blocks[blkindex];
  735. /* save the pointer and length of the compressed block */
  736. tmp_dst = lzo_block->dst;
  737. tmp_dst_len = lzo_block->dst_len;
  738. /* prepare the source to be the compressed block */
  739. lzo_block->src = lzo_block->dst;
  740. lzo_block->src_len = lzo_block->dst_len;
  741. /* decompress the block */
  742. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  743. if (ret < 0) {
  744. kfree(lzo_block->dst);
  745. goto out;
  746. }
  747. /* write the new value to the cache */
  748. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  749. codec->driver->reg_word_size)) {
  750. kfree(lzo_block->dst);
  751. goto out;
  752. }
  753. /* prepare the source to be the decompressed block */
  754. lzo_block->src = lzo_block->dst;
  755. lzo_block->src_len = lzo_block->dst_len;
  756. /* compress the block */
  757. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  758. if (ret < 0) {
  759. kfree(lzo_block->dst);
  760. kfree(lzo_block->src);
  761. goto out;
  762. }
  763. /* set the bit so we know we have to sync this register */
  764. set_bit(reg, lzo_block->sync_bmp);
  765. kfree(tmp_dst);
  766. kfree(lzo_block->src);
  767. return 0;
  768. out:
  769. lzo_block->dst = tmp_dst;
  770. lzo_block->dst_len = tmp_dst_len;
  771. return ret;
  772. }
  773. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  774. unsigned int reg, unsigned int *value)
  775. {
  776. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  777. int ret, blkindex, blkpos;
  778. size_t blksize, tmp_dst_len;
  779. void *tmp_dst;
  780. *value = 0;
  781. /* index of the compressed lzo block */
  782. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  783. /* register index within the decompressed block */
  784. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  785. /* size of the compressed block */
  786. blksize = snd_soc_lzo_get_blksize(codec);
  787. lzo_blocks = codec->reg_cache;
  788. lzo_block = lzo_blocks[blkindex];
  789. /* save the pointer and length of the compressed block */
  790. tmp_dst = lzo_block->dst;
  791. tmp_dst_len = lzo_block->dst_len;
  792. /* prepare the source to be the compressed block */
  793. lzo_block->src = lzo_block->dst;
  794. lzo_block->src_len = lzo_block->dst_len;
  795. /* decompress the block */
  796. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  797. if (ret >= 0)
  798. /* fetch the value from the cache */
  799. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  800. codec->driver->reg_word_size);
  801. kfree(lzo_block->dst);
  802. /* restore the pointer and length of the compressed block */
  803. lzo_block->dst = tmp_dst;
  804. lzo_block->dst_len = tmp_dst_len;
  805. return 0;
  806. }
  807. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  808. {
  809. struct snd_soc_lzo_ctx **lzo_blocks;
  810. int i, blkcount;
  811. lzo_blocks = codec->reg_cache;
  812. if (!lzo_blocks)
  813. return 0;
  814. blkcount = snd_soc_lzo_block_count();
  815. /*
  816. * the pointer to the bitmap used for syncing the cache
  817. * is shared amongst all lzo_blocks. Ensure it is freed
  818. * only once.
  819. */
  820. if (lzo_blocks[0])
  821. kfree(lzo_blocks[0]->sync_bmp);
  822. for (i = 0; i < blkcount; ++i) {
  823. if (lzo_blocks[i]) {
  824. kfree(lzo_blocks[i]->wmem);
  825. kfree(lzo_blocks[i]->dst);
  826. }
  827. /* each lzo_block is a pointer returned by kmalloc or NULL */
  828. kfree(lzo_blocks[i]);
  829. }
  830. kfree(lzo_blocks);
  831. codec->reg_cache = NULL;
  832. return 0;
  833. }
  834. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  835. {
  836. struct snd_soc_lzo_ctx **lzo_blocks;
  837. size_t bmp_size;
  838. const struct snd_soc_codec_driver *codec_drv;
  839. int ret, tofree, i, blksize, blkcount;
  840. const char *p, *end;
  841. unsigned long *sync_bmp;
  842. ret = 0;
  843. codec_drv = codec->driver;
  844. /*
  845. * If we have not been given a default register cache
  846. * then allocate a dummy zero-ed out region, compress it
  847. * and remember to free it afterwards.
  848. */
  849. tofree = 0;
  850. if (!codec->reg_def_copy)
  851. tofree = 1;
  852. if (!codec->reg_def_copy) {
  853. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  854. if (!codec->reg_def_copy)
  855. return -ENOMEM;
  856. }
  857. blkcount = snd_soc_lzo_block_count();
  858. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  859. GFP_KERNEL);
  860. if (!codec->reg_cache) {
  861. ret = -ENOMEM;
  862. goto err_tofree;
  863. }
  864. lzo_blocks = codec->reg_cache;
  865. /*
  866. * allocate a bitmap to be used when syncing the cache with
  867. * the hardware. Each time a register is modified, the corresponding
  868. * bit is set in the bitmap, so we know that we have to sync
  869. * that register.
  870. */
  871. bmp_size = codec_drv->reg_cache_size;
  872. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  873. GFP_KERNEL);
  874. if (!sync_bmp) {
  875. ret = -ENOMEM;
  876. goto err;
  877. }
  878. bitmap_zero(sync_bmp, bmp_size);
  879. /* allocate the lzo blocks and initialize them */
  880. for (i = 0; i < blkcount; ++i) {
  881. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  882. GFP_KERNEL);
  883. if (!lzo_blocks[i]) {
  884. kfree(sync_bmp);
  885. ret = -ENOMEM;
  886. goto err;
  887. }
  888. lzo_blocks[i]->sync_bmp = sync_bmp;
  889. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  890. /* alloc the working space for the compressed block */
  891. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  892. if (ret < 0)
  893. goto err;
  894. }
  895. blksize = snd_soc_lzo_get_blksize(codec);
  896. p = codec->reg_def_copy;
  897. end = codec->reg_def_copy + codec->reg_size;
  898. /* compress the register map and fill the lzo blocks */
  899. for (i = 0; i < blkcount; ++i, p += blksize) {
  900. lzo_blocks[i]->src = p;
  901. if (p + blksize > end)
  902. lzo_blocks[i]->src_len = end - p;
  903. else
  904. lzo_blocks[i]->src_len = blksize;
  905. ret = snd_soc_lzo_compress_cache_block(codec,
  906. lzo_blocks[i]);
  907. if (ret < 0)
  908. goto err;
  909. lzo_blocks[i]->decompressed_size =
  910. lzo_blocks[i]->src_len;
  911. }
  912. if (tofree) {
  913. kfree(codec->reg_def_copy);
  914. codec->reg_def_copy = NULL;
  915. }
  916. return 0;
  917. err:
  918. snd_soc_cache_exit(codec);
  919. err_tofree:
  920. if (tofree) {
  921. kfree(codec->reg_def_copy);
  922. codec->reg_def_copy = NULL;
  923. }
  924. return ret;
  925. }
  926. #endif
  927. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  928. {
  929. int i;
  930. int ret;
  931. const struct snd_soc_codec_driver *codec_drv;
  932. unsigned int val;
  933. codec_drv = codec->driver;
  934. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  935. WARN_ON(codec->writable_register &&
  936. codec->writable_register(codec, i));
  937. ret = snd_soc_cache_read(codec, i, &val);
  938. if (ret)
  939. return ret;
  940. if (codec->reg_def_copy)
  941. if (snd_soc_get_cache_val(codec->reg_def_copy,
  942. i, codec_drv->reg_word_size) == val)
  943. continue;
  944. ret = snd_soc_write(codec, i, val);
  945. if (ret)
  946. return ret;
  947. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  948. i, val);
  949. }
  950. return 0;
  951. }
  952. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  953. unsigned int reg, unsigned int value)
  954. {
  955. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  956. codec->driver->reg_word_size);
  957. return 0;
  958. }
  959. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  960. unsigned int reg, unsigned int *value)
  961. {
  962. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  963. codec->driver->reg_word_size);
  964. return 0;
  965. }
  966. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  967. {
  968. if (!codec->reg_cache)
  969. return 0;
  970. kfree(codec->reg_cache);
  971. codec->reg_cache = NULL;
  972. return 0;
  973. }
  974. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  975. {
  976. const struct snd_soc_codec_driver *codec_drv;
  977. codec_drv = codec->driver;
  978. if (codec->reg_def_copy)
  979. codec->reg_cache = kmemdup(codec->reg_def_copy,
  980. codec->reg_size, GFP_KERNEL);
  981. else
  982. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  983. if (!codec->reg_cache)
  984. return -ENOMEM;
  985. return 0;
  986. }
  987. /* an array of all supported compression types */
  988. static const struct snd_soc_cache_ops cache_types[] = {
  989. /* Flat *must* be the first entry for fallback */
  990. {
  991. .id = SND_SOC_FLAT_COMPRESSION,
  992. .name = "flat",
  993. .init = snd_soc_flat_cache_init,
  994. .exit = snd_soc_flat_cache_exit,
  995. .read = snd_soc_flat_cache_read,
  996. .write = snd_soc_flat_cache_write,
  997. .sync = snd_soc_flat_cache_sync
  998. },
  999. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1000. {
  1001. .id = SND_SOC_LZO_COMPRESSION,
  1002. .name = "LZO",
  1003. .init = snd_soc_lzo_cache_init,
  1004. .exit = snd_soc_lzo_cache_exit,
  1005. .read = snd_soc_lzo_cache_read,
  1006. .write = snd_soc_lzo_cache_write,
  1007. .sync = snd_soc_lzo_cache_sync
  1008. },
  1009. #endif
  1010. {
  1011. .id = SND_SOC_RBTREE_COMPRESSION,
  1012. .name = "rbtree",
  1013. .init = snd_soc_rbtree_cache_init,
  1014. .exit = snd_soc_rbtree_cache_exit,
  1015. .read = snd_soc_rbtree_cache_read,
  1016. .write = snd_soc_rbtree_cache_write,
  1017. .sync = snd_soc_rbtree_cache_sync
  1018. }
  1019. };
  1020. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1021. {
  1022. int i;
  1023. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1024. if (cache_types[i].id == codec->compress_type)
  1025. break;
  1026. /* Fall back to flat compression */
  1027. if (i == ARRAY_SIZE(cache_types)) {
  1028. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1029. codec->compress_type);
  1030. i = 0;
  1031. }
  1032. mutex_init(&codec->cache_rw_mutex);
  1033. codec->cache_ops = &cache_types[i];
  1034. if (codec->cache_ops->init) {
  1035. if (codec->cache_ops->name)
  1036. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1037. codec->cache_ops->name, codec->name);
  1038. return codec->cache_ops->init(codec);
  1039. }
  1040. return -ENOSYS;
  1041. }
  1042. /*
  1043. * NOTE: keep in mind that this function might be called
  1044. * multiple times.
  1045. */
  1046. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1047. {
  1048. if (codec->cache_ops && codec->cache_ops->exit) {
  1049. if (codec->cache_ops->name)
  1050. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1051. codec->cache_ops->name, codec->name);
  1052. return codec->cache_ops->exit(codec);
  1053. }
  1054. return -ENOSYS;
  1055. }
  1056. /**
  1057. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1058. *
  1059. * @codec: CODEC to configure.
  1060. * @reg: The register index.
  1061. * @value: The value to be returned.
  1062. */
  1063. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1064. unsigned int reg, unsigned int *value)
  1065. {
  1066. int ret;
  1067. mutex_lock(&codec->cache_rw_mutex);
  1068. if (value && codec->cache_ops && codec->cache_ops->read) {
  1069. ret = codec->cache_ops->read(codec, reg, value);
  1070. mutex_unlock(&codec->cache_rw_mutex);
  1071. return ret;
  1072. }
  1073. mutex_unlock(&codec->cache_rw_mutex);
  1074. return -ENOSYS;
  1075. }
  1076. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1077. /**
  1078. * snd_soc_cache_write: Set the value of a given register in the cache.
  1079. *
  1080. * @codec: CODEC to configure.
  1081. * @reg: The register index.
  1082. * @value: The new register value.
  1083. */
  1084. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1085. unsigned int reg, unsigned int value)
  1086. {
  1087. int ret;
  1088. mutex_lock(&codec->cache_rw_mutex);
  1089. if (codec->cache_ops && codec->cache_ops->write) {
  1090. ret = codec->cache_ops->write(codec, reg, value);
  1091. mutex_unlock(&codec->cache_rw_mutex);
  1092. return ret;
  1093. }
  1094. mutex_unlock(&codec->cache_rw_mutex);
  1095. return -ENOSYS;
  1096. }
  1097. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1098. /**
  1099. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1100. *
  1101. * @codec: CODEC to configure.
  1102. *
  1103. * Any registers that should not be synced should be marked as
  1104. * volatile. In general drivers can choose not to use the provided
  1105. * syncing functionality if they so require.
  1106. */
  1107. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1108. {
  1109. int ret;
  1110. const char *name;
  1111. if (!codec->cache_sync) {
  1112. return 0;
  1113. }
  1114. if (!codec->cache_ops || !codec->cache_ops->sync)
  1115. return -ENOSYS;
  1116. if (codec->cache_ops->name)
  1117. name = codec->cache_ops->name;
  1118. else
  1119. name = "unknown";
  1120. if (codec->cache_ops->name)
  1121. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1122. codec->cache_ops->name, codec->name);
  1123. trace_snd_soc_cache_sync(codec, name, "start");
  1124. ret = codec->cache_ops->sync(codec);
  1125. if (!ret)
  1126. codec->cache_sync = 0;
  1127. trace_snd_soc_cache_sync(codec, name, "end");
  1128. return ret;
  1129. }
  1130. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1131. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1132. unsigned int reg)
  1133. {
  1134. const struct snd_soc_codec_driver *codec_drv;
  1135. unsigned int min, max, index;
  1136. codec_drv = codec->driver;
  1137. min = 0;
  1138. max = codec_drv->reg_access_size - 1;
  1139. do {
  1140. index = (min + max) / 2;
  1141. if (codec_drv->reg_access_default[index].reg == reg)
  1142. return index;
  1143. if (codec_drv->reg_access_default[index].reg < reg)
  1144. min = index + 1;
  1145. else
  1146. max = index;
  1147. } while (min <= max);
  1148. return -1;
  1149. }
  1150. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1151. unsigned int reg)
  1152. {
  1153. int index;
  1154. if (reg >= codec->driver->reg_cache_size)
  1155. return 1;
  1156. index = snd_soc_get_reg_access_index(codec, reg);
  1157. if (index < 0)
  1158. return 0;
  1159. return codec->driver->reg_access_default[index].vol;
  1160. }
  1161. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1162. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1163. unsigned int reg)
  1164. {
  1165. int index;
  1166. if (reg >= codec->driver->reg_cache_size)
  1167. return 1;
  1168. index = snd_soc_get_reg_access_index(codec, reg);
  1169. if (index < 0)
  1170. return 0;
  1171. return codec->driver->reg_access_default[index].read;
  1172. }
  1173. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
  1174. int snd_soc_default_writable_register(struct snd_soc_codec *codec,
  1175. unsigned int reg)
  1176. {
  1177. int index;
  1178. if (reg >= codec->driver->reg_cache_size)
  1179. return 1;
  1180. index = snd_soc_get_reg_access_index(codec, reg);
  1181. if (index < 0)
  1182. return 0;
  1183. return codec->driver->reg_access_default[index].write;
  1184. }
  1185. EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);