mpparse.c 24 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/memblock.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/mc146818rtc.h>
  16. #include <linux/bitops.h>
  17. #include <linux/acpi.h>
  18. #include <linux/module.h>
  19. #include <linux/smp.h>
  20. #include <linux/pci.h>
  21. #include <asm/mtrr.h>
  22. #include <asm/mpspec.h>
  23. #include <asm/pgalloc.h>
  24. #include <asm/io_apic.h>
  25. #include <asm/proto.h>
  26. #include <asm/bios_ebda.h>
  27. #include <asm/e820.h>
  28. #include <asm/trampoline.h>
  29. #include <asm/setup.h>
  30. #include <asm/smp.h>
  31. #include <asm/apic.h>
  32. /*
  33. * Checksum an MP configuration block.
  34. */
  35. static int __init mpf_checksum(unsigned char *mp, int len)
  36. {
  37. int sum = 0;
  38. while (len--)
  39. sum += *mp++;
  40. return sum & 0xFF;
  41. }
  42. int __init default_mpc_apic_id(struct mpc_cpu *m)
  43. {
  44. return m->apicid;
  45. }
  46. static void __init MP_processor_info(struct mpc_cpu *m)
  47. {
  48. int apicid;
  49. char *bootup_cpu = "";
  50. if (!(m->cpuflag & CPU_ENABLED)) {
  51. disabled_cpus++;
  52. return;
  53. }
  54. apicid = x86_init.mpparse.mpc_apic_id(m);
  55. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  56. bootup_cpu = " (Bootup-CPU)";
  57. boot_cpu_physical_apicid = m->apicid;
  58. }
  59. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  60. generic_processor_info(apicid, m->apicver);
  61. }
  62. #ifdef CONFIG_X86_IO_APIC
  63. void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
  64. {
  65. memcpy(str, m->bustype, 6);
  66. str[6] = 0;
  67. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  68. }
  69. static void __init MP_bus_info(struct mpc_bus *m)
  70. {
  71. char str[7];
  72. x86_init.mpparse.mpc_oem_bus_info(m, str);
  73. #if MAX_MP_BUSSES < 256
  74. if (m->busid >= MAX_MP_BUSSES) {
  75. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  76. " is too large, max. supported is %d\n",
  77. m->busid, str, MAX_MP_BUSSES - 1);
  78. return;
  79. }
  80. #endif
  81. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  82. set_bit(m->busid, mp_bus_not_pci);
  83. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  84. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  85. #endif
  86. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  87. if (x86_init.mpparse.mpc_oem_pci_bus)
  88. x86_init.mpparse.mpc_oem_pci_bus(m);
  89. clear_bit(m->busid, mp_bus_not_pci);
  90. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  91. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  92. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  93. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  94. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  95. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  96. #endif
  97. } else
  98. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  99. }
  100. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  101. {
  102. if (!(m->flags & MPC_APIC_USABLE))
  103. return;
  104. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  105. m->apicid, m->apicver, m->apicaddr);
  106. mp_register_ioapic(m->apicid, m->apicaddr, gsi_top);
  107. }
  108. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  109. {
  110. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  111. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  112. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  113. m->srcbusirq, m->dstapic, m->dstirq);
  114. }
  115. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  116. {
  117. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  118. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  119. mp_irq->irqtype, mp_irq->irqflag & 3,
  120. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  121. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  122. }
  123. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  124. struct mpc_intsrc *mp_irq)
  125. {
  126. mp_irq->dstapic = m->dstapic;
  127. mp_irq->type = m->type;
  128. mp_irq->irqtype = m->irqtype;
  129. mp_irq->irqflag = m->irqflag;
  130. mp_irq->srcbus = m->srcbus;
  131. mp_irq->srcbusirq = m->srcbusirq;
  132. mp_irq->dstirq = m->dstirq;
  133. }
  134. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  135. struct mpc_intsrc *m)
  136. {
  137. m->dstapic = mp_irq->dstapic;
  138. m->type = mp_irq->type;
  139. m->irqtype = mp_irq->irqtype;
  140. m->irqflag = mp_irq->irqflag;
  141. m->srcbus = mp_irq->srcbus;
  142. m->srcbusirq = mp_irq->srcbusirq;
  143. m->dstirq = mp_irq->dstirq;
  144. }
  145. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  146. struct mpc_intsrc *m)
  147. {
  148. if (mp_irq->dstapic != m->dstapic)
  149. return 1;
  150. if (mp_irq->type != m->type)
  151. return 2;
  152. if (mp_irq->irqtype != m->irqtype)
  153. return 3;
  154. if (mp_irq->irqflag != m->irqflag)
  155. return 4;
  156. if (mp_irq->srcbus != m->srcbus)
  157. return 5;
  158. if (mp_irq->srcbusirq != m->srcbusirq)
  159. return 6;
  160. if (mp_irq->dstirq != m->dstirq)
  161. return 7;
  162. return 0;
  163. }
  164. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  165. {
  166. int i;
  167. print_MP_intsrc_info(m);
  168. for (i = 0; i < mp_irq_entries; i++) {
  169. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  170. return;
  171. }
  172. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  173. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  174. panic("Max # of irq sources exceeded!!\n");
  175. }
  176. #else /* CONFIG_X86_IO_APIC */
  177. static inline void __init MP_bus_info(struct mpc_bus *m) {}
  178. static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
  179. static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
  180. #endif /* CONFIG_X86_IO_APIC */
  181. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  182. {
  183. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  184. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  185. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  186. m->srcbusirq, m->destapic, m->destapiclint);
  187. }
  188. /*
  189. * Read/parse the MPC
  190. */
  191. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  192. {
  193. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  194. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  195. mpc->signature[0], mpc->signature[1],
  196. mpc->signature[2], mpc->signature[3]);
  197. return 0;
  198. }
  199. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  200. printk(KERN_ERR "MPTABLE: checksum error!\n");
  201. return 0;
  202. }
  203. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  204. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  205. mpc->spec);
  206. return 0;
  207. }
  208. if (!mpc->lapic) {
  209. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  210. return 0;
  211. }
  212. memcpy(oem, mpc->oem, 8);
  213. oem[8] = 0;
  214. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  215. memcpy(str, mpc->productid, 12);
  216. str[12] = 0;
  217. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  218. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  219. return 1;
  220. }
  221. static void skip_entry(unsigned char **ptr, int *count, int size)
  222. {
  223. *ptr += size;
  224. *count += size;
  225. }
  226. static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
  227. {
  228. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
  229. "type %x\n", *mpt);
  230. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  231. 1, mpc, mpc->length, 1);
  232. }
  233. void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
  234. static void __init smp_register_lapic_address(unsigned long address)
  235. {
  236. mp_lapic_addr = address;
  237. set_fixmap_nocache(FIX_APIC_BASE, address);
  238. if (boot_cpu_physical_apicid == -1U) {
  239. boot_cpu_physical_apicid = read_apic_id();
  240. apic_version[boot_cpu_physical_apicid] =
  241. GET_APIC_VERSION(apic_read(APIC_LVR));
  242. }
  243. }
  244. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  245. {
  246. char str[16];
  247. char oem[10];
  248. int count = sizeof(*mpc);
  249. unsigned char *mpt = ((unsigned char *)mpc) + count;
  250. if (!smp_check_mpc(mpc, oem, str))
  251. return 0;
  252. #ifdef CONFIG_X86_32
  253. generic_mps_oem_check(mpc, oem, str);
  254. #endif
  255. /* save the local APIC address, it might be non-default */
  256. if (!acpi_lapic)
  257. mp_lapic_addr = mpc->lapic;
  258. if (early)
  259. return 1;
  260. /* Initialize the lapic mapping */
  261. if (!acpi_lapic)
  262. smp_register_lapic_address(mpc->lapic);
  263. if (mpc->oemptr)
  264. x86_init.mpparse.smp_read_mpc_oem(mpc);
  265. /*
  266. * Now process the configuration blocks.
  267. */
  268. x86_init.mpparse.mpc_record(0);
  269. while (count < mpc->length) {
  270. switch (*mpt) {
  271. case MP_PROCESSOR:
  272. /* ACPI may have already provided this data */
  273. if (!acpi_lapic)
  274. MP_processor_info((struct mpc_cpu *)mpt);
  275. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  276. break;
  277. case MP_BUS:
  278. MP_bus_info((struct mpc_bus *)mpt);
  279. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  280. break;
  281. case MP_IOAPIC:
  282. MP_ioapic_info((struct mpc_ioapic *)mpt);
  283. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  284. break;
  285. case MP_INTSRC:
  286. MP_intsrc_info((struct mpc_intsrc *)mpt);
  287. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  288. break;
  289. case MP_LINTSRC:
  290. MP_lintsrc_info((struct mpc_lintsrc *)mpt);
  291. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  292. break;
  293. default:
  294. /* wrong mptable */
  295. smp_dump_mptable(mpc, mpt);
  296. count = mpc->length;
  297. break;
  298. }
  299. x86_init.mpparse.mpc_record(1);
  300. }
  301. if (!num_processors)
  302. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  303. return num_processors;
  304. }
  305. #ifdef CONFIG_X86_IO_APIC
  306. static int __init ELCR_trigger(unsigned int irq)
  307. {
  308. unsigned int port;
  309. port = 0x4d0 + (irq >> 3);
  310. return (inb(port) >> (irq & 7)) & 1;
  311. }
  312. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  313. {
  314. struct mpc_intsrc intsrc;
  315. int i;
  316. int ELCR_fallback = 0;
  317. intsrc.type = MP_INTSRC;
  318. intsrc.irqflag = 0; /* conforming */
  319. intsrc.srcbus = 0;
  320. intsrc.dstapic = mp_ioapics[0].apicid;
  321. intsrc.irqtype = mp_INT;
  322. /*
  323. * If true, we have an ISA/PCI system with no IRQ entries
  324. * in the MP table. To prevent the PCI interrupts from being set up
  325. * incorrectly, we try to use the ELCR. The sanity check to see if
  326. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  327. * never be level sensitive, so we simply see if the ELCR agrees.
  328. * If it does, we assume it's valid.
  329. */
  330. if (mpc_default_type == 5) {
  331. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  332. "falling back to ELCR\n");
  333. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  334. ELCR_trigger(13))
  335. printk(KERN_ERR "ELCR contains invalid data... "
  336. "not using ELCR\n");
  337. else {
  338. printk(KERN_INFO
  339. "Using ELCR to identify PCI interrupts\n");
  340. ELCR_fallback = 1;
  341. }
  342. }
  343. for (i = 0; i < 16; i++) {
  344. switch (mpc_default_type) {
  345. case 2:
  346. if (i == 0 || i == 13)
  347. continue; /* IRQ0 & IRQ13 not connected */
  348. /* fall through */
  349. default:
  350. if (i == 2)
  351. continue; /* IRQ2 is never connected */
  352. }
  353. if (ELCR_fallback) {
  354. /*
  355. * If the ELCR indicates a level-sensitive interrupt, we
  356. * copy that information over to the MP table in the
  357. * irqflag field (level sensitive, active high polarity).
  358. */
  359. if (ELCR_trigger(i))
  360. intsrc.irqflag = 13;
  361. else
  362. intsrc.irqflag = 0;
  363. }
  364. intsrc.srcbusirq = i;
  365. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  366. MP_intsrc_info(&intsrc);
  367. }
  368. intsrc.irqtype = mp_ExtINT;
  369. intsrc.srcbusirq = 0;
  370. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  371. MP_intsrc_info(&intsrc);
  372. }
  373. static void __init construct_ioapic_table(int mpc_default_type)
  374. {
  375. struct mpc_ioapic ioapic;
  376. struct mpc_bus bus;
  377. bus.type = MP_BUS;
  378. bus.busid = 0;
  379. switch (mpc_default_type) {
  380. default:
  381. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  382. mpc_default_type);
  383. /* fall through */
  384. case 1:
  385. case 5:
  386. memcpy(bus.bustype, "ISA ", 6);
  387. break;
  388. case 2:
  389. case 6:
  390. case 3:
  391. memcpy(bus.bustype, "EISA ", 6);
  392. break;
  393. case 4:
  394. case 7:
  395. memcpy(bus.bustype, "MCA ", 6);
  396. }
  397. MP_bus_info(&bus);
  398. if (mpc_default_type > 4) {
  399. bus.busid = 1;
  400. memcpy(bus.bustype, "PCI ", 6);
  401. MP_bus_info(&bus);
  402. }
  403. ioapic.type = MP_IOAPIC;
  404. ioapic.apicid = 2;
  405. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  406. ioapic.flags = MPC_APIC_USABLE;
  407. ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
  408. MP_ioapic_info(&ioapic);
  409. /*
  410. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  411. */
  412. construct_default_ioirq_mptable(mpc_default_type);
  413. }
  414. #else
  415. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  416. #endif
  417. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  418. {
  419. struct mpc_cpu processor;
  420. struct mpc_lintsrc lintsrc;
  421. int linttypes[2] = { mp_ExtINT, mp_NMI };
  422. int i;
  423. /*
  424. * local APIC has default address
  425. */
  426. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  427. /*
  428. * 2 CPUs, numbered 0 & 1.
  429. */
  430. processor.type = MP_PROCESSOR;
  431. /* Either an integrated APIC or a discrete 82489DX. */
  432. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  433. processor.cpuflag = CPU_ENABLED;
  434. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  435. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  436. processor.featureflag = boot_cpu_data.x86_capability[0];
  437. processor.reserved[0] = 0;
  438. processor.reserved[1] = 0;
  439. for (i = 0; i < 2; i++) {
  440. processor.apicid = i;
  441. MP_processor_info(&processor);
  442. }
  443. construct_ioapic_table(mpc_default_type);
  444. lintsrc.type = MP_LINTSRC;
  445. lintsrc.irqflag = 0; /* conforming */
  446. lintsrc.srcbusid = 0;
  447. lintsrc.srcbusirq = 0;
  448. lintsrc.destapic = MP_APIC_ALL;
  449. for (i = 0; i < 2; i++) {
  450. lintsrc.irqtype = linttypes[i];
  451. lintsrc.destapiclint = i;
  452. MP_lintsrc_info(&lintsrc);
  453. }
  454. }
  455. static struct mpf_intel *mpf_found;
  456. static unsigned long __init get_mpc_size(unsigned long physptr)
  457. {
  458. struct mpc_table *mpc;
  459. unsigned long size;
  460. mpc = early_ioremap(physptr, PAGE_SIZE);
  461. size = mpc->length;
  462. early_iounmap(mpc, PAGE_SIZE);
  463. apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
  464. return size;
  465. }
  466. static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
  467. {
  468. struct mpc_table *mpc;
  469. unsigned long size;
  470. size = get_mpc_size(mpf->physptr);
  471. mpc = early_ioremap(mpf->physptr, size);
  472. /*
  473. * Read the physical hardware table. Anything here will
  474. * override the defaults.
  475. */
  476. if (!smp_read_mpc(mpc, early)) {
  477. #ifdef CONFIG_X86_LOCAL_APIC
  478. smp_found_config = 0;
  479. #endif
  480. printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
  481. "... disabling SMP support. (tell your hw vendor)\n");
  482. early_iounmap(mpc, size);
  483. return -1;
  484. }
  485. early_iounmap(mpc, size);
  486. if (early)
  487. return -1;
  488. #ifdef CONFIG_X86_IO_APIC
  489. /*
  490. * If there are no explicit MP IRQ entries, then we are
  491. * broken. We set up most of the low 16 IO-APIC pins to
  492. * ISA defaults and hope it will work.
  493. */
  494. if (!mp_irq_entries) {
  495. struct mpc_bus bus;
  496. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  497. "using default mptable. (tell your hw vendor)\n");
  498. bus.type = MP_BUS;
  499. bus.busid = 0;
  500. memcpy(bus.bustype, "ISA ", 6);
  501. MP_bus_info(&bus);
  502. construct_default_ioirq_mptable(0);
  503. }
  504. #endif
  505. return 0;
  506. }
  507. /*
  508. * Scan the memory blocks for an SMP configuration block.
  509. */
  510. void __init default_get_smp_config(unsigned int early)
  511. {
  512. struct mpf_intel *mpf = mpf_found;
  513. if (!mpf)
  514. return;
  515. if (acpi_lapic && early)
  516. return;
  517. /*
  518. * MPS doesn't support hyperthreading, aka only have
  519. * thread 0 apic id in MPS table
  520. */
  521. if (acpi_lapic && acpi_ioapic)
  522. return;
  523. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  524. mpf->specification);
  525. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  526. if (mpf->feature2 & (1 << 7)) {
  527. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  528. pic_mode = 1;
  529. } else {
  530. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  531. pic_mode = 0;
  532. }
  533. #endif
  534. /*
  535. * Now see if we need to read further.
  536. */
  537. if (mpf->feature1 != 0) {
  538. if (early) {
  539. /*
  540. * local APIC has default address
  541. */
  542. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  543. return;
  544. }
  545. printk(KERN_INFO "Default MP configuration #%d\n",
  546. mpf->feature1);
  547. construct_default_ISA_mptable(mpf->feature1);
  548. } else if (mpf->physptr) {
  549. if (check_physptr(mpf, early))
  550. return;
  551. } else
  552. BUG();
  553. if (!early)
  554. printk(KERN_INFO "Processors: %d\n", num_processors);
  555. /*
  556. * Only use the first configuration found.
  557. */
  558. }
  559. static void __init smp_reserve_memory(struct mpf_intel *mpf)
  560. {
  561. unsigned long size = get_mpc_size(mpf->physptr);
  562. memblock_x86_reserve_range(mpf->physptr, mpf->physptr+size, "* MP-table mpc");
  563. }
  564. static int __init smp_scan_config(unsigned long base, unsigned long length)
  565. {
  566. unsigned int *bp = phys_to_virt(base);
  567. struct mpf_intel *mpf;
  568. unsigned long mem;
  569. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  570. bp, length);
  571. BUILD_BUG_ON(sizeof(*mpf) != 16);
  572. while (length > 0) {
  573. mpf = (struct mpf_intel *)bp;
  574. if ((*bp == SMP_MAGIC_IDENT) &&
  575. (mpf->length == 1) &&
  576. !mpf_checksum((unsigned char *)bp, 16) &&
  577. ((mpf->specification == 1)
  578. || (mpf->specification == 4))) {
  579. #ifdef CONFIG_X86_LOCAL_APIC
  580. smp_found_config = 1;
  581. #endif
  582. mpf_found = mpf;
  583. printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
  584. mpf, (u64)virt_to_phys(mpf));
  585. mem = virt_to_phys(mpf);
  586. memblock_x86_reserve_range(mem, mem + sizeof(*mpf), "* MP-table mpf");
  587. if (mpf->physptr)
  588. smp_reserve_memory(mpf);
  589. return 1;
  590. }
  591. bp += 4;
  592. length -= 16;
  593. }
  594. return 0;
  595. }
  596. void __init default_find_smp_config(void)
  597. {
  598. unsigned int address;
  599. /*
  600. * FIXME: Linux assumes you have 640K of base ram..
  601. * this continues the error...
  602. *
  603. * 1) Scan the bottom 1K for a signature
  604. * 2) Scan the top 1K of base RAM
  605. * 3) Scan the 64K of bios
  606. */
  607. if (smp_scan_config(0x0, 0x400) ||
  608. smp_scan_config(639 * 0x400, 0x400) ||
  609. smp_scan_config(0xF0000, 0x10000))
  610. return;
  611. /*
  612. * If it is an SMP machine we should know now, unless the
  613. * configuration is in an EISA/MCA bus machine with an
  614. * extended bios data area.
  615. *
  616. * there is a real-mode segmented pointer pointing to the
  617. * 4K EBDA area at 0x40E, calculate and scan it here.
  618. *
  619. * NOTE! There are Linux loaders that will corrupt the EBDA
  620. * area, and as such this kind of SMP config may be less
  621. * trustworthy, simply because the SMP table may have been
  622. * stomped on during early boot. These loaders are buggy and
  623. * should be fixed.
  624. *
  625. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  626. */
  627. address = get_bios_ebda();
  628. if (address)
  629. smp_scan_config(address, 0x400);
  630. }
  631. #ifdef CONFIG_X86_IO_APIC
  632. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  633. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  634. {
  635. int i;
  636. if (m->irqtype != mp_INT)
  637. return 0;
  638. if (m->irqflag != 0x0f)
  639. return 0;
  640. /* not legacy */
  641. for (i = 0; i < mp_irq_entries; i++) {
  642. if (mp_irqs[i].irqtype != mp_INT)
  643. continue;
  644. if (mp_irqs[i].irqflag != 0x0f)
  645. continue;
  646. if (mp_irqs[i].srcbus != m->srcbus)
  647. continue;
  648. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  649. continue;
  650. if (irq_used[i]) {
  651. /* already claimed */
  652. return -2;
  653. }
  654. irq_used[i] = 1;
  655. return i;
  656. }
  657. /* not found */
  658. return -1;
  659. }
  660. #define SPARE_SLOT_NUM 20
  661. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  662. static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
  663. {
  664. int i;
  665. apic_printk(APIC_VERBOSE, "OLD ");
  666. print_MP_intsrc_info(m);
  667. i = get_MP_intsrc_index(m);
  668. if (i > 0) {
  669. assign_to_mpc_intsrc(&mp_irqs[i], m);
  670. apic_printk(APIC_VERBOSE, "NEW ");
  671. print_mp_irq_info(&mp_irqs[i]);
  672. return;
  673. }
  674. if (!i) {
  675. /* legacy, do nothing */
  676. return;
  677. }
  678. if (*nr_m_spare < SPARE_SLOT_NUM) {
  679. /*
  680. * not found (-1), or duplicated (-2) are invalid entries,
  681. * we need to use the slot later
  682. */
  683. m_spare[*nr_m_spare] = m;
  684. *nr_m_spare += 1;
  685. }
  686. }
  687. #else /* CONFIG_X86_IO_APIC */
  688. static
  689. inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
  690. #endif /* CONFIG_X86_IO_APIC */
  691. static int
  692. check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
  693. {
  694. int ret = 0;
  695. if (!mpc_new_phys || count <= mpc_new_length) {
  696. WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
  697. return -1;
  698. }
  699. return ret;
  700. }
  701. static int __init replace_intsrc_all(struct mpc_table *mpc,
  702. unsigned long mpc_new_phys,
  703. unsigned long mpc_new_length)
  704. {
  705. #ifdef CONFIG_X86_IO_APIC
  706. int i;
  707. #endif
  708. int count = sizeof(*mpc);
  709. int nr_m_spare = 0;
  710. unsigned char *mpt = ((unsigned char *)mpc) + count;
  711. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  712. while (count < mpc->length) {
  713. switch (*mpt) {
  714. case MP_PROCESSOR:
  715. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  716. break;
  717. case MP_BUS:
  718. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  719. break;
  720. case MP_IOAPIC:
  721. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  722. break;
  723. case MP_INTSRC:
  724. check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
  725. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  726. break;
  727. case MP_LINTSRC:
  728. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  729. break;
  730. default:
  731. /* wrong mptable */
  732. smp_dump_mptable(mpc, mpt);
  733. goto out;
  734. }
  735. }
  736. #ifdef CONFIG_X86_IO_APIC
  737. for (i = 0; i < mp_irq_entries; i++) {
  738. if (irq_used[i])
  739. continue;
  740. if (mp_irqs[i].irqtype != mp_INT)
  741. continue;
  742. if (mp_irqs[i].irqflag != 0x0f)
  743. continue;
  744. if (nr_m_spare > 0) {
  745. apic_printk(APIC_VERBOSE, "*NEW* found\n");
  746. nr_m_spare--;
  747. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  748. m_spare[nr_m_spare] = NULL;
  749. } else {
  750. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  751. count += sizeof(struct mpc_intsrc);
  752. if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
  753. goto out;
  754. assign_to_mpc_intsrc(&mp_irqs[i], m);
  755. mpc->length = count;
  756. mpt += sizeof(struct mpc_intsrc);
  757. }
  758. print_mp_irq_info(&mp_irqs[i]);
  759. }
  760. #endif
  761. out:
  762. /* update checksum */
  763. mpc->checksum = 0;
  764. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  765. return 0;
  766. }
  767. int enable_update_mptable;
  768. static int __init update_mptable_setup(char *str)
  769. {
  770. enable_update_mptable = 1;
  771. #ifdef CONFIG_PCI
  772. pci_routeirq = 1;
  773. #endif
  774. return 0;
  775. }
  776. early_param("update_mptable", update_mptable_setup);
  777. static unsigned long __initdata mpc_new_phys;
  778. static unsigned long mpc_new_length __initdata = 4096;
  779. /* alloc_mptable or alloc_mptable=4k */
  780. static int __initdata alloc_mptable;
  781. static int __init parse_alloc_mptable_opt(char *p)
  782. {
  783. enable_update_mptable = 1;
  784. #ifdef CONFIG_PCI
  785. pci_routeirq = 1;
  786. #endif
  787. alloc_mptable = 1;
  788. if (!p)
  789. return 0;
  790. mpc_new_length = memparse(p, &p);
  791. return 0;
  792. }
  793. early_param("alloc_mptable", parse_alloc_mptable_opt);
  794. void __init early_reserve_e820_mpc_new(void)
  795. {
  796. if (enable_update_mptable && alloc_mptable) {
  797. u64 startt = 0;
  798. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  799. }
  800. }
  801. static int __init update_mp_table(void)
  802. {
  803. char str[16];
  804. char oem[10];
  805. struct mpf_intel *mpf;
  806. struct mpc_table *mpc, *mpc_new;
  807. if (!enable_update_mptable)
  808. return 0;
  809. mpf = mpf_found;
  810. if (!mpf)
  811. return 0;
  812. /*
  813. * Now see if we need to go further.
  814. */
  815. if (mpf->feature1 != 0)
  816. return 0;
  817. if (!mpf->physptr)
  818. return 0;
  819. mpc = phys_to_virt(mpf->physptr);
  820. if (!smp_check_mpc(mpc, oem, str))
  821. return 0;
  822. printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
  823. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  824. if (mpc_new_phys && mpc->length > mpc_new_length) {
  825. mpc_new_phys = 0;
  826. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  827. mpc_new_length);
  828. }
  829. if (!mpc_new_phys) {
  830. unsigned char old, new;
  831. /* check if we can change the postion */
  832. mpc->checksum = 0;
  833. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  834. mpc->checksum = 0xff;
  835. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  836. if (old == new) {
  837. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  838. return 0;
  839. }
  840. printk(KERN_INFO "use in-positon replacing\n");
  841. } else {
  842. mpf->physptr = mpc_new_phys;
  843. mpc_new = phys_to_virt(mpc_new_phys);
  844. memcpy(mpc_new, mpc, mpc->length);
  845. mpc = mpc_new;
  846. /* check if we can modify that */
  847. if (mpc_new_phys - mpf->physptr) {
  848. struct mpf_intel *mpf_new;
  849. /* steal 16 bytes from [0, 1k) */
  850. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  851. mpf_new = phys_to_virt(0x400 - 16);
  852. memcpy(mpf_new, mpf, 16);
  853. mpf = mpf_new;
  854. mpf->physptr = mpc_new_phys;
  855. }
  856. mpf->checksum = 0;
  857. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  858. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  859. }
  860. /*
  861. * only replace the one with mp_INT and
  862. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  863. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  864. * may need pci=routeirq for all coverage
  865. */
  866. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  867. return 0;
  868. }
  869. late_initcall(update_mp_table);