tpm_tis.c 22 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. *
  4. * Authors:
  5. * Leendert van Doorn <leendert@watson.ibm.com>
  6. * Kylene Hall <kjhall@us.ibm.com>
  7. *
  8. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  9. *
  10. * Device driver for TCG/TCPA TPM (trusted platform module).
  11. * Specifications at www.trustedcomputinggroup.org
  12. *
  13. * This device driver implements the TPM interface as defined in
  14. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation, version 2 of the
  19. * License.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/pnp.h>
  25. #include <linux/slab.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/wait.h>
  28. #include <linux/acpi.h>
  29. #include <linux/freezer.h>
  30. #include "tpm.h"
  31. #define TPM_HEADER_SIZE 10
  32. enum tis_access {
  33. TPM_ACCESS_VALID = 0x80,
  34. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  35. TPM_ACCESS_REQUEST_PENDING = 0x04,
  36. TPM_ACCESS_REQUEST_USE = 0x02,
  37. };
  38. enum tis_status {
  39. TPM_STS_VALID = 0x80,
  40. TPM_STS_COMMAND_READY = 0x40,
  41. TPM_STS_GO = 0x20,
  42. TPM_STS_DATA_AVAIL = 0x10,
  43. TPM_STS_DATA_EXPECT = 0x08,
  44. };
  45. enum tis_int_flags {
  46. TPM_GLOBAL_INT_ENABLE = 0x80000000,
  47. TPM_INTF_BURST_COUNT_STATIC = 0x100,
  48. TPM_INTF_CMD_READY_INT = 0x080,
  49. TPM_INTF_INT_EDGE_FALLING = 0x040,
  50. TPM_INTF_INT_EDGE_RISING = 0x020,
  51. TPM_INTF_INT_LEVEL_LOW = 0x010,
  52. TPM_INTF_INT_LEVEL_HIGH = 0x008,
  53. TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  54. TPM_INTF_STS_VALID_INT = 0x002,
  55. TPM_INTF_DATA_AVAIL_INT = 0x001,
  56. };
  57. enum tis_defaults {
  58. TIS_MEM_BASE = 0xFED40000,
  59. TIS_MEM_LEN = 0x5000,
  60. TIS_SHORT_TIMEOUT = 750, /* ms */
  61. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  62. };
  63. #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
  64. #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
  65. #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
  66. #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
  67. #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
  68. #define TPM_STS(l) (0x0018 | ((l) << 12))
  69. #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
  70. #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
  71. #define TPM_RID(l) (0x0F04 | ((l) << 12))
  72. static LIST_HEAD(tis_chips);
  73. static DEFINE_SPINLOCK(tis_lock);
  74. #if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
  75. static int is_itpm(struct pnp_dev *dev)
  76. {
  77. struct acpi_device *acpi = pnp_acpi_device(dev);
  78. struct acpi_hardware_id *id;
  79. list_for_each_entry(id, &acpi->pnp.ids, list) {
  80. if (!strcmp("INTC0102", id->id))
  81. return 1;
  82. }
  83. return 0;
  84. }
  85. #else
  86. static inline int is_itpm(struct pnp_dev *dev)
  87. {
  88. return 0;
  89. }
  90. #endif
  91. static int check_locality(struct tpm_chip *chip, int l)
  92. {
  93. if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  94. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  95. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  96. return chip->vendor.locality = l;
  97. return -1;
  98. }
  99. static void release_locality(struct tpm_chip *chip, int l, int force)
  100. {
  101. if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  102. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  103. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  104. iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
  105. chip->vendor.iobase + TPM_ACCESS(l));
  106. }
  107. static int request_locality(struct tpm_chip *chip, int l)
  108. {
  109. unsigned long stop, timeout;
  110. long rc;
  111. if (check_locality(chip, l) >= 0)
  112. return l;
  113. iowrite8(TPM_ACCESS_REQUEST_USE,
  114. chip->vendor.iobase + TPM_ACCESS(l));
  115. stop = jiffies + chip->vendor.timeout_a;
  116. if (chip->vendor.irq) {
  117. again:
  118. timeout = stop - jiffies;
  119. if ((long)timeout <= 0)
  120. return -1;
  121. rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
  122. (check_locality
  123. (chip, l) >= 0),
  124. timeout);
  125. if (rc > 0)
  126. return l;
  127. if (rc == -ERESTARTSYS && freezing(current)) {
  128. clear_thread_flag(TIF_SIGPENDING);
  129. goto again;
  130. }
  131. } else {
  132. /* wait for burstcount */
  133. do {
  134. if (check_locality(chip, l) >= 0)
  135. return l;
  136. msleep(TPM_TIMEOUT);
  137. }
  138. while (time_before(jiffies, stop));
  139. }
  140. return -1;
  141. }
  142. static u8 tpm_tis_status(struct tpm_chip *chip)
  143. {
  144. return ioread8(chip->vendor.iobase +
  145. TPM_STS(chip->vendor.locality));
  146. }
  147. static void tpm_tis_ready(struct tpm_chip *chip)
  148. {
  149. /* this causes the current command to be aborted */
  150. iowrite8(TPM_STS_COMMAND_READY,
  151. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  152. }
  153. static int get_burstcount(struct tpm_chip *chip)
  154. {
  155. unsigned long stop;
  156. int burstcnt;
  157. /* wait for burstcount */
  158. /* which timeout value, spec has 2 answers (c & d) */
  159. stop = jiffies + chip->vendor.timeout_d;
  160. do {
  161. burstcnt = ioread8(chip->vendor.iobase +
  162. TPM_STS(chip->vendor.locality) + 1);
  163. burstcnt += ioread8(chip->vendor.iobase +
  164. TPM_STS(chip->vendor.locality) +
  165. 2) << 8;
  166. if (burstcnt)
  167. return burstcnt;
  168. msleep(TPM_TIMEOUT);
  169. } while (time_before(jiffies, stop));
  170. return -EBUSY;
  171. }
  172. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  173. {
  174. int size = 0, burstcnt;
  175. while (size < count &&
  176. wait_for_tpm_stat(chip,
  177. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  178. chip->vendor.timeout_c,
  179. &chip->vendor.read_queue)
  180. == 0) {
  181. burstcnt = get_burstcount(chip);
  182. for (; burstcnt > 0 && size < count; burstcnt--)
  183. buf[size++] = ioread8(chip->vendor.iobase +
  184. TPM_DATA_FIFO(chip->vendor.
  185. locality));
  186. }
  187. return size;
  188. }
  189. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  190. {
  191. int size = 0;
  192. int expected, status;
  193. if (count < TPM_HEADER_SIZE) {
  194. size = -EIO;
  195. goto out;
  196. }
  197. /* read first 10 bytes, including tag, paramsize, and result */
  198. if ((size =
  199. recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
  200. dev_err(chip->dev, "Unable to read header\n");
  201. goto out;
  202. }
  203. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  204. if (expected > count) {
  205. size = -EIO;
  206. goto out;
  207. }
  208. if ((size +=
  209. recv_data(chip, &buf[TPM_HEADER_SIZE],
  210. expected - TPM_HEADER_SIZE)) < expected) {
  211. dev_err(chip->dev, "Unable to read remainder of result\n");
  212. size = -ETIME;
  213. goto out;
  214. }
  215. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  216. &chip->vendor.int_queue);
  217. status = tpm_tis_status(chip);
  218. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  219. dev_err(chip->dev, "Error left over data\n");
  220. size = -EIO;
  221. goto out;
  222. }
  223. out:
  224. tpm_tis_ready(chip);
  225. release_locality(chip, chip->vendor.locality, 0);
  226. return size;
  227. }
  228. static int itpm;
  229. module_param(itpm, bool, 0444);
  230. MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
  231. /*
  232. * If interrupts are used (signaled by an irq set in the vendor structure)
  233. * tpm.c can skip polling for the data to be available as the interrupt is
  234. * waited for here
  235. */
  236. static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
  237. {
  238. int rc, status, burstcnt;
  239. size_t count = 0;
  240. if (request_locality(chip, 0) < 0)
  241. return -EBUSY;
  242. status = tpm_tis_status(chip);
  243. if ((status & TPM_STS_COMMAND_READY) == 0) {
  244. tpm_tis_ready(chip);
  245. if (wait_for_tpm_stat
  246. (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
  247. &chip->vendor.int_queue) < 0) {
  248. rc = -ETIME;
  249. goto out_err;
  250. }
  251. }
  252. while (count < len - 1) {
  253. burstcnt = get_burstcount(chip);
  254. for (; burstcnt > 0 && count < len - 1; burstcnt--) {
  255. iowrite8(buf[count], chip->vendor.iobase +
  256. TPM_DATA_FIFO(chip->vendor.locality));
  257. count++;
  258. }
  259. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  260. &chip->vendor.int_queue);
  261. status = tpm_tis_status(chip);
  262. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  263. rc = -EIO;
  264. goto out_err;
  265. }
  266. }
  267. /* write last byte */
  268. iowrite8(buf[count],
  269. chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
  270. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  271. &chip->vendor.int_queue);
  272. status = tpm_tis_status(chip);
  273. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  274. rc = -EIO;
  275. goto out_err;
  276. }
  277. return 0;
  278. out_err:
  279. tpm_tis_ready(chip);
  280. release_locality(chip, chip->vendor.locality, 0);
  281. return rc;
  282. }
  283. /*
  284. * If interrupts are used (signaled by an irq set in the vendor structure)
  285. * tpm.c can skip polling for the data to be available as the interrupt is
  286. * waited for here
  287. */
  288. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  289. {
  290. int rc;
  291. u32 ordinal;
  292. rc = tpm_tis_send_data(chip, buf, len);
  293. if (rc < 0)
  294. return rc;
  295. /* go and do it */
  296. iowrite8(TPM_STS_GO,
  297. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  298. if (chip->vendor.irq) {
  299. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  300. if (wait_for_tpm_stat
  301. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  302. tpm_calc_ordinal_duration(chip, ordinal),
  303. &chip->vendor.read_queue) < 0) {
  304. rc = -ETIME;
  305. goto out_err;
  306. }
  307. }
  308. return len;
  309. out_err:
  310. tpm_tis_ready(chip);
  311. release_locality(chip, chip->vendor.locality, 0);
  312. return rc;
  313. }
  314. /*
  315. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  316. * Try sending command without itpm flag set and if that
  317. * fails, repeat with itpm flag set.
  318. */
  319. static int probe_itpm(struct tpm_chip *chip)
  320. {
  321. int rc = 0;
  322. u8 cmd_getticks[] = {
  323. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  324. 0x00, 0x00, 0x00, 0xf1
  325. };
  326. size_t len = sizeof(cmd_getticks);
  327. int rem_itpm = itpm;
  328. itpm = 0;
  329. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  330. if (rc == 0)
  331. goto out;
  332. tpm_tis_ready(chip);
  333. release_locality(chip, chip->vendor.locality, 0);
  334. itpm = 1;
  335. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  336. if (rc == 0) {
  337. dev_info(chip->dev, "Detected an iTPM.\n");
  338. rc = 1;
  339. } else
  340. rc = -EFAULT;
  341. out:
  342. itpm = rem_itpm;
  343. tpm_tis_ready(chip);
  344. /* some TPMs need a break here otherwise they will not work
  345. * correctly on the immediately subsequent command */
  346. msleep(chip->vendor.timeout_b);
  347. release_locality(chip, chip->vendor.locality, 0);
  348. return rc;
  349. }
  350. static const struct file_operations tis_ops = {
  351. .owner = THIS_MODULE,
  352. .llseek = no_llseek,
  353. .open = tpm_open,
  354. .read = tpm_read,
  355. .write = tpm_write,
  356. .release = tpm_release,
  357. };
  358. static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
  359. static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
  360. static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
  361. static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
  362. static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
  363. static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
  364. NULL);
  365. static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
  366. static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
  367. static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
  368. static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
  369. static struct attribute *tis_attrs[] = {
  370. &dev_attr_pubek.attr,
  371. &dev_attr_pcrs.attr,
  372. &dev_attr_enabled.attr,
  373. &dev_attr_active.attr,
  374. &dev_attr_owned.attr,
  375. &dev_attr_temp_deactivated.attr,
  376. &dev_attr_caps.attr,
  377. &dev_attr_cancel.attr,
  378. &dev_attr_durations.attr,
  379. &dev_attr_timeouts.attr, NULL,
  380. };
  381. static struct attribute_group tis_attr_grp = {
  382. .attrs = tis_attrs
  383. };
  384. static struct tpm_vendor_specific tpm_tis = {
  385. .status = tpm_tis_status,
  386. .recv = tpm_tis_recv,
  387. .send = tpm_tis_send,
  388. .cancel = tpm_tis_ready,
  389. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  390. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  391. .req_canceled = TPM_STS_COMMAND_READY,
  392. .attr_group = &tis_attr_grp,
  393. .miscdev = {
  394. .fops = &tis_ops,},
  395. };
  396. static irqreturn_t tis_int_probe(int irq, void *dev_id)
  397. {
  398. struct tpm_chip *chip = dev_id;
  399. u32 interrupt;
  400. interrupt = ioread32(chip->vendor.iobase +
  401. TPM_INT_STATUS(chip->vendor.locality));
  402. if (interrupt == 0)
  403. return IRQ_NONE;
  404. chip->vendor.probed_irq = irq;
  405. /* Clear interrupts handled with TPM_EOI */
  406. iowrite32(interrupt,
  407. chip->vendor.iobase +
  408. TPM_INT_STATUS(chip->vendor.locality));
  409. return IRQ_HANDLED;
  410. }
  411. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  412. {
  413. struct tpm_chip *chip = dev_id;
  414. u32 interrupt;
  415. int i;
  416. interrupt = ioread32(chip->vendor.iobase +
  417. TPM_INT_STATUS(chip->vendor.locality));
  418. if (interrupt == 0)
  419. return IRQ_NONE;
  420. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  421. wake_up_interruptible(&chip->vendor.read_queue);
  422. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  423. for (i = 0; i < 5; i++)
  424. if (check_locality(chip, i) >= 0)
  425. break;
  426. if (interrupt &
  427. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  428. TPM_INTF_CMD_READY_INT))
  429. wake_up_interruptible(&chip->vendor.int_queue);
  430. /* Clear interrupts handled with TPM_EOI */
  431. iowrite32(interrupt,
  432. chip->vendor.iobase +
  433. TPM_INT_STATUS(chip->vendor.locality));
  434. ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
  435. return IRQ_HANDLED;
  436. }
  437. static int interrupts = 1;
  438. module_param(interrupts, bool, 0444);
  439. MODULE_PARM_DESC(interrupts, "Enable interrupts");
  440. static int tpm_tis_init(struct device *dev, resource_size_t start,
  441. resource_size_t len, unsigned int irq)
  442. {
  443. u32 vendor, intfcaps, intmask;
  444. int rc, i, irq_s, irq_e;
  445. struct tpm_chip *chip;
  446. if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
  447. return -ENODEV;
  448. chip->vendor.iobase = ioremap(start, len);
  449. if (!chip->vendor.iobase) {
  450. rc = -EIO;
  451. goto out_err;
  452. }
  453. /* Default timeouts */
  454. chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  455. chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
  456. chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  457. chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  458. if (request_locality(chip, 0) != 0) {
  459. rc = -ENODEV;
  460. goto out_err;
  461. }
  462. vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
  463. dev_info(dev,
  464. "1.2 TPM (device-id 0x%X, rev-id %d)\n",
  465. vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
  466. if (!itpm) {
  467. itpm = probe_itpm(chip);
  468. if (itpm < 0) {
  469. rc = -ENODEV;
  470. goto out_err;
  471. }
  472. }
  473. if (itpm)
  474. dev_info(dev, "Intel iTPM workaround enabled\n");
  475. /* Figure out the capabilities */
  476. intfcaps =
  477. ioread32(chip->vendor.iobase +
  478. TPM_INTF_CAPS(chip->vendor.locality));
  479. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  480. intfcaps);
  481. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  482. dev_dbg(dev, "\tBurst Count Static\n");
  483. if (intfcaps & TPM_INTF_CMD_READY_INT)
  484. dev_dbg(dev, "\tCommand Ready Int Support\n");
  485. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  486. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  487. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  488. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  489. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  490. dev_dbg(dev, "\tInterrupt Level Low\n");
  491. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  492. dev_dbg(dev, "\tInterrupt Level High\n");
  493. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  494. dev_dbg(dev, "\tLocality Change Int Support\n");
  495. if (intfcaps & TPM_INTF_STS_VALID_INT)
  496. dev_dbg(dev, "\tSts Valid Int Support\n");
  497. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  498. dev_dbg(dev, "\tData Avail Int Support\n");
  499. /* get the timeouts before testing for irqs */
  500. if (tpm_get_timeouts(chip)) {
  501. dev_err(dev, "Could not get TPM timeouts and durations\n");
  502. rc = -ENODEV;
  503. goto out_err;
  504. }
  505. if (tpm_do_selftest(chip)) {
  506. dev_err(dev, "TPM self test failed\n");
  507. rc = -ENODEV;
  508. goto out_err;
  509. }
  510. /* INTERRUPT Setup */
  511. init_waitqueue_head(&chip->vendor.read_queue);
  512. init_waitqueue_head(&chip->vendor.int_queue);
  513. intmask =
  514. ioread32(chip->vendor.iobase +
  515. TPM_INT_ENABLE(chip->vendor.locality));
  516. intmask |= TPM_INTF_CMD_READY_INT
  517. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  518. | TPM_INTF_STS_VALID_INT;
  519. iowrite32(intmask,
  520. chip->vendor.iobase +
  521. TPM_INT_ENABLE(chip->vendor.locality));
  522. if (interrupts)
  523. chip->vendor.irq = irq;
  524. if (interrupts && !chip->vendor.irq) {
  525. irq_s =
  526. ioread8(chip->vendor.iobase +
  527. TPM_INT_VECTOR(chip->vendor.locality));
  528. if (irq_s) {
  529. irq_e = irq_s;
  530. } else {
  531. irq_s = 3;
  532. irq_e = 15;
  533. }
  534. for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) {
  535. iowrite8(i, chip->vendor.iobase +
  536. TPM_INT_VECTOR(chip->vendor.locality));
  537. if (request_irq
  538. (i, tis_int_probe, IRQF_SHARED,
  539. chip->vendor.miscdev.name, chip) != 0) {
  540. dev_info(chip->dev,
  541. "Unable to request irq: %d for probe\n",
  542. i);
  543. continue;
  544. }
  545. /* Clear all existing */
  546. iowrite32(ioread32
  547. (chip->vendor.iobase +
  548. TPM_INT_STATUS(chip->vendor.locality)),
  549. chip->vendor.iobase +
  550. TPM_INT_STATUS(chip->vendor.locality));
  551. /* Turn on */
  552. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  553. chip->vendor.iobase +
  554. TPM_INT_ENABLE(chip->vendor.locality));
  555. chip->vendor.probed_irq = 0;
  556. /* Generate Interrupts */
  557. tpm_gen_interrupt(chip);
  558. chip->vendor.irq = chip->vendor.probed_irq;
  559. /* free_irq will call into tis_int_probe;
  560. clear all irqs we haven't seen while doing
  561. tpm_gen_interrupt */
  562. iowrite32(ioread32
  563. (chip->vendor.iobase +
  564. TPM_INT_STATUS(chip->vendor.locality)),
  565. chip->vendor.iobase +
  566. TPM_INT_STATUS(chip->vendor.locality));
  567. /* Turn off */
  568. iowrite32(intmask,
  569. chip->vendor.iobase +
  570. TPM_INT_ENABLE(chip->vendor.locality));
  571. free_irq(i, chip);
  572. }
  573. }
  574. if (chip->vendor.irq) {
  575. iowrite8(chip->vendor.irq,
  576. chip->vendor.iobase +
  577. TPM_INT_VECTOR(chip->vendor.locality));
  578. if (request_irq
  579. (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
  580. chip->vendor.miscdev.name, chip) != 0) {
  581. dev_info(chip->dev,
  582. "Unable to request irq: %d for use\n",
  583. chip->vendor.irq);
  584. chip->vendor.irq = 0;
  585. } else {
  586. /* Clear all existing */
  587. iowrite32(ioread32
  588. (chip->vendor.iobase +
  589. TPM_INT_STATUS(chip->vendor.locality)),
  590. chip->vendor.iobase +
  591. TPM_INT_STATUS(chip->vendor.locality));
  592. /* Turn on */
  593. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  594. chip->vendor.iobase +
  595. TPM_INT_ENABLE(chip->vendor.locality));
  596. }
  597. }
  598. INIT_LIST_HEAD(&chip->vendor.list);
  599. spin_lock(&tis_lock);
  600. list_add(&chip->vendor.list, &tis_chips);
  601. spin_unlock(&tis_lock);
  602. return 0;
  603. out_err:
  604. if (chip->vendor.iobase)
  605. iounmap(chip->vendor.iobase);
  606. tpm_remove_hardware(chip->dev);
  607. return rc;
  608. }
  609. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  610. {
  611. u32 intmask;
  612. /* reenable interrupts that device may have lost or
  613. BIOS/firmware may have disabled */
  614. iowrite8(chip->vendor.irq, chip->vendor.iobase +
  615. TPM_INT_VECTOR(chip->vendor.locality));
  616. intmask =
  617. ioread32(chip->vendor.iobase +
  618. TPM_INT_ENABLE(chip->vendor.locality));
  619. intmask |= TPM_INTF_CMD_READY_INT
  620. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  621. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  622. iowrite32(intmask,
  623. chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
  624. }
  625. #ifdef CONFIG_PNP
  626. static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
  627. const struct pnp_device_id *pnp_id)
  628. {
  629. resource_size_t start, len;
  630. unsigned int irq = 0;
  631. start = pnp_mem_start(pnp_dev, 0);
  632. len = pnp_mem_len(pnp_dev, 0);
  633. if (pnp_irq_valid(pnp_dev, 0))
  634. irq = pnp_irq(pnp_dev, 0);
  635. else
  636. interrupts = 0;
  637. if (is_itpm(pnp_dev))
  638. itpm = 1;
  639. return tpm_tis_init(&pnp_dev->dev, start, len, irq);
  640. }
  641. static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
  642. {
  643. return tpm_pm_suspend(&dev->dev, msg);
  644. }
  645. static int tpm_tis_pnp_resume(struct pnp_dev *dev)
  646. {
  647. struct tpm_chip *chip = pnp_get_drvdata(dev);
  648. int ret;
  649. if (chip->vendor.irq)
  650. tpm_tis_reenable_interrupts(chip);
  651. ret = tpm_pm_resume(&dev->dev);
  652. if (!ret)
  653. tpm_do_selftest(chip);
  654. return ret;
  655. }
  656. static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
  657. {"PNP0C31", 0}, /* TPM */
  658. {"ATM1200", 0}, /* Atmel */
  659. {"IFX0102", 0}, /* Infineon */
  660. {"BCM0101", 0}, /* Broadcom */
  661. {"BCM0102", 0}, /* Broadcom */
  662. {"NSC1200", 0}, /* National */
  663. {"ICO0102", 0}, /* Intel */
  664. /* Add new here */
  665. {"", 0}, /* User Specified */
  666. {"", 0} /* Terminator */
  667. };
  668. MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
  669. static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
  670. {
  671. struct tpm_chip *chip = pnp_get_drvdata(dev);
  672. tpm_dev_vendor_release(chip);
  673. kfree(chip);
  674. }
  675. static struct pnp_driver tis_pnp_driver = {
  676. .name = "tpm_tis",
  677. .id_table = tpm_pnp_tbl,
  678. .probe = tpm_tis_pnp_init,
  679. .suspend = tpm_tis_pnp_suspend,
  680. .resume = tpm_tis_pnp_resume,
  681. .remove = tpm_tis_pnp_remove,
  682. };
  683. #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
  684. module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
  685. sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
  686. MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
  687. #endif
  688. static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
  689. {
  690. return tpm_pm_suspend(&dev->dev, msg);
  691. }
  692. static int tpm_tis_resume(struct platform_device *dev)
  693. {
  694. struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
  695. if (chip->vendor.irq)
  696. tpm_tis_reenable_interrupts(chip);
  697. return tpm_pm_resume(&dev->dev);
  698. }
  699. static struct platform_driver tis_drv = {
  700. .driver = {
  701. .name = "tpm_tis",
  702. .owner = THIS_MODULE,
  703. },
  704. .suspend = tpm_tis_suspend,
  705. .resume = tpm_tis_resume,
  706. };
  707. static struct platform_device *pdev;
  708. static int force;
  709. module_param(force, bool, 0444);
  710. MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
  711. static int __init init_tis(void)
  712. {
  713. int rc;
  714. #ifdef CONFIG_PNP
  715. if (!force)
  716. return pnp_register_driver(&tis_pnp_driver);
  717. #endif
  718. rc = platform_driver_register(&tis_drv);
  719. if (rc < 0)
  720. return rc;
  721. if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
  722. return PTR_ERR(pdev);
  723. if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
  724. platform_device_unregister(pdev);
  725. platform_driver_unregister(&tis_drv);
  726. }
  727. return rc;
  728. }
  729. static void __exit cleanup_tis(void)
  730. {
  731. struct tpm_vendor_specific *i, *j;
  732. struct tpm_chip *chip;
  733. spin_lock(&tis_lock);
  734. list_for_each_entry_safe(i, j, &tis_chips, list) {
  735. chip = to_tpm_chip(i);
  736. tpm_remove_hardware(chip->dev);
  737. iowrite32(~TPM_GLOBAL_INT_ENABLE &
  738. ioread32(chip->vendor.iobase +
  739. TPM_INT_ENABLE(chip->vendor.
  740. locality)),
  741. chip->vendor.iobase +
  742. TPM_INT_ENABLE(chip->vendor.locality));
  743. release_locality(chip, chip->vendor.locality, 1);
  744. if (chip->vendor.irq)
  745. free_irq(chip->vendor.irq, chip);
  746. iounmap(i->iobase);
  747. list_del(&i->list);
  748. }
  749. spin_unlock(&tis_lock);
  750. #ifdef CONFIG_PNP
  751. if (!force) {
  752. pnp_unregister_driver(&tis_pnp_driver);
  753. return;
  754. }
  755. #endif
  756. platform_device_unregister(pdev);
  757. platform_driver_unregister(&tis_drv);
  758. }
  759. module_init(init_tis);
  760. module_exit(cleanup_tis);
  761. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  762. MODULE_DESCRIPTION("TPM Driver");
  763. MODULE_VERSION("2.0");
  764. MODULE_LICENSE("GPL");