pasemi_mac.c 32 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_RING(mac, num) ((mac)->tx->ring[(num) & (TX_RING_SIZE-1)])
  57. #define TX_RING_INFO(mac, num) ((mac)->tx->ring_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_RING(mac, num) ((mac)->rx->ring[(num) & (RX_RING_SIZE-1)])
  59. #define RX_RING_INFO(mac, num) ((mac)->rx->ring_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
  62. & ((ring)->size - 1))
  63. #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
  64. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  65. MODULE_LICENSE("GPL");
  66. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  67. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  68. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  69. module_param(debug, int, 0);
  70. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  71. static struct pasdma_status *dma_status;
  72. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  73. unsigned int val)
  74. {
  75. out_le32(mac->iob_regs+reg, val);
  76. }
  77. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  78. {
  79. return in_le32(mac->regs+reg);
  80. }
  81. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  82. unsigned int val)
  83. {
  84. out_le32(mac->regs+reg, val);
  85. }
  86. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  87. {
  88. return in_le32(mac->dma_regs+reg);
  89. }
  90. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  91. unsigned int val)
  92. {
  93. out_le32(mac->dma_regs+reg, val);
  94. }
  95. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  96. {
  97. struct pci_dev *pdev = mac->pdev;
  98. struct device_node *dn = pci_device_to_OF_node(pdev);
  99. int len;
  100. const u8 *maddr;
  101. u8 addr[6];
  102. if (!dn) {
  103. dev_dbg(&pdev->dev,
  104. "No device node for mac, not configuring\n");
  105. return -ENOENT;
  106. }
  107. maddr = of_get_property(dn, "local-mac-address", &len);
  108. if (maddr && len == 6) {
  109. memcpy(mac->mac_addr, maddr, 6);
  110. return 0;
  111. }
  112. /* Some old versions of firmware mistakenly uses mac-address
  113. * (and as a string) instead of a byte array in local-mac-address.
  114. */
  115. if (maddr == NULL)
  116. maddr = of_get_property(dn, "mac-address", NULL);
  117. if (maddr == NULL) {
  118. dev_warn(&pdev->dev,
  119. "no mac address in device tree, not configuring\n");
  120. return -ENOENT;
  121. }
  122. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  123. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  124. dev_warn(&pdev->dev,
  125. "can't parse mac address, not configuring\n");
  126. return -EINVAL;
  127. }
  128. memcpy(mac->mac_addr, addr, 6);
  129. return 0;
  130. }
  131. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  132. {
  133. struct pasemi_mac_rxring *ring;
  134. struct pasemi_mac *mac = netdev_priv(dev);
  135. int chan_id = mac->dma_rxch;
  136. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  137. if (!ring)
  138. goto out_ring;
  139. spin_lock_init(&ring->lock);
  140. ring->size = RX_RING_SIZE;
  141. ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  142. RX_RING_SIZE, GFP_KERNEL);
  143. if (!ring->ring_info)
  144. goto out_ring_info;
  145. /* Allocate descriptors */
  146. ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
  147. RX_RING_SIZE * sizeof(u64),
  148. &ring->dma, GFP_KERNEL);
  149. if (!ring->ring)
  150. goto out_ring_desc;
  151. memset(ring->ring, 0, RX_RING_SIZE * sizeof(u64));
  152. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  153. RX_RING_SIZE * sizeof(u64),
  154. &ring->buf_dma, GFP_KERNEL);
  155. if (!ring->buffers)
  156. goto out_buffers;
  157. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  158. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  159. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  160. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  161. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
  162. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  163. PAS_DMA_RXCHAN_CFG_HBU(2));
  164. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  165. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  166. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  167. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  168. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  169. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  170. PAS_DMA_RXINT_CFG_DHL(2));
  171. ring->next_to_fill = 0;
  172. ring->next_to_clean = 0;
  173. snprintf(ring->irq_name, sizeof(ring->irq_name),
  174. "%s rx", dev->name);
  175. mac->rx = ring;
  176. return 0;
  177. out_buffers:
  178. dma_free_coherent(&mac->dma_pdev->dev,
  179. RX_RING_SIZE * sizeof(u64),
  180. mac->rx->ring, mac->rx->dma);
  181. out_ring_desc:
  182. kfree(ring->ring_info);
  183. out_ring_info:
  184. kfree(ring);
  185. out_ring:
  186. return -ENOMEM;
  187. }
  188. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  189. {
  190. struct pasemi_mac *mac = netdev_priv(dev);
  191. u32 val;
  192. int chan_id = mac->dma_txch;
  193. struct pasemi_mac_txring *ring;
  194. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  195. if (!ring)
  196. goto out_ring;
  197. spin_lock_init(&ring->lock);
  198. ring->size = TX_RING_SIZE;
  199. ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  200. TX_RING_SIZE, GFP_KERNEL);
  201. if (!ring->ring_info)
  202. goto out_ring_info;
  203. /* Allocate descriptors */
  204. ring->ring = dma_alloc_coherent(&mac->dma_pdev->dev,
  205. TX_RING_SIZE * sizeof(u64),
  206. &ring->dma, GFP_KERNEL);
  207. if (!ring->ring)
  208. goto out_ring_desc;
  209. memset(ring->ring, 0, TX_RING_SIZE * sizeof(u64));
  210. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  211. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  212. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  213. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
  214. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  215. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  216. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  217. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  218. PAS_DMA_TXCHAN_CFG_UP |
  219. PAS_DMA_TXCHAN_CFG_WT(2));
  220. ring->next_to_fill = 0;
  221. ring->next_to_clean = 0;
  222. snprintf(ring->irq_name, sizeof(ring->irq_name),
  223. "%s tx", dev->name);
  224. mac->tx = ring;
  225. return 0;
  226. out_ring_desc:
  227. kfree(ring->ring_info);
  228. out_ring_info:
  229. kfree(ring);
  230. out_ring:
  231. return -ENOMEM;
  232. }
  233. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  234. {
  235. struct pasemi_mac *mac = netdev_priv(dev);
  236. unsigned int i;
  237. struct pasemi_mac_buffer *info;
  238. for (i = 0; i < TX_RING_SIZE; i += 2) {
  239. info = &TX_RING_INFO(mac, i+1);
  240. if (info->dma && info->skb) {
  241. pci_unmap_single(mac->dma_pdev,
  242. info->dma,
  243. info->skb->len,
  244. PCI_DMA_TODEVICE);
  245. dev_kfree_skb_any(info->skb);
  246. }
  247. TX_RING(mac, i) = 0;
  248. TX_RING(mac, i+1) = 0;
  249. info->dma = 0;
  250. info->skb = NULL;
  251. }
  252. dma_free_coherent(&mac->dma_pdev->dev,
  253. TX_RING_SIZE * sizeof(u64),
  254. mac->tx->ring, mac->tx->dma);
  255. kfree(mac->tx->ring_info);
  256. kfree(mac->tx);
  257. mac->tx = NULL;
  258. }
  259. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  260. {
  261. struct pasemi_mac *mac = netdev_priv(dev);
  262. unsigned int i;
  263. struct pasemi_mac_buffer *info;
  264. for (i = 0; i < RX_RING_SIZE; i++) {
  265. info = &RX_RING_INFO(mac, i);
  266. if (info->skb && info->dma) {
  267. pci_unmap_single(mac->dma_pdev,
  268. info->dma,
  269. info->skb->len,
  270. PCI_DMA_FROMDEVICE);
  271. dev_kfree_skb_any(info->skb);
  272. }
  273. info->dma = 0;
  274. info->skb = NULL;
  275. }
  276. for (i = 0; i < RX_RING_SIZE; i++)
  277. RX_RING(mac, i) = 0;
  278. dma_free_coherent(&mac->dma_pdev->dev,
  279. RX_RING_SIZE * sizeof(u64),
  280. mac->rx->ring, mac->rx->dma);
  281. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  282. mac->rx->buffers, mac->rx->buf_dma);
  283. kfree(mac->rx->ring_info);
  284. kfree(mac->rx);
  285. mac->rx = NULL;
  286. }
  287. static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
  288. {
  289. struct pasemi_mac *mac = netdev_priv(dev);
  290. int start = mac->rx->next_to_fill;
  291. unsigned int fill, count;
  292. if (limit <= 0)
  293. return;
  294. fill = start;
  295. for (count = 0; count < limit; count++) {
  296. struct pasemi_mac_buffer *info = &RX_RING_INFO(mac, fill);
  297. u64 *buff = &RX_BUFF(mac, fill);
  298. struct sk_buff *skb;
  299. dma_addr_t dma;
  300. /* Entry in use? */
  301. WARN_ON(*buff);
  302. /* skb might still be in there for recycle on short receives */
  303. if (info->skb)
  304. skb = info->skb;
  305. else
  306. skb = dev_alloc_skb(BUF_SIZE);
  307. if (unlikely(!skb))
  308. break;
  309. dma = pci_map_single(mac->dma_pdev, skb->data, BUF_SIZE,
  310. PCI_DMA_FROMDEVICE);
  311. if (unlikely(dma_mapping_error(dma))) {
  312. dev_kfree_skb_irq(info->skb);
  313. break;
  314. }
  315. info->skb = skb;
  316. info->dma = dma;
  317. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  318. fill++;
  319. }
  320. wmb();
  321. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count);
  322. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
  323. mac->rx->next_to_fill += count;
  324. }
  325. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  326. {
  327. unsigned int reg, pcnt;
  328. /* Re-enable packet count interrupts: finally
  329. * ack the packet count interrupt we got in rx_intr.
  330. */
  331. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  332. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  333. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  334. }
  335. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  336. {
  337. unsigned int reg, pcnt;
  338. /* Re-enable packet count interrupts */
  339. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  340. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  341. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  342. }
  343. static inline void pasemi_mac_rx_error(struct pasemi_mac *mac, u64 macrx)
  344. {
  345. unsigned int rcmdsta, ccmdsta;
  346. if (!netif_msg_rx_err(mac))
  347. return;
  348. rcmdsta = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  349. ccmdsta = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  350. printk(KERN_ERR "pasemi_mac: rx error. macrx %016lx, rx status %lx\n",
  351. macrx, *mac->rx_status);
  352. printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
  353. rcmdsta, ccmdsta);
  354. }
  355. static inline void pasemi_mac_tx_error(struct pasemi_mac *mac, u64 mactx)
  356. {
  357. unsigned int cmdsta;
  358. if (!netif_msg_tx_err(mac))
  359. return;
  360. cmdsta = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  361. printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016lx, "\
  362. "tx status 0x%016lx\n", mactx, *mac->tx_status);
  363. printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
  364. }
  365. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  366. {
  367. unsigned int n;
  368. int count;
  369. struct pasemi_mac_buffer *info;
  370. struct sk_buff *skb;
  371. unsigned int i, len;
  372. u64 macrx;
  373. dma_addr_t dma;
  374. spin_lock(&mac->rx->lock);
  375. n = mac->rx->next_to_clean;
  376. for (count = limit; count; count--) {
  377. rmb();
  378. macrx = RX_RING(mac, n);
  379. if ((macrx & XCT_MACRX_E) ||
  380. (*mac->rx_status & PAS_STATUS_ERROR))
  381. pasemi_mac_rx_error(mac, macrx);
  382. if (!(macrx & XCT_MACRX_O))
  383. break;
  384. info = NULL;
  385. /* We have to scan for our skb since there's no way
  386. * to back-map them from the descriptor, and if we
  387. * have several receive channels then they might not
  388. * show up in the same order as they were put on the
  389. * interface ring.
  390. */
  391. dma = (RX_RING(mac, n+1) & XCT_PTR_ADDR_M);
  392. for (i = mac->rx->next_to_fill;
  393. i < (mac->rx->next_to_fill + RX_RING_SIZE);
  394. i++) {
  395. info = &RX_RING_INFO(mac, i);
  396. if (info->dma == dma)
  397. break;
  398. }
  399. prefetchw(info);
  400. skb = info->skb;
  401. prefetchw(skb);
  402. info->dma = 0;
  403. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  404. PCI_DMA_FROMDEVICE);
  405. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  406. if (len < 256) {
  407. struct sk_buff *new_skb =
  408. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  409. if (new_skb) {
  410. skb_reserve(new_skb, NET_IP_ALIGN);
  411. memcpy(new_skb->data, skb->data, len);
  412. /* save the skb in buffer_info as good */
  413. skb = new_skb;
  414. }
  415. /* else just continue with the old one */
  416. } else
  417. info->skb = NULL;
  418. /* Need to zero it out since hardware doesn't, since the
  419. * replenish loop uses it to tell when it's done.
  420. */
  421. RX_BUFF(mac, i) = 0;
  422. skb_put(skb, len);
  423. if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
  424. skb->ip_summed = CHECKSUM_UNNECESSARY;
  425. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  426. XCT_MACRX_CSUM_S;
  427. } else
  428. skb->ip_summed = CHECKSUM_NONE;
  429. mac->netdev->stats.rx_bytes += len;
  430. mac->netdev->stats.rx_packets++;
  431. skb->protocol = eth_type_trans(skb, mac->netdev);
  432. netif_receive_skb(skb);
  433. RX_RING(mac, n) = 0;
  434. RX_RING(mac, n+1) = 0;
  435. n += 2;
  436. }
  437. mac->rx->next_to_clean = n;
  438. pasemi_mac_replenish_rx_ring(mac->netdev, limit-count);
  439. spin_unlock(&mac->rx->lock);
  440. return count;
  441. }
  442. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  443. {
  444. int i;
  445. struct pasemi_mac_buffer *info;
  446. unsigned int start, count, limit;
  447. unsigned int total_count;
  448. unsigned long flags;
  449. struct sk_buff *skbs[32];
  450. dma_addr_t dmas[32];
  451. total_count = 0;
  452. restart:
  453. spin_lock_irqsave(&mac->tx->lock, flags);
  454. start = mac->tx->next_to_clean;
  455. limit = min(mac->tx->next_to_fill, start+32);
  456. count = 0;
  457. for (i = start; i < limit; i += 2) {
  458. u64 mactx = TX_RING(mac, i);
  459. if ((mactx & XCT_MACTX_E) ||
  460. (*mac->tx_status & PAS_STATUS_ERROR))
  461. pasemi_mac_tx_error(mac, mactx);
  462. if (unlikely(mactx & XCT_MACTX_O))
  463. /* Not yet transmitted */
  464. break;
  465. info = &TX_RING_INFO(mac, i+1);
  466. skbs[count] = info->skb;
  467. dmas[count] = info->dma;
  468. info->dma = 0;
  469. TX_RING(mac, i) = 0;
  470. TX_RING(mac, i+1) = 0;
  471. count++;
  472. }
  473. mac->tx->next_to_clean += count * 2;
  474. spin_unlock_irqrestore(&mac->tx->lock, flags);
  475. netif_wake_queue(mac->netdev);
  476. for (i = 0; i < count; i++) {
  477. pci_unmap_single(mac->dma_pdev, dmas[i],
  478. skbs[i]->len, PCI_DMA_TODEVICE);
  479. dev_kfree_skb_irq(skbs[i]);
  480. }
  481. total_count += count;
  482. /* If the batch was full, try to clean more */
  483. if (count == 32)
  484. goto restart;
  485. return total_count;
  486. }
  487. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  488. {
  489. struct net_device *dev = data;
  490. struct pasemi_mac *mac = netdev_priv(dev);
  491. unsigned int reg;
  492. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  493. return IRQ_NONE;
  494. /* Don't reset packet count so it won't fire again but clear
  495. * all others.
  496. */
  497. reg = 0;
  498. if (*mac->rx_status & PAS_STATUS_SOFT)
  499. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  500. if (*mac->rx_status & PAS_STATUS_ERROR)
  501. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  502. if (*mac->rx_status & PAS_STATUS_TIMER)
  503. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  504. netif_rx_schedule(dev, &mac->napi);
  505. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  506. return IRQ_HANDLED;
  507. }
  508. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  509. {
  510. struct net_device *dev = data;
  511. struct pasemi_mac *mac = netdev_priv(dev);
  512. unsigned int reg, pcnt;
  513. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  514. return IRQ_NONE;
  515. pasemi_mac_clean_tx(mac);
  516. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  517. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  518. if (*mac->tx_status & PAS_STATUS_SOFT)
  519. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  520. if (*mac->tx_status & PAS_STATUS_ERROR)
  521. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  522. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  523. return IRQ_HANDLED;
  524. }
  525. static void pasemi_adjust_link(struct net_device *dev)
  526. {
  527. struct pasemi_mac *mac = netdev_priv(dev);
  528. int msg;
  529. unsigned int flags;
  530. unsigned int new_flags;
  531. if (!mac->phydev->link) {
  532. /* If no link, MAC speed settings don't matter. Just report
  533. * link down and return.
  534. */
  535. if (mac->link && netif_msg_link(mac))
  536. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  537. netif_carrier_off(dev);
  538. mac->link = 0;
  539. return;
  540. } else
  541. netif_carrier_on(dev);
  542. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  543. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  544. PAS_MAC_CFG_PCFG_TSR_M);
  545. if (!mac->phydev->duplex)
  546. new_flags |= PAS_MAC_CFG_PCFG_HD;
  547. switch (mac->phydev->speed) {
  548. case 1000:
  549. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  550. PAS_MAC_CFG_PCFG_TSR_1G;
  551. break;
  552. case 100:
  553. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  554. PAS_MAC_CFG_PCFG_TSR_100M;
  555. break;
  556. case 10:
  557. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  558. PAS_MAC_CFG_PCFG_TSR_10M;
  559. break;
  560. default:
  561. printk("Unsupported speed %d\n", mac->phydev->speed);
  562. }
  563. /* Print on link or speed/duplex change */
  564. msg = mac->link != mac->phydev->link || flags != new_flags;
  565. mac->duplex = mac->phydev->duplex;
  566. mac->speed = mac->phydev->speed;
  567. mac->link = mac->phydev->link;
  568. if (new_flags != flags)
  569. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  570. if (msg && netif_msg_link(mac))
  571. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  572. dev->name, mac->speed, mac->duplex ? "full" : "half");
  573. }
  574. static int pasemi_mac_phy_init(struct net_device *dev)
  575. {
  576. struct pasemi_mac *mac = netdev_priv(dev);
  577. struct device_node *dn, *phy_dn;
  578. struct phy_device *phydev;
  579. unsigned int phy_id;
  580. const phandle *ph;
  581. const unsigned int *prop;
  582. struct resource r;
  583. int ret;
  584. dn = pci_device_to_OF_node(mac->pdev);
  585. ph = of_get_property(dn, "phy-handle", NULL);
  586. if (!ph)
  587. return -ENODEV;
  588. phy_dn = of_find_node_by_phandle(*ph);
  589. prop = of_get_property(phy_dn, "reg", NULL);
  590. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  591. if (ret)
  592. goto err;
  593. phy_id = *prop;
  594. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  595. of_node_put(phy_dn);
  596. mac->link = 0;
  597. mac->speed = 0;
  598. mac->duplex = -1;
  599. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  600. if (IS_ERR(phydev)) {
  601. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  602. return PTR_ERR(phydev);
  603. }
  604. mac->phydev = phydev;
  605. return 0;
  606. err:
  607. of_node_put(phy_dn);
  608. return -ENODEV;
  609. }
  610. static int pasemi_mac_open(struct net_device *dev)
  611. {
  612. struct pasemi_mac *mac = netdev_priv(dev);
  613. int base_irq;
  614. unsigned int flags;
  615. int ret;
  616. /* enable rx section */
  617. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  618. /* enable tx section */
  619. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  620. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  621. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  622. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  623. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  624. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  625. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  626. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  627. PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
  628. /* Clear out any residual packet count state from firmware */
  629. pasemi_mac_restart_rx_intr(mac);
  630. pasemi_mac_restart_tx_intr(mac);
  631. /* 0xffffff is max value, about 16ms */
  632. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  633. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  634. ret = pasemi_mac_setup_rx_resources(dev);
  635. if (ret)
  636. goto out_rx_resources;
  637. ret = pasemi_mac_setup_tx_resources(dev);
  638. if (ret)
  639. goto out_tx_resources;
  640. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  641. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  642. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  643. /* enable rx if */
  644. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  645. PAS_DMA_RXINT_RCMDSTA_EN);
  646. /* enable rx channel */
  647. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  648. PAS_DMA_RXCHAN_CCMDSTA_EN |
  649. PAS_DMA_RXCHAN_CCMDSTA_DU);
  650. /* enable tx channel */
  651. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  652. PAS_DMA_TXCHAN_TCMDSTA_EN);
  653. pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
  654. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  655. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  656. if (mac->type == MAC_TYPE_GMAC)
  657. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  658. else
  659. flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
  660. /* Enable interface in MAC */
  661. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  662. ret = pasemi_mac_phy_init(dev);
  663. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  664. * failed init due to -ENODEV.
  665. */
  666. if (ret && ret != -ENODEV)
  667. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  668. netif_start_queue(dev);
  669. napi_enable(&mac->napi);
  670. /* Interrupts are a bit different for our DMA controller: While
  671. * it's got one a regular PCI device header, the interrupt there
  672. * is really the base of the range it's using. Each tx and rx
  673. * channel has it's own interrupt source.
  674. */
  675. base_irq = virq_to_hw(mac->dma_pdev->irq);
  676. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  677. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  678. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  679. mac->tx->irq_name, dev);
  680. if (ret) {
  681. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  682. base_irq + mac->dma_txch, ret);
  683. goto out_tx_int;
  684. }
  685. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  686. mac->rx->irq_name, dev);
  687. if (ret) {
  688. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  689. base_irq + 20 + mac->dma_rxch, ret);
  690. goto out_rx_int;
  691. }
  692. if (mac->phydev)
  693. phy_start(mac->phydev);
  694. return 0;
  695. out_rx_int:
  696. free_irq(mac->tx_irq, dev);
  697. out_tx_int:
  698. napi_disable(&mac->napi);
  699. netif_stop_queue(dev);
  700. pasemi_mac_free_tx_resources(dev);
  701. out_tx_resources:
  702. pasemi_mac_free_rx_resources(dev);
  703. out_rx_resources:
  704. return ret;
  705. }
  706. #define MAX_RETRIES 5000
  707. static int pasemi_mac_close(struct net_device *dev)
  708. {
  709. struct pasemi_mac *mac = netdev_priv(dev);
  710. unsigned int stat;
  711. int retries;
  712. if (mac->phydev) {
  713. phy_stop(mac->phydev);
  714. phy_disconnect(mac->phydev);
  715. }
  716. netif_stop_queue(dev);
  717. napi_disable(&mac->napi);
  718. /* Clean out any pending buffers */
  719. pasemi_mac_clean_tx(mac);
  720. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  721. /* Disable interface */
  722. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  723. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  724. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  725. for (retries = 0; retries < MAX_RETRIES; retries++) {
  726. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  727. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  728. break;
  729. cond_resched();
  730. }
  731. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  732. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  733. for (retries = 0; retries < MAX_RETRIES; retries++) {
  734. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  735. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  736. break;
  737. cond_resched();
  738. }
  739. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  740. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  741. for (retries = 0; retries < MAX_RETRIES; retries++) {
  742. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  743. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  744. break;
  745. cond_resched();
  746. }
  747. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  748. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  749. /* Then, disable the channel. This must be done separately from
  750. * stopping, since you can't disable when active.
  751. */
  752. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  753. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  754. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  755. free_irq(mac->tx_irq, dev);
  756. free_irq(mac->rx_irq, dev);
  757. /* Free resources */
  758. pasemi_mac_free_rx_resources(dev);
  759. pasemi_mac_free_tx_resources(dev);
  760. return 0;
  761. }
  762. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  763. {
  764. struct pasemi_mac *mac = netdev_priv(dev);
  765. struct pasemi_mac_txring *txring;
  766. u64 dflags, mactx, ptr;
  767. dma_addr_t map;
  768. unsigned long flags;
  769. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  770. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  771. const unsigned char *nh = skb_network_header(skb);
  772. switch (ip_hdr(skb)->protocol) {
  773. case IPPROTO_TCP:
  774. dflags |= XCT_MACTX_CSUM_TCP;
  775. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  776. dflags |= XCT_MACTX_IPO(nh - skb->data);
  777. break;
  778. case IPPROTO_UDP:
  779. dflags |= XCT_MACTX_CSUM_UDP;
  780. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  781. dflags |= XCT_MACTX_IPO(nh - skb->data);
  782. break;
  783. }
  784. }
  785. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  786. if (dma_mapping_error(map))
  787. return NETDEV_TX_BUSY;
  788. mactx = dflags | XCT_MACTX_LLEN(skb->len);
  789. ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  790. txring = mac->tx;
  791. spin_lock_irqsave(&txring->lock, flags);
  792. if (RING_AVAIL(txring) <= 2) {
  793. spin_unlock_irqrestore(&txring->lock, flags);
  794. pasemi_mac_clean_tx(mac);
  795. pasemi_mac_restart_tx_intr(mac);
  796. spin_lock_irqsave(&txring->lock, flags);
  797. if (RING_AVAIL(txring) <= 2) {
  798. /* Still no room -- stop the queue and wait for tx
  799. * intr when there's room.
  800. */
  801. netif_stop_queue(dev);
  802. goto out_err;
  803. }
  804. }
  805. TX_RING(mac, txring->next_to_fill) = mactx;
  806. TX_RING(mac, txring->next_to_fill+1) = ptr;
  807. TX_RING_INFO(mac, txring->next_to_fill+1).dma = map;
  808. TX_RING_INFO(mac, txring->next_to_fill+1).skb = skb;
  809. txring->next_to_fill += 2;
  810. dev->stats.tx_packets++;
  811. dev->stats.tx_bytes += skb->len;
  812. spin_unlock_irqrestore(&txring->lock, flags);
  813. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  814. return NETDEV_TX_OK;
  815. out_err:
  816. spin_unlock_irqrestore(&txring->lock, flags);
  817. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  818. return NETDEV_TX_BUSY;
  819. }
  820. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  821. {
  822. struct pasemi_mac *mac = netdev_priv(dev);
  823. unsigned int flags;
  824. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  825. /* Set promiscuous */
  826. if (dev->flags & IFF_PROMISC)
  827. flags |= PAS_MAC_CFG_PCFG_PR;
  828. else
  829. flags &= ~PAS_MAC_CFG_PCFG_PR;
  830. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  831. }
  832. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  833. {
  834. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  835. struct net_device *dev = mac->netdev;
  836. int pkts;
  837. pasemi_mac_clean_tx(mac);
  838. pkts = pasemi_mac_clean_rx(mac, budget);
  839. if (pkts < budget) {
  840. /* all done, no more packets present */
  841. netif_rx_complete(dev, napi);
  842. pasemi_mac_restart_rx_intr(mac);
  843. }
  844. return pkts;
  845. }
  846. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  847. {
  848. struct device_node *dn;
  849. void __iomem *ret;
  850. dn = pci_device_to_OF_node(p);
  851. if (!dn)
  852. goto fallback;
  853. ret = of_iomap(dn, index);
  854. if (!ret)
  855. goto fallback;
  856. return ret;
  857. fallback:
  858. /* This is hardcoded and ugly, but we have some firmware versions
  859. * that don't provide the register space in the device tree. Luckily
  860. * they are at well-known locations so we can just do the math here.
  861. */
  862. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  863. }
  864. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  865. {
  866. struct resource res;
  867. struct device_node *dn;
  868. int err;
  869. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  870. if (!mac->dma_pdev) {
  871. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  872. return -ENODEV;
  873. }
  874. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  875. if (!mac->iob_pdev) {
  876. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  877. return -ENODEV;
  878. }
  879. mac->regs = map_onedev(mac->pdev, 0);
  880. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  881. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  882. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  883. dev_err(&mac->pdev->dev, "Can't map registers\n");
  884. return -ENODEV;
  885. }
  886. /* The dma status structure is located in the I/O bridge, and
  887. * is cache coherent.
  888. */
  889. if (!dma_status) {
  890. dn = pci_device_to_OF_node(mac->iob_pdev);
  891. if (dn)
  892. err = of_address_to_resource(dn, 1, &res);
  893. if (!dn || err) {
  894. /* Fallback for old firmware */
  895. res.start = 0xfd800000;
  896. res.end = res.start + 0x1000;
  897. }
  898. dma_status = __ioremap(res.start, res.end-res.start, 0);
  899. }
  900. return 0;
  901. }
  902. static int __devinit
  903. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  904. {
  905. static int index = 0;
  906. struct net_device *dev;
  907. struct pasemi_mac *mac;
  908. int err;
  909. DECLARE_MAC_BUF(mac_buf);
  910. err = pci_enable_device(pdev);
  911. if (err)
  912. return err;
  913. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  914. if (dev == NULL) {
  915. dev_err(&pdev->dev,
  916. "pasemi_mac: Could not allocate ethernet device.\n");
  917. err = -ENOMEM;
  918. goto out_disable_device;
  919. }
  920. pci_set_drvdata(pdev, dev);
  921. SET_NETDEV_DEV(dev, &pdev->dev);
  922. mac = netdev_priv(dev);
  923. mac->pdev = pdev;
  924. mac->netdev = dev;
  925. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  926. dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
  927. /* These should come out of the device tree eventually */
  928. mac->dma_txch = index;
  929. mac->dma_rxch = index;
  930. /* We probe GMAC before XAUI, but the DMA interfaces are
  931. * in XAUI, GMAC order.
  932. */
  933. if (index < 4)
  934. mac->dma_if = index + 2;
  935. else
  936. mac->dma_if = index - 4;
  937. index++;
  938. switch (pdev->device) {
  939. case 0xa005:
  940. mac->type = MAC_TYPE_GMAC;
  941. break;
  942. case 0xa006:
  943. mac->type = MAC_TYPE_XAUI;
  944. break;
  945. default:
  946. err = -ENODEV;
  947. goto out;
  948. }
  949. /* get mac addr from device tree */
  950. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  951. err = -ENODEV;
  952. goto out;
  953. }
  954. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  955. dev->open = pasemi_mac_open;
  956. dev->stop = pasemi_mac_close;
  957. dev->hard_start_xmit = pasemi_mac_start_tx;
  958. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  959. err = pasemi_mac_map_regs(mac);
  960. if (err)
  961. goto out;
  962. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  963. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  964. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  965. /* Enable most messages by default */
  966. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  967. err = register_netdev(dev);
  968. if (err) {
  969. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  970. err);
  971. goto out;
  972. } else if netif_msg_probe(mac)
  973. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  974. "hw addr %s\n",
  975. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  976. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  977. print_mac(mac_buf, dev->dev_addr));
  978. return err;
  979. out:
  980. if (mac->iob_pdev)
  981. pci_dev_put(mac->iob_pdev);
  982. if (mac->dma_pdev)
  983. pci_dev_put(mac->dma_pdev);
  984. if (mac->dma_regs)
  985. iounmap(mac->dma_regs);
  986. if (mac->iob_regs)
  987. iounmap(mac->iob_regs);
  988. if (mac->regs)
  989. iounmap(mac->regs);
  990. free_netdev(dev);
  991. out_disable_device:
  992. pci_disable_device(pdev);
  993. return err;
  994. }
  995. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  996. {
  997. struct net_device *netdev = pci_get_drvdata(pdev);
  998. struct pasemi_mac *mac;
  999. if (!netdev)
  1000. return;
  1001. mac = netdev_priv(netdev);
  1002. unregister_netdev(netdev);
  1003. pci_disable_device(pdev);
  1004. pci_dev_put(mac->dma_pdev);
  1005. pci_dev_put(mac->iob_pdev);
  1006. iounmap(mac->regs);
  1007. iounmap(mac->dma_regs);
  1008. iounmap(mac->iob_regs);
  1009. pci_set_drvdata(pdev, NULL);
  1010. free_netdev(netdev);
  1011. }
  1012. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  1013. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  1014. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  1015. { },
  1016. };
  1017. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  1018. static struct pci_driver pasemi_mac_driver = {
  1019. .name = "pasemi_mac",
  1020. .id_table = pasemi_mac_pci_tbl,
  1021. .probe = pasemi_mac_probe,
  1022. .remove = __devexit_p(pasemi_mac_remove),
  1023. };
  1024. static void __exit pasemi_mac_cleanup_module(void)
  1025. {
  1026. pci_unregister_driver(&pasemi_mac_driver);
  1027. __iounmap(dma_status);
  1028. dma_status = NULL;
  1029. }
  1030. int pasemi_mac_init_module(void)
  1031. {
  1032. return pci_register_driver(&pasemi_mac_driver);
  1033. }
  1034. module_init(pasemi_mac_init_module);
  1035. module_exit(pasemi_mac_cleanup_module);