rtc-omap.c 15 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/of.h>
  23. #include <linux/of_device.h>
  24. #include <linux/pm_runtime.h>
  25. #include <asm/io.h>
  26. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  27. * with century-range alarm matching, driven by the 32kHz clock.
  28. *
  29. * The main user-visible ways it differs from PC RTCs are by omitting
  30. * "don't care" alarm fields and sub-second periodic IRQs, and having
  31. * an autoadjust mechanism to calibrate to the true oscillator rate.
  32. *
  33. * Board-specific wiring options include using split power mode with
  34. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  35. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  36. * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  37. * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  38. */
  39. #define DRIVER_NAME "omap_rtc"
  40. #define OMAP_RTC_BASE 0xfffb4800
  41. /* RTC registers */
  42. #define OMAP_RTC_SECONDS_REG 0x00
  43. #define OMAP_RTC_MINUTES_REG 0x04
  44. #define OMAP_RTC_HOURS_REG 0x08
  45. #define OMAP_RTC_DAYS_REG 0x0C
  46. #define OMAP_RTC_MONTHS_REG 0x10
  47. #define OMAP_RTC_YEARS_REG 0x14
  48. #define OMAP_RTC_WEEKS_REG 0x18
  49. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  50. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  51. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  52. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  53. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  54. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  55. #define OMAP_RTC_CTRL_REG 0x40
  56. #define OMAP_RTC_STATUS_REG 0x44
  57. #define OMAP_RTC_INTERRUPTS_REG 0x48
  58. #define OMAP_RTC_COMP_LSB_REG 0x4c
  59. #define OMAP_RTC_COMP_MSB_REG 0x50
  60. #define OMAP_RTC_OSC_REG 0x54
  61. #define OMAP_RTC_KICK0_REG 0x6c
  62. #define OMAP_RTC_KICK1_REG 0x70
  63. /* OMAP_RTC_CTRL_REG bit fields: */
  64. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  65. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  66. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  67. #define OMAP_RTC_CTRL_TEST (1<<4)
  68. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  69. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  70. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  71. #define OMAP_RTC_CTRL_STOP (1<<0)
  72. /* OMAP_RTC_STATUS_REG bit fields: */
  73. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  74. #define OMAP_RTC_STATUS_ALARM (1<<6)
  75. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  76. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  77. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  78. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  79. #define OMAP_RTC_STATUS_RUN (1<<1)
  80. #define OMAP_RTC_STATUS_BUSY (1<<0)
  81. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  82. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  83. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  84. /* OMAP_RTC_KICKER values */
  85. #define KICK0_VALUE 0x83e70b13
  86. #define KICK1_VALUE 0x95a4f1e0
  87. #define OMAP_RTC_HAS_KICKER 0x1
  88. static void __iomem *rtc_base;
  89. #define rtc_read(addr) readb(rtc_base + (addr))
  90. #define rtc_write(val, addr) writeb(val, rtc_base + (addr))
  91. #define rtc_writel(val, addr) writel(val, rtc_base + (addr))
  92. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  93. * so the only other requirement is that register accesses which
  94. * require BUSY to be clear are made with IRQs locally disabled
  95. */
  96. static void rtc_wait_not_busy(void)
  97. {
  98. int count = 0;
  99. u8 status;
  100. /* BUSY may stay active for 1/32768 second (~30 usec) */
  101. for (count = 0; count < 50; count++) {
  102. status = rtc_read(OMAP_RTC_STATUS_REG);
  103. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  104. break;
  105. udelay(1);
  106. }
  107. /* now we have ~15 usec to read/write various registers */
  108. }
  109. static irqreturn_t rtc_irq(int irq, void *rtc)
  110. {
  111. unsigned long events = 0;
  112. u8 irq_data;
  113. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  114. /* alarm irq? */
  115. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  116. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  117. events |= RTC_IRQF | RTC_AF;
  118. }
  119. /* 1/sec periodic/update irq? */
  120. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  121. events |= RTC_IRQF | RTC_UF;
  122. rtc_update_irq(rtc, 1, events);
  123. return IRQ_HANDLED;
  124. }
  125. static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  126. {
  127. u8 reg;
  128. local_irq_disable();
  129. rtc_wait_not_busy();
  130. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  131. if (enabled)
  132. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  133. else
  134. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  135. rtc_wait_not_busy();
  136. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  137. local_irq_enable();
  138. return 0;
  139. }
  140. /* this hardware doesn't support "don't care" alarm fields */
  141. static int tm2bcd(struct rtc_time *tm)
  142. {
  143. if (rtc_valid_tm(tm) != 0)
  144. return -EINVAL;
  145. tm->tm_sec = bin2bcd(tm->tm_sec);
  146. tm->tm_min = bin2bcd(tm->tm_min);
  147. tm->tm_hour = bin2bcd(tm->tm_hour);
  148. tm->tm_mday = bin2bcd(tm->tm_mday);
  149. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  150. /* epoch == 1900 */
  151. if (tm->tm_year < 100 || tm->tm_year > 199)
  152. return -EINVAL;
  153. tm->tm_year = bin2bcd(tm->tm_year - 100);
  154. return 0;
  155. }
  156. static void bcd2tm(struct rtc_time *tm)
  157. {
  158. tm->tm_sec = bcd2bin(tm->tm_sec);
  159. tm->tm_min = bcd2bin(tm->tm_min);
  160. tm->tm_hour = bcd2bin(tm->tm_hour);
  161. tm->tm_mday = bcd2bin(tm->tm_mday);
  162. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  163. /* epoch == 1900 */
  164. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  165. }
  166. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  167. {
  168. /* we don't report wday/yday/isdst ... */
  169. local_irq_disable();
  170. rtc_wait_not_busy();
  171. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  172. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  173. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  174. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  175. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  176. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  177. local_irq_enable();
  178. bcd2tm(tm);
  179. return 0;
  180. }
  181. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  182. {
  183. if (tm2bcd(tm) < 0)
  184. return -EINVAL;
  185. local_irq_disable();
  186. rtc_wait_not_busy();
  187. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  188. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  189. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  190. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  191. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  192. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  193. local_irq_enable();
  194. return 0;
  195. }
  196. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  197. {
  198. local_irq_disable();
  199. rtc_wait_not_busy();
  200. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  201. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  202. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  203. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  204. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  205. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  206. local_irq_enable();
  207. bcd2tm(&alm->time);
  208. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  209. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  210. return 0;
  211. }
  212. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  213. {
  214. u8 reg;
  215. if (tm2bcd(&alm->time) < 0)
  216. return -EINVAL;
  217. local_irq_disable();
  218. rtc_wait_not_busy();
  219. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  220. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  221. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  222. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  223. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  224. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  225. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  226. if (alm->enabled)
  227. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  228. else
  229. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  230. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  231. local_irq_enable();
  232. return 0;
  233. }
  234. static struct rtc_class_ops omap_rtc_ops = {
  235. .read_time = omap_rtc_read_time,
  236. .set_time = omap_rtc_set_time,
  237. .read_alarm = omap_rtc_read_alarm,
  238. .set_alarm = omap_rtc_set_alarm,
  239. .alarm_irq_enable = omap_rtc_alarm_irq_enable,
  240. };
  241. static int omap_rtc_alarm;
  242. static int omap_rtc_timer;
  243. #define OMAP_RTC_DATA_DA830_IDX 1
  244. static struct platform_device_id omap_rtc_devtype[] = {
  245. {
  246. .name = DRIVER_NAME,
  247. }, {
  248. .name = "da830-rtc",
  249. .driver_data = OMAP_RTC_HAS_KICKER,
  250. },
  251. {},
  252. };
  253. MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
  254. static const struct of_device_id omap_rtc_of_match[] = {
  255. { .compatible = "ti,da830-rtc",
  256. .data = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
  257. },
  258. {},
  259. };
  260. MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
  261. static int __init omap_rtc_probe(struct platform_device *pdev)
  262. {
  263. struct resource *res, *mem;
  264. struct rtc_device *rtc;
  265. u8 reg, new_ctrl;
  266. const struct platform_device_id *id_entry;
  267. const struct of_device_id *of_id;
  268. of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
  269. if (of_id)
  270. pdev->id_entry = of_id->data;
  271. omap_rtc_timer = platform_get_irq(pdev, 0);
  272. if (omap_rtc_timer <= 0) {
  273. pr_debug("%s: no update irq?\n", pdev->name);
  274. return -ENOENT;
  275. }
  276. omap_rtc_alarm = platform_get_irq(pdev, 1);
  277. if (omap_rtc_alarm <= 0) {
  278. pr_debug("%s: no alarm irq?\n", pdev->name);
  279. return -ENOENT;
  280. }
  281. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  282. if (!res) {
  283. pr_debug("%s: RTC resource data missing\n", pdev->name);
  284. return -ENOENT;
  285. }
  286. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  287. if (!mem) {
  288. pr_debug("%s: RTC registers at %08x are not free\n",
  289. pdev->name, res->start);
  290. return -EBUSY;
  291. }
  292. rtc_base = ioremap(res->start, resource_size(res));
  293. if (!rtc_base) {
  294. pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
  295. goto fail;
  296. }
  297. /* Enable the clock/module so that we can access the registers */
  298. pm_runtime_enable(&pdev->dev);
  299. pm_runtime_get_sync(&pdev->dev);
  300. id_entry = platform_get_device_id(pdev);
  301. if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) {
  302. rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
  303. rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
  304. }
  305. rtc = rtc_device_register(pdev->name, &pdev->dev,
  306. &omap_rtc_ops, THIS_MODULE);
  307. if (IS_ERR(rtc)) {
  308. pr_debug("%s: can't register RTC device, err %ld\n",
  309. pdev->name, PTR_ERR(rtc));
  310. goto fail0;
  311. }
  312. platform_set_drvdata(pdev, rtc);
  313. dev_set_drvdata(&rtc->dev, mem);
  314. /* clear pending irqs, and set 1/second periodic,
  315. * which we'll use instead of update irqs
  316. */
  317. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  318. /* clear old status */
  319. reg = rtc_read(OMAP_RTC_STATUS_REG);
  320. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  321. pr_info("%s: RTC power up reset detected\n",
  322. pdev->name);
  323. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  324. }
  325. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  326. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  327. /* handle periodic and alarm irqs */
  328. if (request_irq(omap_rtc_timer, rtc_irq, 0,
  329. dev_name(&rtc->dev), rtc)) {
  330. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  331. pdev->name, omap_rtc_timer);
  332. goto fail1;
  333. }
  334. if ((omap_rtc_timer != omap_rtc_alarm) &&
  335. (request_irq(omap_rtc_alarm, rtc_irq, 0,
  336. dev_name(&rtc->dev), rtc))) {
  337. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  338. pdev->name, omap_rtc_alarm);
  339. goto fail2;
  340. }
  341. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  342. reg = rtc_read(OMAP_RTC_CTRL_REG);
  343. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  344. pr_info("%s: already running\n", pdev->name);
  345. /* force to 24 hour mode */
  346. new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  347. new_ctrl |= OMAP_RTC_CTRL_STOP;
  348. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  349. *
  350. * - Device wake-up capability setting should come through chip
  351. * init logic. OMAP1 boards should initialize the "wakeup capable"
  352. * flag in the platform device if the board is wired right for
  353. * being woken up by RTC alarm. For OMAP-L138, this capability
  354. * is built into the SoC by the "Deep Sleep" capability.
  355. *
  356. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  357. * rather than nPWRON_RESET, should forcibly enable split
  358. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  359. * is write-only, and always reads as zero...)
  360. */
  361. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  362. pr_info("%s: split power mode\n", pdev->name);
  363. if (reg != new_ctrl)
  364. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  365. return 0;
  366. fail2:
  367. free_irq(omap_rtc_timer, rtc);
  368. fail1:
  369. rtc_device_unregister(rtc);
  370. fail0:
  371. if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
  372. rtc_writel(0, OMAP_RTC_KICK0_REG);
  373. pm_runtime_put_sync(&pdev->dev);
  374. pm_runtime_disable(&pdev->dev);
  375. iounmap(rtc_base);
  376. fail:
  377. release_mem_region(mem->start, resource_size(mem));
  378. return -EIO;
  379. }
  380. static int __exit omap_rtc_remove(struct platform_device *pdev)
  381. {
  382. struct rtc_device *rtc = platform_get_drvdata(pdev);
  383. struct resource *mem = dev_get_drvdata(&rtc->dev);
  384. const struct platform_device_id *id_entry =
  385. platform_get_device_id(pdev);
  386. device_init_wakeup(&pdev->dev, 0);
  387. /* leave rtc running, but disable irqs */
  388. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  389. free_irq(omap_rtc_timer, rtc);
  390. if (omap_rtc_timer != omap_rtc_alarm)
  391. free_irq(omap_rtc_alarm, rtc);
  392. rtc_device_unregister(rtc);
  393. if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
  394. rtc_writel(0, OMAP_RTC_KICK0_REG);
  395. /* Disable the clock/module */
  396. pm_runtime_put_sync(&pdev->dev);
  397. pm_runtime_disable(&pdev->dev);
  398. iounmap(rtc_base);
  399. release_mem_region(mem->start, resource_size(mem));
  400. return 0;
  401. }
  402. #ifdef CONFIG_PM
  403. static u8 irqstat;
  404. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  405. {
  406. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  407. /* FIXME the RTC alarm is not currently acting as a wakeup event
  408. * source, and in fact this enable() call is just saving a flag
  409. * that's never used...
  410. */
  411. if (device_may_wakeup(&pdev->dev))
  412. enable_irq_wake(omap_rtc_alarm);
  413. else
  414. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  415. /* Disable the clock/module */
  416. pm_runtime_put_sync(&pdev->dev);
  417. return 0;
  418. }
  419. static int omap_rtc_resume(struct platform_device *pdev)
  420. {
  421. /* Enable the clock/module so that we can access the registers */
  422. pm_runtime_get_sync(&pdev->dev);
  423. if (device_may_wakeup(&pdev->dev))
  424. disable_irq_wake(omap_rtc_alarm);
  425. else
  426. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  427. return 0;
  428. }
  429. #else
  430. #define omap_rtc_suspend NULL
  431. #define omap_rtc_resume NULL
  432. #endif
  433. static void omap_rtc_shutdown(struct platform_device *pdev)
  434. {
  435. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  436. }
  437. MODULE_ALIAS("platform:omap_rtc");
  438. static struct platform_driver omap_rtc_driver = {
  439. .remove = __exit_p(omap_rtc_remove),
  440. .suspend = omap_rtc_suspend,
  441. .resume = omap_rtc_resume,
  442. .shutdown = omap_rtc_shutdown,
  443. .driver = {
  444. .name = DRIVER_NAME,
  445. .owner = THIS_MODULE,
  446. .of_match_table = of_match_ptr(omap_rtc_of_match),
  447. },
  448. .id_table = omap_rtc_devtype,
  449. };
  450. static int __init rtc_init(void)
  451. {
  452. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  453. }
  454. module_init(rtc_init);
  455. static void __exit rtc_exit(void)
  456. {
  457. platform_driver_unregister(&omap_rtc_driver);
  458. }
  459. module_exit(rtc_exit);
  460. MODULE_AUTHOR("George G. Davis (and others)");
  461. MODULE_LICENSE("GPL");