cpm2_common.c 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219
  1. /*
  2. * General Purpose functions for the global management of the
  3. * 8260 Communication Processor Module.
  4. * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
  5. * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
  6. * 2.3.99 Updates
  7. *
  8. * 2006 (c) MontaVista Software, Inc.
  9. * Vitaly Bordug <vbordug@ru.mvista.com>
  10. * Merged to arch/powerpc from arch/ppc/syslib/cpm2_common.c
  11. *
  12. * This file is licensed under the terms of the GNU General Public License
  13. * version 2. This program is licensed "as is" without any warranty of any
  14. * kind, whether express or implied.
  15. */
  16. /*
  17. *
  18. * In addition to the individual control of the communication
  19. * channels, there are a few functions that globally affect the
  20. * communication processor.
  21. *
  22. * Buffer descriptors must be allocated from the dual ported memory
  23. * space. The allocator for that is here. When the communication
  24. * process is reset, we reclaim the memory available. There is
  25. * currently no deallocator for this memory.
  26. */
  27. #include <linux/errno.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/param.h>
  31. #include <linux/string.h>
  32. #include <linux/mm.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/module.h>
  35. #include <asm/io.h>
  36. #include <asm/irq.h>
  37. #include <asm/mpc8260.h>
  38. #include <asm/page.h>
  39. #include <asm/pgtable.h>
  40. #include <asm/cpm2.h>
  41. #include <asm/rheap.h>
  42. #include <asm/fs_pd.h>
  43. #include <sysdev/fsl_soc.h>
  44. static void cpm2_dpinit(void);
  45. cpm_cpm2_t *cpmp; /* Pointer to comm processor space */
  46. /* We allocate this here because it is used almost exclusively for
  47. * the communication processor devices.
  48. */
  49. cpm2_map_t *cpm2_immr;
  50. intctl_cpm2_t *cpm2_intctl;
  51. #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
  52. of space for CPM as it is larger
  53. than on PQ2 */
  54. void
  55. cpm2_reset(void)
  56. {
  57. cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
  58. cpm2_intctl = cpm2_map(im_intctl);
  59. /* Reclaim the DP memory for our use.
  60. */
  61. cpm2_dpinit();
  62. /* Tell everyone where the comm processor resides.
  63. */
  64. cpmp = &cpm2_immr->im_cpm;
  65. }
  66. /* Set a baud rate generator. This needs lots of work. There are
  67. * eight BRGs, which can be connected to the CPM channels or output
  68. * as clocks. The BRGs are in two different block of internal
  69. * memory mapped space.
  70. * The baud rate clock is the system clock divided by something.
  71. * It was set up long ago during the initial boot phase and is
  72. * is given to us.
  73. * Baud rate clocks are zero-based in the driver code (as that maps
  74. * to port numbers). Documentation uses 1-based numbering.
  75. */
  76. #define BRG_INT_CLK (get_brgfreq())
  77. #define BRG_UART_CLK (BRG_INT_CLK/16)
  78. /* This function is used by UARTS, or anything else that uses a 16x
  79. * oversampled clock.
  80. */
  81. void
  82. cpm_setbrg(uint brg, uint rate)
  83. {
  84. volatile uint *bp;
  85. /* This is good enough to get SMCs running.....
  86. */
  87. if (brg < 4) {
  88. bp = cpm2_map_size(im_brgc1, 16);
  89. } else {
  90. bp = cpm2_map_size(im_brgc5, 16);
  91. brg -= 4;
  92. }
  93. bp += brg;
  94. *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
  95. cpm2_unmap(bp);
  96. }
  97. /* This function is used to set high speed synchronous baud rate
  98. * clocks.
  99. */
  100. void
  101. cpm2_fastbrg(uint brg, uint rate, int div16)
  102. {
  103. volatile uint *bp;
  104. if (brg < 4) {
  105. bp = cpm2_map_size(im_brgc1, 16);
  106. }
  107. else {
  108. bp = cpm2_map_size(im_brgc5, 16);
  109. brg -= 4;
  110. }
  111. bp += brg;
  112. *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
  113. if (div16)
  114. *bp |= CPM_BRG_DIV16;
  115. cpm2_unmap(bp);
  116. }
  117. /*
  118. * dpalloc / dpfree bits.
  119. */
  120. static spinlock_t cpm_dpmem_lock;
  121. /* 16 blocks should be enough to satisfy all requests
  122. * until the memory subsystem goes up... */
  123. static rh_block_t cpm_boot_dpmem_rh_block[16];
  124. static rh_info_t cpm_dpmem_info;
  125. static u8* im_dprambase;
  126. static void cpm2_dpinit(void)
  127. {
  128. spin_lock_init(&cpm_dpmem_lock);
  129. im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
  130. /* initialize the info header */
  131. rh_init(&cpm_dpmem_info, 1,
  132. sizeof(cpm_boot_dpmem_rh_block) /
  133. sizeof(cpm_boot_dpmem_rh_block[0]),
  134. cpm_boot_dpmem_rh_block);
  135. /* Attach the usable dpmem area */
  136. /* XXX: This is actually crap. CPM_DATAONLY_BASE and
  137. * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
  138. * varies with the processor and the microcode patches activated.
  139. * But the following should be at least safe.
  140. */
  141. rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE,
  142. CPM_DATAONLY_SIZE);
  143. }
  144. /* This function returns an index into the DPRAM area.
  145. */
  146. uint cpm_dpalloc(uint size, uint align)
  147. {
  148. void *start;
  149. unsigned long flags;
  150. spin_lock_irqsave(&cpm_dpmem_lock, flags);
  151. cpm_dpmem_info.alignment = align;
  152. start = rh_alloc(&cpm_dpmem_info, size, "commproc");
  153. spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
  154. return (uint)start;
  155. }
  156. EXPORT_SYMBOL(cpm_dpalloc);
  157. int cpm_dpfree(uint offset)
  158. {
  159. int ret;
  160. unsigned long flags;
  161. spin_lock_irqsave(&cpm_dpmem_lock, flags);
  162. ret = rh_free(&cpm_dpmem_info, (void *)offset);
  163. spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
  164. return ret;
  165. }
  166. EXPORT_SYMBOL(cpm_dpfree);
  167. /* not sure if this is ever needed */
  168. uint cpm_dpalloc_fixed(uint offset, uint size, uint align)
  169. {
  170. void *start;
  171. unsigned long flags;
  172. spin_lock_irqsave(&cpm_dpmem_lock, flags);
  173. cpm_dpmem_info.alignment = align;
  174. start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc");
  175. spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
  176. return (uint)start;
  177. }
  178. EXPORT_SYMBOL(cpm_dpalloc_fixed);
  179. void cpm_dpdump(void)
  180. {
  181. rh_dump(&cpm_dpmem_info);
  182. }
  183. EXPORT_SYMBOL(cpm_dpdump);
  184. void *cpm_dpram_addr(uint offset)
  185. {
  186. return (void *)(im_dprambase + offset);
  187. }
  188. EXPORT_SYMBOL(cpm_dpram_addr);