pmcraid.c 153 KB

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  1. /*
  2. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  3. *
  4. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  5. * PMC-Sierra Inc
  6. *
  7. * Copyright (C) 2008, 2009 PMC Sierra Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
  22. * USA
  23. *
  24. */
  25. #include <linux/fs.h>
  26. #include <linux/init.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ioport.h>
  31. #include <linux/delay.h>
  32. #include <linux/pci.h>
  33. #include <linux/wait.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/firmware.h>
  39. #include <linux/module.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/hdreg.h>
  42. #include <linux/version.h>
  43. #include <linux/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/processor.h>
  46. #include <linux/libata.h>
  47. #include <linux/mutex.h>
  48. #include <scsi/scsi.h>
  49. #include <scsi/scsi_host.h>
  50. #include <scsi/scsi_device.h>
  51. #include <scsi/scsi_tcq.h>
  52. #include <scsi/scsi_eh.h>
  53. #include <scsi/scsi_cmnd.h>
  54. #include <scsi/scsicam.h>
  55. #include "pmcraid.h"
  56. /*
  57. * Module configuration parameters
  58. */
  59. static unsigned int pmcraid_debug_log;
  60. static unsigned int pmcraid_disable_aen;
  61. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  62. /*
  63. * Data structures to support multiple adapters by the LLD.
  64. * pmcraid_adapter_count - count of configured adapters
  65. */
  66. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  67. /*
  68. * Supporting user-level control interface through IOCTL commands.
  69. * pmcraid_major - major number to use
  70. * pmcraid_minor - minor number(s) to use
  71. */
  72. static unsigned int pmcraid_major;
  73. static struct class *pmcraid_class;
  74. DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  75. /*
  76. * Module parameters
  77. */
  78. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  79. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  80. MODULE_LICENSE("GPL");
  81. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  82. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  83. MODULE_PARM_DESC(log_level,
  84. "Enables firmware error code logging, default :1 high-severity"
  85. " errors, 2: all errors including high-severity errors,"
  86. " 0: disables logging");
  87. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  88. MODULE_PARM_DESC(debug,
  89. "Enable driver verbose message logging. Set 1 to enable."
  90. "(default: 0)");
  91. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  92. MODULE_PARM_DESC(disable_aen,
  93. "Disable driver aen notifications to apps. Set 1 to disable."
  94. "(default: 0)");
  95. /* chip specific constants for PMC MaxRAID controllers (same for
  96. * 0x5220 and 0x8010
  97. */
  98. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  99. {
  100. .ioastatus = 0x0,
  101. .ioarrin = 0x00040,
  102. .mailbox = 0x7FC30,
  103. .global_intr_mask = 0x00034,
  104. .ioa_host_intr = 0x0009C,
  105. .ioa_host_intr_clr = 0x000A0,
  106. .ioa_host_mask = 0x7FC28,
  107. .ioa_host_mask_clr = 0x7FC28,
  108. .host_ioa_intr = 0x00020,
  109. .host_ioa_intr_clr = 0x00020,
  110. .transop_timeout = 300
  111. }
  112. };
  113. /*
  114. * PCI device ids supported by pmcraid driver
  115. */
  116. static struct pci_device_id pmcraid_pci_table[] __devinitdata = {
  117. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  118. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  119. },
  120. {}
  121. };
  122. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  123. /**
  124. * pmcraid_slave_alloc - Prepare for commands to a device
  125. * @scsi_dev: scsi device struct
  126. *
  127. * This function is called by mid-layer prior to sending any command to the new
  128. * device. Stores resource entry details of the device in scsi_device struct.
  129. * Queuecommand uses the resource handle and other details to fill up IOARCB
  130. * while sending commands to the device.
  131. *
  132. * Return value:
  133. * 0 on success / -ENXIO if device does not exist
  134. */
  135. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  136. {
  137. struct pmcraid_resource_entry *temp, *res = NULL;
  138. struct pmcraid_instance *pinstance;
  139. u8 target, bus, lun;
  140. unsigned long lock_flags;
  141. int rc = -ENXIO;
  142. pinstance = shost_priv(scsi_dev->host);
  143. /* Driver exposes VSET and GSCSI resources only; all other device types
  144. * are not exposed. Resource list is synchronized using resource lock
  145. * so any traversal or modifications to the list should be done inside
  146. * this lock
  147. */
  148. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  149. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  150. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  151. if (RES_IS_VSET(temp->cfg_entry)) {
  152. target = temp->cfg_entry.unique_flags1;
  153. if (target > PMCRAID_MAX_VSET_TARGETS)
  154. continue;
  155. bus = PMCRAID_VSET_BUS_ID;
  156. lun = 0;
  157. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  158. target = RES_TARGET(temp->cfg_entry.resource_address);
  159. bus = PMCRAID_PHYS_BUS_ID;
  160. lun = RES_LUN(temp->cfg_entry.resource_address);
  161. } else {
  162. continue;
  163. }
  164. if (bus == scsi_dev->channel &&
  165. target == scsi_dev->id &&
  166. lun == scsi_dev->lun) {
  167. res = temp;
  168. break;
  169. }
  170. }
  171. if (res) {
  172. res->scsi_dev = scsi_dev;
  173. scsi_dev->hostdata = res;
  174. res->change_detected = 0;
  175. atomic_set(&res->read_failures, 0);
  176. atomic_set(&res->write_failures, 0);
  177. rc = 0;
  178. }
  179. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  180. return rc;
  181. }
  182. /**
  183. * pmcraid_slave_configure - Configures a SCSI device
  184. * @scsi_dev: scsi device struct
  185. *
  186. * This fucntion is executed by SCSI mid layer just after a device is first
  187. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  188. * timeout value (default 30s) will be over-written to a higher value (60s)
  189. * and max_sectors value will be over-written to 512. It also sets queue depth
  190. * to host->cmd_per_lun value
  191. *
  192. * Return value:
  193. * 0 on success
  194. */
  195. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  196. {
  197. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  198. if (!res)
  199. return 0;
  200. /* LLD exposes VSETs and Enclosure devices only */
  201. if (RES_IS_GSCSI(res->cfg_entry) &&
  202. scsi_dev->type != TYPE_ENCLOSURE)
  203. return -ENXIO;
  204. pmcraid_info("configuring %x:%x:%x:%x\n",
  205. scsi_dev->host->unique_id,
  206. scsi_dev->channel,
  207. scsi_dev->id,
  208. scsi_dev->lun);
  209. if (RES_IS_GSCSI(res->cfg_entry)) {
  210. scsi_dev->allow_restart = 1;
  211. } else if (RES_IS_VSET(res->cfg_entry)) {
  212. scsi_dev->allow_restart = 1;
  213. blk_queue_rq_timeout(scsi_dev->request_queue,
  214. PMCRAID_VSET_IO_TIMEOUT);
  215. blk_queue_max_sectors(scsi_dev->request_queue,
  216. PMCRAID_VSET_MAX_SECTORS);
  217. }
  218. if (scsi_dev->tagged_supported &&
  219. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  220. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  221. scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG,
  222. scsi_dev->host->cmd_per_lun);
  223. } else {
  224. scsi_adjust_queue_depth(scsi_dev, 0,
  225. scsi_dev->host->cmd_per_lun);
  226. }
  227. return 0;
  228. }
  229. /**
  230. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  231. *
  232. * @scsi_dev: scsi device struct
  233. *
  234. * This is called by mid-layer before removing a device. Pointer assignments
  235. * done in pmcraid_slave_alloc will be reset to NULL here.
  236. *
  237. * Return value
  238. * none
  239. */
  240. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  241. {
  242. struct pmcraid_resource_entry *res;
  243. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  244. if (res)
  245. res->scsi_dev = NULL;
  246. scsi_dev->hostdata = NULL;
  247. }
  248. /**
  249. * pmcraid_change_queue_depth - Change the device's queue depth
  250. * @scsi_dev: scsi device struct
  251. * @depth: depth to set
  252. * @reason: calling context
  253. *
  254. * Return value
  255. * actual depth set
  256. */
  257. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth,
  258. int reason)
  259. {
  260. if (reason != SCSI_QDEPTH_DEFAULT)
  261. return -EOPNOTSUPP;
  262. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  263. depth = PMCRAID_MAX_CMD_PER_LUN;
  264. scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth);
  265. return scsi_dev->queue_depth;
  266. }
  267. /**
  268. * pmcraid_change_queue_type - Change the device's queue type
  269. * @scsi_dev: scsi device struct
  270. * @tag: type of tags to use
  271. *
  272. * Return value:
  273. * actual queue type set
  274. */
  275. static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
  276. {
  277. struct pmcraid_resource_entry *res;
  278. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  279. if ((res) && scsi_dev->tagged_supported &&
  280. (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
  281. scsi_set_tag_type(scsi_dev, tag);
  282. if (tag)
  283. scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
  284. else
  285. scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
  286. } else
  287. tag = 0;
  288. return tag;
  289. }
  290. /**
  291. * pmcraid_init_cmdblk - initializes a command block
  292. *
  293. * @cmd: pointer to struct pmcraid_cmd to be initialized
  294. * @index: if >=0 first time initialization; otherwise reinitialization
  295. *
  296. * Return Value
  297. * None
  298. */
  299. void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  300. {
  301. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  302. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  303. if (index >= 0) {
  304. /* first time initialization (called from probe) */
  305. u32 ioasa_offset =
  306. offsetof(struct pmcraid_control_block, ioasa);
  307. cmd->index = index;
  308. ioarcb->response_handle = cpu_to_le32(index << 2);
  309. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  310. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  311. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  312. } else {
  313. /* re-initialization of various lengths, called once command is
  314. * processed by IOA
  315. */
  316. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  317. ioarcb->request_flags0 = 0;
  318. ioarcb->request_flags1 = 0;
  319. ioarcb->cmd_timeout = 0;
  320. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  321. ioarcb->ioadl_bus_addr = 0;
  322. ioarcb->ioadl_length = 0;
  323. ioarcb->data_transfer_length = 0;
  324. ioarcb->add_cmd_param_length = 0;
  325. ioarcb->add_cmd_param_offset = 0;
  326. cmd->ioa_cb->ioasa.ioasc = 0;
  327. cmd->ioa_cb->ioasa.residual_data_length = 0;
  328. cmd->u.time_left = 0;
  329. }
  330. cmd->cmd_done = NULL;
  331. cmd->scsi_cmd = NULL;
  332. cmd->release = 0;
  333. cmd->completion_req = 0;
  334. cmd->dma_handle = 0;
  335. init_timer(&cmd->timer);
  336. }
  337. /**
  338. * pmcraid_reinit_cmdblk - reinitialize a command block
  339. *
  340. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  341. *
  342. * Return Value
  343. * None
  344. */
  345. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  346. {
  347. pmcraid_init_cmdblk(cmd, -1);
  348. }
  349. /**
  350. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  351. * @pinstance: adapter instance structure
  352. *
  353. * Return Value:
  354. * returns pointer to cmd block or NULL if no blocks are available
  355. */
  356. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  357. struct pmcraid_instance *pinstance
  358. )
  359. {
  360. struct pmcraid_cmd *cmd = NULL;
  361. unsigned long lock_flags;
  362. /* free cmd block list is protected by free_pool_lock */
  363. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  364. if (!list_empty(&pinstance->free_cmd_pool)) {
  365. cmd = list_entry(pinstance->free_cmd_pool.next,
  366. struct pmcraid_cmd, free_list);
  367. list_del(&cmd->free_list);
  368. }
  369. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  370. /* Initialize the command block before giving it the caller */
  371. if (cmd != NULL)
  372. pmcraid_reinit_cmdblk(cmd);
  373. return cmd;
  374. }
  375. /**
  376. * pmcraid_return_cmd - return a completed command block back into free pool
  377. * @cmd: pointer to the command block
  378. *
  379. * Return Value:
  380. * nothing
  381. */
  382. void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  383. {
  384. struct pmcraid_instance *pinstance = cmd->drv_inst;
  385. unsigned long lock_flags;
  386. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  387. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  388. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  389. }
  390. /**
  391. * pmcraid_read_interrupts - reads IOA interrupts
  392. *
  393. * @pinstance: pointer to adapter instance structure
  394. *
  395. * Return value
  396. * interrupts read from IOA
  397. */
  398. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  399. {
  400. return ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  401. }
  402. /**
  403. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  404. *
  405. * @pinstance: pointer to per adapter instance structure
  406. * @intrs: interrupts to disable
  407. *
  408. * Return Value
  409. * None
  410. */
  411. static void pmcraid_disable_interrupts(
  412. struct pmcraid_instance *pinstance,
  413. u32 intrs
  414. )
  415. {
  416. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  417. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  418. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  419. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  420. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_mask_reg);
  421. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  422. }
  423. /**
  424. * pmcraid_enable_interrupts - Enables specified interrupts
  425. *
  426. * @pinstance: pointer to per adapter instance structure
  427. * @intr: interrupts to enable
  428. *
  429. * Return Value
  430. * None
  431. */
  432. static void pmcraid_enable_interrupts(
  433. struct pmcraid_instance *pinstance,
  434. u32 intrs
  435. )
  436. {
  437. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  438. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  439. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  440. iowrite32(~intrs, pinstance->int_regs.ioa_host_interrupt_mask_reg);
  441. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  442. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  443. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  444. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  445. }
  446. /**
  447. * pmcraid_reset_type - Determine the required reset type
  448. * @pinstance: pointer to adapter instance structure
  449. *
  450. * IOA requires hard reset if any of the following conditions is true.
  451. * 1. If HRRQ valid interrupt is not masked
  452. * 2. IOA reset alert doorbell is set
  453. * 3. If there are any error interrupts
  454. */
  455. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  456. {
  457. u32 mask;
  458. u32 intrs;
  459. u32 alerts;
  460. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  461. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  462. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  463. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  464. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  465. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  466. pmcraid_info("IOA requires hard reset\n");
  467. pinstance->ioa_hard_reset = 1;
  468. }
  469. /* If unit check is active, trigger the dump */
  470. if (intrs & INTRS_IOA_UNIT_CHECK)
  471. pinstance->ioa_unit_check = 1;
  472. }
  473. /**
  474. * pmcraid_bist_done - completion function for PCI BIST
  475. * @cmd: pointer to reset command
  476. * Return Value
  477. * none
  478. */
  479. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  480. static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
  481. {
  482. struct pmcraid_instance *pinstance = cmd->drv_inst;
  483. unsigned long lock_flags;
  484. int rc;
  485. u16 pci_reg;
  486. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  487. /* If PCI config space can't be accessed wait for another two secs */
  488. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  489. cmd->u.time_left > 0) {
  490. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  491. cmd->timer.expires = jiffies + cmd->u.time_left;
  492. cmd->u.time_left = 0;
  493. cmd->timer.data = (unsigned long)cmd;
  494. cmd->timer.function =
  495. (void (*)(unsigned long))pmcraid_bist_done;
  496. add_timer(&cmd->timer);
  497. } else {
  498. cmd->u.time_left = 0;
  499. pmcraid_info("BIST is complete, proceeding with reset\n");
  500. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  501. pmcraid_ioa_reset(cmd);
  502. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  503. }
  504. }
  505. /**
  506. * pmcraid_start_bist - starts BIST
  507. * @cmd: pointer to reset cmd
  508. * Return Value
  509. * none
  510. */
  511. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  512. {
  513. struct pmcraid_instance *pinstance = cmd->drv_inst;
  514. u32 doorbells, intrs;
  515. /* proceed with bist and wait for 2 seconds */
  516. iowrite32(DOORBELL_IOA_START_BIST,
  517. pinstance->int_regs.host_ioa_interrupt_reg);
  518. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  519. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  520. pmcraid_info("doorbells after start bist: %x intrs: %x \n",
  521. doorbells, intrs);
  522. cmd->u.time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  523. cmd->timer.data = (unsigned long)cmd;
  524. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  525. cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
  526. add_timer(&cmd->timer);
  527. }
  528. /**
  529. * pmcraid_reset_alert_done - completion routine for reset_alert
  530. * @cmd: pointer to command block used in reset sequence
  531. * Return value
  532. * None
  533. */
  534. static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
  535. {
  536. struct pmcraid_instance *pinstance = cmd->drv_inst;
  537. u32 status = ioread32(pinstance->ioa_status);
  538. unsigned long lock_flags;
  539. /* if the critical operation in progress bit is set or the wait times
  540. * out, invoke reset engine to proceed with hard reset. If there is
  541. * some more time to wait, restart the timer
  542. */
  543. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  544. cmd->u.time_left <= 0) {
  545. pmcraid_info("critical op is reset proceeding with reset\n");
  546. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  547. pmcraid_ioa_reset(cmd);
  548. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  549. } else {
  550. pmcraid_info("critical op is not yet reset waiting again\n");
  551. /* restart timer if some more time is available to wait */
  552. cmd->u.time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  553. cmd->timer.data = (unsigned long)cmd;
  554. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  555. cmd->timer.function =
  556. (void (*)(unsigned long))pmcraid_reset_alert_done;
  557. add_timer(&cmd->timer);
  558. }
  559. }
  560. /**
  561. * pmcraid_reset_alert - alerts IOA for a possible reset
  562. * @cmd : command block to be used for reset sequence.
  563. *
  564. * Return Value
  565. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  566. * successfully written to IOA. Returns non-zero in case pci_config_space
  567. * is not accessible
  568. */
  569. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  570. {
  571. struct pmcraid_instance *pinstance = cmd->drv_inst;
  572. u32 doorbells;
  573. int rc;
  574. u16 pci_reg;
  575. /* If we are able to access IOA PCI config space, alert IOA that we are
  576. * going to reset it soon. This enables IOA to preserv persistent error
  577. * data if any. In case memory space is not accessible, proceed with
  578. * BIST or slot_reset
  579. */
  580. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  581. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  582. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  583. * reset IOA doesn't generate any interrupts when CRITICAL
  584. * OPERATION bit is reset. A timer is started to wait for this
  585. * bit to be reset.
  586. */
  587. cmd->u.time_left = PMCRAID_RESET_TIMEOUT;
  588. cmd->timer.data = (unsigned long)cmd;
  589. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  590. cmd->timer.function =
  591. (void (*)(unsigned long))pmcraid_reset_alert_done;
  592. add_timer(&cmd->timer);
  593. iowrite32(DOORBELL_IOA_RESET_ALERT,
  594. pinstance->int_regs.host_ioa_interrupt_reg);
  595. doorbells =
  596. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  597. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  598. } else {
  599. pmcraid_info("PCI config is not accessible starting BIST\n");
  600. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  601. pmcraid_start_bist(cmd);
  602. }
  603. }
  604. /**
  605. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  606. *
  607. * @cmd : pointer to command structure, that got timedout
  608. *
  609. * This function blocks host requests and initiates an adapter reset.
  610. *
  611. * Return value:
  612. * None
  613. */
  614. static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
  615. {
  616. struct pmcraid_instance *pinstance = cmd->drv_inst;
  617. unsigned long lock_flags;
  618. dev_info(&pinstance->pdev->dev,
  619. "Adapter being reset due to command timeout.\n");
  620. /* Command timeouts result in hard reset sequence. The command that got
  621. * timed out may be the one used as part of reset sequence. In this
  622. * case restart reset sequence using the same command block even if
  623. * reset is in progress. Otherwise fail this command and get a free
  624. * command block to restart the reset sequence.
  625. */
  626. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  627. if (!pinstance->ioa_reset_in_progress) {
  628. pinstance->ioa_reset_attempts = 0;
  629. cmd = pmcraid_get_free_cmd(pinstance);
  630. /* If we are out of command blocks, just return here itself.
  631. * Some other command's timeout handler can do the reset job
  632. */
  633. if (cmd == NULL) {
  634. spin_unlock_irqrestore(pinstance->host->host_lock,
  635. lock_flags);
  636. pmcraid_err("no free cmnd block for timeout handler\n");
  637. return;
  638. }
  639. pinstance->reset_cmd = cmd;
  640. pinstance->ioa_reset_in_progress = 1;
  641. } else {
  642. pmcraid_info("reset is already in progress\n");
  643. if (pinstance->reset_cmd != cmd) {
  644. /* This command should have been given to IOA, this
  645. * command will be completed by fail_outstanding_cmds
  646. * anyway
  647. */
  648. pmcraid_err("cmd is pending but reset in progress\n");
  649. }
  650. /* If this command was being used as part of the reset
  651. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  652. * causes fail_outstanding_commands not to return the command
  653. * block back to free pool
  654. */
  655. if (cmd == pinstance->reset_cmd)
  656. cmd->cmd_done = pmcraid_ioa_reset;
  657. }
  658. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  659. scsi_block_requests(pinstance->host);
  660. pmcraid_reset_alert(cmd);
  661. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  662. }
  663. /**
  664. * pmcraid_internal_done - completion routine for internally generated cmds
  665. *
  666. * @cmd: command that got response from IOA
  667. *
  668. * Return Value:
  669. * none
  670. */
  671. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  672. {
  673. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  674. cmd->ioa_cb->ioarcb.cdb[0],
  675. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  676. /* Some of the internal commands are sent with callers blocking for the
  677. * response. Same will be indicated as part of cmd->completion_req
  678. * field. Response path needs to wake up any waiters waiting for cmd
  679. * completion if this flag is set.
  680. */
  681. if (cmd->completion_req) {
  682. cmd->completion_req = 0;
  683. complete(&cmd->wait_for_completion);
  684. }
  685. /* most of the internal commands are completed by caller itself, so
  686. * no need to return the command block back to free pool until we are
  687. * required to do so (e.g once done with initialization).
  688. */
  689. if (cmd->release) {
  690. cmd->release = 0;
  691. pmcraid_return_cmd(cmd);
  692. }
  693. }
  694. /**
  695. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  696. *
  697. * @cmd: command that got response from IOA
  698. *
  699. * This routine is called after driver re-reads configuration table due to a
  700. * lost CCN. It returns the command block back to free pool and schedules
  701. * worker thread to add/delete devices into the system.
  702. *
  703. * Return Value:
  704. * none
  705. */
  706. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  707. {
  708. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  709. cmd->ioa_cb->ioarcb.cdb[0],
  710. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  711. if (cmd->release) {
  712. cmd->release = 0;
  713. pmcraid_return_cmd(cmd);
  714. }
  715. pmcraid_info("scheduling worker for config table reinitialization\n");
  716. schedule_work(&cmd->drv_inst->worker_q);
  717. }
  718. /**
  719. * pmcraid_erp_done - Process completion of SCSI error response from device
  720. * @cmd: pmcraid_command
  721. *
  722. * This function copies the sense buffer into the scsi_cmd struct and completes
  723. * scsi_cmd by calling scsi_done function.
  724. *
  725. * Return value:
  726. * none
  727. */
  728. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  729. {
  730. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  731. struct pmcraid_instance *pinstance = cmd->drv_inst;
  732. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  733. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  734. scsi_cmd->result |= (DID_ERROR << 16);
  735. scmd_printk(KERN_INFO, scsi_cmd,
  736. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  737. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  738. }
  739. /* if we had allocated sense buffers for request sense, copy the sense
  740. * release the buffers
  741. */
  742. if (cmd->sense_buffer != NULL) {
  743. memcpy(scsi_cmd->sense_buffer,
  744. cmd->sense_buffer,
  745. SCSI_SENSE_BUFFERSIZE);
  746. pci_free_consistent(pinstance->pdev,
  747. SCSI_SENSE_BUFFERSIZE,
  748. cmd->sense_buffer, cmd->sense_buffer_dma);
  749. cmd->sense_buffer = NULL;
  750. cmd->sense_buffer_dma = 0;
  751. }
  752. scsi_dma_unmap(scsi_cmd);
  753. pmcraid_return_cmd(cmd);
  754. scsi_cmd->scsi_done(scsi_cmd);
  755. }
  756. /**
  757. * pmcraid_fire_command - sends an IOA command to adapter
  758. *
  759. * This function adds the given block into pending command list
  760. * and returns without waiting
  761. *
  762. * @cmd : command to be sent to the device
  763. *
  764. * Return Value
  765. * None
  766. */
  767. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  768. {
  769. struct pmcraid_instance *pinstance = cmd->drv_inst;
  770. unsigned long lock_flags;
  771. /* Add this command block to pending cmd pool. We do this prior to
  772. * writting IOARCB to ioarrin because IOA might complete the command
  773. * by the time we are about to add it to the list. Response handler
  774. * (isr/tasklet) looks for cmb block in the pending pending list.
  775. */
  776. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  777. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  778. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  779. atomic_inc(&pinstance->outstanding_cmds);
  780. /* driver writes lower 32-bit value of IOARCB address only */
  781. mb();
  782. iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
  783. pinstance->ioarrin);
  784. }
  785. /**
  786. * pmcraid_send_cmd - fires a command to IOA
  787. *
  788. * This function also sets up timeout function, and command completion
  789. * function
  790. *
  791. * @cmd: pointer to the command block to be fired to IOA
  792. * @cmd_done: command completion function, called once IOA responds
  793. * @timeout: timeout to wait for this command completion
  794. * @timeout_func: timeout handler
  795. *
  796. * Return value
  797. * none
  798. */
  799. static void pmcraid_send_cmd(
  800. struct pmcraid_cmd *cmd,
  801. void (*cmd_done) (struct pmcraid_cmd *),
  802. unsigned long timeout,
  803. void (*timeout_func) (struct pmcraid_cmd *)
  804. )
  805. {
  806. /* initialize done function */
  807. cmd->cmd_done = cmd_done;
  808. if (timeout_func) {
  809. /* setup timeout handler */
  810. cmd->timer.data = (unsigned long)cmd;
  811. cmd->timer.expires = jiffies + timeout;
  812. cmd->timer.function = (void (*)(unsigned long))timeout_func;
  813. add_timer(&cmd->timer);
  814. }
  815. /* fire the command to IOA */
  816. _pmcraid_fire_command(cmd);
  817. }
  818. /**
  819. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  820. *
  821. * @cmd: pointer to the command block used as part of reset sequence
  822. *
  823. * Return Value
  824. * None
  825. */
  826. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  827. {
  828. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  829. cmd->ioa_cb->ioarcb.cdb[0],
  830. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  831. /* Note that commands sent during reset require next command to be sent
  832. * to IOA. Hence reinit the done function as well as timeout function
  833. */
  834. pmcraid_reinit_cmdblk(cmd);
  835. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  836. cmd->ioa_cb->ioarcb.resource_handle =
  837. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  838. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  839. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  840. /* fire shutdown command to hardware. */
  841. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  842. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  843. pmcraid_send_cmd(cmd, pmcraid_ioa_reset,
  844. PMCRAID_SHUTDOWN_TIMEOUT,
  845. pmcraid_timeout_handler);
  846. }
  847. /**
  848. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  849. * @cmd: pointer to command block to be used for identify hrrq
  850. *
  851. * Return Value
  852. * 0 in case of success, otherwise non-zero failure code
  853. */
  854. static void pmcraid_querycfg(struct pmcraid_cmd *);
  855. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  856. {
  857. struct pmcraid_instance *pinstance = cmd->drv_inst;
  858. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  859. int index = 0;
  860. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  861. u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  862. pmcraid_reinit_cmdblk(cmd);
  863. /* Initialize ioarcb */
  864. ioarcb->request_type = REQ_TYPE_IOACMD;
  865. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  866. /* initialize the hrrq number where IOA will respond to this command */
  867. ioarcb->hrrq_id = index;
  868. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  869. ioarcb->cdb[1] = index;
  870. /* IOA expects 64-bit pci address to be written in B.E format
  871. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  872. */
  873. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb => %llx:%llx\n",
  874. hrrq_addr, ioarcb->ioarcb_bus_addr);
  875. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  876. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  877. /* Subsequent commands require HRRQ identification to be successful.
  878. * Note that this gets called even during reset from SCSI mid-layer
  879. * or tasklet
  880. */
  881. pmcraid_send_cmd(cmd, pmcraid_querycfg,
  882. PMCRAID_INTERNAL_TIMEOUT,
  883. pmcraid_timeout_handler);
  884. }
  885. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  886. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  887. /**
  888. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  889. *
  890. * @cmd: initialized command block pointer
  891. *
  892. * Return Value
  893. * none
  894. */
  895. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  896. {
  897. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  898. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  899. else
  900. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  901. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  902. }
  903. /**
  904. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  905. *
  906. * @pinstance: pointer to adapter instance structure
  907. * @type: HCAM type
  908. *
  909. * Return Value
  910. * pointer to initialized pmcraid_cmd structure or NULL
  911. */
  912. static struct pmcraid_cmd *pmcraid_init_hcam
  913. (
  914. struct pmcraid_instance *pinstance,
  915. u8 type
  916. )
  917. {
  918. struct pmcraid_cmd *cmd;
  919. struct pmcraid_ioarcb *ioarcb;
  920. struct pmcraid_ioadl_desc *ioadl;
  921. struct pmcraid_hostrcb *hcam;
  922. void (*cmd_done) (struct pmcraid_cmd *);
  923. dma_addr_t dma;
  924. int rcb_size;
  925. cmd = pmcraid_get_free_cmd(pinstance);
  926. if (!cmd) {
  927. pmcraid_err("no free command blocks for hcam\n");
  928. return cmd;
  929. }
  930. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  931. rcb_size = sizeof(struct pmcraid_hcam_ccn);
  932. cmd_done = pmcraid_process_ccn;
  933. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  934. hcam = &pinstance->ccn;
  935. } else {
  936. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  937. cmd_done = pmcraid_process_ldn;
  938. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  939. hcam = &pinstance->ldn;
  940. }
  941. /* initialize command pointer used for HCAM registration */
  942. hcam->cmd = cmd;
  943. ioarcb = &cmd->ioa_cb->ioarcb;
  944. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  945. offsetof(struct pmcraid_ioarcb,
  946. add_data.u.ioadl[0]));
  947. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  948. ioadl = ioarcb->add_data.u.ioadl;
  949. /* Initialize ioarcb */
  950. ioarcb->request_type = REQ_TYPE_HCAM;
  951. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  952. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  953. ioarcb->cdb[1] = type;
  954. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  955. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  956. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  957. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  958. ioadl[0].data_len = cpu_to_le32(rcb_size);
  959. ioadl[0].address = cpu_to_le32(dma);
  960. cmd->cmd_done = cmd_done;
  961. return cmd;
  962. }
  963. /**
  964. * pmcraid_send_hcam - Send an HCAM to IOA
  965. * @pinstance: ioa config struct
  966. * @type: HCAM type
  967. *
  968. * This function will send a Host Controlled Async command to IOA.
  969. *
  970. * Return value:
  971. * none
  972. */
  973. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  974. {
  975. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  976. pmcraid_send_hcam_cmd(cmd);
  977. }
  978. /**
  979. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  980. *
  981. * @cmd: pointer to cmd that is used as cancelling command
  982. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  983. */
  984. static void pmcraid_prepare_cancel_cmd(
  985. struct pmcraid_cmd *cmd,
  986. struct pmcraid_cmd *cmd_to_cancel
  987. )
  988. {
  989. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  990. __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
  991. /* Get the resource handle to where the command to be aborted has been
  992. * sent.
  993. */
  994. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  995. ioarcb->request_type = REQ_TYPE_IOACMD;
  996. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  997. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  998. /* IOARCB address of the command to be cancelled is given in
  999. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1000. * IOARCB address are not masked.
  1001. */
  1002. ioarcb_addr = cpu_to_be64(ioarcb_addr);
  1003. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1004. }
  1005. /**
  1006. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1007. *
  1008. * @cmd: command to be used as cancelling command
  1009. * @type: HCAM type
  1010. * @cmd_done: op done function for the cancelling command
  1011. */
  1012. static void pmcraid_cancel_hcam(
  1013. struct pmcraid_cmd *cmd,
  1014. u8 type,
  1015. void (*cmd_done) (struct pmcraid_cmd *)
  1016. )
  1017. {
  1018. struct pmcraid_instance *pinstance;
  1019. struct pmcraid_hostrcb *hcam;
  1020. pinstance = cmd->drv_inst;
  1021. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1022. &pinstance->ldn : &pinstance->ccn;
  1023. /* prepare for cancelling previous hcam command. If the HCAM is
  1024. * currently not pending with IOA, we would have hcam->cmd as non-null
  1025. */
  1026. if (hcam->cmd == NULL)
  1027. return;
  1028. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1029. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1030. * schedule queuecommand while we are doing this
  1031. */
  1032. pmcraid_send_cmd(cmd, cmd_done,
  1033. PMCRAID_INTERNAL_TIMEOUT,
  1034. pmcraid_timeout_handler);
  1035. }
  1036. /**
  1037. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1038. *
  1039. * @cmd: command block to be used for cancelling the HCAM
  1040. */
  1041. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1042. {
  1043. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1044. cmd->ioa_cb->ioarcb.cdb[0],
  1045. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1046. pmcraid_reinit_cmdblk(cmd);
  1047. pmcraid_cancel_hcam(cmd,
  1048. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1049. pmcraid_ioa_shutdown);
  1050. }
  1051. /**
  1052. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1053. *
  1054. * @cmd: command block to be used for cancelling the HCAM
  1055. */
  1056. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1057. {
  1058. pmcraid_cancel_hcam(cmd,
  1059. PMCRAID_HCAM_CODE_LOG_DATA,
  1060. pmcraid_cancel_ccn);
  1061. }
  1062. /**
  1063. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1064. *
  1065. * @cfgte: pointer to configuration table entry of the resource
  1066. *
  1067. * Return value:
  1068. * true if resource can be added to midlayer, false(0) otherwise
  1069. */
  1070. static int pmcraid_expose_resource(struct pmcraid_config_table_entry *cfgte)
  1071. {
  1072. int retval = 0;
  1073. if (cfgte->resource_type == RES_TYPE_VSET)
  1074. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1075. else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1076. retval = (RES_BUS(cfgte->resource_address) !=
  1077. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1078. return retval;
  1079. }
  1080. /* attributes supported by pmcraid_event_family */
  1081. enum {
  1082. PMCRAID_AEN_ATTR_UNSPEC,
  1083. PMCRAID_AEN_ATTR_EVENT,
  1084. __PMCRAID_AEN_ATTR_MAX,
  1085. };
  1086. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1087. /* commands supported by pmcraid_event_family */
  1088. enum {
  1089. PMCRAID_AEN_CMD_UNSPEC,
  1090. PMCRAID_AEN_CMD_EVENT,
  1091. __PMCRAID_AEN_CMD_MAX,
  1092. };
  1093. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1094. static struct genl_family pmcraid_event_family = {
  1095. .id = GENL_ID_GENERATE,
  1096. .name = "pmcraid",
  1097. .version = 1,
  1098. .maxattr = PMCRAID_AEN_ATTR_MAX
  1099. };
  1100. /**
  1101. * pmcraid_netlink_init - registers pmcraid_event_family
  1102. *
  1103. * Return value:
  1104. * 0 if the pmcraid_event_family is successfully registered
  1105. * with netlink generic, non-zero otherwise
  1106. */
  1107. static int pmcraid_netlink_init(void)
  1108. {
  1109. int result;
  1110. result = genl_register_family(&pmcraid_event_family);
  1111. if (result)
  1112. return result;
  1113. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1114. pmcraid_event_family.id);
  1115. return result;
  1116. }
  1117. /**
  1118. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1119. *
  1120. * Return value:
  1121. * none
  1122. */
  1123. static void pmcraid_netlink_release(void)
  1124. {
  1125. genl_unregister_family(&pmcraid_event_family);
  1126. }
  1127. /**
  1128. * pmcraid_notify_aen - sends event msg to user space application
  1129. * @pinstance: pointer to adapter instance structure
  1130. * @type: HCAM type
  1131. *
  1132. * Return value:
  1133. * 0 if success, error value in case of any failure.
  1134. */
  1135. static int pmcraid_notify_aen(struct pmcraid_instance *pinstance, u8 type)
  1136. {
  1137. struct sk_buff *skb;
  1138. struct pmcraid_aen_msg *aen_msg;
  1139. void *msg_header;
  1140. int data_size, total_size;
  1141. int result;
  1142. if (type == PMCRAID_HCAM_CODE_LOG_DATA) {
  1143. aen_msg = pinstance->ldn.msg;
  1144. data_size = pinstance->ldn.hcam->data_len;
  1145. } else {
  1146. aen_msg = pinstance->ccn.msg;
  1147. data_size = pinstance->ccn.hcam->data_len;
  1148. }
  1149. data_size += sizeof(struct pmcraid_hcam_hdr);
  1150. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1151. MINOR(pinstance->cdev.dev));
  1152. aen_msg->length = data_size;
  1153. data_size += sizeof(*aen_msg);
  1154. total_size = nla_total_size(data_size);
  1155. skb = genlmsg_new(total_size, GFP_ATOMIC);
  1156. if (!skb) {
  1157. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1158. total_size);
  1159. return -ENOMEM;
  1160. }
  1161. /* add the genetlink message header */
  1162. msg_header = genlmsg_put(skb, 0, 0,
  1163. &pmcraid_event_family, 0,
  1164. PMCRAID_AEN_CMD_EVENT);
  1165. if (!msg_header) {
  1166. pmcraid_err("failed to copy command details\n");
  1167. nlmsg_free(skb);
  1168. return -ENOMEM;
  1169. }
  1170. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1171. if (result) {
  1172. pmcraid_err("failed to copy AEN attribute data \n");
  1173. nlmsg_free(skb);
  1174. return -EINVAL;
  1175. }
  1176. /* send genetlink multicast message to notify appplications */
  1177. result = genlmsg_end(skb, msg_header);
  1178. if (result < 0) {
  1179. pmcraid_err("genlmsg_end failed\n");
  1180. nlmsg_free(skb);
  1181. return result;
  1182. }
  1183. result =
  1184. genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
  1185. /* If there are no listeners, genlmsg_multicast may return non-zero
  1186. * value.
  1187. */
  1188. if (result)
  1189. pmcraid_info("failed to send %s event message %x!\n",
  1190. type == PMCRAID_HCAM_CODE_LOG_DATA ? "LDN" : "CCN",
  1191. result);
  1192. return result;
  1193. }
  1194. /**
  1195. * pmcraid_handle_config_change - Handle a config change from the adapter
  1196. * @pinstance: pointer to per adapter instance structure
  1197. *
  1198. * Return value:
  1199. * none
  1200. */
  1201. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1202. {
  1203. struct pmcraid_config_table_entry *cfg_entry;
  1204. struct pmcraid_hcam_ccn *ccn_hcam;
  1205. struct pmcraid_cmd *cmd;
  1206. struct pmcraid_cmd *cfgcmd;
  1207. struct pmcraid_resource_entry *res = NULL;
  1208. unsigned long lock_flags;
  1209. unsigned long host_lock_flags;
  1210. u32 new_entry = 1;
  1211. u32 hidden_entry = 0;
  1212. int rc;
  1213. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1214. cfg_entry = &ccn_hcam->cfg_entry;
  1215. pmcraid_info
  1216. ("CCN(%x): %x type: %x lost: %x flags: %x res: %x:%x:%x:%x\n",
  1217. pinstance->ccn.hcam->ilid,
  1218. pinstance->ccn.hcam->op_code,
  1219. pinstance->ccn.hcam->notification_type,
  1220. pinstance->ccn.hcam->notification_lost,
  1221. pinstance->ccn.hcam->flags,
  1222. pinstance->host->unique_id,
  1223. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1224. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1225. RES_BUS(cfg_entry->resource_address)),
  1226. RES_IS_VSET(*cfg_entry) ? cfg_entry->unique_flags1 :
  1227. RES_TARGET(cfg_entry->resource_address),
  1228. RES_LUN(cfg_entry->resource_address));
  1229. /* If this HCAM indicates a lost notification, read the config table */
  1230. if (pinstance->ccn.hcam->notification_lost) {
  1231. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1232. if (cfgcmd) {
  1233. pmcraid_info("lost CCN, reading config table\b");
  1234. pinstance->reinit_cfg_table = 1;
  1235. pmcraid_querycfg(cfgcmd);
  1236. } else {
  1237. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1238. }
  1239. goto out_notify_apps;
  1240. }
  1241. /* If this resource is not going to be added to mid-layer, just notify
  1242. * applications and return. If this notification is about hiding a VSET
  1243. * resource, check if it was exposed already.
  1244. */
  1245. if (pinstance->ccn.hcam->notification_type ==
  1246. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1247. cfg_entry->resource_type == RES_TYPE_VSET &&
  1248. cfg_entry->unique_flags1 & 0x80) {
  1249. hidden_entry = 1;
  1250. } else if (!pmcraid_expose_resource(cfg_entry))
  1251. goto out_notify_apps;
  1252. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1253. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1254. rc = memcmp(&res->cfg_entry.resource_address,
  1255. &cfg_entry->resource_address,
  1256. sizeof(cfg_entry->resource_address));
  1257. if (!rc) {
  1258. new_entry = 0;
  1259. break;
  1260. }
  1261. }
  1262. if (new_entry) {
  1263. if (hidden_entry) {
  1264. spin_unlock_irqrestore(&pinstance->resource_lock,
  1265. lock_flags);
  1266. goto out_notify_apps;
  1267. }
  1268. /* If there are more number of resources than what driver can
  1269. * manage, do not notify the applications about the CCN. Just
  1270. * ignore this notifications and re-register the same HCAM
  1271. */
  1272. if (list_empty(&pinstance->free_res_q)) {
  1273. spin_unlock_irqrestore(&pinstance->resource_lock,
  1274. lock_flags);
  1275. pmcraid_err("too many resources attached\n");
  1276. spin_lock_irqsave(pinstance->host->host_lock,
  1277. host_lock_flags);
  1278. pmcraid_send_hcam(pinstance,
  1279. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1280. spin_unlock_irqrestore(pinstance->host->host_lock,
  1281. host_lock_flags);
  1282. return;
  1283. }
  1284. res = list_entry(pinstance->free_res_q.next,
  1285. struct pmcraid_resource_entry, queue);
  1286. list_del(&res->queue);
  1287. res->scsi_dev = NULL;
  1288. res->reset_progress = 0;
  1289. list_add_tail(&res->queue, &pinstance->used_res_q);
  1290. }
  1291. memcpy(&res->cfg_entry, cfg_entry,
  1292. sizeof(struct pmcraid_config_table_entry));
  1293. if (pinstance->ccn.hcam->notification_type ==
  1294. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1295. if (res->scsi_dev) {
  1296. res->cfg_entry.unique_flags1 &= 0x7F;
  1297. res->change_detected = RES_CHANGE_DEL;
  1298. res->cfg_entry.resource_handle =
  1299. PMCRAID_INVALID_RES_HANDLE;
  1300. schedule_work(&pinstance->worker_q);
  1301. } else {
  1302. /* This may be one of the non-exposed resources */
  1303. list_move_tail(&res->queue, &pinstance->free_res_q);
  1304. }
  1305. } else if (!res->scsi_dev) {
  1306. res->change_detected = RES_CHANGE_ADD;
  1307. schedule_work(&pinstance->worker_q);
  1308. }
  1309. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1310. out_notify_apps:
  1311. /* Notify configuration changes to registered applications.*/
  1312. if (!pmcraid_disable_aen)
  1313. pmcraid_notify_aen(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1314. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1315. if (cmd)
  1316. pmcraid_send_hcam_cmd(cmd);
  1317. }
  1318. /**
  1319. * pmcraid_get_error_info - return error string for an ioasc
  1320. * @ioasc: ioasc code
  1321. * Return Value
  1322. * none
  1323. */
  1324. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1325. {
  1326. int i;
  1327. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1328. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1329. return &pmcraid_ioasc_error_table[i];
  1330. }
  1331. return NULL;
  1332. }
  1333. /**
  1334. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1335. * @ioasc: ioasc code
  1336. * @cmd: pointer to command that resulted in 'ioasc'
  1337. */
  1338. void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1339. {
  1340. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1341. if (error_info == NULL ||
  1342. cmd->drv_inst->current_log_level < error_info->log_level)
  1343. return;
  1344. /* log the error string */
  1345. pmcraid_err("cmd [%d] for resource %x failed with %x(%s)\n",
  1346. cmd->ioa_cb->ioarcb.cdb[0],
  1347. cmd->ioa_cb->ioarcb.resource_handle,
  1348. le32_to_cpu(ioasc), error_info->error_string);
  1349. }
  1350. /**
  1351. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1352. *
  1353. * @pinstance: pointer to per adapter instance structure
  1354. *
  1355. * Return value:
  1356. * none
  1357. */
  1358. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1359. {
  1360. struct pmcraid_hcam_ldn *hcam_ldn;
  1361. u32 ioasc;
  1362. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1363. pmcraid_info
  1364. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1365. pinstance->ldn.hcam->ilid,
  1366. pinstance->ldn.hcam->op_code,
  1367. pinstance->ldn.hcam->notification_type,
  1368. pinstance->ldn.hcam->notification_lost,
  1369. pinstance->ldn.hcam->flags,
  1370. pinstance->ldn.hcam->overlay_id);
  1371. /* log only the errors, no need to log informational log entries */
  1372. if (pinstance->ldn.hcam->notification_type !=
  1373. NOTIFICATION_TYPE_ERROR_LOG)
  1374. return;
  1375. if (pinstance->ldn.hcam->notification_lost ==
  1376. HOSTRCB_NOTIFICATIONS_LOST)
  1377. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1378. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1379. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1380. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1381. dev_info(&pinstance->pdev->dev,
  1382. "UnitAttention due to IOA Bus Reset\n");
  1383. scsi_report_bus_reset(
  1384. pinstance->host,
  1385. RES_BUS(hcam_ldn->error_log.fd_ra));
  1386. }
  1387. return;
  1388. }
  1389. /**
  1390. * pmcraid_process_ccn - Op done function for a CCN.
  1391. * @cmd: pointer to command struct
  1392. *
  1393. * This function is the op done function for a configuration
  1394. * change notification
  1395. *
  1396. * Return value:
  1397. * none
  1398. */
  1399. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1400. {
  1401. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1402. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1403. unsigned long lock_flags;
  1404. pinstance->ccn.cmd = NULL;
  1405. pmcraid_return_cmd(cmd);
  1406. /* If driver initiated IOA reset happened while this hcam was pending
  1407. * with IOA, or IOA bringdown sequence is in progress, no need to
  1408. * re-register the hcam
  1409. */
  1410. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1411. atomic_read(&pinstance->ccn.ignore) == 1) {
  1412. return;
  1413. } else if (ioasc) {
  1414. dev_info(&pinstance->pdev->dev,
  1415. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1416. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1417. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1418. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1419. } else {
  1420. pmcraid_handle_config_change(pinstance);
  1421. }
  1422. }
  1423. /**
  1424. * pmcraid_process_ldn - op done function for an LDN
  1425. * @cmd: pointer to command block
  1426. *
  1427. * Return value
  1428. * none
  1429. */
  1430. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1431. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1432. {
  1433. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1434. struct pmcraid_hcam_ldn *ldn_hcam =
  1435. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1436. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1437. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1438. unsigned long lock_flags;
  1439. /* return the command block back to freepool */
  1440. pinstance->ldn.cmd = NULL;
  1441. pmcraid_return_cmd(cmd);
  1442. /* If driver initiated IOA reset happened while this hcam was pending
  1443. * with IOA, no need to re-register the hcam as reset engine will do it
  1444. * once reset sequence is complete
  1445. */
  1446. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1447. atomic_read(&pinstance->ccn.ignore) == 1) {
  1448. return;
  1449. } else if (!ioasc) {
  1450. pmcraid_handle_error_log(pinstance);
  1451. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1452. spin_lock_irqsave(pinstance->host->host_lock,
  1453. lock_flags);
  1454. pmcraid_initiate_reset(pinstance);
  1455. spin_unlock_irqrestore(pinstance->host->host_lock,
  1456. lock_flags);
  1457. return;
  1458. }
  1459. } else {
  1460. dev_info(&pinstance->pdev->dev,
  1461. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1462. }
  1463. /* send netlink message for HCAM notification if enabled */
  1464. if (!pmcraid_disable_aen)
  1465. pmcraid_notify_aen(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1466. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1467. if (cmd)
  1468. pmcraid_send_hcam_cmd(cmd);
  1469. }
  1470. /**
  1471. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1472. *
  1473. * @pinstance: pointer per adapter instance structure
  1474. *
  1475. * Return Value
  1476. * none
  1477. */
  1478. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1479. {
  1480. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1481. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1482. }
  1483. /**
  1484. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1485. * @cmd: pointer to command used as part of reset sequence
  1486. */
  1487. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1488. {
  1489. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1490. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1491. * handling hcam response though it is not necessary. In order to
  1492. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1493. * re-send any more hcams
  1494. */
  1495. atomic_set(&pinstance->ccn.ignore, 1);
  1496. atomic_set(&pinstance->ldn.ignore, 1);
  1497. /* If adapter reset was forced as part of runtime reset sequence,
  1498. * start the reset sequence.
  1499. */
  1500. if (pinstance->force_ioa_reset && !pinstance->ioa_bringdown) {
  1501. pinstance->force_ioa_reset = 0;
  1502. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1503. pmcraid_reset_alert(cmd);
  1504. return;
  1505. }
  1506. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1507. * one after the other. So CCN cancellation will be triggered by
  1508. * pmcraid_cancel_ldn itself.
  1509. */
  1510. pmcraid_cancel_ldn(cmd);
  1511. }
  1512. /**
  1513. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1514. * @pinstance: pointer to adapter instance structure
  1515. * Return Value
  1516. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1517. */
  1518. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1519. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1520. {
  1521. u32 intrs;
  1522. pmcraid_reinit_buffers(pinstance);
  1523. intrs = pmcraid_read_interrupts(pinstance);
  1524. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1525. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1526. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1527. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  1528. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1529. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1530. return 1;
  1531. } else {
  1532. return 0;
  1533. }
  1534. }
  1535. /**
  1536. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1537. * @cmd : pointer to reset command block
  1538. *
  1539. * Return Value
  1540. * none
  1541. */
  1542. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1543. {
  1544. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1545. u32 int_reg;
  1546. u32 doorbell;
  1547. /* There will be an interrupt when Transition to Operational bit is
  1548. * set so tasklet would execute next reset task. The timeout handler
  1549. * would re-initiate a reset
  1550. */
  1551. cmd->cmd_done = pmcraid_ioa_reset;
  1552. cmd->timer.data = (unsigned long)cmd;
  1553. cmd->timer.expires = jiffies +
  1554. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1555. cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
  1556. if (!timer_pending(&cmd->timer))
  1557. add_timer(&cmd->timer);
  1558. /* Enable destructive diagnostics on IOA if it is not yet in
  1559. * operational state
  1560. */
  1561. doorbell = DOORBELL_RUNTIME_RESET |
  1562. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1563. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1564. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1565. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1566. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1567. int_reg);
  1568. }
  1569. /**
  1570. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1571. *
  1572. * @pinstance: pointer to adapter instance structure
  1573. *
  1574. * Return Value
  1575. * none
  1576. */
  1577. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1578. {
  1579. pmcraid_info("%s is not yet implemented\n", __func__);
  1580. }
  1581. /**
  1582. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1583. * @pinstance: pointer to adapter instance structure
  1584. *
  1585. * This function fails all outstanding ops. If they are submitted to IOA
  1586. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1587. * otherwise just completes the commands and returns the cmd blocks to free
  1588. * pool.
  1589. *
  1590. * Return value:
  1591. * none
  1592. */
  1593. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1594. {
  1595. struct pmcraid_cmd *cmd, *temp;
  1596. unsigned long lock_flags;
  1597. /* pending command list is protected by pending_pool_lock. Its
  1598. * traversal must be done as within this lock
  1599. */
  1600. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1601. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1602. free_list) {
  1603. list_del(&cmd->free_list);
  1604. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1605. lock_flags);
  1606. cmd->ioa_cb->ioasa.ioasc =
  1607. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1608. cmd->ioa_cb->ioasa.ilid =
  1609. cpu_to_be32(PMCRAID_DRIVER_ILID);
  1610. /* In case the command timer is still running */
  1611. del_timer(&cmd->timer);
  1612. /* If this is an IO command, complete it by invoking scsi_done
  1613. * function. If this is one of the internal commands other
  1614. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1615. * complete it
  1616. */
  1617. if (cmd->scsi_cmd) {
  1618. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1619. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1620. scsi_cmd->result |= DID_ERROR << 16;
  1621. scsi_dma_unmap(scsi_cmd);
  1622. pmcraid_return_cmd(cmd);
  1623. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1624. le32_to_cpu(resp) >> 2,
  1625. cmd->ioa_cb->ioarcb.cdb[0],
  1626. scsi_cmd->result);
  1627. scsi_cmd->scsi_done(scsi_cmd);
  1628. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1629. cmd->cmd_done == pmcraid_erp_done) {
  1630. cmd->cmd_done(cmd);
  1631. } else if (cmd->cmd_done != pmcraid_ioa_reset) {
  1632. pmcraid_return_cmd(cmd);
  1633. }
  1634. atomic_dec(&pinstance->outstanding_cmds);
  1635. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1636. }
  1637. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1638. }
  1639. /**
  1640. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1641. *
  1642. * @cmd: pointer to the cmd block to be used for entire reset process
  1643. *
  1644. * This function executes most of the steps required for IOA reset. This gets
  1645. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1646. * 'eh_' thread. Access to variables used for controling the reset sequence is
  1647. * synchronized using host lock. Various functions called during reset process
  1648. * would make use of a single command block, pointer to which is also stored in
  1649. * adapter instance structure.
  1650. *
  1651. * Return Value
  1652. * None
  1653. */
  1654. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1655. {
  1656. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1657. u8 reset_complete = 0;
  1658. pinstance->ioa_reset_in_progress = 1;
  1659. if (pinstance->reset_cmd != cmd) {
  1660. pmcraid_err("reset is called with different command block\n");
  1661. pinstance->reset_cmd = cmd;
  1662. }
  1663. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1664. pinstance->ioa_state, cmd);
  1665. switch (pinstance->ioa_state) {
  1666. case IOA_STATE_DEAD:
  1667. /* If IOA is offline, whatever may be the reset reason, just
  1668. * return. callers might be waiting on the reset wait_q, wake
  1669. * up them
  1670. */
  1671. pmcraid_err("IOA is offline no reset is possible\n");
  1672. reset_complete = 1;
  1673. break;
  1674. case IOA_STATE_IN_BRINGDOWN:
  1675. /* we enter here, once ioa shutdown command is processed by IOA
  1676. * Alert IOA for a possible reset. If reset alert fails, IOA
  1677. * goes through hard-reset
  1678. */
  1679. pmcraid_disable_interrupts(pinstance, ~0);
  1680. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1681. pmcraid_reset_alert(cmd);
  1682. break;
  1683. case IOA_STATE_UNKNOWN:
  1684. /* We may be called during probe or resume. Some pre-processing
  1685. * is required for prior to reset
  1686. */
  1687. scsi_block_requests(pinstance->host);
  1688. /* If asked to reset while IOA was processing responses or
  1689. * there are any error responses then IOA may require
  1690. * hard-reset.
  1691. */
  1692. if (pinstance->ioa_hard_reset == 0) {
  1693. if (ioread32(pinstance->ioa_status) &
  1694. INTRS_TRANSITION_TO_OPERATIONAL) {
  1695. pmcraid_info("sticky bit set, bring-up\n");
  1696. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1697. pmcraid_reinit_cmdblk(cmd);
  1698. pmcraid_identify_hrrq(cmd);
  1699. } else {
  1700. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1701. pmcraid_soft_reset(cmd);
  1702. }
  1703. } else {
  1704. /* Alert IOA of a possible reset and wait for critical
  1705. * operation in progress bit to reset
  1706. */
  1707. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1708. pmcraid_reset_alert(cmd);
  1709. }
  1710. break;
  1711. case IOA_STATE_IN_RESET_ALERT:
  1712. /* If critical operation in progress bit is reset or wait gets
  1713. * timed out, reset proceeds with starting BIST on the IOA.
  1714. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1715. * they are 3 or more, reset engine marks IOA dead and returns
  1716. */
  1717. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1718. pmcraid_start_bist(cmd);
  1719. break;
  1720. case IOA_STATE_IN_HARD_RESET:
  1721. pinstance->ioa_reset_attempts++;
  1722. /* retry reset if we haven't reached maximum allowed limit */
  1723. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1724. pinstance->ioa_reset_attempts = 0;
  1725. pmcraid_err("IOA didn't respond marking it as dead\n");
  1726. pinstance->ioa_state = IOA_STATE_DEAD;
  1727. reset_complete = 1;
  1728. break;
  1729. }
  1730. /* Once either bist or pci reset is done, restore PCI config
  1731. * space. If this fails, proceed with hard reset again
  1732. */
  1733. if (pci_restore_state(pinstance->pdev)) {
  1734. pmcraid_info("config-space error resetting again\n");
  1735. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1736. pmcraid_reset_alert(cmd);
  1737. break;
  1738. }
  1739. /* fail all pending commands */
  1740. pmcraid_fail_outstanding_cmds(pinstance);
  1741. /* check if unit check is active, if so extract dump */
  1742. if (pinstance->ioa_unit_check) {
  1743. pmcraid_info("unit check is active\n");
  1744. pinstance->ioa_unit_check = 0;
  1745. pmcraid_get_dump(pinstance);
  1746. pinstance->ioa_reset_attempts--;
  1747. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1748. pmcraid_reset_alert(cmd);
  1749. break;
  1750. }
  1751. /* if the reset reason is to bring-down the ioa, we might be
  1752. * done with the reset restore pci_config_space and complete
  1753. * the reset
  1754. */
  1755. if (pinstance->ioa_bringdown) {
  1756. pmcraid_info("bringing down the adapter\n");
  1757. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1758. pinstance->ioa_bringdown = 0;
  1759. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1760. reset_complete = 1;
  1761. } else {
  1762. /* bring-up IOA, so proceed with soft reset
  1763. * Reinitialize hrrq_buffers and their indices also
  1764. * enable interrupts after a pci_restore_state
  1765. */
  1766. if (pmcraid_reset_enable_ioa(pinstance)) {
  1767. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1768. pmcraid_info("bringing up the adapter\n");
  1769. pmcraid_reinit_cmdblk(cmd);
  1770. pmcraid_identify_hrrq(cmd);
  1771. } else {
  1772. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1773. pmcraid_soft_reset(cmd);
  1774. }
  1775. }
  1776. break;
  1777. case IOA_STATE_IN_SOFT_RESET:
  1778. /* TRANSITION TO OPERATIONAL is on so start initialization
  1779. * sequence
  1780. */
  1781. pmcraid_info("In softreset proceeding with bring-up\n");
  1782. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1783. /* Initialization commands start with HRRQ identification. From
  1784. * now on tasklet completes most of the commands as IOA is up
  1785. * and intrs are enabled
  1786. */
  1787. pmcraid_identify_hrrq(cmd);
  1788. break;
  1789. case IOA_STATE_IN_BRINGUP:
  1790. /* we are done with bringing up of IOA, change the ioa_state to
  1791. * operational and wake up any waiters
  1792. */
  1793. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1794. reset_complete = 1;
  1795. break;
  1796. case IOA_STATE_OPERATIONAL:
  1797. default:
  1798. /* When IOA is operational and a reset is requested, check for
  1799. * the reset reason. If reset is to bring down IOA, unregister
  1800. * HCAMs and initiate shutdown; if adapter reset is forced then
  1801. * restart reset sequence again
  1802. */
  1803. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  1804. pinstance->force_ioa_reset == 0) {
  1805. reset_complete = 1;
  1806. } else {
  1807. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  1808. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  1809. pmcraid_reinit_cmdblk(cmd);
  1810. pmcraid_unregister_hcams(cmd);
  1811. }
  1812. break;
  1813. }
  1814. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  1815. * OPERATIONAL. Reset all control variables used during reset, wake up
  1816. * any waiting threads and let the SCSI mid-layer send commands. Note
  1817. * that host_lock must be held before invoking scsi_report_bus_reset.
  1818. */
  1819. if (reset_complete) {
  1820. pinstance->ioa_reset_in_progress = 0;
  1821. pinstance->ioa_reset_attempts = 0;
  1822. pinstance->reset_cmd = NULL;
  1823. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1824. pinstance->ioa_bringdown = 0;
  1825. pmcraid_return_cmd(cmd);
  1826. /* If target state is to bring up the adapter, proceed with
  1827. * hcam registration and resource exposure to mid-layer.
  1828. */
  1829. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  1830. pmcraid_register_hcams(pinstance);
  1831. wake_up_all(&pinstance->reset_wait_q);
  1832. }
  1833. return;
  1834. }
  1835. /**
  1836. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  1837. * ISR/tasklet during error interrupts including IOA unit check. If reset
  1838. * is already in progress, it just returns, otherwise initiates IOA reset
  1839. * to bring IOA up to operational state.
  1840. *
  1841. * @pinstance: pointer to adapter instance structure
  1842. *
  1843. * Return value
  1844. * none
  1845. */
  1846. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  1847. {
  1848. struct pmcraid_cmd *cmd;
  1849. /* If the reset is already in progress, just return, otherwise start
  1850. * reset sequence and return
  1851. */
  1852. if (!pinstance->ioa_reset_in_progress) {
  1853. scsi_block_requests(pinstance->host);
  1854. cmd = pmcraid_get_free_cmd(pinstance);
  1855. if (cmd == NULL) {
  1856. pmcraid_err("no cmnd blocks for initiate_reset\n");
  1857. return;
  1858. }
  1859. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1860. pinstance->reset_cmd = cmd;
  1861. pinstance->force_ioa_reset = 1;
  1862. pmcraid_ioa_reset(cmd);
  1863. }
  1864. }
  1865. /**
  1866. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  1867. * or bringdown IOA
  1868. * @pinstance: pointer adapter instance structure
  1869. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  1870. * @target_state: expected target state after reset
  1871. *
  1872. * Note: This command initiates reset and waits for its completion. Hence this
  1873. * should not be called from isr/timer/tasklet functions (timeout handlers,
  1874. * error response handlers and interrupt handlers).
  1875. *
  1876. * Return Value
  1877. * 1 in case ioa_state is not target_state, 0 otherwise.
  1878. */
  1879. static int pmcraid_reset_reload(
  1880. struct pmcraid_instance *pinstance,
  1881. u8 shutdown_type,
  1882. u8 target_state
  1883. )
  1884. {
  1885. struct pmcraid_cmd *reset_cmd = NULL;
  1886. unsigned long lock_flags;
  1887. int reset = 1;
  1888. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1889. if (pinstance->ioa_reset_in_progress) {
  1890. pmcraid_info("reset_reload: reset is already in progress\n");
  1891. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1892. wait_event(pinstance->reset_wait_q,
  1893. !pinstance->ioa_reset_in_progress);
  1894. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1895. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  1896. spin_unlock_irqrestore(pinstance->host->host_lock,
  1897. lock_flags);
  1898. pmcraid_info("reset_reload: IOA is dead\n");
  1899. return reset;
  1900. } else if (pinstance->ioa_state == target_state) {
  1901. reset = 0;
  1902. }
  1903. }
  1904. if (reset) {
  1905. pmcraid_info("reset_reload: proceeding with reset\n");
  1906. scsi_block_requests(pinstance->host);
  1907. reset_cmd = pmcraid_get_free_cmd(pinstance);
  1908. if (reset_cmd == NULL) {
  1909. pmcraid_err("no free cmnd for reset_reload\n");
  1910. spin_unlock_irqrestore(pinstance->host->host_lock,
  1911. lock_flags);
  1912. return reset;
  1913. }
  1914. if (shutdown_type == SHUTDOWN_NORMAL)
  1915. pinstance->ioa_bringdown = 1;
  1916. pinstance->ioa_shutdown_type = shutdown_type;
  1917. pinstance->reset_cmd = reset_cmd;
  1918. pinstance->force_ioa_reset = reset;
  1919. pmcraid_info("reset_reload: initiating reset\n");
  1920. pmcraid_ioa_reset(reset_cmd);
  1921. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1922. pmcraid_info("reset_reload: waiting for reset to complete\n");
  1923. wait_event(pinstance->reset_wait_q,
  1924. !pinstance->ioa_reset_in_progress);
  1925. pmcraid_info("reset_reload: reset is complete !! \n");
  1926. scsi_unblock_requests(pinstance->host);
  1927. if (pinstance->ioa_state == target_state)
  1928. reset = 0;
  1929. }
  1930. return reset;
  1931. }
  1932. /**
  1933. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  1934. *
  1935. * @pinstance: pointer to adapter instance structure
  1936. *
  1937. * Return Value
  1938. * whatever is returned from pmcraid_reset_reload
  1939. */
  1940. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  1941. {
  1942. return pmcraid_reset_reload(pinstance,
  1943. SHUTDOWN_NORMAL,
  1944. IOA_STATE_UNKNOWN);
  1945. }
  1946. /**
  1947. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  1948. *
  1949. * @pinstance: pointer to adapter instance structure
  1950. *
  1951. * Return Value
  1952. * whatever is returned from pmcraid_reset_reload
  1953. */
  1954. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  1955. {
  1956. return pmcraid_reset_reload(pinstance,
  1957. SHUTDOWN_NONE,
  1958. IOA_STATE_OPERATIONAL);
  1959. }
  1960. /**
  1961. * pmcraid_request_sense - Send request sense to a device
  1962. * @cmd: pmcraid command struct
  1963. *
  1964. * This function sends a request sense to a device as a result of a check
  1965. * condition. This method re-uses the same command block that failed earlier.
  1966. */
  1967. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  1968. {
  1969. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1970. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  1971. /* allocate DMAable memory for sense buffers */
  1972. cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
  1973. SCSI_SENSE_BUFFERSIZE,
  1974. &cmd->sense_buffer_dma);
  1975. if (cmd->sense_buffer == NULL) {
  1976. pmcraid_err
  1977. ("couldn't allocate sense buffer for request sense\n");
  1978. pmcraid_erp_done(cmd);
  1979. return;
  1980. }
  1981. /* re-use the command block */
  1982. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  1983. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1984. ioarcb->request_flags0 = (SYNC_COMPLETE |
  1985. NO_LINK_DESCS |
  1986. INHIBIT_UL_CHECK);
  1987. ioarcb->request_type = REQ_TYPE_SCSI;
  1988. ioarcb->cdb[0] = REQUEST_SENSE;
  1989. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  1990. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1991. offsetof(struct pmcraid_ioarcb,
  1992. add_data.u.ioadl[0]));
  1993. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1994. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  1995. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  1996. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  1997. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  1998. /* request sense might be called as part of error response processing
  1999. * which runs in tasklets context. It is possible that mid-layer might
  2000. * schedule queuecommand during this time, hence, writting to IOARRIN
  2001. * must be protect by host_lock
  2002. */
  2003. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2004. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2005. pmcraid_timeout_handler);
  2006. }
  2007. /**
  2008. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2009. * @cmd: command that failed
  2010. * @sense: true if request_sense is required after cancel all
  2011. *
  2012. * This function sends a cancel all to a device to clear the queue.
  2013. */
  2014. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
  2015. {
  2016. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2017. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2018. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2019. void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
  2020. : pmcraid_request_sense;
  2021. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2022. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2023. ioarcb->request_type = REQ_TYPE_IOACMD;
  2024. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2025. if (RES_IS_GSCSI(res->cfg_entry))
  2026. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2027. ioarcb->ioadl_bus_addr = 0;
  2028. ioarcb->ioadl_length = 0;
  2029. ioarcb->data_transfer_length = 0;
  2030. ioarcb->ioarcb_bus_addr &= (~0x1FULL);
  2031. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2032. * schedule queuecommand while we are doing this
  2033. */
  2034. pmcraid_send_cmd(cmd, cmd_done,
  2035. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2036. pmcraid_timeout_handler);
  2037. }
  2038. /**
  2039. * pmcraid_frame_auto_sense: frame fixed format sense information
  2040. *
  2041. * @cmd: pointer to failing command block
  2042. *
  2043. * Return value
  2044. * none
  2045. */
  2046. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2047. {
  2048. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2049. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2050. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2051. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2052. u32 failing_lba = 0;
  2053. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2054. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2055. if (RES_IS_VSET(res->cfg_entry) &&
  2056. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2057. ioasa->u.vset.failing_lba_hi != 0) {
  2058. sense_buf[0] = 0x72;
  2059. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2060. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2061. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2062. sense_buf[7] = 12;
  2063. sense_buf[8] = 0;
  2064. sense_buf[9] = 0x0A;
  2065. sense_buf[10] = 0x80;
  2066. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2067. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2068. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2069. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2070. sense_buf[15] = failing_lba & 0x000000ff;
  2071. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2072. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2073. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2074. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2075. sense_buf[19] = failing_lba & 0x000000ff;
  2076. } else {
  2077. sense_buf[0] = 0x70;
  2078. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2079. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2080. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2081. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2082. if (RES_IS_VSET(res->cfg_entry))
  2083. failing_lba =
  2084. le32_to_cpu(ioasa->u.
  2085. vset.failing_lba_lo);
  2086. sense_buf[0] |= 0x80;
  2087. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2088. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2089. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2090. sense_buf[6] = failing_lba & 0xff;
  2091. }
  2092. sense_buf[7] = 6; /* additional length */
  2093. }
  2094. }
  2095. /**
  2096. * pmcraid_error_handler - Error response handlers for a SCSI op
  2097. * @cmd: pointer to pmcraid_cmd that has failed
  2098. *
  2099. * This function determines whether or not to initiate ERP on the affected
  2100. * device. This is called from a tasklet, which doesn't hold any locks.
  2101. *
  2102. * Return value:
  2103. * 0 it caller can complete the request, otherwise 1 where in error
  2104. * handler itself completes the request and returns the command block
  2105. * back to free-pool
  2106. */
  2107. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2108. {
  2109. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2110. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2111. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2112. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2113. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2114. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2115. u32 sense_copied = 0;
  2116. if (!res) {
  2117. pmcraid_info("resource pointer is NULL\n");
  2118. return 0;
  2119. }
  2120. /* If this was a SCSI read/write command keep count of errors */
  2121. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2122. atomic_inc(&res->read_failures);
  2123. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2124. atomic_inc(&res->write_failures);
  2125. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2126. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2127. pmcraid_frame_auto_sense(cmd);
  2128. }
  2129. /* Log IOASC/IOASA information based on user settings */
  2130. pmcraid_ioasc_logger(ioasc, cmd);
  2131. switch (masked_ioasc) {
  2132. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2133. scsi_cmd->result |= (DID_ABORT << 16);
  2134. break;
  2135. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2136. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2137. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2138. break;
  2139. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2140. res->sync_reqd = 1;
  2141. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2142. break;
  2143. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2144. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2145. break;
  2146. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2147. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2148. if (!res->reset_progress)
  2149. scsi_report_bus_reset(pinstance->host,
  2150. scsi_cmd->device->channel);
  2151. scsi_cmd->result |= (DID_ERROR << 16);
  2152. break;
  2153. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2154. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2155. res->sync_reqd = 1;
  2156. /* if check_condition is not active return with error otherwise
  2157. * get/frame the sense buffer
  2158. */
  2159. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2160. SAM_STAT_CHECK_CONDITION &&
  2161. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2162. return 0;
  2163. /* If we have auto sense data as part of IOASA pass it to
  2164. * mid-layer
  2165. */
  2166. if (ioasa->auto_sense_length != 0) {
  2167. short sense_len = ioasa->auto_sense_length;
  2168. int data_size = min_t(u16, le16_to_cpu(sense_len),
  2169. SCSI_SENSE_BUFFERSIZE);
  2170. memcpy(scsi_cmd->sense_buffer,
  2171. ioasa->sense_data,
  2172. data_size);
  2173. sense_copied = 1;
  2174. }
  2175. if (RES_IS_GSCSI(res->cfg_entry)) {
  2176. pmcraid_cancel_all(cmd, sense_copied);
  2177. } else if (sense_copied) {
  2178. pmcraid_erp_done(cmd);
  2179. return 0;
  2180. } else {
  2181. pmcraid_request_sense(cmd);
  2182. }
  2183. return 1;
  2184. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2185. break;
  2186. default:
  2187. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2188. scsi_cmd->result |= (DID_ERROR << 16);
  2189. break;
  2190. }
  2191. return 0;
  2192. }
  2193. /**
  2194. * pmcraid_reset_device - device reset handler functions
  2195. *
  2196. * @scsi_cmd: scsi command struct
  2197. * @modifier: reset modifier indicating the reset sequence to be performed
  2198. *
  2199. * This function issues a device reset to the affected device.
  2200. * A LUN reset will be sent to the device first. If that does
  2201. * not work, a target reset will be sent.
  2202. *
  2203. * Return value:
  2204. * SUCCESS / FAILED
  2205. */
  2206. static int pmcraid_reset_device(
  2207. struct scsi_cmnd *scsi_cmd,
  2208. unsigned long timeout,
  2209. u8 modifier
  2210. )
  2211. {
  2212. struct pmcraid_cmd *cmd;
  2213. struct pmcraid_instance *pinstance;
  2214. struct pmcraid_resource_entry *res;
  2215. struct pmcraid_ioarcb *ioarcb;
  2216. unsigned long lock_flags;
  2217. u32 ioasc;
  2218. pinstance =
  2219. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2220. res = scsi_cmd->device->hostdata;
  2221. if (!res) {
  2222. sdev_printk(KERN_ERR, scsi_cmd->device,
  2223. "reset_device: NULL resource pointer\n");
  2224. return FAILED;
  2225. }
  2226. /* If adapter is currently going through reset/reload, return failed.
  2227. * This will force the mid-layer to call _eh_bus/host reset, which
  2228. * will then go to sleep and wait for the reset to complete
  2229. */
  2230. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2231. if (pinstance->ioa_reset_in_progress ||
  2232. pinstance->ioa_state == IOA_STATE_DEAD) {
  2233. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2234. return FAILED;
  2235. }
  2236. res->reset_progress = 1;
  2237. pmcraid_info("Resetting %s resource with addr %x\n",
  2238. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2239. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2240. le32_to_cpu(res->cfg_entry.resource_address));
  2241. /* get a free cmd block */
  2242. cmd = pmcraid_get_free_cmd(pinstance);
  2243. if (cmd == NULL) {
  2244. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2245. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2246. return FAILED;
  2247. }
  2248. ioarcb = &cmd->ioa_cb->ioarcb;
  2249. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2250. ioarcb->request_type = REQ_TYPE_IOACMD;
  2251. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2252. /* Initialize reset modifier bits */
  2253. if (modifier)
  2254. modifier = ENABLE_RESET_MODIFIER | modifier;
  2255. ioarcb->cdb[1] = modifier;
  2256. init_completion(&cmd->wait_for_completion);
  2257. cmd->completion_req = 1;
  2258. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2259. cmd->ioa_cb->ioarcb.cdb[0],
  2260. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2261. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2262. pmcraid_send_cmd(cmd,
  2263. pmcraid_internal_done,
  2264. timeout,
  2265. pmcraid_timeout_handler);
  2266. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2267. /* RESET_DEVICE command completes after all pending IOARCBs are
  2268. * completed. Once this command is completed, pmcraind_internal_done
  2269. * will wake up the 'completion' queue.
  2270. */
  2271. wait_for_completion(&cmd->wait_for_completion);
  2272. /* complete the command here itself and return the command block
  2273. * to free list
  2274. */
  2275. pmcraid_return_cmd(cmd);
  2276. res->reset_progress = 0;
  2277. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2278. /* set the return value based on the returned ioasc */
  2279. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2280. }
  2281. /**
  2282. * _pmcraid_io_done - helper for pmcraid_io_done function
  2283. *
  2284. * @cmd: pointer to pmcraid command struct
  2285. * @reslen: residual data length to be set in the ioasa
  2286. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2287. *
  2288. * This function is invoked by pmcraid_io_done to complete mid-layer
  2289. * scsi ops.
  2290. *
  2291. * Return value:
  2292. * 0 if caller is required to return it to free_pool. Returns 1 if
  2293. * caller need not worry about freeing command block as error handler
  2294. * will take care of that.
  2295. */
  2296. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2297. {
  2298. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2299. int rc = 0;
  2300. scsi_set_resid(scsi_cmd, reslen);
  2301. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2302. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2303. cmd->ioa_cb->ioarcb.cdb[0],
  2304. ioasc, scsi_cmd->result);
  2305. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2306. rc = pmcraid_error_handler(cmd);
  2307. if (rc == 0) {
  2308. scsi_dma_unmap(scsi_cmd);
  2309. scsi_cmd->scsi_done(scsi_cmd);
  2310. }
  2311. return rc;
  2312. }
  2313. /**
  2314. * pmcraid_io_done - SCSI completion function
  2315. *
  2316. * @cmd: pointer to pmcraid command struct
  2317. *
  2318. * This function is invoked by tasklet/mid-layer error handler to completing
  2319. * the SCSI ops sent from mid-layer.
  2320. *
  2321. * Return value
  2322. * none
  2323. */
  2324. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2325. {
  2326. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2327. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2328. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2329. pmcraid_return_cmd(cmd);
  2330. }
  2331. /**
  2332. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2333. *
  2334. * @cmd: command block of the command to be aborted
  2335. *
  2336. * Return Value:
  2337. * returns pointer to command structure used as cancelling cmd
  2338. */
  2339. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2340. {
  2341. struct pmcraid_cmd *cancel_cmd;
  2342. struct pmcraid_instance *pinstance;
  2343. struct pmcraid_resource_entry *res;
  2344. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2345. res = cmd->scsi_cmd->device->hostdata;
  2346. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2347. if (cancel_cmd == NULL) {
  2348. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2349. return NULL;
  2350. }
  2351. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2352. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2353. cmd->ioa_cb->ioarcb.cdb[0],
  2354. cmd->ioa_cb->ioarcb.response_handle >> 2);
  2355. init_completion(&cancel_cmd->wait_for_completion);
  2356. cancel_cmd->completion_req = 1;
  2357. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2358. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2359. cmd->ioa_cb->ioarcb.cdb[0],
  2360. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2361. pmcraid_send_cmd(cancel_cmd,
  2362. pmcraid_internal_done,
  2363. PMCRAID_INTERNAL_TIMEOUT,
  2364. pmcraid_timeout_handler);
  2365. return cancel_cmd;
  2366. }
  2367. /**
  2368. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2369. *
  2370. * @cancel_cmd: command block use as cancelling command
  2371. *
  2372. * Return Value:
  2373. * returns SUCCESS if ABORT TASK has good completion
  2374. * otherwise FAILED
  2375. */
  2376. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2377. {
  2378. struct pmcraid_resource_entry *res;
  2379. u32 ioasc;
  2380. wait_for_completion(&cancel_cmd->wait_for_completion);
  2381. res = cancel_cmd->u.res;
  2382. cancel_cmd->u.res = NULL;
  2383. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2384. /* If the abort task is not timed out we will get a Good completion
  2385. * as sense_key, otherwise we may get one the following responses
  2386. * due to subsquent bus reset or device reset. In case IOASC is
  2387. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2388. */
  2389. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2390. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2391. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2392. res->sync_reqd = 1;
  2393. ioasc = 0;
  2394. }
  2395. /* complete the command here itself */
  2396. pmcraid_return_cmd(cancel_cmd);
  2397. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2398. }
  2399. /**
  2400. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2401. *
  2402. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2403. * mid-layer ensures that no other commands are queued. This
  2404. * never gets called under interrupt, but a separate eh thread.
  2405. *
  2406. * Return value:
  2407. * SUCCESS / FAILED
  2408. */
  2409. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2410. {
  2411. struct pmcraid_instance *pinstance;
  2412. struct pmcraid_cmd *cmd;
  2413. struct pmcraid_resource_entry *res;
  2414. unsigned long host_lock_flags;
  2415. unsigned long pending_lock_flags;
  2416. struct pmcraid_cmd *cancel_cmd = NULL;
  2417. int cmd_found = 0;
  2418. int rc = FAILED;
  2419. pinstance =
  2420. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2421. scmd_printk(KERN_INFO, scsi_cmd,
  2422. "I/O command timed out, aborting it.\n");
  2423. res = scsi_cmd->device->hostdata;
  2424. if (res == NULL)
  2425. return rc;
  2426. /* If we are currently going through reset/reload, return failed.
  2427. * This will force the mid-layer to eventually call
  2428. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2429. * reset to complete
  2430. */
  2431. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2432. if (pinstance->ioa_reset_in_progress ||
  2433. pinstance->ioa_state == IOA_STATE_DEAD) {
  2434. spin_unlock_irqrestore(pinstance->host->host_lock,
  2435. host_lock_flags);
  2436. return rc;
  2437. }
  2438. /* loop over pending cmd list to find cmd corresponding to this
  2439. * scsi_cmd. Note that this command might not have been completed
  2440. * already. locking: all pending commands are protected with
  2441. * pending_pool_lock.
  2442. */
  2443. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2444. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2445. if (cmd->scsi_cmd == scsi_cmd) {
  2446. cmd_found = 1;
  2447. break;
  2448. }
  2449. }
  2450. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2451. pending_lock_flags);
  2452. /* If the command to be aborted was given to IOA and still pending with
  2453. * it, send ABORT_TASK to abort this and wait for its completion
  2454. */
  2455. if (cmd_found)
  2456. cancel_cmd = pmcraid_abort_cmd(cmd);
  2457. spin_unlock_irqrestore(pinstance->host->host_lock,
  2458. host_lock_flags);
  2459. if (cancel_cmd) {
  2460. cancel_cmd->u.res = cmd->scsi_cmd->device->hostdata;
  2461. rc = pmcraid_abort_complete(cancel_cmd);
  2462. }
  2463. return cmd_found ? rc : SUCCESS;
  2464. }
  2465. /**
  2466. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2467. *
  2468. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2469. *
  2470. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2471. * Since these are called from mid-layer EH thread, no other IO will be queued
  2472. * to the resource being reset. However, control path (IOCTL) may be active so
  2473. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2474. * takes care by locking/unlocking host_lock.
  2475. *
  2476. * Return value
  2477. * SUCCESS or FAILED
  2478. */
  2479. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2480. {
  2481. scmd_printk(KERN_INFO, scmd,
  2482. "resetting device due to an I/O command timeout.\n");
  2483. return pmcraid_reset_device(scmd,
  2484. PMCRAID_INTERNAL_TIMEOUT,
  2485. RESET_DEVICE_LUN);
  2486. }
  2487. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2488. {
  2489. scmd_printk(KERN_INFO, scmd,
  2490. "Doing bus reset due to an I/O command timeout.\n");
  2491. return pmcraid_reset_device(scmd,
  2492. PMCRAID_RESET_BUS_TIMEOUT,
  2493. RESET_DEVICE_BUS);
  2494. }
  2495. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2496. {
  2497. scmd_printk(KERN_INFO, scmd,
  2498. "Doing target reset due to an I/O command timeout.\n");
  2499. return pmcraid_reset_device(scmd,
  2500. PMCRAID_INTERNAL_TIMEOUT,
  2501. RESET_DEVICE_TARGET);
  2502. }
  2503. /**
  2504. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2505. *
  2506. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2507. *
  2508. * Initiates adapter reset to bring it up to operational state
  2509. *
  2510. * Return value
  2511. * SUCCESS or FAILED
  2512. */
  2513. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2514. {
  2515. unsigned long interval = 10000; /* 10 seconds interval */
  2516. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2517. struct pmcraid_instance *pinstance =
  2518. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2519. /* wait for an additional 150 seconds just in case firmware could come
  2520. * up and if it could complete all the pending commands excluding the
  2521. * two HCAM (CCN and LDN).
  2522. */
  2523. while (waits--) {
  2524. if (atomic_read(&pinstance->outstanding_cmds) <=
  2525. PMCRAID_MAX_HCAM_CMD)
  2526. return SUCCESS;
  2527. msleep(interval);
  2528. }
  2529. dev_err(&pinstance->pdev->dev,
  2530. "Adapter being reset due to an I/O command timeout.\n");
  2531. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2532. }
  2533. /**
  2534. * pmcraid_task_attributes - Translate SPI Q-Tags to task attributes
  2535. * @scsi_cmd: scsi command struct
  2536. *
  2537. * Return value
  2538. * number of tags or 0 if the task is not tagged
  2539. */
  2540. static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd)
  2541. {
  2542. char tag[2];
  2543. u8 rc = 0;
  2544. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  2545. switch (tag[0]) {
  2546. case MSG_SIMPLE_TAG:
  2547. rc = TASK_TAG_SIMPLE;
  2548. break;
  2549. case MSG_HEAD_TAG:
  2550. rc = TASK_TAG_QUEUE_HEAD;
  2551. break;
  2552. case MSG_ORDERED_TAG:
  2553. rc = TASK_TAG_ORDERED;
  2554. break;
  2555. };
  2556. }
  2557. return rc;
  2558. }
  2559. /**
  2560. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2561. * @cmd: pmcraid command struct
  2562. * @sgcount: count of scatter-gather elements
  2563. *
  2564. * Return value
  2565. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2566. * or external IOADLs
  2567. */
  2568. struct pmcraid_ioadl_desc *
  2569. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2570. {
  2571. struct pmcraid_ioadl_desc *ioadl;
  2572. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2573. int ioadl_count = 0;
  2574. if (ioarcb->add_cmd_param_length)
  2575. ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
  2576. ioarcb->ioadl_length =
  2577. sizeof(struct pmcraid_ioadl_desc) * sgcount;
  2578. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2579. /* external ioadls start at offset 0x80 from control_block
  2580. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2581. * It is necessary to indicate to firmware that driver is
  2582. * using ioadls to be treated as external to IOARCB.
  2583. */
  2584. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  2585. ioarcb->ioadl_bus_addr =
  2586. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2587. offsetof(struct pmcraid_ioarcb,
  2588. add_data.u.ioadl[3]));
  2589. ioadl = &ioarcb->add_data.u.ioadl[3];
  2590. } else {
  2591. ioarcb->ioadl_bus_addr =
  2592. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2593. offsetof(struct pmcraid_ioarcb,
  2594. add_data.u.ioadl[ioadl_count]));
  2595. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2596. ioarcb->ioarcb_bus_addr |=
  2597. DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
  2598. }
  2599. return ioadl;
  2600. }
  2601. /**
  2602. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2603. * @pinstance: pointer to adapter instance structure
  2604. * @cmd: pmcraid command struct
  2605. *
  2606. * This function is invoked by queuecommand entry point while sending a command
  2607. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2608. *
  2609. * Return value:
  2610. * 0 on success or -1 on failure
  2611. */
  2612. static int pmcraid_build_ioadl(
  2613. struct pmcraid_instance *pinstance,
  2614. struct pmcraid_cmd *cmd
  2615. )
  2616. {
  2617. int i, nseg;
  2618. struct scatterlist *sglist;
  2619. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2620. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2621. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2622. u32 length = scsi_bufflen(scsi_cmd);
  2623. if (!length)
  2624. return 0;
  2625. nseg = scsi_dma_map(scsi_cmd);
  2626. if (nseg < 0) {
  2627. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2628. return -1;
  2629. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2630. scsi_dma_unmap(scsi_cmd);
  2631. scmd_printk(KERN_ERR, scsi_cmd,
  2632. "sg count is (%d) more than allowed!\n", nseg);
  2633. return -1;
  2634. }
  2635. /* Initialize IOARCB data transfer length fields */
  2636. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2637. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2638. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2639. ioarcb->data_transfer_length = cpu_to_le32(length);
  2640. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2641. /* Initialize IOADL descriptor addresses */
  2642. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2643. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2644. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2645. ioadl[i].flags = 0;
  2646. }
  2647. /* setup last descriptor */
  2648. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2649. return 0;
  2650. }
  2651. /**
  2652. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2653. * @sglist: scatter/gather list pointer
  2654. *
  2655. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2656. *
  2657. * Return value:
  2658. * none
  2659. */
  2660. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2661. {
  2662. int i;
  2663. for (i = 0; i < sglist->num_sg; i++)
  2664. __free_pages(sg_page(&(sglist->scatterlist[i])),
  2665. sglist->order);
  2666. kfree(sglist);
  2667. }
  2668. /**
  2669. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2670. * @buflen: buffer length
  2671. *
  2672. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2673. * list.
  2674. *
  2675. * Return value
  2676. * pointer to sglist / NULL on failure
  2677. */
  2678. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2679. {
  2680. struct pmcraid_sglist *sglist;
  2681. struct scatterlist *scatterlist;
  2682. struct page *page;
  2683. int num_elem, i, j;
  2684. int sg_size;
  2685. int order;
  2686. int bsize_elem;
  2687. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2688. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2689. bsize_elem = PAGE_SIZE * (1 << order);
  2690. /* Determine the actual number of sg entries needed */
  2691. if (buflen % bsize_elem)
  2692. num_elem = (buflen / bsize_elem) + 1;
  2693. else
  2694. num_elem = buflen / bsize_elem;
  2695. /* Allocate a scatter/gather list for the DMA */
  2696. sglist = kzalloc(sizeof(struct pmcraid_sglist) +
  2697. (sizeof(struct scatterlist) * (num_elem - 1)),
  2698. GFP_KERNEL);
  2699. if (sglist == NULL)
  2700. return NULL;
  2701. scatterlist = sglist->scatterlist;
  2702. sg_init_table(scatterlist, num_elem);
  2703. sglist->order = order;
  2704. sglist->num_sg = num_elem;
  2705. sg_size = buflen;
  2706. for (i = 0; i < num_elem; i++) {
  2707. page = alloc_pages(GFP_KERNEL|GFP_DMA, order);
  2708. if (!page) {
  2709. for (j = i - 1; j >= 0; j--)
  2710. __free_pages(sg_page(&scatterlist[j]), order);
  2711. kfree(sglist);
  2712. return NULL;
  2713. }
  2714. sg_set_page(&scatterlist[i], page,
  2715. sg_size < bsize_elem ? sg_size : bsize_elem, 0);
  2716. sg_size -= bsize_elem;
  2717. }
  2718. return sglist;
  2719. }
  2720. /**
  2721. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2722. * @sglist: scatter/gather list pointer
  2723. * @buffer: buffer pointer
  2724. * @len: buffer length
  2725. * @direction: data transfer direction
  2726. *
  2727. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2728. *
  2729. * Return value:
  2730. * 0 on success / other on failure
  2731. */
  2732. static int pmcraid_copy_sglist(
  2733. struct pmcraid_sglist *sglist,
  2734. unsigned long buffer,
  2735. u32 len,
  2736. int direction
  2737. )
  2738. {
  2739. struct scatterlist *scatterlist;
  2740. void *kaddr;
  2741. int bsize_elem;
  2742. int i;
  2743. int rc = 0;
  2744. /* Determine the actual number of bytes per element */
  2745. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2746. scatterlist = sglist->scatterlist;
  2747. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  2748. struct page *page = sg_page(&scatterlist[i]);
  2749. kaddr = kmap(page);
  2750. if (direction == DMA_TO_DEVICE)
  2751. rc = __copy_from_user(kaddr,
  2752. (void *)buffer,
  2753. bsize_elem);
  2754. else
  2755. rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
  2756. kunmap(page);
  2757. if (rc) {
  2758. pmcraid_err("failed to copy user data into sg list\n");
  2759. return -EFAULT;
  2760. }
  2761. scatterlist[i].length = bsize_elem;
  2762. }
  2763. if (len % bsize_elem) {
  2764. struct page *page = sg_page(&scatterlist[i]);
  2765. kaddr = kmap(page);
  2766. if (direction == DMA_TO_DEVICE)
  2767. rc = __copy_from_user(kaddr,
  2768. (void *)buffer,
  2769. len % bsize_elem);
  2770. else
  2771. rc = __copy_to_user((void *)buffer,
  2772. kaddr,
  2773. len % bsize_elem);
  2774. kunmap(page);
  2775. scatterlist[i].length = len % bsize_elem;
  2776. }
  2777. if (rc) {
  2778. pmcraid_err("failed to copy user data into sg list\n");
  2779. rc = -EFAULT;
  2780. }
  2781. return rc;
  2782. }
  2783. /**
  2784. * pmcraid_queuecommand - Queue a mid-layer request
  2785. * @scsi_cmd: scsi command struct
  2786. * @done: done function
  2787. *
  2788. * This function queues a request generated by the mid-layer. Midlayer calls
  2789. * this routine within host->lock. Some of the functions called by queuecommand
  2790. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2791. *
  2792. * Return value:
  2793. * 0 on success
  2794. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2795. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2796. */
  2797. static int pmcraid_queuecommand(
  2798. struct scsi_cmnd *scsi_cmd,
  2799. void (*done) (struct scsi_cmnd *)
  2800. )
  2801. {
  2802. struct pmcraid_instance *pinstance;
  2803. struct pmcraid_resource_entry *res;
  2804. struct pmcraid_ioarcb *ioarcb;
  2805. struct pmcraid_cmd *cmd;
  2806. int rc = 0;
  2807. pinstance =
  2808. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2809. scsi_cmd->scsi_done = done;
  2810. res = scsi_cmd->device->hostdata;
  2811. scsi_cmd->result = (DID_OK << 16);
  2812. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2813. * the command
  2814. */
  2815. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2816. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2817. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2818. scsi_cmd->scsi_done(scsi_cmd);
  2819. return 0;
  2820. }
  2821. /* If IOA reset is in progress, can't queue the commands */
  2822. if (pinstance->ioa_reset_in_progress)
  2823. return SCSI_MLQUEUE_HOST_BUSY;
  2824. /* initialize the command and IOARCB to be sent to IOA */
  2825. cmd = pmcraid_get_free_cmd(pinstance);
  2826. if (cmd == NULL) {
  2827. pmcraid_err("free command block is not available\n");
  2828. return SCSI_MLQUEUE_HOST_BUSY;
  2829. }
  2830. cmd->scsi_cmd = scsi_cmd;
  2831. ioarcb = &(cmd->ioa_cb->ioarcb);
  2832. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  2833. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2834. ioarcb->request_type = REQ_TYPE_SCSI;
  2835. cmd->cmd_done = pmcraid_io_done;
  2836. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  2837. if (scsi_cmd->underflow == 0)
  2838. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  2839. if (res->sync_reqd) {
  2840. ioarcb->request_flags0 |= SYNC_COMPLETE;
  2841. res->sync_reqd = 0;
  2842. }
  2843. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2844. ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
  2845. if (RES_IS_GSCSI(res->cfg_entry))
  2846. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  2847. }
  2848. rc = pmcraid_build_ioadl(pinstance, cmd);
  2849. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  2850. le32_to_cpu(ioarcb->response_handle) >> 2,
  2851. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  2852. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  2853. PMCRAID_PHYS_BUS_ID,
  2854. RES_IS_VSET(res->cfg_entry) ?
  2855. res->cfg_entry.unique_flags1 :
  2856. RES_TARGET(res->cfg_entry.resource_address),
  2857. RES_LUN(res->cfg_entry.resource_address));
  2858. if (likely(rc == 0)) {
  2859. _pmcraid_fire_command(cmd);
  2860. } else {
  2861. pmcraid_err("queuecommand could not build ioadl\n");
  2862. pmcraid_return_cmd(cmd);
  2863. rc = SCSI_MLQUEUE_HOST_BUSY;
  2864. }
  2865. return rc;
  2866. }
  2867. /**
  2868. * pmcraid_open -char node "open" entry, allowed only users with admin access
  2869. */
  2870. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  2871. {
  2872. struct pmcraid_instance *pinstance;
  2873. if (!capable(CAP_SYS_ADMIN))
  2874. return -EACCES;
  2875. /* Populate adapter instance * pointer for use by ioctl */
  2876. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  2877. filep->private_data = pinstance;
  2878. return 0;
  2879. }
  2880. /**
  2881. * pmcraid_release - char node "release" entry point
  2882. */
  2883. static int pmcraid_chr_release(struct inode *inode, struct file *filep)
  2884. {
  2885. struct pmcraid_instance *pinstance =
  2886. ((struct pmcraid_instance *)filep->private_data);
  2887. filep->private_data = NULL;
  2888. fasync_helper(-1, filep, 0, &pinstance->aen_queue);
  2889. return 0;
  2890. }
  2891. /**
  2892. * pmcraid_fasync - Async notifier registration from applications
  2893. *
  2894. * This function adds the calling process to a driver global queue. When an
  2895. * event occurs, SIGIO will be sent to all processes in this queue.
  2896. */
  2897. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  2898. {
  2899. struct pmcraid_instance *pinstance;
  2900. int rc;
  2901. pinstance = (struct pmcraid_instance *)filep->private_data;
  2902. mutex_lock(&pinstance->aen_queue_lock);
  2903. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  2904. mutex_unlock(&pinstance->aen_queue_lock);
  2905. return rc;
  2906. }
  2907. /**
  2908. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  2909. * commands sent over IOCTL interface
  2910. *
  2911. * @cmd : pointer to struct pmcraid_cmd
  2912. * @buflen : length of the request buffer
  2913. * @direction : data transfer direction
  2914. *
  2915. * Return value
  2916. * 0 on success, non-zero error code on failure
  2917. */
  2918. static int pmcraid_build_passthrough_ioadls(
  2919. struct pmcraid_cmd *cmd,
  2920. int buflen,
  2921. int direction
  2922. )
  2923. {
  2924. struct pmcraid_sglist *sglist = NULL;
  2925. struct scatterlist *sg = NULL;
  2926. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2927. struct pmcraid_ioadl_desc *ioadl;
  2928. int i;
  2929. sglist = pmcraid_alloc_sglist(buflen);
  2930. if (!sglist) {
  2931. pmcraid_err("can't allocate memory for passthrough SGls\n");
  2932. return -ENOMEM;
  2933. }
  2934. sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
  2935. sglist->scatterlist,
  2936. sglist->num_sg, direction);
  2937. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  2938. dev_err(&cmd->drv_inst->pdev->dev,
  2939. "Failed to map passthrough buffer!\n");
  2940. pmcraid_free_sglist(sglist);
  2941. return -EIO;
  2942. }
  2943. cmd->sglist = sglist;
  2944. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2945. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  2946. /* Initialize IOADL descriptor addresses */
  2947. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  2948. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  2949. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  2950. ioadl[i].flags = 0;
  2951. }
  2952. /* setup the last descriptor */
  2953. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2954. return 0;
  2955. }
  2956. /**
  2957. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  2958. *
  2959. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  2960. * @buflen: size of the request buffer
  2961. * @direction: data transfer direction
  2962. *
  2963. * Return value
  2964. * 0 on success, non-zero error code on failure
  2965. */
  2966. static void pmcraid_release_passthrough_ioadls(
  2967. struct pmcraid_cmd *cmd,
  2968. int buflen,
  2969. int direction
  2970. )
  2971. {
  2972. struct pmcraid_sglist *sglist = cmd->sglist;
  2973. if (buflen > 0) {
  2974. pci_unmap_sg(cmd->drv_inst->pdev,
  2975. sglist->scatterlist,
  2976. sglist->num_sg,
  2977. direction);
  2978. pmcraid_free_sglist(sglist);
  2979. cmd->sglist = NULL;
  2980. }
  2981. }
  2982. /**
  2983. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  2984. *
  2985. * @pinstance: pointer to adapter instance structure
  2986. * @cmd: ioctl code
  2987. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  2988. *
  2989. * Return value
  2990. * 0 on success, non-zero error code on failure
  2991. */
  2992. static long pmcraid_ioctl_passthrough(
  2993. struct pmcraid_instance *pinstance,
  2994. unsigned int ioctl_cmd,
  2995. unsigned int buflen,
  2996. unsigned long arg
  2997. )
  2998. {
  2999. struct pmcraid_passthrough_ioctl_buffer *buffer;
  3000. struct pmcraid_ioarcb *ioarcb;
  3001. struct pmcraid_cmd *cmd;
  3002. struct pmcraid_cmd *cancel_cmd;
  3003. unsigned long request_buffer;
  3004. unsigned long request_offset;
  3005. unsigned long lock_flags;
  3006. int request_size;
  3007. int buffer_size;
  3008. u8 access, direction;
  3009. int rc = 0;
  3010. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3011. if (pinstance->ioa_reset_in_progress) {
  3012. rc = wait_event_interruptible_timeout(
  3013. pinstance->reset_wait_q,
  3014. !pinstance->ioa_reset_in_progress,
  3015. msecs_to_jiffies(10000));
  3016. if (!rc)
  3017. return -ETIMEDOUT;
  3018. else if (rc < 0)
  3019. return -ERESTARTSYS;
  3020. }
  3021. /* If adapter is not in operational state, return error */
  3022. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3023. pmcraid_err("IOA is not operational\n");
  3024. return -ENOTTY;
  3025. }
  3026. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3027. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3028. if (!buffer) {
  3029. pmcraid_err("no memory for passthrough buffer\n");
  3030. return -ENOMEM;
  3031. }
  3032. request_offset =
  3033. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3034. request_buffer = arg + request_offset;
  3035. rc = __copy_from_user(buffer,
  3036. (struct pmcraid_passthrough_ioctl_buffer *) arg,
  3037. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3038. if (rc) {
  3039. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3040. rc = -EFAULT;
  3041. goto out_free_buffer;
  3042. }
  3043. request_size = buffer->ioarcb.data_transfer_length;
  3044. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3045. access = VERIFY_READ;
  3046. direction = DMA_TO_DEVICE;
  3047. } else {
  3048. access = VERIFY_WRITE;
  3049. direction = DMA_FROM_DEVICE;
  3050. }
  3051. if (request_size > 0) {
  3052. rc = access_ok(access, arg, request_offset + request_size);
  3053. if (!rc) {
  3054. rc = -EFAULT;
  3055. goto out_free_buffer;
  3056. }
  3057. }
  3058. /* check if we have any additional command parameters */
  3059. if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
  3060. rc = -EINVAL;
  3061. goto out_free_buffer;
  3062. }
  3063. cmd = pmcraid_get_free_cmd(pinstance);
  3064. if (!cmd) {
  3065. pmcraid_err("free command block is not available\n");
  3066. rc = -ENOMEM;
  3067. goto out_free_buffer;
  3068. }
  3069. cmd->scsi_cmd = NULL;
  3070. ioarcb = &(cmd->ioa_cb->ioarcb);
  3071. /* Copy the user-provided IOARCB stuff field by field */
  3072. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3073. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3074. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3075. ioarcb->request_type = buffer->ioarcb.request_type;
  3076. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3077. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3078. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3079. if (buffer->ioarcb.add_cmd_param_length) {
  3080. ioarcb->add_cmd_param_length =
  3081. buffer->ioarcb.add_cmd_param_length;
  3082. ioarcb->add_cmd_param_offset =
  3083. buffer->ioarcb.add_cmd_param_offset;
  3084. memcpy(ioarcb->add_data.u.add_cmd_params,
  3085. buffer->ioarcb.add_data.u.add_cmd_params,
  3086. buffer->ioarcb.add_cmd_param_length);
  3087. }
  3088. if (request_size) {
  3089. rc = pmcraid_build_passthrough_ioadls(cmd,
  3090. request_size,
  3091. direction);
  3092. if (rc) {
  3093. pmcraid_err("couldn't build passthrough ioadls\n");
  3094. goto out_free_buffer;
  3095. }
  3096. }
  3097. /* If data is being written into the device, copy the data from user
  3098. * buffers
  3099. */
  3100. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3101. rc = pmcraid_copy_sglist(cmd->sglist,
  3102. request_buffer,
  3103. request_size,
  3104. direction);
  3105. if (rc) {
  3106. pmcraid_err("failed to copy user buffer\n");
  3107. goto out_free_sglist;
  3108. }
  3109. }
  3110. /* passthrough ioctl is a blocking command so, put the user to sleep
  3111. * until timeout. Note that a timeout value of 0 means, do timeout.
  3112. */
  3113. cmd->cmd_done = pmcraid_internal_done;
  3114. init_completion(&cmd->wait_for_completion);
  3115. cmd->completion_req = 1;
  3116. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3117. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3118. cmd->ioa_cb->ioarcb.cdb[0],
  3119. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3120. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3121. _pmcraid_fire_command(cmd);
  3122. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3123. /* If command timeout is specified put caller to wait till that time,
  3124. * otherwise it would be blocking wait. If command gets timed out, it
  3125. * will be aborted.
  3126. */
  3127. if (buffer->ioarcb.cmd_timeout == 0) {
  3128. wait_for_completion(&cmd->wait_for_completion);
  3129. } else if (!wait_for_completion_timeout(
  3130. &cmd->wait_for_completion,
  3131. msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
  3132. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3133. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
  3134. cmd->ioa_cb->ioarcb.cdb[0]);
  3135. rc = -ETIMEDOUT;
  3136. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3137. cancel_cmd = pmcraid_abort_cmd(cmd);
  3138. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3139. if (cancel_cmd) {
  3140. wait_for_completion(&cancel_cmd->wait_for_completion);
  3141. pmcraid_return_cmd(cancel_cmd);
  3142. }
  3143. goto out_free_sglist;
  3144. }
  3145. /* If the command failed for any reason, copy entire IOASA buffer and
  3146. * return IOCTL success. If copying IOASA to user-buffer fails, return
  3147. * EFAULT
  3148. */
  3149. if (le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)) {
  3150. void *ioasa =
  3151. (void *)(arg +
  3152. offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
  3153. pmcraid_info("command failed with %x\n",
  3154. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  3155. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3156. sizeof(struct pmcraid_ioasa))) {
  3157. pmcraid_err("failed to copy ioasa buffer to user\n");
  3158. rc = -EFAULT;
  3159. }
  3160. }
  3161. /* If the data transfer was from device, copy the data onto user
  3162. * buffers
  3163. */
  3164. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3165. rc = pmcraid_copy_sglist(cmd->sglist,
  3166. request_buffer,
  3167. request_size,
  3168. direction);
  3169. if (rc) {
  3170. pmcraid_err("failed to copy user buffer\n");
  3171. rc = -EFAULT;
  3172. }
  3173. }
  3174. out_free_sglist:
  3175. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3176. pmcraid_return_cmd(cmd);
  3177. out_free_buffer:
  3178. kfree(buffer);
  3179. return rc;
  3180. }
  3181. /**
  3182. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3183. *
  3184. * @pinstance: pointer to adapter instance structure
  3185. * @cmd: ioctl command passed in
  3186. * @buflen: length of user_buffer
  3187. * @user_buffer: user buffer pointer
  3188. *
  3189. * Return Value
  3190. * 0 in case of success, otherwise appropriate error code
  3191. */
  3192. static long pmcraid_ioctl_driver(
  3193. struct pmcraid_instance *pinstance,
  3194. unsigned int cmd,
  3195. unsigned int buflen,
  3196. void __user *user_buffer
  3197. )
  3198. {
  3199. int rc = -ENOSYS;
  3200. if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
  3201. pmcraid_err("ioctl_driver: access fault in request buffer \n");
  3202. return -EFAULT;
  3203. }
  3204. switch (cmd) {
  3205. case PMCRAID_IOCTL_RESET_ADAPTER:
  3206. pmcraid_reset_bringup(pinstance);
  3207. rc = 0;
  3208. break;
  3209. default:
  3210. break;
  3211. }
  3212. return rc;
  3213. }
  3214. /**
  3215. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3216. *
  3217. * @cmd: ioctl command
  3218. * @arg: user buffer
  3219. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3220. *
  3221. * Return Value
  3222. * negetive error code if there are access issues, otherwise zero.
  3223. * Upon success, returns ioctl header copied out of user buffer.
  3224. */
  3225. static int pmcraid_check_ioctl_buffer(
  3226. int cmd,
  3227. void __user *arg,
  3228. struct pmcraid_ioctl_header *hdr
  3229. )
  3230. {
  3231. int rc = 0;
  3232. int access = VERIFY_READ;
  3233. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3234. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3235. return -EFAULT;
  3236. }
  3237. /* check for valid driver signature */
  3238. rc = memcmp(hdr->signature,
  3239. PMCRAID_IOCTL_SIGNATURE,
  3240. sizeof(hdr->signature));
  3241. if (rc) {
  3242. pmcraid_err("signature verification failed\n");
  3243. return -EINVAL;
  3244. }
  3245. /* buffer length can't be negetive */
  3246. if (hdr->buffer_length < 0) {
  3247. pmcraid_err("ioctl: invalid buffer length specified\n");
  3248. return -EINVAL;
  3249. }
  3250. /* check for appropriate buffer access */
  3251. if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
  3252. access = VERIFY_WRITE;
  3253. rc = access_ok(access,
  3254. (arg + sizeof(struct pmcraid_ioctl_header)),
  3255. hdr->buffer_length);
  3256. if (!rc) {
  3257. pmcraid_err("access failed for user buffer of size %d\n",
  3258. hdr->buffer_length);
  3259. return -EFAULT;
  3260. }
  3261. return 0;
  3262. }
  3263. /**
  3264. * pmcraid_ioctl - char node ioctl entry point
  3265. */
  3266. static long pmcraid_chr_ioctl(
  3267. struct file *filep,
  3268. unsigned int cmd,
  3269. unsigned long arg
  3270. )
  3271. {
  3272. struct pmcraid_instance *pinstance = NULL;
  3273. struct pmcraid_ioctl_header *hdr = NULL;
  3274. int retval = -ENOTTY;
  3275. hdr = kmalloc(GFP_KERNEL, sizeof(struct pmcraid_ioctl_header));
  3276. if (!hdr) {
  3277. pmcraid_err("faile to allocate memory for ioctl header\n");
  3278. return -ENOMEM;
  3279. }
  3280. retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
  3281. if (retval) {
  3282. pmcraid_info("chr_ioctl: header check failed\n");
  3283. kfree(hdr);
  3284. return retval;
  3285. }
  3286. pinstance = (struct pmcraid_instance *)filep->private_data;
  3287. if (!pinstance) {
  3288. pmcraid_info("adapter instance is not found\n");
  3289. kfree(hdr);
  3290. return -ENOTTY;
  3291. }
  3292. switch (_IOC_TYPE(cmd)) {
  3293. case PMCRAID_PASSTHROUGH_IOCTL:
  3294. /* If ioctl code is to download microcode, we need to block
  3295. * mid-layer requests.
  3296. */
  3297. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3298. scsi_block_requests(pinstance->host);
  3299. retval = pmcraid_ioctl_passthrough(pinstance,
  3300. cmd,
  3301. hdr->buffer_length,
  3302. arg);
  3303. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3304. scsi_unblock_requests(pinstance->host);
  3305. break;
  3306. case PMCRAID_DRIVER_IOCTL:
  3307. arg += sizeof(struct pmcraid_ioctl_header);
  3308. retval = pmcraid_ioctl_driver(pinstance,
  3309. cmd,
  3310. hdr->buffer_length,
  3311. (void __user *)arg);
  3312. break;
  3313. default:
  3314. retval = -ENOTTY;
  3315. break;
  3316. }
  3317. kfree(hdr);
  3318. return retval;
  3319. }
  3320. /**
  3321. * File operations structure for management interface
  3322. */
  3323. static const struct file_operations pmcraid_fops = {
  3324. .owner = THIS_MODULE,
  3325. .open = pmcraid_chr_open,
  3326. .release = pmcraid_chr_release,
  3327. .fasync = pmcraid_chr_fasync,
  3328. .unlocked_ioctl = pmcraid_chr_ioctl,
  3329. #ifdef CONFIG_COMPAT
  3330. .compat_ioctl = pmcraid_chr_ioctl,
  3331. #endif
  3332. };
  3333. /**
  3334. * pmcraid_show_log_level - Display adapter's error logging level
  3335. * @dev: class device struct
  3336. * @buf: buffer
  3337. *
  3338. * Return value:
  3339. * number of bytes printed to buffer
  3340. */
  3341. static ssize_t pmcraid_show_log_level(
  3342. struct device *dev,
  3343. struct device_attribute *attr,
  3344. char *buf)
  3345. {
  3346. struct Scsi_Host *shost = class_to_shost(dev);
  3347. struct pmcraid_instance *pinstance =
  3348. (struct pmcraid_instance *)shost->hostdata;
  3349. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3350. }
  3351. /**
  3352. * pmcraid_store_log_level - Change the adapter's error logging level
  3353. * @dev: class device struct
  3354. * @buf: buffer
  3355. * @count: not used
  3356. *
  3357. * Return value:
  3358. * number of bytes printed to buffer
  3359. */
  3360. static ssize_t pmcraid_store_log_level(
  3361. struct device *dev,
  3362. struct device_attribute *attr,
  3363. const char *buf,
  3364. size_t count
  3365. )
  3366. {
  3367. struct Scsi_Host *shost;
  3368. struct pmcraid_instance *pinstance;
  3369. unsigned long val;
  3370. if (strict_strtoul(buf, 10, &val))
  3371. return -EINVAL;
  3372. /* log-level should be from 0 to 2 */
  3373. if (val > 2)
  3374. return -EINVAL;
  3375. shost = class_to_shost(dev);
  3376. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3377. pinstance->current_log_level = val;
  3378. return strlen(buf);
  3379. }
  3380. static struct device_attribute pmcraid_log_level_attr = {
  3381. .attr = {
  3382. .name = "log_level",
  3383. .mode = S_IRUGO | S_IWUSR,
  3384. },
  3385. .show = pmcraid_show_log_level,
  3386. .store = pmcraid_store_log_level,
  3387. };
  3388. /**
  3389. * pmcraid_show_drv_version - Display driver version
  3390. * @dev: class device struct
  3391. * @buf: buffer
  3392. *
  3393. * Return value:
  3394. * number of bytes printed to buffer
  3395. */
  3396. static ssize_t pmcraid_show_drv_version(
  3397. struct device *dev,
  3398. struct device_attribute *attr,
  3399. char *buf
  3400. )
  3401. {
  3402. return snprintf(buf, PAGE_SIZE, "version: %s, build date: %s\n",
  3403. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  3404. }
  3405. static struct device_attribute pmcraid_driver_version_attr = {
  3406. .attr = {
  3407. .name = "drv_version",
  3408. .mode = S_IRUGO,
  3409. },
  3410. .show = pmcraid_show_drv_version,
  3411. };
  3412. /**
  3413. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3414. * @dev: class device struct
  3415. * @buf: buffer
  3416. *
  3417. * Return value:
  3418. * number of bytes printed to buffer
  3419. */
  3420. static ssize_t pmcraid_show_adapter_id(
  3421. struct device *dev,
  3422. struct device_attribute *attr,
  3423. char *buf
  3424. )
  3425. {
  3426. struct Scsi_Host *shost = class_to_shost(dev);
  3427. struct pmcraid_instance *pinstance =
  3428. (struct pmcraid_instance *)shost->hostdata;
  3429. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3430. pinstance->pdev->devfn;
  3431. u32 aen_group = pmcraid_event_family.id;
  3432. return snprintf(buf, PAGE_SIZE,
  3433. "adapter id: %d\nminor: %d\naen group: %d\n",
  3434. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3435. }
  3436. static struct device_attribute pmcraid_adapter_id_attr = {
  3437. .attr = {
  3438. .name = "adapter_id",
  3439. .mode = S_IRUGO | S_IWUSR,
  3440. },
  3441. .show = pmcraid_show_adapter_id,
  3442. };
  3443. static struct device_attribute *pmcraid_host_attrs[] = {
  3444. &pmcraid_log_level_attr,
  3445. &pmcraid_driver_version_attr,
  3446. &pmcraid_adapter_id_attr,
  3447. NULL,
  3448. };
  3449. /* host template structure for pmcraid driver */
  3450. static struct scsi_host_template pmcraid_host_template = {
  3451. .module = THIS_MODULE,
  3452. .name = PMCRAID_DRIVER_NAME,
  3453. .queuecommand = pmcraid_queuecommand,
  3454. .eh_abort_handler = pmcraid_eh_abort_handler,
  3455. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3456. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3457. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3458. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3459. .slave_alloc = pmcraid_slave_alloc,
  3460. .slave_configure = pmcraid_slave_configure,
  3461. .slave_destroy = pmcraid_slave_destroy,
  3462. .change_queue_depth = pmcraid_change_queue_depth,
  3463. .change_queue_type = pmcraid_change_queue_type,
  3464. .can_queue = PMCRAID_MAX_IO_CMD,
  3465. .this_id = -1,
  3466. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3467. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3468. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3469. .use_clustering = ENABLE_CLUSTERING,
  3470. .shost_attrs = pmcraid_host_attrs,
  3471. .proc_name = PMCRAID_DRIVER_NAME
  3472. };
  3473. /**
  3474. * pmcraid_isr_common - Common interrupt handler routine
  3475. *
  3476. * @pinstance: pointer to adapter instance
  3477. * @intrs: active interrupts (contents of ioa_host_interrupt register)
  3478. * @hrrq_id: Host RRQ index
  3479. *
  3480. * Return Value
  3481. * none
  3482. */
  3483. static void pmcraid_isr_common(
  3484. struct pmcraid_instance *pinstance,
  3485. u32 intrs,
  3486. int hrrq_id
  3487. )
  3488. {
  3489. u32 intrs_clear =
  3490. (intrs & INTRS_CRITICAL_OP_IN_PROGRESS) ? intrs
  3491. : INTRS_HRRQ_VALID;
  3492. iowrite32(intrs_clear,
  3493. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3494. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  3495. /* hrrq valid bit was set, schedule tasklet to handle the response */
  3496. if (intrs_clear == INTRS_HRRQ_VALID)
  3497. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3498. }
  3499. /**
  3500. * pmcraid_isr - implements interrupt handling routine
  3501. *
  3502. * @irq: interrupt vector number
  3503. * @dev_id: pointer hrrq_vector
  3504. *
  3505. * Return Value
  3506. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3507. */
  3508. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3509. {
  3510. struct pmcraid_isr_param *hrrq_vector;
  3511. struct pmcraid_instance *pinstance;
  3512. unsigned long lock_flags;
  3513. u32 intrs;
  3514. /* In case of legacy interrupt mode where interrupts are shared across
  3515. * isrs, it may be possible that the current interrupt is not from IOA
  3516. */
  3517. if (!dev_id) {
  3518. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3519. return IRQ_NONE;
  3520. }
  3521. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3522. pinstance = hrrq_vector->drv_inst;
  3523. /* Acquire the lock (currently host_lock) while processing interrupts.
  3524. * This interval is small as most of the response processing is done by
  3525. * tasklet without the lock.
  3526. */
  3527. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3528. intrs = pmcraid_read_interrupts(pinstance);
  3529. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) {
  3530. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3531. return IRQ_NONE;
  3532. }
  3533. /* Any error interrupts including unit_check, initiate IOA reset.
  3534. * In case of unit check indicate to reset_sequence that IOA unit
  3535. * checked and prepare for a dump during reset sequence
  3536. */
  3537. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3538. if (intrs & INTRS_IOA_UNIT_CHECK)
  3539. pinstance->ioa_unit_check = 1;
  3540. iowrite32(intrs,
  3541. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3542. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3543. intrs);
  3544. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  3545. pmcraid_initiate_reset(pinstance);
  3546. } else {
  3547. pmcraid_isr_common(pinstance, intrs, hrrq_vector->hrrq_id);
  3548. }
  3549. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3550. return IRQ_HANDLED;
  3551. }
  3552. /**
  3553. * pmcraid_worker_function - worker thread function
  3554. *
  3555. * @workp: pointer to struct work queue
  3556. *
  3557. * Return Value
  3558. * None
  3559. */
  3560. static void pmcraid_worker_function(struct work_struct *workp)
  3561. {
  3562. struct pmcraid_instance *pinstance;
  3563. struct pmcraid_resource_entry *res;
  3564. struct pmcraid_resource_entry *temp;
  3565. struct scsi_device *sdev;
  3566. unsigned long lock_flags;
  3567. unsigned long host_lock_flags;
  3568. u8 bus, target, lun;
  3569. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3570. /* add resources only after host is added into system */
  3571. if (!atomic_read(&pinstance->expose_resources))
  3572. return;
  3573. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3574. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3575. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3576. sdev = res->scsi_dev;
  3577. /* host_lock must be held before calling
  3578. * scsi_device_get
  3579. */
  3580. spin_lock_irqsave(pinstance->host->host_lock,
  3581. host_lock_flags);
  3582. if (!scsi_device_get(sdev)) {
  3583. spin_unlock_irqrestore(
  3584. pinstance->host->host_lock,
  3585. host_lock_flags);
  3586. pmcraid_info("deleting %x from midlayer\n",
  3587. res->cfg_entry.resource_address);
  3588. list_move_tail(&res->queue,
  3589. &pinstance->free_res_q);
  3590. spin_unlock_irqrestore(
  3591. &pinstance->resource_lock,
  3592. lock_flags);
  3593. scsi_remove_device(sdev);
  3594. scsi_device_put(sdev);
  3595. spin_lock_irqsave(&pinstance->resource_lock,
  3596. lock_flags);
  3597. res->change_detected = 0;
  3598. } else {
  3599. spin_unlock_irqrestore(
  3600. pinstance->host->host_lock,
  3601. host_lock_flags);
  3602. }
  3603. }
  3604. }
  3605. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3606. if (res->change_detected == RES_CHANGE_ADD) {
  3607. if (!pmcraid_expose_resource(&res->cfg_entry))
  3608. continue;
  3609. if (RES_IS_VSET(res->cfg_entry)) {
  3610. bus = PMCRAID_VSET_BUS_ID;
  3611. target = res->cfg_entry.unique_flags1;
  3612. lun = PMCRAID_VSET_LUN_ID;
  3613. } else {
  3614. bus = PMCRAID_PHYS_BUS_ID;
  3615. target =
  3616. RES_TARGET(
  3617. res->cfg_entry.resource_address);
  3618. lun = RES_LUN(res->cfg_entry.resource_address);
  3619. }
  3620. res->change_detected = 0;
  3621. spin_unlock_irqrestore(&pinstance->resource_lock,
  3622. lock_flags);
  3623. scsi_add_device(pinstance->host, bus, target, lun);
  3624. spin_lock_irqsave(&pinstance->resource_lock,
  3625. lock_flags);
  3626. }
  3627. }
  3628. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3629. }
  3630. /**
  3631. * pmcraid_tasklet_function - Tasklet function
  3632. *
  3633. * @instance: pointer to msix param structure
  3634. *
  3635. * Return Value
  3636. * None
  3637. */
  3638. void pmcraid_tasklet_function(unsigned long instance)
  3639. {
  3640. struct pmcraid_isr_param *hrrq_vector;
  3641. struct pmcraid_instance *pinstance;
  3642. unsigned long hrrq_lock_flags;
  3643. unsigned long pending_lock_flags;
  3644. unsigned long host_lock_flags;
  3645. spinlock_t *lockp; /* hrrq buffer lock */
  3646. int id;
  3647. u32 intrs;
  3648. __le32 resp;
  3649. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3650. pinstance = hrrq_vector->drv_inst;
  3651. id = hrrq_vector->hrrq_id;
  3652. lockp = &(pinstance->hrrq_lock[id]);
  3653. intrs = pmcraid_read_interrupts(pinstance);
  3654. /* If interrupts was as part of the ioa initialization, clear and mask
  3655. * it. Delete the timer and wakeup the reset engine to proceed with
  3656. * reset sequence
  3657. */
  3658. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3659. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  3660. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  3661. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  3662. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3663. if (pinstance->reset_cmd != NULL) {
  3664. del_timer(&pinstance->reset_cmd->timer);
  3665. spin_lock_irqsave(pinstance->host->host_lock,
  3666. host_lock_flags);
  3667. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  3668. spin_unlock_irqrestore(pinstance->host->host_lock,
  3669. host_lock_flags);
  3670. }
  3671. return;
  3672. }
  3673. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3674. * protected by its own lock. Traversals must be done within this lock
  3675. * as there may be multiple tasklets running on multiple CPUs. Note
  3676. * that the lock is held just for picking up the response handle and
  3677. * manipulating hrrq_curr/toggle_bit values.
  3678. */
  3679. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3680. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3681. while ((resp & HRRQ_TOGGLE_BIT) ==
  3682. pinstance->host_toggle_bit[id]) {
  3683. int cmd_index = resp >> 2;
  3684. struct pmcraid_cmd *cmd = NULL;
  3685. if (cmd_index < PMCRAID_MAX_CMD) {
  3686. cmd = pinstance->cmd_list[cmd_index];
  3687. } else {
  3688. /* In case of invalid response handle, initiate IOA
  3689. * reset sequence.
  3690. */
  3691. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3692. pmcraid_err("Invalid response %d initiating reset\n",
  3693. cmd_index);
  3694. spin_lock_irqsave(pinstance->host->host_lock,
  3695. host_lock_flags);
  3696. pmcraid_initiate_reset(pinstance);
  3697. spin_unlock_irqrestore(pinstance->host->host_lock,
  3698. host_lock_flags);
  3699. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3700. break;
  3701. }
  3702. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3703. pinstance->hrrq_curr[id]++;
  3704. } else {
  3705. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3706. pinstance->host_toggle_bit[id] ^= 1u;
  3707. }
  3708. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3709. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3710. pending_lock_flags);
  3711. list_del(&cmd->free_list);
  3712. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3713. pending_lock_flags);
  3714. del_timer(&cmd->timer);
  3715. atomic_dec(&pinstance->outstanding_cmds);
  3716. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3717. spin_lock_irqsave(pinstance->host->host_lock,
  3718. host_lock_flags);
  3719. cmd->cmd_done(cmd);
  3720. spin_unlock_irqrestore(pinstance->host->host_lock,
  3721. host_lock_flags);
  3722. } else if (cmd->cmd_done != NULL) {
  3723. cmd->cmd_done(cmd);
  3724. }
  3725. /* loop over until we are done with all responses */
  3726. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3727. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3728. }
  3729. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3730. }
  3731. /**
  3732. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3733. * @pinstance: pointer to adapter instance structure
  3734. *
  3735. * This routine un-registers registered interrupt handler and
  3736. * also frees irqs/vectors.
  3737. *
  3738. * Retun Value
  3739. * None
  3740. */
  3741. static
  3742. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3743. {
  3744. free_irq(pinstance->pdev->irq, &(pinstance->hrrq_vector[0]));
  3745. }
  3746. /**
  3747. * pmcraid_register_interrupt_handler - registers interrupt handler
  3748. * @pinstance: pointer to per-adapter instance structure
  3749. *
  3750. * Return Value
  3751. * 0 on success, non-zero error code otherwise.
  3752. */
  3753. static int
  3754. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3755. {
  3756. struct pci_dev *pdev = pinstance->pdev;
  3757. pinstance->hrrq_vector[0].hrrq_id = 0;
  3758. pinstance->hrrq_vector[0].drv_inst = pinstance;
  3759. pinstance->hrrq_vector[0].vector = 0;
  3760. pinstance->num_hrrq = 1;
  3761. return request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
  3762. PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
  3763. }
  3764. /**
  3765. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  3766. * @pinstance: per adapter instance structure pointer
  3767. * @max_index: number of buffer blocks to release
  3768. *
  3769. * Return Value
  3770. * None
  3771. */
  3772. static void
  3773. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  3774. {
  3775. int i;
  3776. for (i = 0; i < max_index; i++) {
  3777. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  3778. pinstance->cmd_list[i] = NULL;
  3779. }
  3780. kmem_cache_destroy(pinstance->cmd_cachep);
  3781. pinstance->cmd_cachep = NULL;
  3782. }
  3783. /**
  3784. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  3785. * @pinstance: pointer to per adapter instance structure
  3786. * @max_index: number of buffers (from 0 onwards) to release
  3787. *
  3788. * This function assumes that the command blocks for which control blocks are
  3789. * linked are not released.
  3790. *
  3791. * Return Value
  3792. * None
  3793. */
  3794. static void
  3795. pmcraid_release_control_blocks(
  3796. struct pmcraid_instance *pinstance,
  3797. int max_index
  3798. )
  3799. {
  3800. int i;
  3801. if (pinstance->control_pool == NULL)
  3802. return;
  3803. for (i = 0; i < max_index; i++) {
  3804. pci_pool_free(pinstance->control_pool,
  3805. pinstance->cmd_list[i]->ioa_cb,
  3806. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  3807. pinstance->cmd_list[i]->ioa_cb = NULL;
  3808. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  3809. }
  3810. pci_pool_destroy(pinstance->control_pool);
  3811. pinstance->control_pool = NULL;
  3812. }
  3813. /**
  3814. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  3815. * @pinstance - pointer to per adapter instance structure
  3816. *
  3817. * Allocates memory for command blocks using kernel slab allocator.
  3818. *
  3819. * Return Value
  3820. * 0 in case of success; -ENOMEM in case of failure
  3821. */
  3822. static int __devinit
  3823. pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  3824. {
  3825. int i;
  3826. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  3827. pinstance->host->unique_id);
  3828. pinstance->cmd_cachep = kmem_cache_create(
  3829. pinstance->cmd_pool_name,
  3830. sizeof(struct pmcraid_cmd), 0,
  3831. SLAB_HWCACHE_ALIGN, NULL);
  3832. if (!pinstance->cmd_cachep)
  3833. return -ENOMEM;
  3834. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3835. pinstance->cmd_list[i] =
  3836. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  3837. if (!pinstance->cmd_list[i]) {
  3838. pmcraid_release_cmd_blocks(pinstance, i);
  3839. return -ENOMEM;
  3840. }
  3841. }
  3842. return 0;
  3843. }
  3844. /**
  3845. * pmcraid_allocate_control_blocks - allocates memory control blocks
  3846. * @pinstance : pointer to per adapter instance structure
  3847. *
  3848. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  3849. * and IOASAs. This is called after command blocks are already allocated.
  3850. *
  3851. * Return Value
  3852. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  3853. */
  3854. static int __devinit
  3855. pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  3856. {
  3857. int i;
  3858. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  3859. pinstance->host->unique_id);
  3860. pinstance->control_pool =
  3861. pci_pool_create(pinstance->ctl_pool_name,
  3862. pinstance->pdev,
  3863. sizeof(struct pmcraid_control_block),
  3864. PMCRAID_IOARCB_ALIGNMENT, 0);
  3865. if (!pinstance->control_pool)
  3866. return -ENOMEM;
  3867. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  3868. pinstance->cmd_list[i]->ioa_cb =
  3869. pci_pool_alloc(
  3870. pinstance->control_pool,
  3871. GFP_KERNEL,
  3872. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  3873. if (!pinstance->cmd_list[i]->ioa_cb) {
  3874. pmcraid_release_control_blocks(pinstance, i);
  3875. return -ENOMEM;
  3876. }
  3877. memset(pinstance->cmd_list[i]->ioa_cb, 0,
  3878. sizeof(struct pmcraid_control_block));
  3879. }
  3880. return 0;
  3881. }
  3882. /**
  3883. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  3884. * @pinstance: pointer to per adapter instance structure
  3885. * @maxindex: size of hrrq buffer pointer array
  3886. *
  3887. * Return Value
  3888. * None
  3889. */
  3890. static void
  3891. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  3892. {
  3893. int i;
  3894. for (i = 0; i < maxindex; i++) {
  3895. pci_free_consistent(pinstance->pdev,
  3896. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  3897. pinstance->hrrq_start[i],
  3898. pinstance->hrrq_start_bus_addr[i]);
  3899. /* reset pointers and toggle bit to zeros */
  3900. pinstance->hrrq_start[i] = NULL;
  3901. pinstance->hrrq_start_bus_addr[i] = 0;
  3902. pinstance->host_toggle_bit[i] = 0;
  3903. }
  3904. }
  3905. /**
  3906. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  3907. * @pinstance: pointer to per adapter instance structure
  3908. *
  3909. * Return value
  3910. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  3911. */
  3912. static int __devinit
  3913. pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  3914. {
  3915. int i;
  3916. int buf_count = PMCRAID_MAX_CMD / pinstance->num_hrrq;
  3917. for (i = 0; i < pinstance->num_hrrq; i++) {
  3918. int buffer_size = HRRQ_ENTRY_SIZE * buf_count;
  3919. pinstance->hrrq_start[i] =
  3920. pci_alloc_consistent(
  3921. pinstance->pdev,
  3922. buffer_size,
  3923. &(pinstance->hrrq_start_bus_addr[i]));
  3924. if (pinstance->hrrq_start[i] == 0) {
  3925. pmcraid_err("could not allocate host rrq: %d\n", i);
  3926. pmcraid_release_host_rrqs(pinstance, i);
  3927. return -ENOMEM;
  3928. }
  3929. memset(pinstance->hrrq_start[i], 0, buffer_size);
  3930. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  3931. pinstance->hrrq_end[i] =
  3932. pinstance->hrrq_start[i] + buf_count - 1;
  3933. pinstance->host_toggle_bit[i] = 1;
  3934. spin_lock_init(&pinstance->hrrq_lock[i]);
  3935. }
  3936. return 0;
  3937. }
  3938. /**
  3939. * pmcraid_release_hcams - release HCAM buffers
  3940. *
  3941. * @pinstance: pointer to per adapter instance structure
  3942. *
  3943. * Return value
  3944. * none
  3945. */
  3946. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  3947. {
  3948. if (pinstance->ccn.msg != NULL) {
  3949. pci_free_consistent(pinstance->pdev,
  3950. PMCRAID_AEN_HDR_SIZE +
  3951. sizeof(struct pmcraid_hcam_ccn),
  3952. pinstance->ccn.msg,
  3953. pinstance->ccn.baddr);
  3954. pinstance->ccn.msg = NULL;
  3955. pinstance->ccn.hcam = NULL;
  3956. pinstance->ccn.baddr = 0;
  3957. }
  3958. if (pinstance->ldn.msg != NULL) {
  3959. pci_free_consistent(pinstance->pdev,
  3960. PMCRAID_AEN_HDR_SIZE +
  3961. sizeof(struct pmcraid_hcam_ldn),
  3962. pinstance->ldn.msg,
  3963. pinstance->ldn.baddr);
  3964. pinstance->ldn.msg = NULL;
  3965. pinstance->ldn.hcam = NULL;
  3966. pinstance->ldn.baddr = 0;
  3967. }
  3968. }
  3969. /**
  3970. * pmcraid_allocate_hcams - allocates HCAM buffers
  3971. * @pinstance : pointer to per adapter instance structure
  3972. *
  3973. * Return Value:
  3974. * 0 in case of successful allocation, non-zero otherwise
  3975. */
  3976. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  3977. {
  3978. pinstance->ccn.msg = pci_alloc_consistent(
  3979. pinstance->pdev,
  3980. PMCRAID_AEN_HDR_SIZE +
  3981. sizeof(struct pmcraid_hcam_ccn),
  3982. &(pinstance->ccn.baddr));
  3983. pinstance->ldn.msg = pci_alloc_consistent(
  3984. pinstance->pdev,
  3985. PMCRAID_AEN_HDR_SIZE +
  3986. sizeof(struct pmcraid_hcam_ldn),
  3987. &(pinstance->ldn.baddr));
  3988. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  3989. pmcraid_release_hcams(pinstance);
  3990. } else {
  3991. pinstance->ccn.hcam =
  3992. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  3993. pinstance->ldn.hcam =
  3994. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  3995. atomic_set(&pinstance->ccn.ignore, 0);
  3996. atomic_set(&pinstance->ldn.ignore, 0);
  3997. }
  3998. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  3999. }
  4000. /**
  4001. * pmcraid_release_config_buffers - release config.table buffers
  4002. * @pinstance: pointer to per adapter instance structure
  4003. *
  4004. * Return Value
  4005. * none
  4006. */
  4007. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4008. {
  4009. if (pinstance->cfg_table != NULL &&
  4010. pinstance->cfg_table_bus_addr != 0) {
  4011. pci_free_consistent(pinstance->pdev,
  4012. sizeof(struct pmcraid_config_table),
  4013. pinstance->cfg_table,
  4014. pinstance->cfg_table_bus_addr);
  4015. pinstance->cfg_table = NULL;
  4016. pinstance->cfg_table_bus_addr = 0;
  4017. }
  4018. if (pinstance->res_entries != NULL) {
  4019. int i;
  4020. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4021. list_del(&pinstance->res_entries[i].queue);
  4022. kfree(pinstance->res_entries);
  4023. pinstance->res_entries = NULL;
  4024. }
  4025. pmcraid_release_hcams(pinstance);
  4026. }
  4027. /**
  4028. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4029. * @pinstance : pointer to per adapter instance structure
  4030. *
  4031. * Return Value
  4032. * 0 for successful allocation, -ENOMEM for any failure
  4033. */
  4034. static int __devinit
  4035. pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4036. {
  4037. int i;
  4038. pinstance->res_entries =
  4039. kzalloc(sizeof(struct pmcraid_resource_entry) *
  4040. PMCRAID_MAX_RESOURCES, GFP_KERNEL);
  4041. if (NULL == pinstance->res_entries) {
  4042. pmcraid_err("failed to allocate memory for resource table\n");
  4043. return -ENOMEM;
  4044. }
  4045. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4046. list_add_tail(&pinstance->res_entries[i].queue,
  4047. &pinstance->free_res_q);
  4048. pinstance->cfg_table =
  4049. pci_alloc_consistent(pinstance->pdev,
  4050. sizeof(struct pmcraid_config_table),
  4051. &pinstance->cfg_table_bus_addr);
  4052. if (NULL == pinstance->cfg_table) {
  4053. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4054. pmcraid_release_config_buffers(pinstance);
  4055. return -ENOMEM;
  4056. }
  4057. if (pmcraid_allocate_hcams(pinstance)) {
  4058. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4059. pmcraid_release_config_buffers(pinstance);
  4060. return -ENOMEM;
  4061. }
  4062. return 0;
  4063. }
  4064. /**
  4065. * pmcraid_init_tasklets - registers tasklets for response handling
  4066. *
  4067. * @pinstance: pointer adapter instance structure
  4068. *
  4069. * Return value
  4070. * none
  4071. */
  4072. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4073. {
  4074. int i;
  4075. for (i = 0; i < pinstance->num_hrrq; i++)
  4076. tasklet_init(&pinstance->isr_tasklet[i],
  4077. pmcraid_tasklet_function,
  4078. (unsigned long)&pinstance->hrrq_vector[i]);
  4079. }
  4080. /**
  4081. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4082. *
  4083. * @pinstance: pointer to adapter instance structure
  4084. *
  4085. * Return value
  4086. * none
  4087. */
  4088. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4089. {
  4090. int i;
  4091. for (i = 0; i < pinstance->num_hrrq; i++)
  4092. tasklet_kill(&pinstance->isr_tasklet[i]);
  4093. }
  4094. /**
  4095. * pmcraid_init_buffers - allocates memory and initializes various structures
  4096. * @pinstance: pointer to per adapter instance structure
  4097. *
  4098. * This routine pre-allocates memory based on the type of block as below:
  4099. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4100. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4101. * config-table entries : DMAable memory using pci_alloc_consistent
  4102. * HostRRQs : DMAable memory, using pci_alloc_consistent
  4103. *
  4104. * Return Value
  4105. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4106. */
  4107. static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4108. {
  4109. int i;
  4110. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4111. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4112. pinstance->num_hrrq);
  4113. return -ENOMEM;
  4114. }
  4115. if (pmcraid_allocate_config_buffers(pinstance)) {
  4116. pmcraid_err("couldn't allocate memory for config buffers\n");
  4117. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4118. return -ENOMEM;
  4119. }
  4120. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4121. pmcraid_err("couldn't allocate memory for cmd blocks \n");
  4122. pmcraid_release_config_buffers(pinstance);
  4123. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4124. return -ENOMEM;
  4125. }
  4126. if (pmcraid_allocate_control_blocks(pinstance)) {
  4127. pmcraid_err("couldn't allocate memory control blocks \n");
  4128. pmcraid_release_config_buffers(pinstance);
  4129. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4130. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4131. return -ENOMEM;
  4132. }
  4133. /* Initialize all the command blocks and add them to free pool. No
  4134. * need to lock (free_pool_lock) as this is done in initialization
  4135. * itself
  4136. */
  4137. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4138. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4139. pmcraid_init_cmdblk(cmdp, i);
  4140. cmdp->drv_inst = pinstance;
  4141. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4142. }
  4143. return 0;
  4144. }
  4145. /**
  4146. * pmcraid_reinit_buffers - resets various buffer pointers
  4147. * @pinstance: pointer to adapter instance
  4148. * Return value
  4149. * none
  4150. */
  4151. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4152. {
  4153. int i;
  4154. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4155. for (i = 0; i < pinstance->num_hrrq; i++) {
  4156. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4157. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4158. pinstance->hrrq_end[i] =
  4159. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4160. pinstance->host_toggle_bit[i] = 1;
  4161. }
  4162. }
  4163. /**
  4164. * pmcraid_init_instance - initialize per instance data structure
  4165. * @pdev: pointer to pci device structure
  4166. * @host: pointer to Scsi_Host structure
  4167. * @mapped_pci_addr: memory mapped IOA configuration registers
  4168. *
  4169. * Return Value
  4170. * 0 on success, non-zero in case of any failure
  4171. */
  4172. static int __devinit pmcraid_init_instance(
  4173. struct pci_dev *pdev,
  4174. struct Scsi_Host *host,
  4175. void __iomem *mapped_pci_addr
  4176. )
  4177. {
  4178. struct pmcraid_instance *pinstance =
  4179. (struct pmcraid_instance *)host->hostdata;
  4180. pinstance->host = host;
  4181. pinstance->pdev = pdev;
  4182. /* Initialize register addresses */
  4183. pinstance->mapped_dma_addr = mapped_pci_addr;
  4184. /* Initialize chip-specific details */
  4185. {
  4186. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4187. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4188. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4189. pint_regs->ioa_host_interrupt_reg =
  4190. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4191. pint_regs->ioa_host_interrupt_clr_reg =
  4192. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4193. pint_regs->host_ioa_interrupt_reg =
  4194. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4195. pint_regs->host_ioa_interrupt_clr_reg =
  4196. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4197. /* Current version of firmware exposes interrupt mask set
  4198. * and mask clr registers through memory mapped bar0.
  4199. */
  4200. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4201. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4202. pint_regs->ioa_host_interrupt_mask_reg =
  4203. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4204. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4205. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4206. pint_regs->global_interrupt_mask_reg =
  4207. mapped_pci_addr + chip_cfg->global_intr_mask;
  4208. };
  4209. pinstance->ioa_reset_attempts = 0;
  4210. init_waitqueue_head(&pinstance->reset_wait_q);
  4211. atomic_set(&pinstance->outstanding_cmds, 0);
  4212. atomic_set(&pinstance->expose_resources, 0);
  4213. INIT_LIST_HEAD(&pinstance->free_res_q);
  4214. INIT_LIST_HEAD(&pinstance->used_res_q);
  4215. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4216. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4217. spin_lock_init(&pinstance->free_pool_lock);
  4218. spin_lock_init(&pinstance->pending_pool_lock);
  4219. spin_lock_init(&pinstance->resource_lock);
  4220. mutex_init(&pinstance->aen_queue_lock);
  4221. /* Work-queue (Shared) for deferred processing error handling */
  4222. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4223. /* Initialize the default log_level */
  4224. pinstance->current_log_level = pmcraid_log_level;
  4225. /* Setup variables required for reset engine */
  4226. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4227. pinstance->reset_cmd = NULL;
  4228. return 0;
  4229. }
  4230. /**
  4231. * pmcraid_release_buffers - release per-adapter buffers allocated
  4232. *
  4233. * @pinstance: pointer to adapter soft state
  4234. *
  4235. * Return Value
  4236. * none
  4237. */
  4238. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4239. {
  4240. pmcraid_release_config_buffers(pinstance);
  4241. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4242. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4243. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4244. }
  4245. /**
  4246. * pmcraid_shutdown - shutdown adapter controller.
  4247. * @pdev: pci device struct
  4248. *
  4249. * Issues an adapter shutdown to the card waits for its completion
  4250. *
  4251. * Return value
  4252. * none
  4253. */
  4254. static void pmcraid_shutdown(struct pci_dev *pdev)
  4255. {
  4256. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4257. pmcraid_reset_bringdown(pinstance);
  4258. }
  4259. /**
  4260. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4261. */
  4262. static unsigned short pmcraid_get_minor(void)
  4263. {
  4264. int minor;
  4265. minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
  4266. __set_bit(minor, pmcraid_minor);
  4267. return minor;
  4268. }
  4269. /**
  4270. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4271. */
  4272. static void pmcraid_release_minor(unsigned short minor)
  4273. {
  4274. __clear_bit(minor, pmcraid_minor);
  4275. }
  4276. /**
  4277. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4278. *
  4279. * @pinstance: pointer to adapter instance for which to register device
  4280. *
  4281. * Return value
  4282. * 0 in case of success, otherwise non-zero
  4283. */
  4284. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4285. {
  4286. int minor;
  4287. int error;
  4288. minor = pmcraid_get_minor();
  4289. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4290. pinstance->cdev.owner = THIS_MODULE;
  4291. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4292. if (error)
  4293. pmcraid_release_minor(minor);
  4294. else
  4295. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4296. NULL, "pmcsas%u", minor);
  4297. return error;
  4298. }
  4299. /**
  4300. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4301. *
  4302. * @pinstance: pointer to adapter instance structure
  4303. *
  4304. * Return value
  4305. * none
  4306. */
  4307. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4308. {
  4309. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4310. device_destroy(pmcraid_class,
  4311. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4312. cdev_del(&pinstance->cdev);
  4313. }
  4314. /**
  4315. * pmcraid_remove - IOA hot plug remove entry point
  4316. * @pdev: pci device struct
  4317. *
  4318. * Return value
  4319. * none
  4320. */
  4321. static void __devexit pmcraid_remove(struct pci_dev *pdev)
  4322. {
  4323. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4324. /* remove the management interface (/dev file) for this device */
  4325. pmcraid_release_chrdev(pinstance);
  4326. /* remove host template from scsi midlayer */
  4327. scsi_remove_host(pinstance->host);
  4328. /* block requests from mid-layer */
  4329. scsi_block_requests(pinstance->host);
  4330. /* initiate shutdown adapter */
  4331. pmcraid_shutdown(pdev);
  4332. pmcraid_disable_interrupts(pinstance, ~0);
  4333. flush_scheduled_work();
  4334. pmcraid_kill_tasklets(pinstance);
  4335. pmcraid_unregister_interrupt_handler(pinstance);
  4336. pmcraid_release_buffers(pinstance);
  4337. iounmap(pinstance->mapped_dma_addr);
  4338. pci_release_regions(pdev);
  4339. scsi_host_put(pinstance->host);
  4340. pci_disable_device(pdev);
  4341. return;
  4342. }
  4343. #ifdef CONFIG_PM
  4344. /**
  4345. * pmcraid_suspend - driver suspend entry point for power management
  4346. * @pdev: PCI device structure
  4347. * @state: PCI power state to suspend routine
  4348. *
  4349. * Return Value - 0 always
  4350. */
  4351. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4352. {
  4353. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4354. pmcraid_shutdown(pdev);
  4355. pmcraid_disable_interrupts(pinstance, ~0);
  4356. pmcraid_kill_tasklets(pinstance);
  4357. pci_set_drvdata(pinstance->pdev, pinstance);
  4358. pmcraid_unregister_interrupt_handler(pinstance);
  4359. pci_save_state(pdev);
  4360. pci_disable_device(pdev);
  4361. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4362. return 0;
  4363. }
  4364. /**
  4365. * pmcraid_resume - driver resume entry point PCI power management
  4366. * @pdev: PCI device structure
  4367. *
  4368. * Return Value - 0 in case of success. Error code in case of any failure
  4369. */
  4370. static int pmcraid_resume(struct pci_dev *pdev)
  4371. {
  4372. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4373. struct Scsi_Host *host = pinstance->host;
  4374. int rc;
  4375. int hrrqs;
  4376. pci_set_power_state(pdev, PCI_D0);
  4377. pci_enable_wake(pdev, PCI_D0, 0);
  4378. pci_restore_state(pdev);
  4379. rc = pci_enable_device(pdev);
  4380. if (rc) {
  4381. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4382. return rc;
  4383. }
  4384. pci_set_master(pdev);
  4385. if ((sizeof(dma_addr_t) == 4) ||
  4386. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4387. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4388. if (rc == 0)
  4389. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4390. if (rc != 0) {
  4391. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4392. goto disable_device;
  4393. }
  4394. atomic_set(&pinstance->outstanding_cmds, 0);
  4395. hrrqs = pinstance->num_hrrq;
  4396. rc = pmcraid_register_interrupt_handler(pinstance);
  4397. if (rc) {
  4398. dev_err(&pdev->dev,
  4399. "resume: couldn't register interrupt handlers\n");
  4400. rc = -ENODEV;
  4401. goto release_host;
  4402. }
  4403. pmcraid_init_tasklets(pinstance);
  4404. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4405. /* Start with hard reset sequence which brings up IOA to operational
  4406. * state as well as completes the reset sequence.
  4407. */
  4408. pinstance->ioa_hard_reset = 1;
  4409. /* Start IOA firmware initialization and bring card to Operational
  4410. * state.
  4411. */
  4412. if (pmcraid_reset_bringup(pinstance)) {
  4413. dev_err(&pdev->dev, "couldn't initialize IOA \n");
  4414. rc = -ENODEV;
  4415. goto release_tasklets;
  4416. }
  4417. return 0;
  4418. release_tasklets:
  4419. pmcraid_kill_tasklets(pinstance);
  4420. pmcraid_unregister_interrupt_handler(pinstance);
  4421. release_host:
  4422. scsi_host_put(host);
  4423. disable_device:
  4424. pci_disable_device(pdev);
  4425. return rc;
  4426. }
  4427. #else
  4428. #define pmcraid_suspend NULL
  4429. #define pmcraid_resume NULL
  4430. #endif /* CONFIG_PM */
  4431. /**
  4432. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4433. * completion of the ioa reset
  4434. * @cmd: pointer to reset command block
  4435. */
  4436. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4437. {
  4438. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4439. unsigned long flags;
  4440. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4441. pmcraid_ioa_reset(cmd);
  4442. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4443. scsi_unblock_requests(pinstance->host);
  4444. schedule_work(&pinstance->worker_q);
  4445. }
  4446. /**
  4447. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4448. *
  4449. * @cmd: pointer to pmcraid_cmd structure
  4450. *
  4451. * Return Value
  4452. * 0 for success or non-zero for failure cases
  4453. */
  4454. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4455. {
  4456. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4457. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4458. pmcraid_reinit_cmdblk(cmd);
  4459. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4460. ioarcb->request_type = REQ_TYPE_IOACMD;
  4461. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4462. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4463. /* If this was called as part of resource table reinitialization due to
  4464. * lost CCN, it is enough to return the command block back to free pool
  4465. * as part of set_supported_devs completion function.
  4466. */
  4467. if (cmd->drv_inst->reinit_cfg_table) {
  4468. cmd->drv_inst->reinit_cfg_table = 0;
  4469. cmd->release = 1;
  4470. cmd_done = pmcraid_reinit_cfgtable_done;
  4471. }
  4472. /* we will be done with the reset sequence after set supported devices,
  4473. * setup the done function to return the command block back to free
  4474. * pool
  4475. */
  4476. pmcraid_send_cmd(cmd,
  4477. cmd_done,
  4478. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4479. pmcraid_timeout_handler);
  4480. return;
  4481. }
  4482. /**
  4483. * pmcraid_init_res_table - Initialize the resource table
  4484. * @cmd: pointer to pmcraid command struct
  4485. *
  4486. * This function looks through the existing resource table, comparing
  4487. * it with the config table. This function will take care of old/new
  4488. * devices and schedule adding/removing them from the mid-layer
  4489. * as appropriate.
  4490. *
  4491. * Return value
  4492. * None
  4493. */
  4494. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4495. {
  4496. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4497. struct pmcraid_resource_entry *res, *temp;
  4498. struct pmcraid_config_table_entry *cfgte;
  4499. unsigned long lock_flags;
  4500. int found, rc, i;
  4501. LIST_HEAD(old_res);
  4502. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4503. pmcraid_err("IOA requires microcode download\n");
  4504. /* resource list is protected by pinstance->resource_lock.
  4505. * init_res_table can be called from probe (user-thread) or runtime
  4506. * reset (timer/tasklet)
  4507. */
  4508. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4509. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4510. list_move_tail(&res->queue, &old_res);
  4511. for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
  4512. cfgte = &pinstance->cfg_table->entries[i];
  4513. if (!pmcraid_expose_resource(cfgte))
  4514. continue;
  4515. found = 0;
  4516. /* If this entry was already detected and initialized */
  4517. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4518. rc = memcmp(&res->cfg_entry.resource_address,
  4519. &cfgte->resource_address,
  4520. sizeof(cfgte->resource_address));
  4521. if (!rc) {
  4522. list_move_tail(&res->queue,
  4523. &pinstance->used_res_q);
  4524. found = 1;
  4525. break;
  4526. }
  4527. }
  4528. /* If this is new entry, initialize it and add it the queue */
  4529. if (!found) {
  4530. if (list_empty(&pinstance->free_res_q)) {
  4531. pmcraid_err("Too many devices attached\n");
  4532. break;
  4533. }
  4534. found = 1;
  4535. res = list_entry(pinstance->free_res_q.next,
  4536. struct pmcraid_resource_entry, queue);
  4537. res->scsi_dev = NULL;
  4538. res->change_detected = RES_CHANGE_ADD;
  4539. res->reset_progress = 0;
  4540. list_move_tail(&res->queue, &pinstance->used_res_q);
  4541. }
  4542. /* copy new configuration table entry details into driver
  4543. * maintained resource entry
  4544. */
  4545. if (found) {
  4546. memcpy(&res->cfg_entry, cfgte,
  4547. sizeof(struct pmcraid_config_table_entry));
  4548. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4549. res->cfg_entry.resource_type,
  4550. res->cfg_entry.unique_flags1,
  4551. le32_to_cpu(res->cfg_entry.resource_address));
  4552. }
  4553. }
  4554. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4555. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4556. if (res->scsi_dev) {
  4557. res->change_detected = RES_CHANGE_DEL;
  4558. res->cfg_entry.resource_handle =
  4559. PMCRAID_INVALID_RES_HANDLE;
  4560. list_move_tail(&res->queue, &pinstance->used_res_q);
  4561. } else {
  4562. list_move_tail(&res->queue, &pinstance->free_res_q);
  4563. }
  4564. }
  4565. /* release the resource list lock */
  4566. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4567. pmcraid_set_supported_devs(cmd);
  4568. }
  4569. /**
  4570. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4571. * @cmd: pointer pmcraid_cmd struct
  4572. *
  4573. * This function sends a Query IOA Configuration command to the adapter to
  4574. * retrieve the IOA configuration table.
  4575. *
  4576. * Return value:
  4577. * none
  4578. */
  4579. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4580. {
  4581. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4582. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4583. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4584. int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4585. ioarcb->request_type = REQ_TYPE_IOACMD;
  4586. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4587. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4588. /* firmware requires 4-byte length field, specified in B.E format */
  4589. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4590. /* Since entire config table can be described by single IOADL, it can
  4591. * be part of IOARCB itself
  4592. */
  4593. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4594. offsetof(struct pmcraid_ioarcb,
  4595. add_data.u.ioadl[0]));
  4596. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4597. ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
  4598. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4599. ioarcb->data_transfer_length =
  4600. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4601. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4602. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4603. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4604. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4605. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4606. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4607. }
  4608. /**
  4609. * pmcraid_probe - PCI probe entry pointer for PMC MaxRaid controller driver
  4610. * @pdev: pointer to pci device structure
  4611. * @dev_id: pointer to device ids structure
  4612. *
  4613. * Return Value
  4614. * returns 0 if the device is claimed and successfully configured.
  4615. * returns non-zero error code in case of any failure
  4616. */
  4617. static int __devinit pmcraid_probe(
  4618. struct pci_dev *pdev,
  4619. const struct pci_device_id *dev_id
  4620. )
  4621. {
  4622. struct pmcraid_instance *pinstance;
  4623. struct Scsi_Host *host;
  4624. void __iomem *mapped_pci_addr;
  4625. int rc = PCIBIOS_SUCCESSFUL;
  4626. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  4627. pmcraid_err
  4628. ("maximum number(%d) of supported adapters reached\n",
  4629. atomic_read(&pmcraid_adapter_count));
  4630. return -ENOMEM;
  4631. }
  4632. atomic_inc(&pmcraid_adapter_count);
  4633. rc = pci_enable_device(pdev);
  4634. if (rc) {
  4635. dev_err(&pdev->dev, "Cannot enable adapter\n");
  4636. atomic_dec(&pmcraid_adapter_count);
  4637. return rc;
  4638. }
  4639. dev_info(&pdev->dev,
  4640. "Found new IOA(%x:%x), Total IOA count: %d\n",
  4641. pdev->vendor, pdev->device,
  4642. atomic_read(&pmcraid_adapter_count));
  4643. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  4644. if (rc < 0) {
  4645. dev_err(&pdev->dev,
  4646. "Couldn't register memory range of registers\n");
  4647. goto out_disable_device;
  4648. }
  4649. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  4650. if (!mapped_pci_addr) {
  4651. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  4652. rc = -ENOMEM;
  4653. goto out_release_regions;
  4654. }
  4655. pci_set_master(pdev);
  4656. /* Firmware requires the system bus address of IOARCB to be within
  4657. * 32-bit addressable range though it has 64-bit IOARRIN register.
  4658. * However, firmware supports 64-bit streaming DMA buffers, whereas
  4659. * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
  4660. * returns memory within 4GB (if not, change this logic), coherent
  4661. * buffers are within firmware acceptible address ranges.
  4662. */
  4663. if ((sizeof(dma_addr_t) == 4) ||
  4664. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4665. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4666. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  4667. * bit mask for pci_alloc_consistent to return addresses within 4GB
  4668. */
  4669. if (rc == 0)
  4670. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4671. if (rc != 0) {
  4672. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  4673. goto cleanup_nomem;
  4674. }
  4675. host = scsi_host_alloc(&pmcraid_host_template,
  4676. sizeof(struct pmcraid_instance));
  4677. if (!host) {
  4678. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  4679. rc = -ENOMEM;
  4680. goto cleanup_nomem;
  4681. }
  4682. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  4683. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  4684. host->unique_id = host->host_no;
  4685. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  4686. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  4687. /* zero out entire instance structure */
  4688. pinstance = (struct pmcraid_instance *)host->hostdata;
  4689. memset(pinstance, 0, sizeof(*pinstance));
  4690. pinstance->chip_cfg =
  4691. (struct pmcraid_chip_details *)(dev_id->driver_data);
  4692. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  4693. if (rc < 0) {
  4694. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  4695. goto out_scsi_host_put;
  4696. }
  4697. pci_set_drvdata(pdev, pinstance);
  4698. /* Save PCI config-space for use following the reset */
  4699. rc = pci_save_state(pinstance->pdev);
  4700. if (rc != 0) {
  4701. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  4702. goto out_scsi_host_put;
  4703. }
  4704. pmcraid_disable_interrupts(pinstance, ~0);
  4705. rc = pmcraid_register_interrupt_handler(pinstance);
  4706. if (rc) {
  4707. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  4708. goto out_scsi_host_put;
  4709. }
  4710. pmcraid_init_tasklets(pinstance);
  4711. /* allocate verious buffers used by LLD.*/
  4712. rc = pmcraid_init_buffers(pinstance);
  4713. if (rc) {
  4714. pmcraid_err("couldn't allocate memory blocks\n");
  4715. goto out_unregister_isr;
  4716. }
  4717. /* check the reset type required */
  4718. pmcraid_reset_type(pinstance);
  4719. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4720. /* Start IOA firmware initialization and bring card to Operational
  4721. * state.
  4722. */
  4723. pmcraid_info("starting IOA initialization sequence\n");
  4724. if (pmcraid_reset_bringup(pinstance)) {
  4725. dev_err(&pdev->dev, "couldn't initialize IOA \n");
  4726. rc = 1;
  4727. goto out_release_bufs;
  4728. }
  4729. /* Add adapter instance into mid-layer list */
  4730. rc = scsi_add_host(pinstance->host, &pdev->dev);
  4731. if (rc != 0) {
  4732. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  4733. goto out_release_bufs;
  4734. }
  4735. scsi_scan_host(pinstance->host);
  4736. rc = pmcraid_setup_chrdev(pinstance);
  4737. if (rc != 0) {
  4738. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  4739. rc);
  4740. goto out_remove_host;
  4741. }
  4742. /* Schedule worker thread to handle CCN and take care of adding and
  4743. * removing devices to OS
  4744. */
  4745. atomic_set(&pinstance->expose_resources, 1);
  4746. schedule_work(&pinstance->worker_q);
  4747. return rc;
  4748. out_remove_host:
  4749. scsi_remove_host(host);
  4750. out_release_bufs:
  4751. pmcraid_release_buffers(pinstance);
  4752. out_unregister_isr:
  4753. pmcraid_kill_tasklets(pinstance);
  4754. pmcraid_unregister_interrupt_handler(pinstance);
  4755. out_scsi_host_put:
  4756. scsi_host_put(host);
  4757. cleanup_nomem:
  4758. iounmap(mapped_pci_addr);
  4759. out_release_regions:
  4760. pci_release_regions(pdev);
  4761. out_disable_device:
  4762. atomic_dec(&pmcraid_adapter_count);
  4763. pci_set_drvdata(pdev, NULL);
  4764. pci_disable_device(pdev);
  4765. return -ENODEV;
  4766. }
  4767. /*
  4768. * PCI driver structure of pcmraid driver
  4769. */
  4770. static struct pci_driver pmcraid_driver = {
  4771. .name = PMCRAID_DRIVER_NAME,
  4772. .id_table = pmcraid_pci_table,
  4773. .probe = pmcraid_probe,
  4774. .remove = pmcraid_remove,
  4775. .suspend = pmcraid_suspend,
  4776. .resume = pmcraid_resume,
  4777. .shutdown = pmcraid_shutdown
  4778. };
  4779. /**
  4780. * pmcraid_init - module load entry point
  4781. */
  4782. static int __init pmcraid_init(void)
  4783. {
  4784. dev_t dev;
  4785. int error;
  4786. pmcraid_info("%s Device Driver version: %s %s\n",
  4787. PMCRAID_DRIVER_NAME,
  4788. PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
  4789. error = alloc_chrdev_region(&dev, 0,
  4790. PMCRAID_MAX_ADAPTERS,
  4791. PMCRAID_DEVFILE);
  4792. if (error) {
  4793. pmcraid_err("failed to get a major number for adapters\n");
  4794. goto out_init;
  4795. }
  4796. pmcraid_major = MAJOR(dev);
  4797. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  4798. if (IS_ERR(pmcraid_class)) {
  4799. error = PTR_ERR(pmcraid_class);
  4800. pmcraid_err("failed to register with with sysfs, error = %x\n",
  4801. error);
  4802. goto out_unreg_chrdev;
  4803. }
  4804. error = pmcraid_netlink_init();
  4805. if (error)
  4806. goto out_unreg_chrdev;
  4807. error = pci_register_driver(&pmcraid_driver);
  4808. if (error == 0)
  4809. goto out_init;
  4810. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  4811. error);
  4812. class_destroy(pmcraid_class);
  4813. pmcraid_netlink_release();
  4814. out_unreg_chrdev:
  4815. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  4816. out_init:
  4817. return error;
  4818. }
  4819. /**
  4820. * pmcraid_exit - module unload entry point
  4821. */
  4822. static void __exit pmcraid_exit(void)
  4823. {
  4824. pmcraid_netlink_release();
  4825. class_destroy(pmcraid_class);
  4826. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  4827. PMCRAID_MAX_ADAPTERS);
  4828. pci_unregister_driver(&pmcraid_driver);
  4829. }
  4830. module_init(pmcraid_init);
  4831. module_exit(pmcraid_exit);