system.h 4.3 KB

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  1. #ifndef __ASM_SYSTEM_H
  2. #define __ASM_SYSTEM_H
  3. #include <linux/kernel.h>
  4. #include <asm/segment.h>
  5. #include <asm/cmpxchg.h>
  6. #ifdef __KERNEL__
  7. #define __STR(x) #x
  8. #define STR(x) __STR(x)
  9. #define __SAVE(reg,offset) "movq %%" #reg ",(14-" #offset ")*8(%%rsp)\n\t"
  10. #define __RESTORE(reg,offset) "movq (14-" #offset ")*8(%%rsp),%%" #reg "\n\t"
  11. /* frame pointer must be last for get_wchan */
  12. #define SAVE_CONTEXT "pushf ; pushq %%rbp ; movq %%rsi,%%rbp\n\t"
  13. #define RESTORE_CONTEXT "movq %%rbp,%%rsi ; popq %%rbp ; popf\t"
  14. #define __EXTRA_CLOBBER \
  15. ,"rcx","rbx","rdx","r8","r9","r10","r11","r12","r13","r14","r15"
  16. /* Save restore flags to clear handle leaking NT */
  17. #define switch_to(prev,next,last) \
  18. asm volatile(SAVE_CONTEXT \
  19. "movq %%rsp,%P[threadrsp](%[prev])\n\t" /* save RSP */ \
  20. "movq %P[threadrsp](%[next]),%%rsp\n\t" /* restore RSP */ \
  21. "call __switch_to\n\t" \
  22. ".globl thread_return\n" \
  23. "thread_return:\n\t" \
  24. "movq %%gs:%P[pda_pcurrent],%%rsi\n\t" \
  25. "movq %P[thread_info](%%rsi),%%r8\n\t" \
  26. LOCK_PREFIX "btr %[tif_fork],%P[ti_flags](%%r8)\n\t" \
  27. "movq %%rax,%%rdi\n\t" \
  28. "jc ret_from_fork\n\t" \
  29. RESTORE_CONTEXT \
  30. : "=a" (last) \
  31. : [next] "S" (next), [prev] "D" (prev), \
  32. [threadrsp] "i" (offsetof(struct task_struct, thread.rsp)), \
  33. [ti_flags] "i" (offsetof(struct thread_info, flags)),\
  34. [tif_fork] "i" (TIF_FORK), \
  35. [thread_info] "i" (offsetof(struct task_struct, stack)), \
  36. [pda_pcurrent] "i" (offsetof(struct x8664_pda, pcurrent)) \
  37. : "memory", "cc" __EXTRA_CLOBBER)
  38. extern void load_gs_index(unsigned);
  39. /*
  40. * Load a segment. Fall back on loading the zero
  41. * segment if something goes wrong..
  42. */
  43. #define loadsegment(seg,value) \
  44. asm volatile("\n" \
  45. "1:\t" \
  46. "movl %k0,%%" #seg "\n" \
  47. "2:\n" \
  48. ".section .fixup,\"ax\"\n" \
  49. "3:\t" \
  50. "movl %1,%%" #seg "\n\t" \
  51. "jmp 2b\n" \
  52. ".previous\n" \
  53. ".section __ex_table,\"a\"\n\t" \
  54. ".align 8\n\t" \
  55. ".quad 1b,3b\n" \
  56. ".previous" \
  57. : :"r" (value), "r" (0))
  58. /*
  59. * Clear and set 'TS' bit respectively
  60. */
  61. #define clts() __asm__ __volatile__ ("clts")
  62. static inline unsigned long read_cr0(void)
  63. {
  64. unsigned long cr0;
  65. asm volatile("movq %%cr0,%0" : "=r" (cr0));
  66. return cr0;
  67. }
  68. static inline void write_cr0(unsigned long val)
  69. {
  70. asm volatile("movq %0,%%cr0" :: "r" (val));
  71. }
  72. static inline unsigned long read_cr3(void)
  73. {
  74. unsigned long cr3;
  75. asm("movq %%cr3,%0" : "=r" (cr3));
  76. return cr3;
  77. }
  78. static inline void write_cr3(unsigned long val)
  79. {
  80. asm volatile("movq %0,%%cr3" :: "r" (val) : "memory");
  81. }
  82. static inline unsigned long read_cr4(void)
  83. {
  84. unsigned long cr4;
  85. asm("movq %%cr4,%0" : "=r" (cr4));
  86. return cr4;
  87. }
  88. static inline void write_cr4(unsigned long val)
  89. {
  90. asm volatile("movq %0,%%cr4" :: "r" (val) : "memory");
  91. }
  92. #define stts() write_cr0(8 | read_cr0())
  93. #define wbinvd() \
  94. __asm__ __volatile__ ("wbinvd": : :"memory");
  95. /*
  96. * On SMP systems, when the scheduler does migration-cost autodetection,
  97. * it needs a way to flush as much of the CPU's caches as possible.
  98. */
  99. static inline void sched_cacheflush(void)
  100. {
  101. wbinvd();
  102. }
  103. #endif /* __KERNEL__ */
  104. #define nop() __asm__ __volatile__ ("nop")
  105. #ifdef CONFIG_SMP
  106. #define smp_mb() mb()
  107. #define smp_rmb() rmb()
  108. #define smp_wmb() wmb()
  109. #define smp_read_barrier_depends() do {} while(0)
  110. #else
  111. #define smp_mb() barrier()
  112. #define smp_rmb() barrier()
  113. #define smp_wmb() barrier()
  114. #define smp_read_barrier_depends() do {} while(0)
  115. #endif
  116. /*
  117. * Force strict CPU ordering.
  118. * And yes, this is required on UP too when we're talking
  119. * to devices.
  120. */
  121. #define mb() asm volatile("mfence":::"memory")
  122. #define rmb() asm volatile("lfence":::"memory")
  123. #ifdef CONFIG_UNORDERED_IO
  124. #define wmb() asm volatile("sfence" ::: "memory")
  125. #else
  126. #define wmb() asm volatile("" ::: "memory")
  127. #endif
  128. #define read_barrier_depends() do {} while(0)
  129. #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
  130. #define warn_if_not_ulong(x) do { unsigned long foo; (void) (&(x) == &foo); } while (0)
  131. #include <linux/irqflags.h>
  132. void cpu_idle_wait(void);
  133. extern unsigned long arch_align_stack(unsigned long sp);
  134. extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
  135. #endif