dma-mapping.h 10 KB

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  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <asm/scatterlist.h>
  15. #include <asm/io.h>
  16. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  17. #ifdef CONFIG_NOT_COHERENT_CACHE
  18. /*
  19. * DMA-consistent mapping functions for PowerPCs that don't support
  20. * cache snooping. These allocate/free a region of uncached mapped
  21. * memory space for use with DMA devices. Alternatively, you could
  22. * allocate the space "normally" and use the cache management functions
  23. * to ensure it is consistent.
  24. */
  25. extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
  26. extern void __dma_free_coherent(size_t size, void *vaddr);
  27. extern void __dma_sync(void *vaddr, size_t size, int direction);
  28. extern void __dma_sync_page(struct page *page, unsigned long offset,
  29. size_t size, int direction);
  30. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  31. /*
  32. * Cache coherent cores.
  33. */
  34. #define __dma_alloc_coherent(gfp, size, handle) NULL
  35. #define __dma_free_coherent(size, addr) ((void)0)
  36. #define __dma_sync(addr, size, rw) ((void)0)
  37. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  38. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  39. #ifdef CONFIG_PPC64
  40. /*
  41. * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
  42. */
  43. struct dma_mapping_ops {
  44. void * (*alloc_coherent)(struct device *dev, size_t size,
  45. dma_addr_t *dma_handle, gfp_t flag);
  46. void (*free_coherent)(struct device *dev, size_t size,
  47. void *vaddr, dma_addr_t dma_handle);
  48. dma_addr_t (*map_single)(struct device *dev, void *ptr,
  49. size_t size, enum dma_data_direction direction);
  50. void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
  51. size_t size, enum dma_data_direction direction);
  52. int (*map_sg)(struct device *dev, struct scatterlist *sg,
  53. int nents, enum dma_data_direction direction);
  54. void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
  55. int nents, enum dma_data_direction direction);
  56. int (*dma_supported)(struct device *dev, u64 mask);
  57. int (*dac_dma_supported)(struct device *dev, u64 mask);
  58. int (*set_dma_mask)(struct device *dev, u64 dma_mask);
  59. };
  60. static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
  61. {
  62. /* We don't handle the NULL dev case for ISA for now. We could
  63. * do it via an out of line call but it is not needed for now. The
  64. * only ISA DMA device we support is the floppy and we have a hack
  65. * in the floppy driver directly to get a device for us.
  66. */
  67. if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
  68. return NULL;
  69. return dev->archdata.dma_ops;
  70. }
  71. static inline int dma_supported(struct device *dev, u64 mask)
  72. {
  73. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  74. if (unlikely(dma_ops == NULL))
  75. return 0;
  76. if (dma_ops->dma_supported == NULL)
  77. return 1;
  78. return dma_ops->dma_supported(dev, mask);
  79. }
  80. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  81. {
  82. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  83. if (unlikely(dma_ops == NULL))
  84. return -EIO;
  85. if (dma_ops->set_dma_mask != NULL)
  86. return dma_ops->set_dma_mask(dev, dma_mask);
  87. if (!dev->dma_mask || !dma_supported(dev, *dev->dma_mask))
  88. return -EIO;
  89. *dev->dma_mask = dma_mask;
  90. return 0;
  91. }
  92. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  93. dma_addr_t *dma_handle, gfp_t flag)
  94. {
  95. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  96. BUG_ON(!dma_ops);
  97. return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
  98. }
  99. static inline void dma_free_coherent(struct device *dev, size_t size,
  100. void *cpu_addr, dma_addr_t dma_handle)
  101. {
  102. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  103. BUG_ON(!dma_ops);
  104. dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
  105. }
  106. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  107. size_t size,
  108. enum dma_data_direction direction)
  109. {
  110. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  111. BUG_ON(!dma_ops);
  112. return dma_ops->map_single(dev, cpu_addr, size, direction);
  113. }
  114. static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
  115. size_t size,
  116. enum dma_data_direction direction)
  117. {
  118. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  119. BUG_ON(!dma_ops);
  120. dma_ops->unmap_single(dev, dma_addr, size, direction);
  121. }
  122. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  123. unsigned long offset, size_t size,
  124. enum dma_data_direction direction)
  125. {
  126. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  127. BUG_ON(!dma_ops);
  128. return dma_ops->map_single(dev, page_address(page) + offset, size,
  129. direction);
  130. }
  131. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  132. size_t size,
  133. enum dma_data_direction direction)
  134. {
  135. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  136. BUG_ON(!dma_ops);
  137. dma_ops->unmap_single(dev, dma_address, size, direction);
  138. }
  139. static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  140. int nents, enum dma_data_direction direction)
  141. {
  142. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  143. BUG_ON(!dma_ops);
  144. return dma_ops->map_sg(dev, sg, nents, direction);
  145. }
  146. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  147. int nhwentries,
  148. enum dma_data_direction direction)
  149. {
  150. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  151. BUG_ON(!dma_ops);
  152. dma_ops->unmap_sg(dev, sg, nhwentries, direction);
  153. }
  154. /*
  155. * Available generic sets of operations
  156. */
  157. extern struct dma_mapping_ops dma_iommu_ops;
  158. extern struct dma_mapping_ops dma_direct_ops;
  159. extern unsigned long dma_direct_offset;
  160. #else /* CONFIG_PPC64 */
  161. #define dma_supported(dev, mask) (1)
  162. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  163. {
  164. if (!dev->dma_mask || !dma_supported(dev, mask))
  165. return -EIO;
  166. *dev->dma_mask = dma_mask;
  167. return 0;
  168. }
  169. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  170. dma_addr_t * dma_handle,
  171. gfp_t gfp)
  172. {
  173. #ifdef CONFIG_NOT_COHERENT_CACHE
  174. return __dma_alloc_coherent(size, dma_handle, gfp);
  175. #else
  176. void *ret;
  177. /* ignore region specifiers */
  178. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  179. if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
  180. gfp |= GFP_DMA;
  181. ret = (void *)__get_free_pages(gfp, get_order(size));
  182. if (ret != NULL) {
  183. memset(ret, 0, size);
  184. *dma_handle = virt_to_bus(ret);
  185. }
  186. return ret;
  187. #endif
  188. }
  189. static inline void
  190. dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  191. dma_addr_t dma_handle)
  192. {
  193. #ifdef CONFIG_NOT_COHERENT_CACHE
  194. __dma_free_coherent(size, vaddr);
  195. #else
  196. free_pages((unsigned long)vaddr, get_order(size));
  197. #endif
  198. }
  199. static inline dma_addr_t
  200. dma_map_single(struct device *dev, void *ptr, size_t size,
  201. enum dma_data_direction direction)
  202. {
  203. BUG_ON(direction == DMA_NONE);
  204. __dma_sync(ptr, size, direction);
  205. return virt_to_bus(ptr);
  206. }
  207. /* We do nothing. */
  208. #define dma_unmap_single(dev, addr, size, dir) ((void)0)
  209. static inline dma_addr_t
  210. dma_map_page(struct device *dev, struct page *page,
  211. unsigned long offset, size_t size,
  212. enum dma_data_direction direction)
  213. {
  214. BUG_ON(direction == DMA_NONE);
  215. __dma_sync_page(page, offset, size, direction);
  216. return page_to_bus(page) + offset;
  217. }
  218. /* We do nothing. */
  219. #define dma_unmap_page(dev, handle, size, dir) ((void)0)
  220. static inline int
  221. dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  222. enum dma_data_direction direction)
  223. {
  224. int i;
  225. BUG_ON(direction == DMA_NONE);
  226. for (i = 0; i < nents; i++, sg++) {
  227. BUG_ON(!sg->page);
  228. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  229. sg->dma_address = page_to_bus(sg->page) + sg->offset;
  230. }
  231. return nents;
  232. }
  233. /* We don't do anything here. */
  234. #define dma_unmap_sg(dev, sg, nents, dir) ((void)0)
  235. #endif /* CONFIG_PPC64 */
  236. static inline void dma_sync_single_for_cpu(struct device *dev,
  237. dma_addr_t dma_handle, size_t size,
  238. enum dma_data_direction direction)
  239. {
  240. BUG_ON(direction == DMA_NONE);
  241. __dma_sync(bus_to_virt(dma_handle), size, direction);
  242. }
  243. static inline void dma_sync_single_for_device(struct device *dev,
  244. dma_addr_t dma_handle, size_t size,
  245. enum dma_data_direction direction)
  246. {
  247. BUG_ON(direction == DMA_NONE);
  248. __dma_sync(bus_to_virt(dma_handle), size, direction);
  249. }
  250. static inline void dma_sync_sg_for_cpu(struct device *dev,
  251. struct scatterlist *sg, int nents,
  252. enum dma_data_direction direction)
  253. {
  254. int i;
  255. BUG_ON(direction == DMA_NONE);
  256. for (i = 0; i < nents; i++, sg++)
  257. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  258. }
  259. static inline void dma_sync_sg_for_device(struct device *dev,
  260. struct scatterlist *sg, int nents,
  261. enum dma_data_direction direction)
  262. {
  263. int i;
  264. BUG_ON(direction == DMA_NONE);
  265. for (i = 0; i < nents; i++, sg++)
  266. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  267. }
  268. static inline int dma_mapping_error(dma_addr_t dma_addr)
  269. {
  270. #ifdef CONFIG_PPC64
  271. return (dma_addr == DMA_ERROR_CODE);
  272. #else
  273. return 0;
  274. #endif
  275. }
  276. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  277. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  278. #ifdef CONFIG_NOT_COHERENT_CACHE
  279. #define dma_is_consistent(d, h) (0)
  280. #else
  281. #define dma_is_consistent(d, h) (1)
  282. #endif
  283. static inline int dma_get_cache_alignment(void)
  284. {
  285. #ifdef CONFIG_PPC64
  286. /* no easy way to get cache size on all processors, so return
  287. * the maximum possible, to be safe */
  288. return (1 << INTERNODE_CACHE_SHIFT);
  289. #else
  290. /*
  291. * Each processor family will define its own L1_CACHE_SHIFT,
  292. * L1_CACHE_BYTES wraps to this, so this is always safe.
  293. */
  294. return L1_CACHE_BYTES;
  295. #endif
  296. }
  297. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  298. dma_addr_t dma_handle, unsigned long offset, size_t size,
  299. enum dma_data_direction direction)
  300. {
  301. /* just sync everything for now */
  302. dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
  303. }
  304. static inline void dma_sync_single_range_for_device(struct device *dev,
  305. dma_addr_t dma_handle, unsigned long offset, size_t size,
  306. enum dma_data_direction direction)
  307. {
  308. /* just sync everything for now */
  309. dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
  310. }
  311. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  312. enum dma_data_direction direction)
  313. {
  314. BUG_ON(direction == DMA_NONE);
  315. __dma_sync(vaddr, size, (int)direction);
  316. }
  317. #endif /* __KERNEL__ */
  318. #endif /* _ASM_DMA_MAPPING_H */