mach_apic.h 4.7 KB

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  1. #ifndef __ASM_MACH_APIC_H
  2. #define __ASM_MACH_APIC_H
  3. extern u8 bios_cpu_apicid[];
  4. #define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
  5. #define esr_disable (1)
  6. static inline int apic_id_registered(void)
  7. {
  8. return (1);
  9. }
  10. static inline cpumask_t target_cpus(void)
  11. {
  12. #if defined CONFIG_ES7000_CLUSTERED_APIC
  13. return CPU_MASK_ALL;
  14. #else
  15. return cpumask_of_cpu(smp_processor_id());
  16. #endif
  17. }
  18. #define TARGET_CPUS (target_cpus())
  19. #if defined CONFIG_ES7000_CLUSTERED_APIC
  20. #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
  21. #define INT_DELIVERY_MODE (dest_LowestPrio)
  22. #define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
  23. #define NO_BALANCE_IRQ (1)
  24. #undef WAKE_SECONDARY_VIA_INIT
  25. #define WAKE_SECONDARY_VIA_MIP
  26. #else
  27. #define APIC_DFR_VALUE (APIC_DFR_FLAT)
  28. #define INT_DELIVERY_MODE (dest_Fixed)
  29. #define INT_DEST_MODE (0) /* phys delivery to target procs */
  30. #define NO_BALANCE_IRQ (0)
  31. #undef APIC_DEST_LOGICAL
  32. #define APIC_DEST_LOGICAL 0x0
  33. #define WAKE_SECONDARY_VIA_INIT
  34. #endif
  35. static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
  36. {
  37. return 0;
  38. }
  39. static inline unsigned long check_apicid_present(int bit)
  40. {
  41. return physid_isset(bit, phys_cpu_present_map);
  42. }
  43. #define apicid_cluster(apicid) (apicid & 0xF0)
  44. static inline unsigned long calculate_ldr(int cpu)
  45. {
  46. unsigned long id;
  47. id = xapic_phys_to_log_apicid(cpu);
  48. return (SET_APIC_LOGICAL_ID(id));
  49. }
  50. /*
  51. * Set up the logical destination ID.
  52. *
  53. * Intel recommends to set DFR, LdR and TPR before enabling
  54. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  55. * document number 292116). So here it goes...
  56. */
  57. static inline void init_apic_ldr(void)
  58. {
  59. unsigned long val;
  60. int cpu = smp_processor_id();
  61. apic_write_around(APIC_DFR, APIC_DFR_VALUE);
  62. val = calculate_ldr(cpu);
  63. apic_write_around(APIC_LDR, val);
  64. }
  65. extern int apic_version [MAX_APICS];
  66. static inline void setup_apic_routing(void)
  67. {
  68. int apic = bios_cpu_apicid[smp_processor_id()];
  69. printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
  70. (apic_version[apic] == 0x14) ?
  71. "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
  72. }
  73. static inline int multi_timer_check(int apic, int irq)
  74. {
  75. return 0;
  76. }
  77. static inline int apicid_to_node(int logical_apicid)
  78. {
  79. return 0;
  80. }
  81. static inline int cpu_present_to_apicid(int mps_cpu)
  82. {
  83. if (!mps_cpu)
  84. return boot_cpu_physical_apicid;
  85. else if (mps_cpu < NR_CPUS)
  86. return (int) bios_cpu_apicid[mps_cpu];
  87. else
  88. return BAD_APICID;
  89. }
  90. static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
  91. {
  92. static int id = 0;
  93. physid_mask_t mask;
  94. mask = physid_mask_of_physid(id);
  95. ++id;
  96. return mask;
  97. }
  98. extern u8 cpu_2_logical_apicid[];
  99. /* Mapping from cpu number to logical apicid */
  100. static inline int cpu_to_logical_apicid(int cpu)
  101. {
  102. #ifdef CONFIG_SMP
  103. if (cpu >= NR_CPUS)
  104. return BAD_APICID;
  105. return (int)cpu_2_logical_apicid[cpu];
  106. #else
  107. return logical_smp_processor_id();
  108. #endif
  109. }
  110. static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused)
  111. {
  112. printk("Processor #%d %ld:%ld APIC version %d\n",
  113. m->mpc_apicid,
  114. (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
  115. (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
  116. m->mpc_apicver);
  117. return (m->mpc_apicid);
  118. }
  119. static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  120. {
  121. /* For clustered we don't have a good way to do this yet - hack */
  122. return physids_promote(0xff);
  123. }
  124. static inline void setup_portio_remap(void)
  125. {
  126. }
  127. extern unsigned int boot_cpu_physical_apicid;
  128. static inline int check_phys_apicid_present(int cpu_physical_apicid)
  129. {
  130. boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
  131. return (1);
  132. }
  133. static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  134. {
  135. int num_bits_set;
  136. int cpus_found = 0;
  137. int cpu;
  138. int apicid;
  139. num_bits_set = cpus_weight(cpumask);
  140. /* Return id to all */
  141. if (num_bits_set == NR_CPUS)
  142. #if defined CONFIG_ES7000_CLUSTERED_APIC
  143. return 0xFF;
  144. #else
  145. return cpu_to_logical_apicid(0);
  146. #endif
  147. /*
  148. * The cpus in the mask must all be on the apic cluster. If are not
  149. * on the same apicid cluster return default value of TARGET_CPUS.
  150. */
  151. cpu = first_cpu(cpumask);
  152. apicid = cpu_to_logical_apicid(cpu);
  153. while (cpus_found < num_bits_set) {
  154. if (cpu_isset(cpu, cpumask)) {
  155. int new_apicid = cpu_to_logical_apicid(cpu);
  156. if (apicid_cluster(apicid) !=
  157. apicid_cluster(new_apicid)){
  158. printk ("%s: Not a valid mask!\n",__FUNCTION__);
  159. #if defined CONFIG_ES7000_CLUSTERED_APIC
  160. return 0xFF;
  161. #else
  162. return cpu_to_logical_apicid(0);
  163. #endif
  164. }
  165. apicid = new_apicid;
  166. cpus_found++;
  167. }
  168. cpu++;
  169. }
  170. return apicid;
  171. }
  172. static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  173. {
  174. return cpuid_apic >> index_msb;
  175. }
  176. #endif /* __ASM_MACH_APIC_H */