bfin_5xx.c 25 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Rev: $Id: bfin_5xx.c,v 1.19 2006/09/24 02:33:53 aubrey Exp $
  10. *
  11. * Modified:
  12. * Copyright 2006 Analog Devices Inc.
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, see the file COPYING, or write
  28. * to the Free Software Foundation, Inc.,
  29. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  30. */
  31. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  32. #define SUPPORT_SYSRQ
  33. #endif
  34. #include <linux/module.h>
  35. #include <linux/ioport.h>
  36. #include <linux/init.h>
  37. #include <linux/console.h>
  38. #include <linux/sysrq.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/gpio.h>
  44. #include <asm/mach/bfin_serial_5xx.h>
  45. #ifdef CONFIG_SERIAL_BFIN_DMA
  46. #include <linux/dma-mapping.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/cacheflush.h>
  50. #endif
  51. /* UART name and device definitions */
  52. #define BFIN_SERIAL_NAME "ttyBF"
  53. #define BFIN_SERIAL_MAJOR 204
  54. #define BFIN_SERIAL_MINOR 64
  55. /*
  56. * Setup for console. Argument comes from the menuconfig
  57. */
  58. #define DMA_RX_XCOUNT 512
  59. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  60. #define DMA_RX_FLUSH_JIFFIES 5
  61. #ifdef CONFIG_SERIAL_BFIN_DMA
  62. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  63. #else
  64. static void bfin_serial_do_work(struct work_struct *work);
  65. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  66. static void local_put_char(struct bfin_serial_port *uart, char ch);
  67. #endif
  68. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  69. /*
  70. * interrupts are disabled on entry
  71. */
  72. static void bfin_serial_stop_tx(struct uart_port *port)
  73. {
  74. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  75. #ifdef CONFIG_SERIAL_BFIN_DMA
  76. disable_dma(uart->tx_dma_channel);
  77. #else
  78. unsigned short ier;
  79. ier = UART_GET_IER(uart);
  80. ier &= ~ETBEI;
  81. UART_PUT_IER(uart, ier);
  82. #endif
  83. }
  84. /*
  85. * port is locked and interrupts are disabled
  86. */
  87. static void bfin_serial_start_tx(struct uart_port *port)
  88. {
  89. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  90. #ifdef CONFIG_SERIAL_BFIN_DMA
  91. bfin_serial_dma_tx_chars(uart);
  92. #else
  93. unsigned short ier;
  94. ier = UART_GET_IER(uart);
  95. ier |= ETBEI;
  96. UART_PUT_IER(uart, ier);
  97. bfin_serial_tx_chars(uart);
  98. #endif
  99. }
  100. /*
  101. * Interrupts are enabled
  102. */
  103. static void bfin_serial_stop_rx(struct uart_port *port)
  104. {
  105. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  106. unsigned short ier;
  107. ier = UART_GET_IER(uart);
  108. ier &= ~ERBFI;
  109. UART_PUT_IER(uart, ier);
  110. }
  111. /*
  112. * Set the modem control timer to fire immediately.
  113. */
  114. static void bfin_serial_enable_ms(struct uart_port *port)
  115. {
  116. }
  117. #ifdef CONFIG_SERIAL_BFIN_PIO
  118. static void local_put_char(struct bfin_serial_port *uart, char ch)
  119. {
  120. unsigned short status;
  121. int flags = 0;
  122. spin_lock_irqsave(&uart->port.lock, flags);
  123. do {
  124. status = UART_GET_LSR(uart);
  125. } while (!(status & THRE));
  126. UART_PUT_CHAR(uart, ch);
  127. SSYNC();
  128. spin_unlock_irqrestore(&uart->port.lock, flags);
  129. }
  130. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  131. {
  132. struct tty_struct *tty = uart->port.info?uart->port.info->tty:0;
  133. unsigned int status, ch, flg;
  134. #ifdef BF533_FAMILY
  135. static int in_break = 0;
  136. #endif
  137. status = UART_GET_LSR(uart);
  138. ch = UART_GET_CHAR(uart);
  139. uart->port.icount.rx++;
  140. #ifdef BF533_FAMILY
  141. /* The BF533 family of processors have a nice misbehavior where
  142. * they continuously generate characters for a "single" break.
  143. * We have to basically ignore this flood until the "next" valid
  144. * character comes across. All other Blackfin families operate
  145. * properly though.
  146. */
  147. if (in_break) {
  148. if (ch != 0) {
  149. in_break = 0;
  150. ch = UART_GET_CHAR(uart);
  151. }
  152. return;
  153. }
  154. #endif
  155. if (status & BI) {
  156. #ifdef BF533_FAMILY
  157. in_break = 1;
  158. #endif
  159. uart->port.icount.brk++;
  160. if (uart_handle_break(&uart->port))
  161. goto ignore_char;
  162. flg = TTY_BREAK;
  163. } else if (status & PE) {
  164. flg = TTY_PARITY;
  165. uart->port.icount.parity++;
  166. } else if (status & OE) {
  167. flg = TTY_OVERRUN;
  168. uart->port.icount.overrun++;
  169. } else if (status & FE) {
  170. flg = TTY_FRAME;
  171. uart->port.icount.frame++;
  172. } else
  173. flg = TTY_NORMAL;
  174. if (uart_handle_sysrq_char(&uart->port, ch))
  175. goto ignore_char;
  176. if (tty)
  177. uart_insert_char(&uart->port, status, 2, ch, flg);
  178. ignore_char:
  179. if (tty)
  180. tty_flip_buffer_push(tty);
  181. }
  182. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  183. {
  184. struct circ_buf *xmit = &uart->port.info->xmit;
  185. if (uart->port.x_char) {
  186. UART_PUT_CHAR(uart, uart->port.x_char);
  187. uart->port.icount.tx++;
  188. uart->port.x_char = 0;
  189. return;
  190. }
  191. /*
  192. * Check the modem control lines before
  193. * transmitting anything.
  194. */
  195. bfin_serial_mctrl_check(uart);
  196. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  197. bfin_serial_stop_tx(&uart->port);
  198. return;
  199. }
  200. local_put_char(uart, xmit->buf[xmit->tail]);
  201. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  202. uart->port.icount.tx++;
  203. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  204. uart_write_wakeup(&uart->port);
  205. if (uart_circ_empty(xmit))
  206. bfin_serial_stop_tx(&uart->port);
  207. }
  208. static irqreturn_t bfin_serial_int(int irq, void *dev_id)
  209. {
  210. struct bfin_serial_port *uart = dev_id;
  211. unsigned short status;
  212. spin_lock(&uart->port.lock);
  213. status = UART_GET_IIR(uart);
  214. do {
  215. if ((status & IIR_STATUS) == IIR_TX_READY)
  216. bfin_serial_tx_chars(uart);
  217. if ((status & IIR_STATUS) == IIR_RX_READY)
  218. bfin_serial_rx_chars(uart);
  219. status = UART_GET_IIR(uart);
  220. } while (status & (IIR_TX_READY | IIR_RX_READY));
  221. spin_unlock(&uart->port.lock);
  222. return IRQ_HANDLED;
  223. }
  224. static void bfin_serial_do_work(struct work_struct *work)
  225. {
  226. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  227. bfin_serial_mctrl_check(uart);
  228. }
  229. #endif
  230. #ifdef CONFIG_SERIAL_BFIN_DMA
  231. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  232. {
  233. struct circ_buf *xmit = &uart->port.info->xmit;
  234. unsigned short ier;
  235. int flags = 0;
  236. if (!uart->tx_done)
  237. return;
  238. uart->tx_done = 0;
  239. if (uart->port.x_char) {
  240. UART_PUT_CHAR(uart, uart->port.x_char);
  241. uart->port.icount.tx++;
  242. uart->port.x_char = 0;
  243. uart->tx_done = 1;
  244. return;
  245. }
  246. /*
  247. * Check the modem control lines before
  248. * transmitting anything.
  249. */
  250. bfin_serial_mctrl_check(uart);
  251. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  252. bfin_serial_stop_tx(&uart->port);
  253. uart->tx_done = 1;
  254. return;
  255. }
  256. spin_lock_irqsave(&uart->port.lock, flags);
  257. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  258. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  259. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  260. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  261. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  262. set_dma_config(uart->tx_dma_channel,
  263. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  264. INTR_ON_BUF,
  265. DIMENSION_LINEAR,
  266. DATA_SIZE_8));
  267. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  268. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  269. set_dma_x_modify(uart->tx_dma_channel, 1);
  270. enable_dma(uart->tx_dma_channel);
  271. ier = UART_GET_IER(uart);
  272. ier |= ETBEI;
  273. UART_PUT_IER(uart, ier);
  274. spin_unlock_irqrestore(&uart->port.lock, flags);
  275. }
  276. static void bfin_serial_dma_rx_chars(struct bfin_serial_port * uart)
  277. {
  278. struct tty_struct *tty = uart->port.info->tty;
  279. int i, flg, status;
  280. status = UART_GET_LSR(uart);
  281. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  282. if (status & BI) {
  283. uart->port.icount.brk++;
  284. if (uart_handle_break(&uart->port))
  285. goto dma_ignore_char;
  286. flg = TTY_BREAK;
  287. } else if (status & PE) {
  288. flg = TTY_PARITY;
  289. uart->port.icount.parity++;
  290. } else if (status & OE) {
  291. flg = TTY_OVERRUN;
  292. uart->port.icount.overrun++;
  293. } else if (status & FE) {
  294. flg = TTY_FRAME;
  295. uart->port.icount.frame++;
  296. } else
  297. flg = TTY_NORMAL;
  298. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  299. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  300. goto dma_ignore_char;
  301. uart_insert_char(&uart->port, status, 2, uart->rx_dma_buf.buf[i], flg);
  302. }
  303. dma_ignore_char:
  304. tty_flip_buffer_push(tty);
  305. }
  306. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  307. {
  308. int x_pos, pos;
  309. int flags = 0;
  310. bfin_serial_dma_tx_chars(uart);
  311. spin_lock_irqsave(&uart->port.lock, flags);
  312. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  313. if (x_pos == DMA_RX_XCOUNT)
  314. x_pos = 0;
  315. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  316. if (pos>uart->rx_dma_buf.tail) {
  317. uart->rx_dma_buf.tail = pos;
  318. bfin_serial_dma_rx_chars(uart);
  319. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  320. }
  321. spin_unlock_irqrestore(&uart->port.lock, flags);
  322. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  323. add_timer(&(uart->rx_dma_timer));
  324. }
  325. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  326. {
  327. struct bfin_serial_port *uart = dev_id;
  328. struct circ_buf *xmit = &uart->port.info->xmit;
  329. unsigned short ier;
  330. spin_lock(&uart->port.lock);
  331. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  332. clear_dma_irqstat(uart->tx_dma_channel);
  333. disable_dma(uart->tx_dma_channel);
  334. ier = UART_GET_IER(uart);
  335. ier &= ~ETBEI;
  336. UART_PUT_IER(uart, ier);
  337. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  338. uart->port.icount.tx+=uart->tx_count;
  339. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  340. uart_write_wakeup(&uart->port);
  341. if (uart_circ_empty(xmit))
  342. bfin_serial_stop_tx(&uart->port);
  343. uart->tx_done = 1;
  344. }
  345. spin_unlock(&uart->port.lock);
  346. return IRQ_HANDLED;
  347. }
  348. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  349. {
  350. struct bfin_serial_port *uart = dev_id;
  351. unsigned short irqstat;
  352. uart->rx_dma_nrows++;
  353. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  354. uart->rx_dma_nrows = 0;
  355. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  356. bfin_serial_dma_rx_chars(uart);
  357. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  358. }
  359. spin_lock(&uart->port.lock);
  360. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  361. clear_dma_irqstat(uart->rx_dma_channel);
  362. spin_unlock(&uart->port.lock);
  363. return IRQ_HANDLED;
  364. }
  365. #endif
  366. /*
  367. * Return TIOCSER_TEMT when transmitter is not busy.
  368. */
  369. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  370. {
  371. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  372. unsigned short lsr;
  373. lsr = UART_GET_LSR(uart);
  374. if (lsr & TEMT)
  375. return TIOCSER_TEMT;
  376. else
  377. return 0;
  378. }
  379. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  380. {
  381. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  382. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  383. if (uart->cts_pin < 0)
  384. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  385. if (gpio_get_value(uart->cts_pin))
  386. return TIOCM_DSR | TIOCM_CAR;
  387. else
  388. #endif
  389. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  390. }
  391. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  392. {
  393. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  394. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  395. if (uart->rts_pin < 0)
  396. return;
  397. if (mctrl & TIOCM_RTS)
  398. gpio_set_value(uart->rts_pin, 0);
  399. else
  400. gpio_set_value(uart->rts_pin, 1);
  401. #endif
  402. }
  403. /*
  404. * Handle any change of modem status signal since we were last called.
  405. */
  406. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  407. {
  408. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  409. unsigned int status;
  410. # ifdef CONFIG_SERIAL_BFIN_DMA
  411. struct uart_info *info = uart->port.info;
  412. struct tty_struct *tty = info->tty;
  413. status = bfin_serial_get_mctrl(&uart->port);
  414. if (!(status & TIOCM_CTS)) {
  415. tty->hw_stopped = 1;
  416. } else {
  417. tty->hw_stopped = 0;
  418. }
  419. # else
  420. status = bfin_serial_get_mctrl(&uart->port);
  421. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  422. if (!(status & TIOCM_CTS))
  423. schedule_work(&uart->cts_workqueue);
  424. # endif
  425. #endif
  426. }
  427. /*
  428. * Interrupts are always disabled.
  429. */
  430. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  431. {
  432. }
  433. static int bfin_serial_startup(struct uart_port *port)
  434. {
  435. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  436. #ifdef CONFIG_SERIAL_BFIN_DMA
  437. dma_addr_t dma_handle;
  438. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  439. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  440. return -EBUSY;
  441. }
  442. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  443. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  444. free_dma(uart->rx_dma_channel);
  445. return -EBUSY;
  446. }
  447. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  448. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  449. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  450. uart->rx_dma_buf.head = 0;
  451. uart->rx_dma_buf.tail = 0;
  452. uart->rx_dma_nrows = 0;
  453. set_dma_config(uart->rx_dma_channel,
  454. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  455. INTR_ON_ROW, DIMENSION_2D,
  456. DATA_SIZE_8));
  457. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  458. set_dma_x_modify(uart->rx_dma_channel, 1);
  459. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  460. set_dma_y_modify(uart->rx_dma_channel, 1);
  461. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  462. enable_dma(uart->rx_dma_channel);
  463. uart->rx_dma_timer.data = (unsigned long)(uart);
  464. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  465. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  466. add_timer(&(uart->rx_dma_timer));
  467. #else
  468. if (request_irq
  469. (uart->port.irq, bfin_serial_int, IRQF_DISABLED,
  470. "BFIN_UART_RX", uart)) {
  471. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  472. return -EBUSY;
  473. }
  474. if (request_irq
  475. (uart->port.irq+1, bfin_serial_int, IRQF_DISABLED,
  476. "BFIN_UART_TX", uart)) {
  477. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  478. free_irq(uart->port.irq, uart);
  479. return -EBUSY;
  480. }
  481. #endif
  482. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  483. return 0;
  484. }
  485. static void bfin_serial_shutdown(struct uart_port *port)
  486. {
  487. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  488. #ifdef CONFIG_SERIAL_BFIN_DMA
  489. disable_dma(uart->tx_dma_channel);
  490. free_dma(uart->tx_dma_channel);
  491. disable_dma(uart->rx_dma_channel);
  492. free_dma(uart->rx_dma_channel);
  493. del_timer(&(uart->rx_dma_timer));
  494. #else
  495. free_irq(uart->port.irq, uart);
  496. free_irq(uart->port.irq+1, uart);
  497. #endif
  498. }
  499. static void
  500. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  501. struct ktermios *old)
  502. {
  503. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  504. unsigned long flags;
  505. unsigned int baud, quot;
  506. unsigned short val, ier, lsr, lcr = 0;
  507. switch (termios->c_cflag & CSIZE) {
  508. case CS8:
  509. lcr = WLS(8);
  510. break;
  511. case CS7:
  512. lcr = WLS(7);
  513. break;
  514. case CS6:
  515. lcr = WLS(6);
  516. break;
  517. case CS5:
  518. lcr = WLS(5);
  519. break;
  520. default:
  521. printk(KERN_ERR "%s: word lengh not supported\n",
  522. __FUNCTION__);
  523. }
  524. if (termios->c_cflag & CSTOPB)
  525. lcr |= STB;
  526. if (termios->c_cflag & PARENB) {
  527. lcr |= PEN;
  528. if (!(termios->c_cflag & PARODD))
  529. lcr |= EPS;
  530. }
  531. /* These controls are not implemented for this port */
  532. termios->c_iflag |= INPCK | BRKINT | PARMRK;
  533. termios->c_iflag &= ~(IGNPAR | IGNBRK);
  534. /* These controls are not implemented for this port */
  535. termios->c_iflag |= INPCK | BRKINT | PARMRK;
  536. termios->c_iflag &= ~(IGNPAR | IGNBRK);
  537. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  538. quot = uart_get_divisor(port, baud);
  539. spin_lock_irqsave(&uart->port.lock, flags);
  540. do {
  541. lsr = UART_GET_LSR(uart);
  542. } while (!(lsr & TEMT));
  543. /* Disable UART */
  544. ier = UART_GET_IER(uart);
  545. UART_PUT_IER(uart, 0);
  546. /* Set DLAB in LCR to Access DLL and DLH */
  547. val = UART_GET_LCR(uart);
  548. val |= DLAB;
  549. UART_PUT_LCR(uart, val);
  550. SSYNC();
  551. UART_PUT_DLL(uart, quot & 0xFF);
  552. SSYNC();
  553. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  554. SSYNC();
  555. /* Clear DLAB in LCR to Access THR RBR IER */
  556. val = UART_GET_LCR(uart);
  557. val &= ~DLAB;
  558. UART_PUT_LCR(uart, val);
  559. SSYNC();
  560. UART_PUT_LCR(uart, lcr);
  561. /* Enable UART */
  562. UART_PUT_IER(uart, ier);
  563. val = UART_GET_GCTL(uart);
  564. val |= UCEN;
  565. UART_PUT_GCTL(uart, val);
  566. spin_unlock_irqrestore(&uart->port.lock, flags);
  567. }
  568. static const char *bfin_serial_type(struct uart_port *port)
  569. {
  570. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  571. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  572. }
  573. /*
  574. * Release the memory region(s) being used by 'port'.
  575. */
  576. static void bfin_serial_release_port(struct uart_port *port)
  577. {
  578. }
  579. /*
  580. * Request the memory region(s) being used by 'port'.
  581. */
  582. static int bfin_serial_request_port(struct uart_port *port)
  583. {
  584. return 0;
  585. }
  586. /*
  587. * Configure/autoconfigure the port.
  588. */
  589. static void bfin_serial_config_port(struct uart_port *port, int flags)
  590. {
  591. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  592. if (flags & UART_CONFIG_TYPE &&
  593. bfin_serial_request_port(&uart->port) == 0)
  594. uart->port.type = PORT_BFIN;
  595. }
  596. /*
  597. * Verify the new serial_struct (for TIOCSSERIAL).
  598. * The only change we allow are to the flags and type, and
  599. * even then only between PORT_BFIN and PORT_UNKNOWN
  600. */
  601. static int
  602. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  603. {
  604. return 0;
  605. }
  606. static struct uart_ops bfin_serial_pops = {
  607. .tx_empty = bfin_serial_tx_empty,
  608. .set_mctrl = bfin_serial_set_mctrl,
  609. .get_mctrl = bfin_serial_get_mctrl,
  610. .stop_tx = bfin_serial_stop_tx,
  611. .start_tx = bfin_serial_start_tx,
  612. .stop_rx = bfin_serial_stop_rx,
  613. .enable_ms = bfin_serial_enable_ms,
  614. .break_ctl = bfin_serial_break_ctl,
  615. .startup = bfin_serial_startup,
  616. .shutdown = bfin_serial_shutdown,
  617. .set_termios = bfin_serial_set_termios,
  618. .type = bfin_serial_type,
  619. .release_port = bfin_serial_release_port,
  620. .request_port = bfin_serial_request_port,
  621. .config_port = bfin_serial_config_port,
  622. .verify_port = bfin_serial_verify_port,
  623. };
  624. static void __init bfin_serial_init_ports(void)
  625. {
  626. static int first = 1;
  627. int i;
  628. if (!first)
  629. return;
  630. first = 0;
  631. for (i = 0; i < nr_ports; i++) {
  632. bfin_serial_ports[i].port.uartclk = get_sclk();
  633. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  634. bfin_serial_ports[i].port.line = i;
  635. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  636. bfin_serial_ports[i].port.membase =
  637. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  638. bfin_serial_ports[i].port.mapbase =
  639. bfin_serial_resource[i].uart_base_addr;
  640. bfin_serial_ports[i].port.irq =
  641. bfin_serial_resource[i].uart_irq;
  642. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  643. #ifdef CONFIG_SERIAL_BFIN_DMA
  644. bfin_serial_ports[i].tx_done = 1;
  645. bfin_serial_ports[i].tx_count = 0;
  646. bfin_serial_ports[i].tx_dma_channel =
  647. bfin_serial_resource[i].uart_tx_dma_channel;
  648. bfin_serial_ports[i].rx_dma_channel =
  649. bfin_serial_resource[i].uart_rx_dma_channel;
  650. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  651. #else
  652. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  653. #endif
  654. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  655. bfin_serial_ports[i].cts_pin =
  656. bfin_serial_resource[i].uart_cts_pin;
  657. bfin_serial_ports[i].rts_pin =
  658. bfin_serial_resource[i].uart_rts_pin;
  659. #endif
  660. bfin_serial_hw_init(&bfin_serial_ports[i]);
  661. }
  662. }
  663. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  664. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  665. {
  666. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  667. while (!(UART_GET_LSR(uart)))
  668. barrier();
  669. UART_PUT_CHAR(uart, ch);
  670. SSYNC();
  671. }
  672. /*
  673. * Interrupts are disabled on entering
  674. */
  675. static void
  676. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  677. {
  678. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  679. int flags = 0;
  680. spin_lock_irqsave(&uart->port.lock, flags);
  681. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  682. spin_unlock_irqrestore(&uart->port.lock, flags);
  683. }
  684. /*
  685. * If the port was already initialised (eg, by a boot loader),
  686. * try to determine the current setup.
  687. */
  688. static void __init
  689. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  690. int *parity, int *bits)
  691. {
  692. unsigned short status;
  693. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  694. if (status == (ERBFI | ETBEI)) {
  695. /* ok, the port was enabled */
  696. unsigned short lcr, val;
  697. unsigned short dlh, dll;
  698. lcr = UART_GET_LCR(uart);
  699. *parity = 'n';
  700. if (lcr & PEN) {
  701. if (lcr & EPS)
  702. *parity = 'e';
  703. else
  704. *parity = 'o';
  705. }
  706. switch (lcr & 0x03) {
  707. case 0: *bits = 5; break;
  708. case 1: *bits = 6; break;
  709. case 2: *bits = 7; break;
  710. case 3: *bits = 8; break;
  711. }
  712. /* Set DLAB in LCR to Access DLL and DLH */
  713. val = UART_GET_LCR(uart);
  714. val |= DLAB;
  715. UART_PUT_LCR(uart, val);
  716. dll = UART_GET_DLL(uart);
  717. dlh = UART_GET_DLH(uart);
  718. /* Clear DLAB in LCR to Access THR RBR IER */
  719. val = UART_GET_LCR(uart);
  720. val &= ~DLAB;
  721. UART_PUT_LCR(uart, val);
  722. *baud = get_sclk() / (16*(dll | dlh << 8));
  723. }
  724. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  725. }
  726. static int __init
  727. bfin_serial_console_setup(struct console *co, char *options)
  728. {
  729. struct bfin_serial_port *uart;
  730. int baud = 57600;
  731. int bits = 8;
  732. int parity = 'n';
  733. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  734. int flow = 'r';
  735. #else
  736. int flow = 'n';
  737. #endif
  738. /*
  739. * Check whether an invalid uart number has been specified, and
  740. * if so, search for the first available port that does have
  741. * console support.
  742. */
  743. if (co->index == -1 || co->index >= nr_ports)
  744. co->index = 0;
  745. uart = &bfin_serial_ports[co->index];
  746. if (options)
  747. uart_parse_options(options, &baud, &parity, &bits, &flow);
  748. else
  749. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  750. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  751. }
  752. static struct uart_driver bfin_serial_reg;
  753. static struct console bfin_serial_console = {
  754. .name = BFIN_SERIAL_NAME,
  755. .write = bfin_serial_console_write,
  756. .device = uart_console_device,
  757. .setup = bfin_serial_console_setup,
  758. .flags = CON_PRINTBUFFER,
  759. .index = -1,
  760. .data = &bfin_serial_reg,
  761. };
  762. static int __init bfin_serial_rs_console_init(void)
  763. {
  764. bfin_serial_init_ports();
  765. register_console(&bfin_serial_console);
  766. return 0;
  767. }
  768. console_initcall(bfin_serial_rs_console_init);
  769. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  770. #else
  771. #define BFIN_SERIAL_CONSOLE NULL
  772. #endif
  773. static struct uart_driver bfin_serial_reg = {
  774. .owner = THIS_MODULE,
  775. .driver_name = "bfin-uart",
  776. .dev_name = BFIN_SERIAL_NAME,
  777. .major = BFIN_SERIAL_MAJOR,
  778. .minor = BFIN_SERIAL_MINOR,
  779. .nr = NR_PORTS,
  780. .cons = BFIN_SERIAL_CONSOLE,
  781. };
  782. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  783. {
  784. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  785. if (uart)
  786. uart_suspend_port(&bfin_serial_reg, &uart->port);
  787. return 0;
  788. }
  789. static int bfin_serial_resume(struct platform_device *dev)
  790. {
  791. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  792. if (uart)
  793. uart_resume_port(&bfin_serial_reg, &uart->port);
  794. return 0;
  795. }
  796. static int bfin_serial_probe(struct platform_device *dev)
  797. {
  798. struct resource *res = dev->resource;
  799. int i;
  800. for (i = 0; i < dev->num_resources; i++, res++)
  801. if (res->flags & IORESOURCE_MEM)
  802. break;
  803. if (i < dev->num_resources) {
  804. for (i = 0; i < nr_ports; i++, res++) {
  805. if (bfin_serial_ports[i].port.mapbase != res->start)
  806. continue;
  807. bfin_serial_ports[i].port.dev = &dev->dev;
  808. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  809. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  810. }
  811. }
  812. return 0;
  813. }
  814. static int bfin_serial_remove(struct platform_device *pdev)
  815. {
  816. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  817. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  818. gpio_free(uart->cts_pin);
  819. gpio_free(uart->rts_pin);
  820. #endif
  821. platform_set_drvdata(pdev, NULL);
  822. if (uart)
  823. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  824. return 0;
  825. }
  826. static struct platform_driver bfin_serial_driver = {
  827. .probe = bfin_serial_probe,
  828. .remove = bfin_serial_remove,
  829. .suspend = bfin_serial_suspend,
  830. .resume = bfin_serial_resume,
  831. .driver = {
  832. .name = "bfin-uart",
  833. },
  834. };
  835. static int __init bfin_serial_init(void)
  836. {
  837. int ret;
  838. pr_info("Serial: Blackfin serial driver\n");
  839. bfin_serial_init_ports();
  840. ret = uart_register_driver(&bfin_serial_reg);
  841. if (ret == 0) {
  842. ret = platform_driver_register(&bfin_serial_driver);
  843. if (ret) {
  844. pr_debug("uart register failed\n");
  845. uart_unregister_driver(&bfin_serial_reg);
  846. }
  847. }
  848. return ret;
  849. }
  850. static void __exit bfin_serial_exit(void)
  851. {
  852. platform_driver_unregister(&bfin_serial_driver);
  853. uart_unregister_driver(&bfin_serial_reg);
  854. }
  855. module_init(bfin_serial_init);
  856. module_exit(bfin_serial_exit);
  857. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  858. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  859. MODULE_LICENSE("GPL");
  860. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);