ql4_dbg.c 7.2 KB

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  1. /*
  2. * QLogic iSCSI HBA Driver
  3. * Copyright (c) 2003-2006 QLogic Corporation
  4. *
  5. * See LICENSE.qla4xxx for copyright and licensing details.
  6. */
  7. #include "ql4_def.h"
  8. #include <scsi/scsi_dbg.h>
  9. #if 0
  10. static void qla4xxx_print_srb_info(struct srb * srb)
  11. {
  12. printk("%s: srb = 0x%p, flags=0x%02x\n", __func__, srb, srb->flags);
  13. printk("%s: cmd = 0x%p, saved_dma_handle = 0x%lx\n",
  14. __func__, srb->cmd, (unsigned long) srb->dma_handle);
  15. printk("%s: fw_ddb_index = %d, lun = %d\n",
  16. __func__, srb->fw_ddb_index, srb->cmd->device->lun);
  17. printk("%s: iocb_tov = %d\n",
  18. __func__, srb->iocb_tov);
  19. printk("%s: cc_stat = 0x%x, r_start = 0x%lx, u_start = 0x%lx\n\n",
  20. __func__, srb->cc_stat, srb->r_start, srb->u_start);
  21. }
  22. void qla4xxx_print_scsi_cmd(struct scsi_cmnd *cmd)
  23. {
  24. printk("SCSI Command = 0x%p, Handle=0x%p\n", cmd, cmd->host_scribble);
  25. printk(" b=%d, t=%02xh, l=%02xh, cmd_len = %02xh\n",
  26. cmd->device->channel, cmd->device->id, cmd->device->lun,
  27. cmd->cmd_len);
  28. scsi_print_command(cmd);
  29. printk(" seg_cnt = %d\n", cmd->use_sg);
  30. printk(" request buffer = 0x%p, request buffer len = 0x%x\n",
  31. cmd->request_buffer, cmd->request_bufflen);
  32. if (cmd->use_sg) {
  33. struct scatterlist *sg;
  34. sg = (struct scatterlist *)cmd->request_buffer;
  35. printk(" SG buffer: \n");
  36. qla4xxx_dump_buffer((caddr_t) sg,
  37. (cmd->use_sg * sizeof(*sg)));
  38. }
  39. printk(" tag = %d, transfersize = 0x%x \n", cmd->tag,
  40. cmd->transfersize);
  41. printk(" Pid = %d, SP = 0x%p\n", (int)cmd->pid, cmd->SCp.ptr);
  42. printk(" underflow size = 0x%x, direction=0x%x\n", cmd->underflow,
  43. cmd->sc_data_direction);
  44. printk(" Current time (jiffies) = 0x%lx, "
  45. "timeout expires = 0x%lx\n", jiffies, cmd->eh_timeout.expires);
  46. qla4xxx_print_srb_info((struct srb *) cmd->SCp.ptr);
  47. }
  48. void __dump_registers(struct scsi_qla_host *ha)
  49. {
  50. uint8_t i;
  51. for (i = 0; i < MBOX_REG_COUNT; i++) {
  52. printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n",
  53. (uint8_t) offsetof(struct isp_reg, mailbox[i]), i,
  54. readw(&ha->reg->mailbox[i]));
  55. }
  56. printk(KERN_INFO "0x%02X flash_address = 0x%08X\n",
  57. (uint8_t) offsetof(struct isp_reg, flash_address),
  58. readw(&ha->reg->flash_address));
  59. printk(KERN_INFO "0x%02X flash_data = 0x%08X\n",
  60. (uint8_t) offsetof(struct isp_reg, flash_data),
  61. readw(&ha->reg->flash_data));
  62. printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n",
  63. (uint8_t) offsetof(struct isp_reg, ctrl_status),
  64. readw(&ha->reg->ctrl_status));
  65. if (is_qla4010(ha)) {
  66. printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
  67. (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram),
  68. readw(&ha->reg->u1.isp4010.nvram));
  69. }
  70. else if (is_qla4022(ha) | is_qla4032(ha)) {
  71. printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n",
  72. (uint8_t) offsetof(struct isp_reg,
  73. u1.isp4022.intr_mask),
  74. readw(&ha->reg->u1.isp4022.intr_mask));
  75. printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
  76. (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),
  77. readw(&ha->reg->u1.isp4022.nvram));
  78. printk(KERN_INFO "0x%02X semaphore = 0x%08X\n",
  79. (uint8_t) offsetof(struct isp_reg,
  80. u1.isp4022.semaphore),
  81. readw(&ha->reg->u1.isp4022.semaphore));
  82. }
  83. printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n",
  84. (uint8_t) offsetof(struct isp_reg, req_q_in),
  85. readw(&ha->reg->req_q_in));
  86. printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n",
  87. (uint8_t) offsetof(struct isp_reg, rsp_q_out),
  88. readw(&ha->reg->rsp_q_out));
  89. if (is_qla4010(ha)) {
  90. printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
  91. (uint8_t) offsetof(struct isp_reg,
  92. u2.isp4010.ext_hw_conf),
  93. readw(&ha->reg->u2.isp4010.ext_hw_conf));
  94. printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
  95. (uint8_t) offsetof(struct isp_reg,
  96. u2.isp4010.port_ctrl),
  97. readw(&ha->reg->u2.isp4010.port_ctrl));
  98. printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
  99. (uint8_t) offsetof(struct isp_reg,
  100. u2.isp4010.port_status),
  101. readw(&ha->reg->u2.isp4010.port_status));
  102. printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
  103. (uint8_t) offsetof(struct isp_reg,
  104. u2.isp4010.req_q_out),
  105. readw(&ha->reg->u2.isp4010.req_q_out));
  106. printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
  107. (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out),
  108. readw(&ha->reg->u2.isp4010.gp_out));
  109. printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
  110. (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in),
  111. readw(&ha->reg->u2.isp4010.gp_in));
  112. printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
  113. (uint8_t) offsetof(struct isp_reg,
  114. u2.isp4010.port_err_status),
  115. readw(&ha->reg->u2.isp4010.port_err_status));
  116. }
  117. else if (is_qla4022(ha) | is_qla4032(ha)) {
  118. printk(KERN_INFO "Page 0 Registers:\n");
  119. printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
  120. (uint8_t) offsetof(struct isp_reg,
  121. u2.isp4022.p0.ext_hw_conf),
  122. readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));
  123. printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
  124. (uint8_t) offsetof(struct isp_reg,
  125. u2.isp4022.p0.port_ctrl),
  126. readw(&ha->reg->u2.isp4022.p0.port_ctrl));
  127. printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
  128. (uint8_t) offsetof(struct isp_reg,
  129. u2.isp4022.p0.port_status),
  130. readw(&ha->reg->u2.isp4022.p0.port_status));
  131. printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
  132. (uint8_t) offsetof(struct isp_reg,
  133. u2.isp4022.p0.gp_out),
  134. readw(&ha->reg->u2.isp4022.p0.gp_out));
  135. printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
  136. (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),
  137. readw(&ha->reg->u2.isp4022.p0.gp_in));
  138. printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
  139. (uint8_t) offsetof(struct isp_reg,
  140. u2.isp4022.p0.port_err_status),
  141. readw(&ha->reg->u2.isp4022.p0.port_err_status));
  142. printk(KERN_INFO "Page 1 Registers:\n");
  143. writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
  144. &ha->reg->ctrl_status);
  145. printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
  146. (uint8_t) offsetof(struct isp_reg,
  147. u2.isp4022.p1.req_q_out),
  148. readw(&ha->reg->u2.isp4022.p1.req_q_out));
  149. writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
  150. &ha->reg->ctrl_status);
  151. }
  152. }
  153. void qla4xxx_dump_mbox_registers(struct scsi_qla_host *ha)
  154. {
  155. unsigned long flags = 0;
  156. int i = 0;
  157. spin_lock_irqsave(&ha->hardware_lock, flags);
  158. for (i = 1; i < MBOX_REG_COUNT; i++)
  159. printk(KERN_INFO " Mailbox[%d] = %08x\n", i,
  160. readw(&ha->reg->mailbox[i]));
  161. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  162. }
  163. void qla4xxx_dump_registers(struct scsi_qla_host *ha)
  164. {
  165. unsigned long flags = 0;
  166. spin_lock_irqsave(&ha->hardware_lock, flags);
  167. __dump_registers(ha);
  168. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  169. }
  170. void qla4xxx_dump_buffer(void *b, uint32_t size)
  171. {
  172. uint32_t cnt;
  173. uint8_t *c = b;
  174. printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh "
  175. "Fh\n");
  176. printk("------------------------------------------------------------"
  177. "--\n");
  178. for (cnt = 0; cnt < size; cnt++, c++) {
  179. printk(KERN_DEBUG "%02x", *c);
  180. if (!(cnt % 16))
  181. printk(KERN_DEBUG "\n");
  182. else
  183. printk(KERN_DEBUG " ");
  184. }
  185. if (cnt % 16)
  186. printk(KERN_DEBUG "\n");
  187. }
  188. #endif /* 0 */