dec_esp.c 17 KB

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  1. /*
  2. * dec_esp.c: Driver for SCSI chips on IOASIC based TURBOchannel DECstations
  3. * and TURBOchannel PMAZ-A cards
  4. *
  5. * TURBOchannel changes by Harald Koerfgen
  6. * PMAZ-A support by David Airlie
  7. *
  8. * based on jazz_esp.c:
  9. * Copyright (C) 1997 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
  10. *
  11. * jazz_esp is based on David S. Miller's ESP driver and cyber_esp
  12. *
  13. * 20000819 - Small PMAZ-AA fixes by Florian Lohoff <flo@rfc822.org>
  14. * Be warned the PMAZ-AA works currently as a single card.
  15. * Dont try to put multiple cards in one machine - They are
  16. * both detected but it may crash under high load garbling your
  17. * data.
  18. * 20001005 - Initialization fixes for 2.4.0-test9
  19. * Florian Lohoff <flo@rfc822.org>
  20. *
  21. * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/delay.h>
  25. #include <linux/types.h>
  26. #include <linux/string.h>
  27. #include <linux/slab.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/proc_fs.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/stat.h>
  32. #include <linux/tc.h>
  33. #include <asm/dma.h>
  34. #include <asm/irq.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/system.h>
  37. #include <asm/dec/interrupts.h>
  38. #include <asm/dec/ioasic.h>
  39. #include <asm/dec/ioasic_addrs.h>
  40. #include <asm/dec/ioasic_ints.h>
  41. #include <asm/dec/machtype.h>
  42. #include <asm/dec/system.h>
  43. #define DEC_SCSI_SREG 0
  44. #define DEC_SCSI_DMAREG 0x40000
  45. #define DEC_SCSI_SRAM 0x80000
  46. #define DEC_SCSI_DIAG 0xC0000
  47. #include "scsi.h"
  48. #include <scsi/scsi_host.h>
  49. #include "NCR53C9x.h"
  50. static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
  51. static void dma_drain(struct NCR_ESP *esp);
  52. static int dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd *sp);
  53. static void dma_dump_state(struct NCR_ESP *esp);
  54. static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
  55. static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
  56. static void dma_ints_off(struct NCR_ESP *esp);
  57. static void dma_ints_on(struct NCR_ESP *esp);
  58. static int dma_irq_p(struct NCR_ESP *esp);
  59. static int dma_ports_p(struct NCR_ESP *esp);
  60. static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
  61. static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp);
  62. static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, struct scsi_cmnd * sp);
  63. static void dma_advance_sg(struct scsi_cmnd * sp);
  64. static void pmaz_dma_drain(struct NCR_ESP *esp);
  65. static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length);
  66. static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length);
  67. static void pmaz_dma_ints_off(struct NCR_ESP *esp);
  68. static void pmaz_dma_ints_on(struct NCR_ESP *esp);
  69. static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write);
  70. static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp);
  71. #define TC_ESP_RAM_SIZE 0x20000
  72. #define ESP_TGT_DMA_SIZE ((TC_ESP_RAM_SIZE/7) & ~(sizeof(int)-1))
  73. #define ESP_NCMD 7
  74. #define TC_ESP_DMAR_MASK 0x1ffff
  75. #define TC_ESP_DMAR_WRITE 0x80000000
  76. #define TC_ESP_DMA_ADDR(x) ((unsigned)(x) & TC_ESP_DMAR_MASK)
  77. u32 esp_virt_buffer;
  78. int scsi_current_length;
  79. volatile unsigned char cmd_buffer[16];
  80. volatile unsigned char pmaz_cmd_buffer[16];
  81. /* This is where all commands are put
  82. * before they are trasfered to the ESP chip
  83. * via PIO.
  84. */
  85. static irqreturn_t scsi_dma_merr_int(int, void *);
  86. static irqreturn_t scsi_dma_err_int(int, void *);
  87. static irqreturn_t scsi_dma_int(int, void *);
  88. static struct scsi_host_template dec_esp_template = {
  89. .module = THIS_MODULE,
  90. .name = "NCR53C94",
  91. .info = esp_info,
  92. .queuecommand = esp_queue,
  93. .eh_abort_handler = esp_abort,
  94. .eh_bus_reset_handler = esp_reset,
  95. .slave_alloc = esp_slave_alloc,
  96. .slave_destroy = esp_slave_destroy,
  97. .proc_info = esp_proc_info,
  98. .proc_name = "dec_esp",
  99. .can_queue = 7,
  100. .sg_tablesize = SG_ALL,
  101. .cmd_per_lun = 1,
  102. .use_clustering = DISABLE_CLUSTERING,
  103. };
  104. static struct NCR_ESP *dec_esp_platform;
  105. /***************************************************************** Detection */
  106. static int dec_esp_platform_probe(void)
  107. {
  108. struct NCR_ESP *esp;
  109. int err = 0;
  110. if (IOASIC) {
  111. esp = esp_allocate(&dec_esp_template, NULL, 1);
  112. /* Do command transfer with programmed I/O */
  113. esp->do_pio_cmds = 1;
  114. /* Required functions */
  115. esp->dma_bytes_sent = &dma_bytes_sent;
  116. esp->dma_can_transfer = &dma_can_transfer;
  117. esp->dma_dump_state = &dma_dump_state;
  118. esp->dma_init_read = &dma_init_read;
  119. esp->dma_init_write = &dma_init_write;
  120. esp->dma_ints_off = &dma_ints_off;
  121. esp->dma_ints_on = &dma_ints_on;
  122. esp->dma_irq_p = &dma_irq_p;
  123. esp->dma_ports_p = &dma_ports_p;
  124. esp->dma_setup = &dma_setup;
  125. /* Optional functions */
  126. esp->dma_barrier = 0;
  127. esp->dma_drain = &dma_drain;
  128. esp->dma_invalidate = 0;
  129. esp->dma_irq_entry = 0;
  130. esp->dma_irq_exit = 0;
  131. esp->dma_poll = 0;
  132. esp->dma_reset = 0;
  133. esp->dma_led_off = 0;
  134. esp->dma_led_on = 0;
  135. /* virtual DMA functions */
  136. esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
  137. esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
  138. esp->dma_mmu_release_scsi_one = 0;
  139. esp->dma_mmu_release_scsi_sgl = 0;
  140. esp->dma_advance_sg = &dma_advance_sg;
  141. /* SCSI chip speed */
  142. esp->cfreq = 25000000;
  143. esp->dregs = 0;
  144. /* ESP register base */
  145. esp->eregs = (void *)CKSEG1ADDR(dec_kn_slot_base +
  146. IOASIC_SCSI);
  147. /* Set the command buffer */
  148. esp->esp_command = (volatile unsigned char *) cmd_buffer;
  149. /* get virtual dma address for command buffer */
  150. esp->esp_command_dvma = virt_to_phys(cmd_buffer);
  151. esp->irq = dec_interrupt[DEC_IRQ_ASC];
  152. esp->scsi_id = 7;
  153. /* Check for differential SCSI-bus */
  154. esp->diff = 0;
  155. err = request_irq(esp->irq, esp_intr, IRQF_DISABLED,
  156. "ncr53c94", esp->ehost);
  157. if (err)
  158. goto err_alloc;
  159. err = request_irq(dec_interrupt[DEC_IRQ_ASC_MERR],
  160. scsi_dma_merr_int, IRQF_DISABLED,
  161. "ncr53c94 error", esp->ehost);
  162. if (err)
  163. goto err_irq;
  164. err = request_irq(dec_interrupt[DEC_IRQ_ASC_ERR],
  165. scsi_dma_err_int, IRQF_DISABLED,
  166. "ncr53c94 overrun", esp->ehost);
  167. if (err)
  168. goto err_irq_merr;
  169. err = request_irq(dec_interrupt[DEC_IRQ_ASC_DMA], scsi_dma_int,
  170. IRQF_DISABLED, "ncr53c94 dma", esp->ehost);
  171. if (err)
  172. goto err_irq_err;
  173. esp_initialize(esp);
  174. err = scsi_add_host(esp->ehost, NULL);
  175. if (err) {
  176. printk(KERN_ERR "ESP: Unable to register adapter\n");
  177. goto err_irq_dma;
  178. }
  179. scsi_scan_host(esp->ehost);
  180. dec_esp_platform = esp;
  181. }
  182. return 0;
  183. err_irq_dma:
  184. free_irq(dec_interrupt[DEC_IRQ_ASC_DMA], esp->ehost);
  185. err_irq_err:
  186. free_irq(dec_interrupt[DEC_IRQ_ASC_ERR], esp->ehost);
  187. err_irq_merr:
  188. free_irq(dec_interrupt[DEC_IRQ_ASC_MERR], esp->ehost);
  189. err_irq:
  190. free_irq(esp->irq, esp->ehost);
  191. err_alloc:
  192. esp_deallocate(esp);
  193. scsi_host_put(esp->ehost);
  194. return err;
  195. }
  196. static int __init dec_esp_probe(struct device *dev)
  197. {
  198. struct NCR_ESP *esp;
  199. resource_size_t start, len;
  200. int err;
  201. esp = esp_allocate(&dec_esp_template, NULL, 1);
  202. dev_set_drvdata(dev, esp);
  203. start = to_tc_dev(dev)->resource.start;
  204. len = to_tc_dev(dev)->resource.end - start + 1;
  205. if (!request_mem_region(start, len, dev->bus_id)) {
  206. printk(KERN_ERR "%s: Unable to reserve MMIO resource\n",
  207. dev->bus_id);
  208. err = -EBUSY;
  209. goto err_alloc;
  210. }
  211. /* Store base addr into esp struct. */
  212. esp->slot = start;
  213. esp->dregs = 0;
  214. esp->eregs = (void *)CKSEG1ADDR(start + DEC_SCSI_SREG);
  215. esp->do_pio_cmds = 1;
  216. /* Set the command buffer. */
  217. esp->esp_command = (volatile unsigned char *)pmaz_cmd_buffer;
  218. /* Get virtual dma address for command buffer. */
  219. esp->esp_command_dvma = virt_to_phys(pmaz_cmd_buffer);
  220. esp->cfreq = tc_get_speed(to_tc_dev(dev)->bus);
  221. esp->irq = to_tc_dev(dev)->interrupt;
  222. /* Required functions. */
  223. esp->dma_bytes_sent = &dma_bytes_sent;
  224. esp->dma_can_transfer = &dma_can_transfer;
  225. esp->dma_dump_state = &dma_dump_state;
  226. esp->dma_init_read = &pmaz_dma_init_read;
  227. esp->dma_init_write = &pmaz_dma_init_write;
  228. esp->dma_ints_off = &pmaz_dma_ints_off;
  229. esp->dma_ints_on = &pmaz_dma_ints_on;
  230. esp->dma_irq_p = &dma_irq_p;
  231. esp->dma_ports_p = &dma_ports_p;
  232. esp->dma_setup = &pmaz_dma_setup;
  233. /* Optional functions. */
  234. esp->dma_barrier = 0;
  235. esp->dma_drain = &pmaz_dma_drain;
  236. esp->dma_invalidate = 0;
  237. esp->dma_irq_entry = 0;
  238. esp->dma_irq_exit = 0;
  239. esp->dma_poll = 0;
  240. esp->dma_reset = 0;
  241. esp->dma_led_off = 0;
  242. esp->dma_led_on = 0;
  243. esp->dma_mmu_get_scsi_one = pmaz_dma_mmu_get_scsi_one;
  244. esp->dma_mmu_get_scsi_sgl = 0;
  245. esp->dma_mmu_release_scsi_one = 0;
  246. esp->dma_mmu_release_scsi_sgl = 0;
  247. esp->dma_advance_sg = 0;
  248. err = request_irq(esp->irq, esp_intr, IRQF_DISABLED, "PMAZ_AA",
  249. esp->ehost);
  250. if (err) {
  251. printk(KERN_ERR "%s: Unable to get IRQ %d\n",
  252. dev->bus_id, esp->irq);
  253. goto err_resource;
  254. }
  255. esp->scsi_id = 7;
  256. esp->diff = 0;
  257. esp_initialize(esp);
  258. err = scsi_add_host(esp->ehost, dev);
  259. if (err) {
  260. printk(KERN_ERR "%s: Unable to register adapter\n",
  261. dev->bus_id);
  262. goto err_irq;
  263. }
  264. scsi_scan_host(esp->ehost);
  265. return 0;
  266. err_irq:
  267. free_irq(esp->irq, esp->ehost);
  268. err_resource:
  269. release_mem_region(start, len);
  270. err_alloc:
  271. esp_deallocate(esp);
  272. scsi_host_put(esp->ehost);
  273. return err;
  274. }
  275. static void __exit dec_esp_platform_remove(void)
  276. {
  277. struct NCR_ESP *esp = dec_esp_platform;
  278. free_irq(esp->irq, esp->ehost);
  279. esp_deallocate(esp);
  280. scsi_host_put(esp->ehost);
  281. dec_esp_platform = NULL;
  282. }
  283. static void __exit dec_esp_remove(struct device *dev)
  284. {
  285. struct NCR_ESP *esp = dev_get_drvdata(dev);
  286. free_irq(esp->irq, esp->ehost);
  287. esp_deallocate(esp);
  288. scsi_host_put(esp->ehost);
  289. }
  290. /************************************************************* DMA Functions */
  291. static irqreturn_t scsi_dma_merr_int(int irq, void *dev_id)
  292. {
  293. printk("Got unexpected SCSI DMA Interrupt! < ");
  294. printk("SCSI_DMA_MEMRDERR ");
  295. printk(">\n");
  296. return IRQ_HANDLED;
  297. }
  298. static irqreturn_t scsi_dma_err_int(int irq, void *dev_id)
  299. {
  300. /* empty */
  301. return IRQ_HANDLED;
  302. }
  303. static irqreturn_t scsi_dma_int(int irq, void *dev_id)
  304. {
  305. u32 scsi_next_ptr;
  306. scsi_next_ptr = ioasic_read(IO_REG_SCSI_DMA_P);
  307. /* next page */
  308. scsi_next_ptr = (((scsi_next_ptr >> 3) + PAGE_SIZE) & PAGE_MASK) << 3;
  309. ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
  310. fast_iob();
  311. return IRQ_HANDLED;
  312. }
  313. static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
  314. {
  315. return fifo_count;
  316. }
  317. static void dma_drain(struct NCR_ESP *esp)
  318. {
  319. u32 nw, data0, data1, scsi_data_ptr;
  320. u16 *p;
  321. nw = ioasic_read(IO_REG_SCSI_SCR);
  322. /*
  323. * Is there something in the dma buffers left?
  324. */
  325. if (nw) {
  326. scsi_data_ptr = ioasic_read(IO_REG_SCSI_DMA_P) >> 3;
  327. p = phys_to_virt(scsi_data_ptr);
  328. switch (nw) {
  329. case 1:
  330. data0 = ioasic_read(IO_REG_SCSI_SDR0);
  331. p[0] = data0 & 0xffff;
  332. break;
  333. case 2:
  334. data0 = ioasic_read(IO_REG_SCSI_SDR0);
  335. p[0] = data0 & 0xffff;
  336. p[1] = (data0 >> 16) & 0xffff;
  337. break;
  338. case 3:
  339. data0 = ioasic_read(IO_REG_SCSI_SDR0);
  340. data1 = ioasic_read(IO_REG_SCSI_SDR1);
  341. p[0] = data0 & 0xffff;
  342. p[1] = (data0 >> 16) & 0xffff;
  343. p[2] = data1 & 0xffff;
  344. break;
  345. default:
  346. printk("Strange: %d words in dma buffer left\n", nw);
  347. break;
  348. }
  349. }
  350. }
  351. static int dma_can_transfer(struct NCR_ESP *esp, struct scsi_cmnd * sp)
  352. {
  353. return sp->SCp.this_residual;
  354. }
  355. static void dma_dump_state(struct NCR_ESP *esp)
  356. {
  357. }
  358. static void dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
  359. {
  360. u32 scsi_next_ptr, ioasic_ssr;
  361. unsigned long flags;
  362. if (vaddress & 3)
  363. panic("dec_esp.c: unable to handle partial word transfers, yet...");
  364. dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
  365. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  366. fast_mb();
  367. ioasic_ssr = ioasic_read(IO_REG_SSR);
  368. ioasic_ssr &= ~IO_SSR_SCSI_DMA_EN;
  369. ioasic_write(IO_REG_SSR, ioasic_ssr);
  370. fast_wmb();
  371. ioasic_write(IO_REG_SCSI_SCR, 0);
  372. ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
  373. /* prepare for next page */
  374. scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
  375. ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
  376. ioasic_ssr |= (IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
  377. fast_wmb();
  378. ioasic_write(IO_REG_SSR, ioasic_ssr);
  379. fast_iob();
  380. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  381. }
  382. static void dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
  383. {
  384. u32 scsi_next_ptr, ioasic_ssr;
  385. unsigned long flags;
  386. if (vaddress & 3)
  387. panic("dec_esp.c: unable to handle partial word transfers, yet...");
  388. dma_cache_wback_inv((unsigned long) phys_to_virt(vaddress), length);
  389. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  390. fast_mb();
  391. ioasic_ssr = ioasic_read(IO_REG_SSR);
  392. ioasic_ssr &= ~(IO_SSR_SCSI_DMA_DIR | IO_SSR_SCSI_DMA_EN);
  393. ioasic_write(IO_REG_SSR, ioasic_ssr);
  394. fast_wmb();
  395. ioasic_write(IO_REG_SCSI_SCR, 0);
  396. ioasic_write(IO_REG_SCSI_DMA_P, vaddress << 3);
  397. /* prepare for next page */
  398. scsi_next_ptr = ((vaddress + PAGE_SIZE) & PAGE_MASK) << 3;
  399. ioasic_write(IO_REG_SCSI_DMA_BP, scsi_next_ptr);
  400. ioasic_ssr |= IO_SSR_SCSI_DMA_EN;
  401. fast_wmb();
  402. ioasic_write(IO_REG_SSR, ioasic_ssr);
  403. fast_iob();
  404. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  405. }
  406. static void dma_ints_off(struct NCR_ESP *esp)
  407. {
  408. disable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
  409. }
  410. static void dma_ints_on(struct NCR_ESP *esp)
  411. {
  412. enable_irq(dec_interrupt[DEC_IRQ_ASC_DMA]);
  413. }
  414. static int dma_irq_p(struct NCR_ESP *esp)
  415. {
  416. return (esp->eregs->esp_status & ESP_STAT_INTR);
  417. }
  418. static int dma_ports_p(struct NCR_ESP *esp)
  419. {
  420. /*
  421. * FIXME: what's this good for?
  422. */
  423. return 1;
  424. }
  425. static void dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
  426. {
  427. /*
  428. * DMA_ST_WRITE means "move data from device to memory"
  429. * so when (write) is true, it actually means READ!
  430. */
  431. if (write)
  432. dma_init_read(esp, addr, count);
  433. else
  434. dma_init_write(esp, addr, count);
  435. }
  436. static void dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp)
  437. {
  438. sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
  439. }
  440. static void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, struct scsi_cmnd * sp)
  441. {
  442. int sz = sp->SCp.buffers_residual;
  443. struct scatterlist *sg = sp->SCp.buffer;
  444. while (sz >= 0) {
  445. sg[sz].dma_address = page_to_phys(sg[sz].page) + sg[sz].offset;
  446. sz--;
  447. }
  448. sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
  449. }
  450. static void dma_advance_sg(struct scsi_cmnd * sp)
  451. {
  452. sp->SCp.ptr = (char *)(sp->SCp.buffer->dma_address);
  453. }
  454. static void pmaz_dma_drain(struct NCR_ESP *esp)
  455. {
  456. memcpy(phys_to_virt(esp_virt_buffer),
  457. (void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
  458. ESP_TGT_DMA_SIZE),
  459. scsi_current_length);
  460. }
  461. static void pmaz_dma_init_read(struct NCR_ESP *esp, u32 vaddress, int length)
  462. {
  463. volatile u32 *dmareg =
  464. (volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
  465. if (length > ESP_TGT_DMA_SIZE)
  466. length = ESP_TGT_DMA_SIZE;
  467. *dmareg = TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
  468. iob();
  469. esp_virt_buffer = vaddress;
  470. scsi_current_length = length;
  471. }
  472. static void pmaz_dma_init_write(struct NCR_ESP *esp, u32 vaddress, int length)
  473. {
  474. volatile u32 *dmareg =
  475. (volatile u32 *)CKSEG1ADDR(esp->slot + DEC_SCSI_DMAREG);
  476. memcpy((void *)CKSEG1ADDR(esp->slot + DEC_SCSI_SRAM +
  477. ESP_TGT_DMA_SIZE),
  478. phys_to_virt(vaddress), length);
  479. wmb();
  480. *dmareg = TC_ESP_DMAR_WRITE | TC_ESP_DMA_ADDR(ESP_TGT_DMA_SIZE);
  481. iob();
  482. }
  483. static void pmaz_dma_ints_off(struct NCR_ESP *esp)
  484. {
  485. }
  486. static void pmaz_dma_ints_on(struct NCR_ESP *esp)
  487. {
  488. }
  489. static void pmaz_dma_setup(struct NCR_ESP *esp, u32 addr, int count, int write)
  490. {
  491. /*
  492. * DMA_ST_WRITE means "move data from device to memory"
  493. * so when (write) is true, it actually means READ!
  494. */
  495. if (write)
  496. pmaz_dma_init_read(esp, addr, count);
  497. else
  498. pmaz_dma_init_write(esp, addr, count);
  499. }
  500. static void pmaz_dma_mmu_get_scsi_one(struct NCR_ESP *esp, struct scsi_cmnd * sp)
  501. {
  502. sp->SCp.ptr = (char *)virt_to_phys(sp->request_buffer);
  503. }
  504. #ifdef CONFIG_TC
  505. static int __init dec_esp_tc_probe(struct device *dev);
  506. static int __exit dec_esp_tc_remove(struct device *dev);
  507. static const struct tc_device_id dec_esp_tc_table[] = {
  508. { "DEC ", "PMAZ-AA " },
  509. { }
  510. };
  511. MODULE_DEVICE_TABLE(tc, dec_esp_tc_table);
  512. static struct tc_driver dec_esp_tc_driver = {
  513. .id_table = dec_esp_tc_table,
  514. .driver = {
  515. .name = "dec_esp",
  516. .bus = &tc_bus_type,
  517. .probe = dec_esp_tc_probe,
  518. .remove = __exit_p(dec_esp_tc_remove),
  519. },
  520. };
  521. static int __init dec_esp_tc_probe(struct device *dev)
  522. {
  523. int status = dec_esp_probe(dev);
  524. if (!status)
  525. get_device(dev);
  526. return status;
  527. }
  528. static int __exit dec_esp_tc_remove(struct device *dev)
  529. {
  530. put_device(dev);
  531. dec_esp_remove(dev);
  532. return 0;
  533. }
  534. #endif
  535. static int __init dec_esp_init(void)
  536. {
  537. int status;
  538. status = tc_register_driver(&dec_esp_tc_driver);
  539. if (!status)
  540. dec_esp_platform_probe();
  541. if (nesps) {
  542. pr_info("ESP: Total of %d ESP hosts found, "
  543. "%d actually in use.\n", nesps, esps_in_use);
  544. esps_running = esps_in_use;
  545. }
  546. return status;
  547. }
  548. static void __exit dec_esp_exit(void)
  549. {
  550. dec_esp_platform_remove();
  551. tc_unregister_driver(&dec_esp_tc_driver);
  552. }
  553. module_init(dec_esp_init);
  554. module_exit(dec_esp_exit);